Hi Doug, Olof,
On Wednesday 08 of May 2013 12:33:34 Olof Johansson wrote:
Hi,
On Wed, May 8, 2013 at 11:48 AM, Doug Anderson diand...@chromium.org
wrote:
Olof,
On Wed, May 8, 2013 at 11:19 AM, Olof Johansson o...@lixom.net wrote:
Seems like this should be selected by the SoC
Amit,
On 07-05-2013 09:00, Amit Daniel Kachhap wrote:
This patch adds some extra register bitfield definations and cleans
up the code to prepare for moving register macros and definations inside
the TMU data section.
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel
Hey Amit,
On 07-05-2013 09:00, Amit Daniel Kachhap wrote:
This patch migrates the TMU register definition/bitfields to data file. This
is needed to support SoC's which use the same TMU controller but register
validity, offsets or bitfield may slightly vary across SOC's.
Acked-by: Kukjin Kim
On 07-05-2013 09:01, Amit Daniel Kachhap wrote:
This patch uses the TMU status register to know the generated interrupts
and only clear them in the interrupt handler.
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
On 07-05-2013 09:01, Amit Daniel Kachhap wrote:
TMU probe function now checks for a device tree defined regulator.
For compatibility reasons it is allowed to probe driver even without
this regulator defined.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park
On 07-05-2013 09:01, Amit Daniel Kachhap wrote:
This patch adds support to handle multiple instances of the TMU controllers.
This is done by removing the static structure to register with the core
thermal
and creating it dynamically for each instance of the TMU controller. The
interrupt is
Tomasz / Olof,
On Thu, May 9, 2013 at 2:45 AM, Tomasz Figa t.f...@samsung.com wrote:
Nothing stops you from doing that on your own. I tend to push back
onto the maintainers to get them engaged in their own housekeeping,
but anyone is free to :)
I will probably leave this to the maintainers at
Previously if you had MACH_EXYNOS5_DT but not MACH_EXYNOS4_DT you'd be
missing the pincontrol definitions. Move PINCTRL selects to the arch
level since we should be enabling the code for all exynos variants.
Update the PINCTRL descriptions to indicate that PINCTRL_EXYNOS is not
for exynos5440.
Doug Anderson wrote:
Tomasz / Olof,
Hi Doug, Tomasz and Olof
On Thu, May 9, 2013 at 2:45 AM, Tomasz Figa t.f...@samsung.com wrote:
Nothing stops you from doing that on your own. I tend to push back
onto the maintainers to get them engaged in their own housekeeping,
but anyone is free
Olof Johansson wrote:
On Mon, Apr 29, 2013 at 05:01:47PM +0530, Inderpal Singh wrote:
The kernel crashes while resuming from AFTR idle mode. It happens
because L2 cache was not going into retention state.
This patch configures the USE_RETENTION bit of ARM_L2_OPTION register
so that it
Kukjin,
On Thu, Apr 25, 2013 at 8:38 AM, Kukjin Kim kgene@samsung.com wrote:
It doesn't have to be something super-elaborate, but I'd like it to be
sort of
self-documenting in a way that I don't have to look through the series of
patches to get an overview of what's in the branch. Of
On Thu, May 9, 2013 at 4:32 PM, Kukjin Kim kgene@samsung.com wrote:
Olof Johansson wrote:
On Mon, Apr 29, 2013 at 05:01:47PM +0530, Inderpal Singh wrote:
The kernel crashes while resuming from AFTR idle mode. It happens
because L2 cache was not going into retention state.
This patch
Hi Padmavathi,
I managed to review the patch a bit more thoroughly and I had few more
comments. You can find them inline.
On Tuesday 07 of May 2013 12:13:34 Padmavathi Venna wrote:
Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can
Hi Padmavathi,
On Tuesday 07 of May 2013 12:13:33 Padmavathi Venna wrote:
Samsung S5PV210 and Exynos SoC has a separate subsystem for audio. This
subsystem has a internal clock controller which controls i2s0 and pcm0
clocks. This patch series adds the Samsung audio subsytem clock to the
Heiko Stübner wrote:
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.
The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
Hi,
On Thu, May 9, 2013 at 6:58 PM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
Hello Amit,
On 07-05-2013 09:00, Amit Daniel Kachhap wrote:
This patch renames and moves include/linux/platform_data/exynos_thermal.h to
drivers/thermal/samsung/exynos_tmu.h. This file movement is needed as
Hi Eduardo,
On Thu, May 9, 2013 at 7:09 PM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
Hey Amit,
On 07-05-2013 09:00, Amit Daniel Kachhap wrote:
This code splits the exynos tmu driver code into SOC specific data parts.
This will simplify adding new SOC specific data to the same TMU
Hi,
On Thu, May 9, 2013 at 7:22 PM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
Amit,
On 07-05-2013 09:00, Amit Daniel Kachhap wrote:
This patch adds some extra register bitfield definations and cleans
up the code to prepare for moving register macros and definations inside
the TMU data
Hi Eduardo,
On Thu, May 9, 2013 at 8:02 PM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
Hey Amit,
On 07-05-2013 09:00, Amit Daniel Kachhap wrote:
This patch migrates the TMU register definition/bitfields to data file. This
is needed to support SoC's which use the same TMU controller but
Hi Eduardo,
On Thu, May 9, 2013 at 8:17 PM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
Hey Amit,
On 07-05-2013 09:01, Amit Daniel Kachhap wrote:
This patch modifies TMU controller to add changes needed to work with
exynos5440 platform. Also register definitions and required
On Thu, May 9, 2013 at 8:23 PM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
On 07-05-2013 09:01, Amit Daniel Kachhap wrote:
This patch adds support to handle multiple instances of the TMU controllers.
This is done by removing the static structure to register with the core
thermal
and
On Thu, May 9, 2013 at 7:55 PM, Vikas Sajjan vikas.saj...@linaro.org wrote:
Hi Tomasz,
On 10 May 2013 05:35, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Vikas,
On Wednesday 08 of May 2013 11:31:34 Vikas Sajjan wrote:
Adds display timing node for a DP panel to Arndale Board DTS file
22 matches
Mail list logo
