Exynos hdmi ddc is a I2C device and if we register hdmi ddc
driver with id_table as NULL, cause failure in probing.
id_table field should not be NULL for i2c_driver registeration.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_ddc.c |5 +
1 file
Exynos hdmiphy operations and configs are kept inside
the hdmi driver. Hdmiphy related code is tightly coupled
with hdmi IP driver.
This patche moves hdmiphy related code to hdmiphy driver.
It will help in cleanly supporting the hdmiphy variations
in further SoCs.
Signed-off-by: Rahul Sharma
On 02/07/13 14:26, Mark Brown wrote:
From: Mark Brown broo...@linaro.org
Ensure that the definitions of functions match the prototypes used by
other modules by including the header with the prototypes in the files
with the definitions.
Signed-off-by: Mark Brown broo...@linaro.org
Thanks,
Looks good to me.
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
On 08/30/2013 01:15 AM, Mark Brown wrote:
From: Mark Brown broo...@linaro.org
It is possible that we may fail to set the clock rate, if we do so then
log the failure and don't bother reprogramming the IP.
Signed-off-by:
Hi Rahul.
Thanks for your patch set.
I had just quick review to all patch series. And I think we could fully hide
hdmiphy interfaces,
exynos_hdmiphy_enable/disable/check_mode/set_mode/conf_apply, from hdmi
driver.
That may be prototyped like below,
at exynos_hdmi.h
/* Define hdmiphy callbacks.
One more thing, you would need to check if other driver can be probed in
probe context. With your patch, exynos_hdmiphy_driver_register() is called
in hdmi_probe() via hdmi_get_phy_device(), and then
platform_driver_reigster() is called via the
exynos_hdmiphy_driver_register(). I remember that was
Add SPI device tree nodes to Exynos5420 SoC
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Andrew Bresticker abres...@chromium.org
---
Note: This patch is rebased on Kgene's for-next branch and is dependent on
[V3] ARM:
Exynos5420 Mobile Storage Host controller has Security Management Unit
(SMU) for channel 0 and channel 1 (mainly for eMMC).This patch configures
SMU for exynos5420.
This patch is on top of the below patches
[1]mmc: dw_mmc: Add exynos resume_noirq callback to clear WAKEUP_INT.
[2]ARM: dts: Add
changes from V3: changes only in the patch
mmc: dw_mmc: exynos: configure SMU in exynos5420.
1.Added new compatible string samsung,exynos5420-dw-mshc-smu for
the host with SMU.
2.Used compatible string samsung,exynos5420-dw-mshc-smu
for controller
Thanks Mr. Dae,
I have some points for discussion.
On 30 August 2013 14:03, Inki Dae inki@samsung.com wrote:
Hi Rahul.
Thanks for your patch set.
I had just quick review to all patch series. And I think we could fully hide
hdmiphy interfaces,
ARM EXYNOS cpuidle driver is currently not multiplatform support ready
(as it uses device_initcall() for initialization and doesn't check on
what platform it is running). Fix it by converting the driver to be
a platform driver and registering exynos_cpuidle platform device from
Add cpuidle-exynos.max_states= parameter to allow user to specify
the maximum of allowed CPU idle states for ARM EXYNOS cpuidle driver.
This change is needed because C1 state (AFTR mode) is often not able
to work properly due to incompatibility with some bootloader versions.
Usage examples:
This patch updates the exynos-dw-mshc.txt.Currently we are using
pinctrl binding property to describe the CMD and DATA line's
of Mobile Storage Host Controller(mshc) node.
Compatibility string is added in the driver with the patch.
[1] mmc: dw_mmc: exynos: configure SMU in exynos5420.
DT nodes
Hi Leela,
This patch removes the global variables in the driver file and
group them into a structure.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
---
Note: This patch is rebased on
From: Mark Brown broo...@linaro.org
The clock aliases for SPI devices do not reflect the actual usage in the
driver causing the SPI controller to fail to probe when the clock driver
is in use, fix this up.
Signed-off-by: Mark Brown broo...@linaro.org
---
drivers/clk/samsung/clk-s3c64xx.c | 4
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