Add firmware node for doing secure boot on Arndale-octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
Secure firmware support for booting secondary CPUs on Exynos5420
based boards with trustzone support.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/firmware.c|6 +-
On trustzone enabled boards non-secure SYSRAM is used for
secondary CPU boot up.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/common.c | 11 +++
arch/arm/mach-exynos/include/mach/map.h |
On trustzone enabled boards non-secure SYSRAM is used for
secondary CPU boot up.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/common.c | 11 +++
arch/arm/mach-exynos/include/mach/map.h |
Secure firmware support for booting secondary CPUs on Exynos5420
based boards with trustzone support.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/mach-exynos/firmware.c|6 +-
Add firmware node for doing secure boot on Arndale-octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
Added PMIC node to Arndale-Octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
* Renamed the labels and fixed voltage levels as per board schema.
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 281 +
1 file changed, 281
On Tue, Dec 17, 2013 at 09:12:42AM -0600, Daniel Drake wrote:
On Mon, Dec 16, 2013 at 5:40 PM, Daniel Vetter dan...@ffwll.ch wrote:
Have a bit of logic in the exynos -detect function to re-try a 2nd
round of edid probing after each hdp interrupt if the first one
returns an -ENXIO. Only
Added GPIO based wake up key to Arndale octa board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
LDO10 is directly connected to MMC controller. Register this
through vmmc-supply property.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
Hi Kukjin,
Am Sonntag, 15. Dezember 2013, 21:21:54 schrieb Kukjin Kim:
The following changes since commit
6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae:
Linux 3.13-rc1 (2013-11-22 11:30:55 -0800)
are available in the git repository at:
From: Andrew Bresticker abres...@chromium.org
In addition to enabling async suspend/resume on the xhci-plat device,
we must enable it for the dwc3 device (the parent of xhci-plat) in order
to make the full USB stack resume asynchronously. Like the xhci-plat,
ehci-s5p, and ohci-exynos drivers,
From: Andrew Bresticker abres...@chromium.org
USB host controllers can take a significant amount of time to suspend
and resume, adding several hundred miliseconds to the kernel resume
time. Since the XHCI controller has no outside dependencies (other than
clocks, which are suspended late/resumed
From: Andrew Bresticker abres...@chromium.org
In addition to enabling async suspend/resume on the xhci-plat device,
we must enable it for the dwc3-exynos platform device in order to make
the full USB stack resume asynchronously. Like the xhci-plat, ehci-s5p,
and ohci-exynos drivers, there are no
From: Andrew Bresticker abres...@chromium.org
USB host controllers can take a significant amount of time to suspend
and resume, adding several hundred miliseconds to the kernel resume
time. Since the Exynos OHCI controller has no outside dependencies
(other than clocks, which are suspended
From: Andrew Bresticker abres...@chromium.org
USB host controllers can take a significant amount of time to suspend
and resume, adding several hundred miliseconds to the kernel resume
time. Since the Exynos EHCI controller has no outside dependencies
(other than clocks, which are suspended
Hello Wim Van Sebroeck,
Can you kindly look into this series and take necessary action..?
Best Wishes,
Leela Krishna.
On Fri, Dec 6, 2013 at 2:47 PM, Leela Krishna Amudala
l.kris...@samsung.com wrote:
This patchset does the following things
- Adds pmusysreg device node to
On Fri, Dec 13, 2013 at 01:53:54PM +0100, Linus Walleij wrote:
This isolates the custom S3C64xx GPIO definition table to
linux/platform_data/gpio-samsung-s3x64xx.h as this is
used in a few different places in the kernel, removing the
need to depend on the implicit inclusion of mach/gpio.h
Add a minimal board dts file for EXYNOS4412 based FriendlyARM's
TINY4412 board. This patch including support peripherals like
UART, SD card on SDMMC2 port and GPIO connected LEDs.
Signed-off-by: Alex Ling kasiml...@gmail.com
---
Changes for v2:
- Clean up patch description
- Fix LED labels as
Hi Kukjin,
On Thursday 12 of December 2013 08:32:02 Abhilash Kesavan wrote:
Fix wrong clock number in mdma0 node.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Friday 22 of November 2013 14:21:08 Seung-Woo Kim wrote:
The SRC_MFC register was incorrect. This patch corrects it.
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
---
drivers/clk/samsung/clk-exynos4.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
Hi Alex,
On Wednesday 18 of December 2013 21:23:59 Alex Ling wrote:
Add a minimal board dts file for EXYNOS4412 based FriendlyARM's
TINY4412 board. This patch including support peripherals like
UART, SD card on SDMMC2 port and GPIO connected LEDs.
Signed-off-by: Alex Ling
Hi Sachin,
On Thursday 05 of December 2013 15:14:24 Sachin Kamat wrote:
Added regulator entries to Exynos5420 SMDK board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
Changed node name
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 216
Hi Kukjin,
On Tuesday 10 of December 2013 06:27:27 Kukjin Kim wrote:
On 12/05/13 18:44, Sachin Kamat wrote:
Added regulator entries to Exynos5420 SMDK board.
Signed-off-by: Sachin Kamatsachin.ka...@linaro.org
---
Changes since v1:
Changed node name
---
On Tuesday 10 of December 2013 10:26:40 Naveen Krishna Ch wrote:
Hello Tomasz,
On 9 December 2013 22:01, Tomasz Figa t.f...@samsung.com wrote:
Hi Naveen,
On Friday 22 of November 2013 11:44:11 Naveen Krishna Chatradhi wrote:
fifo_depth of the HSI2C is not constant
Exynos5420
Hi,
On Tue, Dec 17, 2013 at 03:35:54PM -0800, David Cohen wrote:
On Tue, Dec 17, 2013 at 03:31:40PM -0800, David Cohen wrote:
On Thu, Dec 12, 2013 at 03:38:38PM -0600, Felipe Balbi wrote:
hi all,
these patches add pm_runtime support for all glue layers.
I plan to add
On Wed, Dec 18, 2013 at 09:36:14AM -0600, Felipe Balbi wrote:
Hi,
On Tue, Dec 17, 2013 at 03:35:54PM -0800, David Cohen wrote:
On Tue, Dec 17, 2013 at 03:31:40PM -0800, David Cohen wrote:
On Thu, Dec 12, 2013 at 03:38:38PM -0600, Felipe Balbi wrote:
hi all,
these patches add
Hi Naveen,
On Tuesday 10 of December 2013 12:12:25 Naveen Krishna Chatradhi wrote:
Exynos5420 has 5 TMU channels, the TRIMINFO register is
misplaced for TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a contains data for TMU channel 4
On Tuesday 10 of December 2013 12:11:28 Naveen Krishna Chatradhi wrote:
This patch replaces the inten_rise_shift/mask and inten_fall_shift/mask
with intclr_rise_shift/mask and intclr_fall_shift/mask respectively.
Currently, inten_rise_shift/mask and inten_fall_shift/mask bits are only used
to
On Tuesday 10 of December 2013 12:11:56 Naveen Krishna Chatradhi wrote:
On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.
To support that, we introduced a ADDRESS_MULTIPLE flag in the
driver and the 2nd set of register base and size are provided
in the reg
On Tuesday 10 of December 2013 14:37:13 Sachin Kamat wrote:
On 13 November 2013 17:51, Tomasz Figa tomasz.f...@gmail.com wrote:
On Wednesday 13 of November 2013 12:52:05 Bartlomiej Zolnierkiewicz wrote:
[+ DT maintainers]
Hi,
On Wednesday, November 13, 2013 11:27:03 AM Sylwester
On Wed, Dec 18, 2013 at 04:09:34PM +0530, Yuvaraj Kumar C D wrote:
From: Andrew Bresticker abres...@chromium.org
In addition to enabling async suspend/resume on the xhci-plat device,
we must enable it for the dwc3 device (the parent of xhci-plat) in order
to make the full USB stack resume
On Wed, Dec 18, 2013 at 04:09:33PM +0530, Yuvaraj Kumar C D wrote:
From: Andrew Bresticker abres...@chromium.org
In addition to enabling async suspend/resume on the xhci-plat device,
we must enable it for the dwc3-exynos platform device in order to make
the full USB stack resume
On Wed, Dec 18, 2013 at 2:43 AM, Daniel Vetter dan...@ffwll.ch wrote:
I think we can do it simpler. When you get a hpd interrupt you eventually
call drm_helper_hpd_irq_event which will update all the state and poke
connectors. I'd just create a delay_work which you launch from
hdmi_irq_thread
Hi Vikas, Young-Gun,
On Wednesday 11 of December 2013 16:25:16 Vikas Sajjan wrote:
From: Young-Gun Jang yg1004.j...@samsung.com
Adds CMU virtual addresses for exynos5260.
Change-Id: Ia4f4eda96187d8d9e1edfc1a6b025af56d3bc43e
This line should be dropped.
Signed-off-by: Young-Gun Jang
Hi Vikas, Pankaj,
On Wednesday 11 of December 2013 16:25:15 Vikas Sajjan wrote:
Adds initial PMU support for Exynos5260
Following are the changes done
--
1) Added initial PMU support for exynos5260
2) Added exynos5260_iodesc for mapping 5260 specific SFRs.
On Wed, Dec 18, 2013 at 10:28:37AM -0600, Daniel Drake wrote:
On Wed, Dec 18, 2013 at 2:43 AM, Daniel Vetter dan...@ffwll.ch wrote:
I think we can do it simpler. When you get a hpd interrupt you eventually
call drm_helper_hpd_irq_event which will update all the state and poke
connectors.
On 12/12/13 20:34, Leela Krishna Amudala wrote:
Hi Kukjin,
Can you kindly look into this patch and take necessary action..?
Best Wishes,
Leela Krishna.
On Tue, Nov 12, 2013 at 9:02 PM, Leela Krishna Amudala
l.kris...@samsung.com wrote:
Hi Kukjin,
Thanks for reviewing the patch.
On Tue,
On 12/12/13 20:36, Leela Krishna Amudala wrote:
Hi Kukjin,
Even though you said it is applied, I didn't see this patch in any of
your trees.
Can you kindly look into this patch and take necessary action..?
Applied, thanks.
Kukjin
Best Wishes,
Leela Krishna.
On Tue, Nov 12, 2013 at 8:13 PM,
On 12/12/13 20:35, Leela Krishna Amudala wrote:
Hi Kukjin,
Even though you said it is applied, I didn't see this patch in any of
your trees.
Can you kindly look into this patch and take necessary action..?
Applied, thanks.
Kukjin
Best Wishes,
Leela Krishna.
On Tue, Nov 12, 2013 at 8:39 PM,
On 12/17/13 21:27, Tomasz Figa wrote:
On Tuesday 17 of December 2013 21:23:46 kg...@kernel.org wrote:
Tomasz Figa wrote:
Hi Kukjin,
Hi,
On Monday 16 of December 2013 05:21:21 Kukjin Kim wrote:
The following changes since commit
6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae:
Linux
On 12/18/13 15:11, MyungJoo Ham wrote:
On Tue, Dec 17, 2013 at 8:52 PM,kg...@kernel.org wrote:
From: Kukjin Kimkgene@samsung.com
We don't need to keep the definitions for exynos4_bus into
mach-exynos/ so this moves them into drviers/devfreq with
adding header file.
Acked-by: MyungJoo
On 10 December 2013 12:08, Sachin Kamat sachin.ka...@linaro.org wrote:
S2MPS11 voltage regulator is commonly used on the latest Exynos
boards like SMDK5420, Arndale-Octa, etc. Hence it makes sense to
enable it like S5M8767A voltage regulator.
Signed-off-by: Sachin Kamat
On 12/18/13 23:49, Tomasz Figa wrote:
Hi Kukjin,
Hi,
On Thursday 12 of December 2013 08:32:02 Abhilash Kesavan wrote:
Fix wrong clock number in mdma0 node.
Signed-off-by: Abhilash Kesavana.kesa...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |2 +-
1 file changed, 1
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote:
From: Andrew Bresticker abres...@chromium.org
The gate clocks for the MFC sysmmus appear to be flipped, i.e.
GATE_IP_MFC[2] gates
Hi Kukjin,
On 12 November 2013 15:53, Kukjin Kim kg...@kernel.org wrote:
Sachin Kamat wrote:
Following is more clear?
ARM: dts: Add missing GPIO entries for sd_bus_width4 in exynos5420-pinctrl
Adds missing GPIO entries for sd_bus nodes in exynos5420-pinctrl.
Signed-off-by: Sachin Kamat
On 12/13/13 01:12, Tomasz Figa wrote:
The node contains reg property, so unit-address suffix should be present
in its name.
Signed-off-by: Tomasz Figat.f...@samsung.com
Acked-by: Kyungmin Parkkyungmin.p...@samsung.com
Reviewed-by: Sylwester Nawrockis.nawro...@samsung.com
---
Hi Sachin,
2013/12/18 Sachin Kamat sachin.ka...@linaro.org:
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote:
From: Andrew Bresticker abres...@chromium.org
The gate clocks for the
Hi Kukjin,
2013/12/18 Kukjin Kim kgene@samsung.com:
On 12/13/13 01:12, Tomasz Figa wrote:
The node contains reg property, so unit-address suffix should be present
in its name.
Signed-off-by: Tomasz Figat.f...@samsung.com
Acked-by: Kyungmin Parkkyungmin.p...@samsung.com
Reviewed-by:
On Mon, Dec 9, 2013 at 12:56 PM, Kukjin Kim kgene@samsung.com wrote:
On 12/10/13 01:16, Doug Anderson wrote:
Yuvaraj,
On Sun, Dec 8, 2013 at 10:38 PM, Yuvaraj Kumar C Dyuvaraj...@gmail.com
wrote:
Commit 0c3de788 (ARM: dts: change status property of dwmmc nodes
for exynos5250) missed
Hi Sachin,
2013/11/13 Sachin Kamat sachin.ka...@linaro.org:
Hi Leela,
Thanks for the detailed explanation.
On 12 November 2013 17:20, Leela Krishna Amudala
leelakrishn...@gmail.com wrote:
Hi Sachin,
On Tue, Nov 12, 2013 at 3:53 PM, Kukjin Kim kg...@kernel.org wrote:
Sachin Kamat wrote:
Quoting Tomasz Figa (2013-12-18 10:28:57)
Hi Sachin,
2013/12/18 Sachin Kamat sachin.ka...@linaro.org:
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote:
From: Andrew
Quoting Tomasz Figa (2013-12-18 06:49:10)
Hi Kukjin,
On Thursday 12 of December 2013 08:32:02 Abhilash Kesavan wrote:
Fix wrong clock number in mdma0 node.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |2 +-
1 file changed, 1
On 12/19/13 03:38, Olof Johansson wrote:
On Mon, Dec 9, 2013 at 12:56 PM, Kukjin Kimkgene@samsung.com wrote:
On 12/10/13 01:16, Doug Anderson wrote:
Yuvaraj,
On Sun, Dec 8, 2013 at 10:38 PM, Yuvaraj Kumar C Dyuvaraj...@gmail.com
wrote:
Commit 0c3de788 (ARM: dts: change status property
On Tue, Dec 17, 2013 at 11:12 PM, Daniel Drake dr...@endlessm.com wrote:
On Mon, Dec 16, 2013 at 5:40 PM, Daniel Vetter dan...@ffwll.ch wrote:
Have a bit of logic in the exynos -detect function to re-try a 2nd
round of edid probing after each hdp interrupt if the first one
returns an
On Wed, Dec 18, 2013 at 1:58 PM, Daniel Kurtz djku...@chromium.org wrote:
+seanpaul
I think the problem is that the hdmi irq is really just an undebounced
gpio interrupt, and thus, it is firing way too soon.
The chromium kernel adds an excplicit 1.1 second timer to debounce hpd
between the
On Wed, Dec 18, 2013 at 2:18 PM, Daniel Drake dr...@endlessm.com wrote:
Yes, this looks very similar to the approach I tried earlier. I guess
the patch was written for the same reasons as well.
Sean, any objections to me taking your patch and sending it upstream?
On Wednesday 18 of December 2013 11:24:30 Mike Turquette wrote:
Quoting Tomasz Figa (2013-12-18 10:28:57)
Hi Sachin,
2013/12/18 Sachin Kamat sachin.ka...@linaro.org:
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On
Hi Tomasz,
On 10 November 2013 22:44, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin, Andrew,
On Friday 08 of November 2013 15:44:08 Sachin Kamat wrote:
From: Andrew Bresticker abres...@chromium.org
Register the APLL rate table so that we can set the APLL rate from
the cpufreq driver.
Quoting Tomasz Figa (2013-12-18 06:54:30)
On Friday 22 of November 2013 14:21:08 Seung-Woo Kim wrote:
The SRC_MFC register was incorrect. This patch corrects it.
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
---
drivers/clk/samsung/clk-exynos4.c |2 +-
1 files changed, 1
Hi Tomasz,
On 18 December 2013 20:46, Tomasz Figa t.f...@samsung.com wrote:
Hi Sachin,
On Thursday 05 of December 2013 15:14:24 Sachin Kamat wrote:
Added regulator entries to Exynos5420 SMDK board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
Changed node
Hello Tomasz,
On 18 December 2013 21:20, Tomasz Figa t.f...@samsung.com wrote:
Hi Naveen,
On Tuesday 10 of December 2013 12:12:25 Naveen Krishna Chatradhi wrote:
Exynos5420 has 5 TMU channels, the TRIMINFO register is
misplaced for TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains
On 29 November 2013 11:41, Lukasz Majewski l.majew...@samsung.com wrote:
Hi Sachin,
Use common clock framework (CCF) APIs to set the clock rates
instead of direct register manipulation. This now updates the
sysfs entry (cpuinfo_cur_freq) correctly which did not reflect
the correct value
This patch replaces the inten_rise_shift/mask and inten_fall_shift/mask
with intclr_rise_shift/mask and intclr_fall_shift/mask respectively.
Currently, inten_rise_shift/mask and inten_fall_shift/mask bits are only used
to configure intclr related registers.
Description of H/W:
The offset for the
Exynos5420 has 5 TMU channels, the TRIMINFO register is
misplaced for TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2
This patch
1 Adds the neccessary
On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.
To support that, we introduced a ADDRESS_MULTIPLE flag in the
driver and the 2nd set of register base and size are provided
in the reg property of the node.
As per Amit's suggestion, this patch changes the
Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.
This patch adds the device tree nodes to the DT device list.
Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.
Signed-off-by: Leela Krishna
On Thu, Dec 19, 2013 at 2:54 AM, Kukjin Kim kgene@samsung.com wrote:
On 12/18/13 15:11, MyungJoo Ham wrote:
On Tue, Dec 17, 2013 at 8:52 PM,kg...@kernel.org wrote:
From: Kukjin Kimkgene@samsung.com
We don't need to keep the definitions for exynos4_bus into
mach-exynos/ so this
Quoting Krzysztof Kozlowski (2013-12-17 01:56:39)
Move reg_save[] into CONFIG_PM_SLEEP dependency block as it is used only
by suspend and resume functions.
This fixes the warning on CONFIG_PM_SLEEP=n:
drivers/clk/samsung/clk-exynos-audss.c:29:22: warning: ‘reg_save’ defined but
not used
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