From: Prathyush K prathyus...@samsung.com
The address for cb/cr needs to be swapped for 3 plane formats like
YVU420 and YVU420M. If these address gets swapped for other formats like
NV21, it results in passing a NULL dma address to gscalar (which will
result in a PAGE FAULT if sysmmu is enabled).
On Fri, Dec 13, 2013 at 10:37 AM, Linus Walleij
linus.wall...@linaro.org wrote:
On Fri, Dec 13, 2013 at 10:24 AM, kg...@kernel.org wrote:
José Miguel Gonçalves wrote:
(..)
Was this patch forgotten?
Hi Jose,
Sorry about missing your patch. It's my fault :( and as you know, at this
moment
From: Frank Rowand frank.row...@am.sony.com
The arm boot_lock is used by the secondary processor startup code. The locking
task is the idle thread, which has idle-sched_class == idle_sched_class.
idle_sched_class-enqueue_task == NULL, so if the idle task blocks on the
lock, the attempt to wake
Hi Abhilash,
I saw another patch in chrome tree ..by Andrew Bresticker
which may be relevant here ..
Just wondering if you missed adding this ? or this is not needed ?
You did not face any issue in getting core to suspend ?
Hi Sunil,
On Fri, Dec 20, 2013 at 3:56 PM, sunil joshi sjoshi.o...@gmail.com wrote:
Hi Abhilash,
I saw another patch in chrome tree ..by Andrew Bresticker
which may be relevant here ..
Just wondering if you missed adding this ? or this is not needed ?
You did not face any issue in getting
On Fri, Dec 20, 2013 at 10:22:20AM +0800, Wei Yongjun wrote:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Remove unneeded error handling on the result of a call
to platform_get_resource() when the value is passed to
devm_ioremap_resource().
Applied, thanks.
signature.asc
Description:
This patch fixes a compilation warning.
warning: passing argument 5 of 'thermal_zone_device_register' discards 'const'
qualifier from pointer target type [enabled by default]
include/linux/thermal.h:270:29: note: expected 'struct thermal_zone_device_ops
*'
but argument is of type 'const struct
This patch adds the registers, bit fields and compatible strings
required to support for the 5 TMU channels on Exynos5260.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
This patch goes on top of the series (Reviewed and Acked)
Clock lookup information is required as driver can manipulate
clock rate properly.
Signed-off-by: Seungwon Jeon tgih@samsung.com
---
arch/arm/boot/dts/exynos4412.dtsi |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412.dtsi
DT nodes contain clock numbers which are referred by drivers
to get the clocks. These numbers are replaced by MACROs
which are defined in the exynos5420-clk.h header file.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 47
Many changes/fixes have been identified for clock file for exynos5420.
These include correct parents, bit fields, new clocks etc. Existing
files needs some correction in terms of names of the clock and
indentation. These issues are addressed in this patch series. It also
replaces the usage of
Hi,
This is the fifth version of the patchset. It adds a new Exynos USB 2.0 PHY
driver. The driver uses the Generic PHY Framework.
I would like to thank everyone who contributed with comments and took the time
to read through the patches in the previous versions of this patchset.
We had a
This the alternative version of the support for Exynos 421x USB 2.0 PHY
in the Generic PHY framework. In this version the support for Exynos
4210 and 4212 was joined into one file.
Signed-off-by: Kamil Debski k.deb...@samsung.com
---
Hi,
Me and Kishon were discussing for quite a long time the
Add support to PHY of USB2 of the Exynos 5250 SoC.
Signed-off-by: Kamil Debski k.deb...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi | 33 ---
drivers/phy/phy-exynos5250-usb2.c | 64 +
2 files changed, 78 insertions(+), 19 deletions(-)
This the alternative version of the support for Exynos 421x USB 2.0 PHY
in the Generic PHY framework. In this version the support for Exynos
4210 and 4212 was joined into one file.
Signed-off-by: Kamil Debski k.deb...@samsung.com
---
Hi,
This is the second alternative version. Please look at
Add support to PHY of USB2 of the Exynos 4 SoC.
Signed-off-by: Kamil Debski k.deb...@samsung.com
---
.../devicetree/bindings/arm/samsung/pmu.txt|2 ++
arch/arm/boot/dts/exynos4.dtsi | 31
arch/arm/boot/dts/exynos4210.dtsi |
Change the phy provider used from the old one using the USB phy
framework to a new one using the Generic phy framework.
Signed-off-by: Kamil Debski k.deb...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Documentation/devicetree/bindings/usb/usb-ehci.txt | 35 +++
Change the used phy driver to the new Exynos USB phy driver that uses the
generic phy framework.
Signed-off-by: Kamil Debski k.deb...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../devicetree/bindings/usb/samsung-hsotg.txt |4
Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
SoC families.
Signed-off-by: Kamil Debski k.deb...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Adding devm_of_phy_get will allow to get phys by supplying a
pointer to the struct device_node instead of struct device.
Signed-off-by: Kamil Debski k.deb...@samsung.com
---
drivers/phy/phy-core.c | 31 +++
include/linux/phy/phy.h |2 ++
2 files changed, 33
Add support for Exynos 5250. This driver is to replace the old
USB 2.0 PHY driver.
Signed-off-by: Kamil Debski k.deb...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../devicetree/bindings/phy/samsung-phy.txt|1 +
drivers/phy/Kconfig
From: Mateusz Krawczuk mat.krawc...@gmail.com
Add support for the Samsung's S5PV210 SoC to the Exynos USB 2.0 PHY driver.
Signed-off-by: Mateusz Krawczuk m.krawc...@partner.samsung.com
[k.deb...@samsung.com: cleanup and commit description]
[k.deb...@samsung.com: make changes accordingly to the
Previously the of_phy_get function took a struct device * and
was declared static. It was impossible to call it from
another driver and thus it was impossible to get phy defined
for a given node. The old function was renamed to _of_phy_get
and was left for internal use. of_phy_get function was
Special driver data flag (CPUFREQ_BOOST_FREQ) has been added to indicate
frequency, which can be only enabled for BOOST mode.
This frequency shall be used only for limited time, since it might cause
target device to overheat.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by:
This patch provides auto disable/enable operation for boost. It uses already
present thermal infrastructure to provide BOOST hysteresis.
The TMU data has been modified to work properly with or without BOOST.
Hence, the two first trip points with corresponding clip frequencies were
adjusted.
The
Since the support for software and hardware controlled boosting has been
added, the corresponding Documentation entry had been updated.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
---
For safety reasons new flag - CONFIG_CPU_FREQ_BOOST_SW has been added.
Only after selecting EXYNOS Frequency Overclocking - Software Kconfig
option the software managed boost is enabled. It also selects thermal
subsystem to be compiled in. Thermal is necessary for disabling boost
and cooling down
The Intel's hardware based boost solution driver has been changed to cooperate
with
common cpufreq boost framework.
The global sysfs boost attribute entry code
(/sys/devices/system/cpu/cpufreq/boost)
has been moved to a core cpufreq code. This attribute is now only visible,
when cpufreq driver
This commit adds boost frequency support in cpufreq core (Hardware
Software). Some SoCs (like Exynos4 - e.g. 4x12) allow setting frequency
above its normal operation limits. Such mode shall be only used for a
short time.
Overclocking (boost) support is essentially provided by platform
dependent
This patch series introduces support for CPU overclocking technique
called Boost.
It is a follow up of a LAB governor proposal. Boost is a LAB component:
http://thread.gmane.org/gmane.linux.kernel/1484746/match=cpufreq
Boost unifies hardware based solution (e.g. Intel Nehalem) with
software
The cpufreq_driver's boost_supported flag is true only when boost
support is explicitly enabled. Boost related attributes are exported only
under the same condition.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Myungjoo Ham myungjoo@samsung.com
Acked-by: Viresh Kumar
It is now possible to use the common cpuidle_[un]register() routines
(instead of open-coding them) so do it.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Len Brown l...@kernel.org
---
drivers/idle/intel_idle.c | 114
dev-state_count is now always equal to drv-state_count so
it can be removed.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/cpuidle/cpuidle.c | 3 ---
drivers/cpuidle/sysfs.c | 5 +++--
intel_idle driver sets dev-state_count to drv-state_count so
the default dev-state_count initialization in cpuidle_enable_device()
(called from cpuidle_register_device()) can be used instead.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Kyungmin Park
acpi_processor_hotplug() calls acpi_processor_setup_cpuidle_cx()
without calling acpi_processor_setup_cpuidle_states() first so it
is possible that dev-state_count becomes different from
drv-state_count (in case of SMP system with unsupported C2/C3
states + enabled CPU hotplug and
If the system is booted with some CPUs offline C1E promotion disable quirk
won't be applied because on_each_cpu() in intel_idle_cpuidle_driver_init()
operates only on online CPUs. Fix it by adding the C1E promotion disable
handling to intel_idle_cpu_init() (which is also called during CPU_ONLINE
dev-state_count is now always equal to drv-state_count and
drv-state_count no longer can change during driver's lifetime so
the default dev-state_count initialization in cpuidle_enable_device()
(called from cpuidle_register_device()) can be used instead.
Signed-off-by: Bartlomiej Zolnierkiewicz
The EXYNOS cpuidle driver code assumes that cpuidle core will handle
dev-state_count smaller than drv-state_count but currently this is
untrue (dev-state_count is used only for handling cpuidle state sysfs
entries and drv-state_count is used for all other cases) and will not
be fixed in the future
pseries cpuidle driver sets dev-state_count to drv-state_count so
the default dev-state_count initialization in cpuidle_enable_device()
(called from cpuidle_register_device()) can be used instead.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Kyungmin Park
It is now possible to use the common cpuidle_[un]register() routines
(instead of open-coding them) so do it.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
Cc: Deepthi
() routines (in POWERPC pseries
cpuidle driver and intel_idle driver).
[1] http://permalink.gmane.org/gmane.linux.power-management.general/36908
Reference to v1:
http://comments.gmane.org/gmane.linux.power-management.general/37390
Changes since v1:
- synced patch series with next-20131220
On 12/20/13 21:34, Seungwon Jeon wrote:
Clock lookup information is required as driver can manipulate
clock rate properly.
Signed-off-by: Seungwon Jeontgih@samsung.com
---
arch/arm/boot/dts/exynos4412.dtsi |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git
On 12/21/13 03:47, Bartlomiej Zolnierkiewicz wrote:
The EXYNOS cpuidle driver code assumes that cpuidle core will handle
dev-state_count smaller than drv-state_count but currently this is
untrue (dev-state_count is used only for handling cpuidle state sysfs
entries and drv-state_count is used
On 12/20/13 18:12, Linus Walleij wrote:
On Fri, Dec 13, 2013 at 10:37 AM, Linus Walleij
linus.wall...@linaro.org wrote:
On Fri, Dec 13, 2013 at 10:24 AM,kg...@kernel.org wrote:
José Miguel Gonçalves wrote:
(..)
Was this patch forgotten?
Hi Jose,
Sorry about missing your patch. It's my
On 12/20/13 14:11, Naveen Krishna Chatradhi wrote:
Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.
This patch adds the device tree nodes to the DT device list.
Nodes carry the misplaced second base address and the second
clock to access the
On 12/20/13 07:36, Doug Anderson wrote:
When the exynos5250 device tree was sent upstream the keyboard mapping
was missing the 2nd instance of the \ key. There are two copies of
the \ because it simply has a different row and column on US and
non-US keyboards.
For more details, see the
Hi Kukjin,
On Saturday 21 of December 2013 05:44:24 Kukjin Kim wrote:
On 12/20/13 21:34, Seungwon Jeon wrote:
Clock lookup information is required as driver can manipulate
clock rate properly.
Signed-off-by: Seungwon Jeontgih@samsung.com
---
arch/arm/boot/dts/exynos4412.dtsi |
On Thursday 19 of December 2013 10:05:52 Sachin Kamat wrote:
Hi Tomasz,
On 18 December 2013 20:46, Tomasz Figa t.f...@samsung.com wrote:
Hi Sachin,
On Thursday 05 of December 2013 15:14:24 Sachin Kamat wrote:
Added regulator entries to Exynos5420 SMDK board.
Signed-off-by: Sachin
Hi Sachin,
On Thursday 19 of December 2013 16:27:53 Sachin Kamat wrote:
Some boards might not have RTC xtal, so RTC shouldn't really be
enabled by default. Enable it in the required board files.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
On Thursday 19 of December 2013 21:05:09 Sachin Kamat wrote:
Hi Tomasz,
On 19 December 2013 19:40, Tomasz Figa t.f...@samsung.com wrote:
Hi Sachin, Andrew,
On Wednesday 18 of December 2013 23:39:58 Sachin Kamat wrote:
Hi Tomasz,
On 10 November 2013 22:38, Tomasz Figa
On 12/20/2013 07:47 PM, Bartlomiej Zolnierkiewicz wrote:
The EXYNOS cpuidle driver code assumes that cpuidle core will handle
dev-state_count smaller than drv-state_count but currently this is
untrue (dev-state_count is used only for handling cpuidle state sysfs
entries and drv-state_count is
Hi,
On Friday 20 of December 2013 15:56:38 sunil joshi wrote:
Hi Abhilash,
I saw another patch in chrome tree ..by Andrew Bresticker
which may be relevant here ..
Just wondering if you missed adding this ? or this is not needed ?
You did not face any issue in getting core to suspend ?
On Fri, Dec 20, 2013 at 3:38 AM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
Hi Sunil,
On Fri, Dec 20, 2013 at 3:56 PM, sunil joshi sjoshi.o...@gmail.com wrote:
Hi Abhilash,
I saw another patch in chrome tree ..by Andrew Bresticker
which may be relevant here ..
Just wondering if you
On 12/06/13 18:48, Arun Kumar K wrote:
Adds the CPU clock divider shifts and masks for Exynos5 SoC.
These defines will be used in cpufreq driver.
Signed-off-by: Arjun.K.Varjun...@samsung.com
Signed-off-by: Arun Kumar Karun...@samsung.com
---
arch/arm/mach-exynos/include/mach/regs-clock.h |
On Friday 20 of December 2013 13:22:06 Olof Johansson wrote:
On Fri, Dec 20, 2013 at 3:38 AM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
Hi Sunil,
On Fri, Dec 20, 2013 at 3:56 PM, sunil joshi sjoshi.o...@gmail.com wrote:
Hi Abhilash,
I saw another patch in chrome tree ..by
On Fri, Dec 20, 2013 at 1:23 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
On Friday 20 of December 2013 13:22:06 Olof Johansson wrote:
On Fri, Dec 20, 2013 at 3:38 AM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
Hi Sunil,
On Fri, Dec 20, 2013 at 3:56 PM, sunil joshi
Instead of repeating select PM_GENERIC_DOMAINS for all Exynos4
variants add relevant entry in the Kconfig section common to the
SoC series.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
arch/arm/mach-exynos/Kconfig |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
The only thing exynos_pm_late_initcall() does is calling
pm_genpd_poweroff_unused(), which is already stubbed when
CONFIG_PM_GENERIC_DOMAINS is not enabled. So replace
exynos_pm_late_initcall() with a direct call to
pm_genpd_poweroff_unused().
Signed-off-by: Sylwester Nawrocki
On Friday 20 of December 2013 13:25:06 Olof Johansson wrote:
On Fri, Dec 20, 2013 at 1:23 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
On Friday 20 of December 2013 13:22:06 Olof Johansson wrote:
On Fri, Dec 20, 2013 at 3:38 AM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
Hi
On 12/20/2013 07:47 PM, Bartlomiej Zolnierkiewicz wrote:
dev-state_count is now always equal to drv-state_count so
it can be removed.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Acked-by: Daniel Lezcano
On 12/21/13 06:24, Sylwester Nawrocki wrote:
Instead of repeating select PM_GENERIC_DOMAINS for all Exynos4
variants add relevant entry in the Kconfig section common to the
SoC series.
Signed-off-by: Sylwester Nawrockis.nawro...@samsung.com
---
arch/arm/mach-exynos/Kconfig |4 +---
1
On 12/21/13 06:25, Sylwester Nawrocki wrote:
The only thing exynos_pm_late_initcall() does is calling
pm_genpd_poweroff_unused(), which is already stubbed when
CONFIG_PM_GENERIC_DOMAINS is not enabled. So replace
exynos_pm_late_initcall() with a direct call to
pm_genpd_poweroff_unused().
Hi Abhilash,
Please see my comments inline.
On Monday 16 of December 2013 17:31:10 Abhilash Kesavan wrote:
Add PMU configuration table for various low power modes - AFTR/LPA/SLEEP.
Also, add core s2r support for Exynos5420.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
This
On Fri, Dec 20, 2013 at 1:19 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi,
On Friday 20 of December 2013 15:56:38 sunil joshi wrote:
Hi Abhilash,
I saw another patch in chrome tree ..by Andrew Bresticker
which may be relevant here ..
Just wondering if you missed adding this ? or this is
On 12/10/13 15:38, Sachin Kamat wrote:
S2MPS11 voltage regulator is commonly used on the latest Exynos
boards like SMDK5420, Arndale-Octa, etc. Hence it makes sense to
enable it like S5M8767A voltage regulator.
Signed-off-by: Sachin Kamatsachin.ka...@linaro.org
---
On 12/20/2013 07:47 PM, Bartlomiej Zolnierkiewicz wrote:
It is now possible to use the common cpuidle_[un]register() routines
(instead of open-coding them) so do it.
Just an addition:
The cpuidle_register common routine calls cpuidle_register_driver which
initialize the driver's cpumask to
On 12/19/13 00:55, Tomasz Figa wrote:
On Tuesday 10 of December 2013 14:37:13 Sachin Kamat wrote:
On 13 November 2013 17:51, Tomasz Figatomasz.f...@gmail.com wrote:
On Wednesday 13 of November 2013 12:52:05 Bartlomiej Zolnierkiewicz wrote:
[+ DT maintainers]
Hi,
On Wednesday, November
On 12/20/2013 07:47 PM, Bartlomiej Zolnierkiewicz wrote:
intel_idle driver sets dev-state_count to drv-state_count so
the default dev-state_count initialization in cpuidle_enable_device()
(called from cpuidle_register_device()) can be used instead.
Signed-off-by: Bartlomiej Zolnierkiewicz
On 12/20/2013 07:47 PM, Bartlomiej Zolnierkiewicz wrote:
If the system is booted with some CPUs offline C1E promotion disable quirk
won't be applied because on_each_cpu() in intel_idle_cpuidle_driver_init()
operates only on online CPUs. Fix it by adding the C1E promotion disable
handling to
On Friday 20 of December 2013 13:37:36 Olof Johansson wrote:
On Fri, Dec 20, 2013 at 1:19 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi,
On Friday 20 of December 2013 15:56:38 sunil joshi wrote:
Hi Abhilash,
I saw another patch in chrome tree ..by Andrew Bresticker
which may be
Hi Rahul,
On Friday 20 of December 2013 18:27:25 Rahul Sharma wrote:
DT nodes contain clock numbers which are referred by drivers
to get the clocks. These numbers are replaced by MACROs
which are defined in the exynos5420-clk.h header file.
This is a good idea, but we already have such
2013/12/20 Kukjin Kim kgene@samsung.com:
On 12/19/13 00:55, Tomasz Figa wrote:
On Tuesday 10 of December 2013 14:37:13 Sachin Kamat wrote:
On 13 November 2013 17:51, Tomasz Figatomasz.f...@gmail.com wrote:
On Wednesday 13 of November 2013 12:52:05 Bartlomiej Zolnierkiewicz
wrote:
[+
On 12/13/13 01:18, Tomasz Figa wrote:
This series fixes spotted issues with DW-MSHC support on Exynos4x12
SoCs and then enables DW-MSHC controller to handle eMMC memory on
Exynos4412-TRATS2 board. As opposed to using sdhci-s3c for eMMC,
MMC 4.4 extensions can be used and in general performance
This series removes incorrect dependency of the driver on PM_RUNTIME
and is a preparation for further work on actual implementation of
suspend/resume for the FIMC-IS.
Sylwester Nawrocki (6):
exynos4-is: Leave FIMC clocks enabled when runtime PM is disabled
exynos4-is: Activate mipi-csis in
On 12/20/2013 10:36 PM, Kukjin Kim wrote:
On 12/21/13 06:25, Sylwester Nawrocki wrote:
The only thing exynos_pm_late_initcall() does is calling
pm_genpd_poweroff_unused(), which is already stubbed when
CONFIG_PM_GENERIC_DOMAINS is not enabled. So replace
exynos_pm_late_initcall() with a direct
Driver should ensure a device can be also used normally when runtime
PM is disabled. So enable the FIMC clock in probe() in such situation.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/exynos4-is/fimc-core.c | 29 +---
1 files changed,
Ensure the device works also when runtime PM is disabled. This will
allow to drop an incorrect dependency on PM_RUNTIME.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/exynos4-is/fimc-is.c | 25 -
1 files changed, 20 insertions(+), 5
Ensure the device also works when runtime PM is disabled.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/exynos4-is/fimc-lite.c | 24 +---
1 files changed, 13 insertions(+), 11 deletions(-)
diff --git
Devices should also operate normally when runtime PM is not enabled.
In case runtime PM is disabled activate the device already in probe().
Any related power domain needs to be then left permanently in active
state by the platform.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
The memory allocator is being initialized before registering the subdevs
so reverse the cleanup sequence to avoid trying unregister not registered
subdevs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/exynos4-is/fimc-is.c |4 ++--
1 files changed, 2
On 12/12/13 06:39, Mark Brown wrote:
From: Mark Brownbroo...@linaro.org
There is a 16.934MHz fixed rate clock connected to MCLK1 on the CODEC, add
this to the device tree bindings.
Signed-off-by: Mark Brownbroo...@linaro.org
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 9 +
1
On 12/18/13 19:20, Heiko Stübner wrote:
Hi Kukjin,
Am Sonntag, 15. Dezember 2013, 21:21:54 schrieb Kukjin Kim:
The following changes since commit
6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae:
Linux 3.13-rc1 (2013-11-22 11:30:55 -0800)
are available in the git repository at:
On 10/17/2013 08:06 PM, Sylwester Nawrocki wrote:
This patch adds binding documentation for the Samsung S5K6A3(YX)
raw image sensor.
Signed-off-by: Sylwester Nawrockis.nawro...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
Hi Mauro,
Can we merge it now without a DT
On 12/21/13 08:09, Kukjin Kim wrote:
On 11/25/13 21:15, Mark Brown wrote:
From: Mark Brownbroo...@linaro.org
Make it easier to notice the common file for ChromeOS devices based on
the Exynos5250 by giving it the exynos5250 prefix that the boards have.
Signed-off-by: Mark
dma_buf_map_attachment and dma_buf_vmap can return NULL or
ERR_PTR on a error. This encourages a common buggy pattern in
callers:
sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
if (IS_ERR_OR_NULL(sgt))
return PTR_ERR(sgt);
This causes the caller to
Kukjin,
On Fri, Dec 20, 2013 at 3:37 PM, Kukjin Kim kgene@samsung.com wrote:
On 12/21/13 08:09, Kukjin Kim wrote:
On 11/25/13 21:15, Mark Brown wrote:
From: Mark Brownbroo...@linaro.org
Make it easier to notice the common file for ChromeOS devices based on
the Exynos5250 by giving it
On 12/21/13 09:57, Doug Anderson wrote:
Kukjin,
On Fri, Dec 20, 2013 at 3:37 PM, Kukjin Kimkgene@samsung.com wrote:
On 12/21/13 08:09, Kukjin Kim wrote:
On 11/25/13 21:15, Mark Brown wrote:
From: Mark Brownbroo...@linaro.org
Make it easier to notice the common file for ChromeOS
Tomasz,
On Fri, Dec 20, 2013 at 1:19 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi,
On Friday 20 of December 2013 15:56:38 sunil joshi wrote:
Hi Abhilash,
I saw another patch in chrome tree ..by Andrew Bresticker
which may be relevant here ..
Just wondering if you missed adding this ?
Hi Tomasz,
On 21 December 2013 02:42, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin,
On Thursday 19 of December 2013 16:27:53 Sachin Kamat wrote:
Some boards might not have RTC xtal, so RTC shouldn't really be
enabled by default. Enable it in the required board files.
Signed-off-by:
On 21 December 2013 02:44, Tomasz Figa tomasz.f...@gmail.com wrote:
On Thursday 19 of December 2013 21:05:09 Sachin Kamat wrote:
Hi Tomasz,
On 19 December 2013 19:40, Tomasz Figa t.f...@samsung.com wrote:
Hi Sachin, Andrew,
On Wednesday 18 of December 2013 23:39:58 Sachin Kamat wrote:
Some boards might not have RTC xtal, so RTC shouldn't really be
enabled by default. Enable it in the required board files. For
now enable it for all board files to maintain the enabled status
exisitng prior to this patch.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Hi Olof,
On Sat, Dec 21, 2013 at 2:52 AM, Olof Johansson o...@lixom.net wrote:
On Fri, Dec 20, 2013 at 3:38 AM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
Hi Sunil,
On Fri, Dec 20, 2013 at 3:56 PM, sunil joshi sjoshi.o...@gmail.com wrote:
Hi Abhilash,
I saw another patch in chrome
Hi Tomasz,
On Sat, Dec 21, 2013 at 3:07 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Abhilash,
Please see my comments inline.
On Monday 16 of December 2013 17:31:10 Abhilash Kesavan wrote:
Add PMU configuration table for various low power modes - AFTR/LPA/SLEEP.
Also, add core s2r
Hi Tomasz,
On Sat, Dec 21, 2013 at 3:23 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
On Friday 20 of December 2013 13:37:36 Olof Johansson wrote:
On Fri, Dec 20, 2013 at 1:19 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi,
On Friday 20 of December 2013 15:56:38 sunil joshi wrote:
Hi
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