Hi,
On Wed, Sep 3, 2014 at 9:56 PM, Kukjin Kim kgene@samsung.com wrote:
Javier Martinez Canillas wrote:
Many Exynos devices have a display panel, most of them just have
a simple panel while others have more complex configurations that
requires an embedded DisplayPort (eDP) to LVDS
On Thu, 04 Sep 2014 10:15:27 +0530
Pankaj Dubey pankaj.du...@samsung.com wrote:
Hi Boris,
On Wednesday, September 03, 2014 Boris BREZILLON wrote,
To: Arnd Bergmann
Cc: Pankaj Dubey; kgene@samsung.com; li...@arm.linux.org.uk; Alexander
Shiyan; naus...@samsung.com; Tomasz Figa;
On 4 September 2014 21:49, Rafael J. Wysocki r...@rjwysocki.net wrote:
On Wednesday, September 03, 2014 03:15:59 PM Geert Uytterhoeven wrote:
Hi Ulf,
On Wed, Sep 3, 2014 at 12:52 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
--- a/drivers/base/power/domain_governor.c
+++
On 4 September 2014 02:33, Simon Horman ho...@verge.net.au wrote:
On Wed, Sep 03, 2014 at 12:52:29PM +0200, Ulf Hansson wrote:
Since genpd at late init, will try to disable unused PM domains we
don't need to do it from here as well.
Cc: Simon Horman ho...@verge.net.au
Cc: Magnus Damm
Hi all,
I'm one of the few, foolish people to try running mainline on my 5250-based
Samsung Chromebook (snow). I can live without wireless, usb3 and video
acceleration, so actually it makes a reasonable development platform for
doing A15-based (micro)-architectural work.
However, since 3.15 I've
As per Exynos3250 user manual mmc0/1 mux selection has 4 bit wide.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
drivers/clk/samsung/clk-exynos3250.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos3250.c
Hi Arnd,
On Thu, 2014-09-04 at 18:02 +0200, Arnd Bergmann wrote:
I think it would be nice if you could submit a patch to remove the
drivers from ASoC, then we can see if anybody complains.
Just to know what I'm getting my self into: whom would you expect to
send me agitated messages once those
[Looks like it's not just Rutland that can't spell the address of the
mailing list today. Fixed here, so please use this post in any replies].
On Fri, Sep 05, 2014 at 12:57:04PM +0100, Will Deacon wrote:
Hi all,
I'm one of the few, foolish people to try running mainline on my 5250-based
On wto, 2014-08-05 at 17:07 +0200, Daniel Lezcano wrote:
On 08/05/2014 04:26 PM, Krzysztof Kozlowski wrote:
On 05.08.2014 16:03, Daniel Lezcano wrote:
On 08/05/2014 03:34 PM, Bartlomiej Zolnierkiewicz wrote:
Hi,
This patch series adds support for AFTR idle mode on boards with
secure
On Friday 05 September 2014 14:04:18 Paul Bolle wrote:
On Thu, 2014-09-04 at 18:02 +0200, Arnd Bergmann wrote:
I think it would be nice if you could submit a patch to remove the
drivers from ASoC, then we can see if anybody complains.
Just to know what I'm getting my self into: whom
Cleanup a little the SMP/hotplug code for Exynos by:
1. Moving completely all functions from hotplug.c into the platsmp.c;
2. Deleting the hotplug.c file.
After recent cleanups (e.g. 75ad2ab28f0f ARM: EXYNOS: use
v7_exit_coherency_flush macro for cache disabling) there was only CPU
power down
The __ref annotation for exynos_cpu_die() is not needed because the
function does not reference any __init/__exit symbol or call.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
Changes since v4:
1. Rebase on linux-next-20140804.
2. Add
On Exynos4 USE_DELAYED_RESET_ASSERTION must be set in
ARM_COREx_OPTION register during CPU power down. This is the proper way
of powering down CPU on Exynos4.
Additionally on Exynos4212 without this the CPU clock down feature won't
work after powering down some CPU and the online CPUs will work
On Thu, Sep 4, 2014 at 7:00 PM, Kevin Hilman khil...@kernel.org wrote:
Thomas Abraham ta.oma...@gmail.com writes:
On Thu, Sep 4, 2014 at 4:45 AM, Kevin Hilman khil...@kernel.org wrote:
Hi Thomas,
Thomas Abraham ta.oma...@gmail.com writes:
[...]
A new branch [1] has been created using
Hi Will,
On Fri, Sep 5, 2014 at 5:52 PM, Will Deacon will.dea...@arm.com wrote:
[Looks like it's not just Rutland that can't spell the address of the
mailing list today. Fixed here, so please use this post in any replies].
On Fri, Sep 05, 2014 at 12:57:04PM +0100, Will Deacon wrote:
Hi all,
Add S5P_CENTRAL_SEQ_OPTION register setup to cpuidle AFTR mode code
by moving the relevant code from exynos_pm_suspend() (used only by
suspend) to exynos_pm_central_suspend() (used by both suspend and
AFTR). Without this setup AFTR mode doesn't show any benefit over
WFI one (at least on
Register cpuidle platform device on Exynos4x12 SoCs allowing EXYNOS
cpuidle driver usage on these SoCs.
AFTR mode reduces power consumption on Trats2 board (Exynos4412 SoC
with secure firmware enabled) by ~12% when EXYNOS cpuidle driver is
enabled (in both cases the default exynos_defconfig
* Move cp15 registers saving to exynos_save_cp15() helper and add
additional helper usage to do_idle firmware method.
* Use resume firmware method instead of exynos_cpu_restore_register()
and skip exynos_cpu_save_register() on boards with secure firmware
enabled.
* Use sysram_ns_base_addr
Replace EXYNOS_BOOT_VECTOR_ADDR and EXYNOS_BOOT_VECTOR_FLAG macros
by exynos_boot_vector_addr() and exynos_boot_vector_flag() static
inlines.
This patch shouldn't cause any functionality changes.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park
On some platforms (i.e. EXYNOS ones) more than one idle mode is
available and we need to distinguish them in firmware do_idle method.
Add mode parameter to do_idle firmware method and AFTR mode support
to EXYNOS do_idle implementation.
This change is a preparation for adding secure firmware
Hi,
This patch series adds support for AFTR idle mode on boards with
secure firmware enabled and allows EXYNOS cpuidle driver usage on
Exynos4x12 SoCs.
It has been tested on Trats2 board (using Exynos4412 SoC with secure
firmware enabled) on which AFTR mode reduces power consumption by ~12%
when
Hi Will,
On Fri, Sep 5, 2014 at 7:16 PM, Ajay kumar ajayn...@gmail.com wrote:
Hi Will,
On Fri, Sep 5, 2014 at 5:52 PM, Will Deacon will.dea...@arm.com wrote:
[Looks like it's not just Rutland that can't spell the address of the
mailing list today. Fixed here, so please use this post in any
On 05/09/14 14:46, Ajay kumar wrote:
Hi Will,
On Fri, Sep 5, 2014 at 5:52 PM, Will Deacon will.dea...@arm.com wrote:
[Looks like it's not just Rutland that can't spell the address of the
mailing list today. Fixed here, so please use this post in any replies].
On Fri, Sep 05, 2014 at
Ulf Hansson ulf.hans...@linaro.org writes:
This patchset has a bit of a history and some parts of it has been posted
earlier.
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/262725.html
The intent is to simplify code for the generic power domain and also some of
the machine
On Thu, Sep 04, 2014 at 12:01:19PM +0530, Vivek Gautam wrote:
Don't we have phy_power_on()
for that ? It looks like you could just as well do this from
phy_power_on() ?
No, unfortunately keeping these calibration settings in phy_power_on()
doesn't help, since we need to do this after
Will,
On Fri, Sep 5, 2014 at 5:22 AM, Will Deacon will.dea...@arm.com wrote:
[Looks like it's not just Rutland that can't spell the address of the
mailing list today. Fixed here, so please use this post in any replies].
On Fri, Sep 05, 2014 at 12:57:04PM +0100, Will Deacon wrote:
Hi all,
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