Hi Rob,
First of all, thanks for your review.
On 01/09/2015 06:18 AM, Rob Herring wrote:
Adding Viresh.
On Wed, Jan 7, 2015 at 7:40 PM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch adds the documentation for generic exynos memory bus frequency
driver.
Cc: MyungJoo Ham
On Wed, Jan 07, 2015 at 05:42:41PM +, Marc Zyngier wrote:
[...]
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
[...]
void __init tegra_init_irq(void)
{
- int i;
- void __iomem *distbase;
-
- if (of_find_matching_node(NULL, tegra_ictlr_match))
-
On Wed, Jan 07, 2015 at 05:42:36PM +, Marc Zyngier wrote:
The GIC is now always initialized from DT on tegra, and there is
no point in keeping non-DT init code.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/mach-tegra/irq.c | 8
1 file changed, 8 deletions(-)
On Wed, 2015-01-07 at 23:49 +, Jonathan Stone -SISA wrote:
On On Wed, 2015-01-07 at 18:37 +, Sjoerd Simons writes wrote:
On Wed, 2015-01-07 at 18:37 +, Anand Moon wrote:
[...]
Only 4 core cpu's are on my board. Also CpuFreq is not working.
Can you share some point on
On Wed, Jan 07, 2015 at 05:42:37PM +, Marc Zyngier wrote:
Tegra's LIC (Legacy Interrupt Controller) has been so far only
supported as a weird extension of the GIC, which is not exactly
pretty.
The stacked irq domain framework fits this pretty well, and allows
Nit: s/irq/IRQ/
the LIC
On Wed, Jan 07, 2015 at 05:42:40PM +, Marc Zyngier wrote:
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
.../interrupt-controller/nvidia,tegra-ictlr.txt| 39
++
1 file changed, 39 insertions(+)
create mode 100644
On Wed, Jan 07, 2015 at 05:42:39PM +, Marc Zyngier wrote:
Describe the legacy interrupt controller in every tegra DTSI files,
and make it the parent of most interrupts.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/boot/dts/tegra114.dtsi | 16 +++-
On 17:42-20150107, Marc Zyngier wrote:
[..]
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 10b725c..048cfeb 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -423,7 +423,7 @@
status = okay;
pinctrl-names =
On 17:42-20150107, Marc Zyngier wrote:
Tegra's LIC (Legacy Interrupt Controller) has been so far only
supported as a weird extension of the GIC, which is not exactly
pretty.
The stacked irq domain framework fits this pretty well, and allows
the LIC code to be turned into a standalone
On 01/08/15 17:49, Sjoerd Simons wrote:
On Wed, 2015-01-07 at 23:49 +, Jonathan Stone -SISA wrote:
On On Wed, 2015-01-07 at 18:37 +, Sjoerd Simons writes wrote:
On Wed, 2015-01-07 at 18:37 +, Anand Moon wrote:
[...]
Only 4 core cpu's are on my board. Also CpuFreq is not working.
On 17:42-20150107, Marc Zyngier wrote:
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
.../interrupt-controller/ti,omap4-wugen-mpu| 32
++
1 file changed, 32 insertions(+)
create mode 100644
On 17:42-20150107, Marc Zyngier wrote:
IMX6 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what the HW provides.
Hi Jaehoon,
On Thu, Jan 8, 2015 at 7:16 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 12/31/2014 03:43 PM, Alim Akhtar wrote:
From: Seungwon Jeon tgih@samsung.com
Implements HS400 support for exynos host driver.
And this patch includes some updates as new mode is added.
On 17:42-20150107, Marc Zyngier wrote:
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
.../interrupt-controller/nvidia,tegra-ictlr.txt| 39
++
1 file changed, 39 insertions(+)
create mode 100644
On 17:42-20150107, Marc Zyngier wrote:
This proves to be usefull with stacked domains, when the current
^^ useful ?
minor:
+WARNING: 'usefull' may be misspelled - perhaps 'useful'?
+#6:
+This proves to be usefull with stacked domains, when the current
+CHECK: extern
On 17:42-20150107, Marc Zyngier wrote:
OMAP4/5 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what the HW provides.
2015-01-08 Inki Dae inki@samsung.com:
On 2015년 01월 08일 03:06, Gustavo Padovan wrote:
2014-12-26 Inki Dae inki@samsung.com:
On 2014년 12월 22일 22:04, Gustavo Padovan wrote:
Hi Dave,
Here goes a bunch of clean up for the exynos driver. I've posted this
work in
the mailing
On 17:42-20150107, Marc Zyngier wrote:
The only user of the so called routable domain functionnality
minor:
s/functionnality/functionality?
--
Regards,
Nishanth Menon
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to
Adding Viresh.
On Wed, Jan 7, 2015 at 7:40 PM, Chanwoo Choi cw00.c...@samsung.com wrote:
This patch adds the documentation for generic exynos memory bus frequency
driver.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Kukjin Kim kg...@kernel.org
On 01/05/2015 01:52 AM, Krzysztof Kozlowski wrote:
The memory allocated by basic clock divider/gate/mux (struct clk_gate,
clk_divider and clk_mux) was leaking. During driver unbind or probe
failure the driver only unregistered the clocks.
Use clk_unregister_{gate,divider,mux} to release all
On Mon, Jan 05, 2015 at 12:48:40PM +0100, Krzysztof Kozlowski wrote:
Hi,
The patchset adds:
1. a way of parsing custom DT properties by the driver when simplified
DT parsing method is used,
2. GPIO enable control to the max77686 driver.
Applied 1-4, thanks.
signature.asc
21 matches
Mail list logo
