From: Jaewon Kim jaewon02@samsung.com
This patch adds USB DRD(Dual Role Device) and PHY
device tree node to use USB Device.
Cc: Kukjin Kim kg...@kernel.org
Signed-off-by: Jaewon Kim jaewon02@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae
Hi,
On 03/31/2015 04:11 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Run dpms operations through the atomic intefaces. This basically removes
the .dpms() callback from econders and crtcs and use .disable() and
.enable() to turn the crtc on and off.
Using a fixed (by DTS) parent for clocks when turning on the power domain
may introduce issues in other drivers. For example when such driver
changes the parent during runtime and expects that he is the only place
of such change.
Do not rely entirely on DTS providing the fixed parent for such
Replace fixed parent with last parent (obtained with clk_get_parent())
of clocks for devices in mfc and disp power domains. This should improve
behavior if such clocks were reparented by the drivers and new parents
are different than those specified in DTS.
Signed-off-by: Krzysztof Kozlowski
From: Beomho Seo beomho@samsung.com
This patch adds the UART3 devicetree node for Exynos5433 SoC. The UART3 device
is included in AUD_DOMAIN.
Cc: Kukjin Kim kg...@kernel.org
Signed-off-by: Beomho Seo beomho@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki Dae
This patch-set add the following devicetree to support USB/PWM/UART3/reboot.
- USB 3.0 DRD (Dual Role Device) and host
- PWM (Pulse Width Modulation)
- UART3
- System reboot
Depend on:
This patch-set have the dependnecy on following patch[1] to support USB 3.0
Host and DRD (Dual Role Device) for
From: Jaewon Kim jaewon02@samsung.com
This patch adds PWM(Pulsle Width Modulation) device tree node
to support for PWM Timer on Exynos5433 SoC.
Cc: Kukjin Kim kg...@kernel.org
Signed-off-by: Jaewon Kim jaewon02@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki
From: Joonyoung Shim jy0922.s...@samsung.com
This patch adds the reboot node which uses the syscon-reboot driver.
Cc: Kukjin Kim kg...@kernel.org
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.co
Acked-by: Inki Dae inki@samsung.com
---
From: Jaewon Kim jaewon02@samsung.com
This patch adds EHCI and OHCI device tree node
to usb USB2.0 Host and HSCI(High Speed Inter-Chip) function.
Cc: Kukjin Kim kg...@kernel.org
Signed-off-by: Jaewon Kim jaewon02@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by:
Hi,
On 03/28/2015 12:58 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Now that no one is using the functions exported by exynos_drm_plane due
to the atomic conversion we can make remove some of the them or make them
static.
Signed-off-by: Gustavo
From: Jaewon Kim jaewon02@samsung.com
This patch adds PHY and USB3.0 Host device tree node
using DWC3 chip and set USB3.0 Host related clock parent
for Exynos5433.
Cc: Kukjin Kim kg...@kernel.org
Signed-off-by: Jaewon Kim jaewon02@samsung.com
Signed-off-by: Chanwoo Choi
This patch adds the RGB-LED on XU3 as 3 gpio-leds.
It is derived from hardkernel's 3.10 tree.
Signed-off-by: Markus Reichl m.rei...@fivetechno.de
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 24
1 file changed, 24 insertions(+)
diff --git
On 04/02/2015 08:00 PM, Krzysztof Kozlowski wrote:
Initialize the device time (if it is wrong) before registering RTC
device to fix following error message during rtc-s3c probe:
[2.215414] rtc (null): read_time: fail to read
[2.216322] s3c-rtc 1007.rtc: rtc core: registered s3c
This patch adds CLK_SET_RATE_PARENT flag to support DVFS of Cortex-{A53|A57}
core (big.LITTLE core) because 'sclk_{apollo|atlas}' leaf clock is used to
change the CPU frequency of Cortex-{A53|A57} core in arm_big_little.c driver.
- 'apollo' word means the LITTLE core (Cortex-A53 core) in
On 04/03/2015 02:35 AM, Mark Rutland wrote:
On Tue, Mar 31, 2015 at 12:56:38AM +0100, Chanwoo Choi wrote:
Hi Mark,
On 03/31/2015 01:09 AM, Mark Rutland wrote:
Hi,
On Wed, Mar 18, 2015 at 12:17:28AM +, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433
From: Jonghwa Lee jonghwa3@samsung.com
This patch fixes the wrong offoset of PCLK_MSCL_SECURE_SMMU_JPEG in CMU_MSCL
domain.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Chanwoo Choi
From: Jonghwa Lee jonghwa3@samsung.com
CLK_PCLK_MONOTONIC_CNT's register is now assigned with wrong one.
Its correct register is ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT.
Signed-off-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
This patch fixes the wrong parent clock of sclk_apollo clock
from 'div_apollo_pll' to 'div_apollo2'.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
drivers/clk/samsung/clk-exynos5433.c | 2 +-
1 file
This patch fixes the wrong PMS value of exynos5433_pll_rates table
for {ATLAS|APOLLO|MEM0|MEM1|BUS|MFC|MPHY|G3D|DISP|ISP|_PLL.
- before : rate=72000 (mdiv=360, pdiv=6, sdiv=1)
- after : rate=7 (mdiv=175, pdiv=3, sdiv=1)
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa
This patch removes the CONFIG_ARCH_EXYNOS5433 and then use only the
CONFIG_ARCH_EXYNOS for ARM-64bit Exynos5433 SoC.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Arnd Bergmann a...@arndb.de
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
This patchset remove the CONFIG_ARCH_EXYNOS5433 insteadf use the
CONFIG_ARCH_EXYNOS
because Arnd Bergmann gave me a comment[1] that don't add specific
CONFIG_ARCH_EXYNOS5433
for ARM-64bit SoC. And this patchset fix following bugs:
- Fix wrong offset of PCLK_MSCL_SECURE_SMMU_JPEG in CMU_MSCL.
-
On 04/02/2015 11:31 PM, Krzysztof Kozlowski wrote:
The s3c_rtc_gettime() returns already result of rtc_valid_tm() on
obtained time so get rid of another call to rtc_valid_tm().
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/rtc/rtc-s3c.c | 4 +---
1 file changed, 1
Hi,
On Thu, Apr 2, 2015 at 4:01 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Hello Sylwester,
On 04/01/2015 07:31 PM, Sylwester Nawrocki wrote:
On 01/04/15 13:44, Javier Martinez Canillas wrote:
On 04/01/2015 01:03 PM, Sylwester Nawrocki wrote:
It's not clear what
Hello Krzysztof,
On 04/02/2015 10:06 AM, Krzysztof Kozlowski wrote:
Replace fixed parent with last parent (obtained with clk_get_parent())
of clocks for devices in mfc and disp power domains. This should improve
behavior if such clocks were reparented by the drivers and new parents
are
Hello Krzysztof,
On 04/02/2015 10:06 AM, Krzysztof Kozlowski wrote:
Using a fixed (by DTS) parent for clocks when turning on the power domain
may introduce issues in other drivers. For example when such driver
changes the parent during runtime and expects that he is the only place
of such
Extend the S3C RTC node with rtc_src clock so it could be operational.
The rtc_src clock is provided by MAX77686 (Trats2 and Odroid-U3) or
S2MPS11 (Arndale Octa).
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Patch depends on new file dt-bindings/clock/samsung,s2mps11.h
from:
Use a define instead of raw number as a ID for rtc_src clock.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Patch depends on new file dt-bindings/clock/samsung,s2mps11.h from:
1. ARM: dts: Add bindings for 32kHz clocks from s2mps11
Initialize the device time (if it is wrong) before registering RTC
device to fix following error message during rtc-s3c probe:
[2.215414] rtc (null): read_time: fail to read
[2.216322] s3c-rtc 1007.rtc: rtc core: registered s3c as rtc1
Signed-off-by: Krzysztof Kozlowski
Am Freitag, 27. März 2015, 03:09:09 schrieb Anand Moon:
This work depeds upon work done by Lukasz Majewski l.majew...@samsung.com
and Sjoerd Simons sjoerd.sim...@collabora.co.uk regarding the pwm-fan.
-Anand Moon
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc
Hello Krzysztof,
On 04/02/2015 01:03 PM, Krzysztof Kozlowski wrote:
Extend the S3C RTC node with rtc_src clock so it could be operational.
The rtc_src clock is provided by MAX77686 (Trats2 and Odroid-U3) or
S2MPS11 (Arndale Octa).
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
2015-03-31 8:55 GMT+02:00 Kukjin Kim kg...@kernel.org:
Javier Martinez Canillas wrote:
On Tue, Mar 31, 2015 at 6:05 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
Hi,
On 03/31/2015 12:21 AM, Krzysztof Kozlowski wrote:
Use a define instead of raw number as a ID for rtc_src clock.
2015-04-02 14:29 GMT+02:00 Javier Martinez Canillas
javier.marti...@collabora.co.uk:
Hello Krzysztof,
On 04/02/2015 10:06 AM, Krzysztof Kozlowski wrote:
Using a fixed (by DTS) parent for clocks when turning on the power domain
may introduce issues in other drivers. For example when such
Hello Krzysztof,
On 04/02/2015 01:03 PM, Krzysztof Kozlowski wrote:
Use a define instead of raw number as a ID for rtc_src clock.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Best regards,
Javier
--
To
Hi Joonyoung,
2015-04-02 Joonyoung Shim jy0922.s...@samsung.com:
Hi,
On 03/31/2015 04:11 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Run dpms operations through the atomic intefaces. This basically removes
the .dpms() callback from econders and
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Now that no one is using the functions exported by exynos_drm_plane due
to the atomic conversion we can make remove some of the them or make them
static.
v2: remove unused exynos_drm_crtc
Signed-off-by: Gustavo Padovan
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
PageFlips now use the atomic helper to work through the atomic modesetting
API. Async page flips are not supported yet.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 63
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Use drm_atomic_set_fb_for_plane() in the legacy page_flip path to keep
track of the framebuffer pointer and reference.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 3 +++
1
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The new atomic infrastructure needs the .mode_set_nofb() callback to
update CRTC timings before setting any plane.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 60
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Rip out the check from exynos_update_plane() and create
exynos_check_plane() for the check phase enabling use to use
the atomic helpers to call our check and update phases when updating
planes.
Update all users of exynos_update_plane()
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Now that phase 1 and 2 are complete we can switch the update/disable_plane
callbacks to their atomic version.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fb.c| 3 +++
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Now that phase 1 and 2 are complete switch .set_config helper to
use the atomic one.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Set CRTC, planes and connectors to use the default implementations from
the atomic helper library. The helpers will work to keep track of state
for each DRM object.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The atomic helper to disable planes also uses the optional
.atomic_disable() helper. The unique operation it does is calling
.win_disable()
exynos_drm_fb_get_buf_cnt() needs a fb check too to avoid a null pointer.
Signed-off-by: Gustavo
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Hi,
Here goes the full support for atomic modesetting on exynos. I've
split the patches in the various phases of atomic support.
These patches sits on top of the clean up patches I've sent yesterday
to this mailing list[1].
v2: fixes
The s3c_rtc_gettime() returns already result of rtc_valid_tm() on
obtained time so get rid of another call to rtc_valid_tm().
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/rtc/rtc-s3c.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
The RTC on S2MPS11 is the same as S2MPS14. However interrupt numbers of
RTC alarms 0 and 1 were inversed between these two devices. So when
rtc-s5m driver requested S2MPS14_IRQ_RTCA0 interrupt, it matched to
S2MPS11_IRQ_RTCA1, not RTCA0.
Fix this by using consistent RTC alarm interrupt numbers
Hi,
After long struggle this finally fixes the S2MPS11 RTC alarm IRQ
on Arndale Octa board. It can easily be tested with:
rtcwake -d rtc0 -m on -s 5 -v
The patches are independent.
Best regards,
Krzysztof
Krzysztof Kozlowski (2):
mfd: sec: Fix RTC alarm interrupt number on S2MPS11
ARM:
On Arndale Octa the S2MPS11 RTC alarm interrupt was not handled at all
because of wrong configuration of interrupt and gpx3-2.
1. Interrupt is signaled by falling edge.
2. This GPIO line is hard-wired on the board to PVDD_APIO_1V8 through a
resistor so pull-up/down must be disabled.
On Tue, Mar 31, 2015 at 12:56:38AM +0100, Chanwoo Choi wrote:
Hi Mark,
On 03/31/2015 01:09 AM, Mark Rutland wrote:
Hi,
On Wed, Mar 18, 2015 at 12:17:28AM +, Chanwoo Choi wrote:
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based
on
Octal core CPUs (quad
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