On 12 June 2015 at 18:15, Tobias Jakobi tjak...@math.uni-bielefeld.de wrote:
Hello,
I've split off the Exynos specific bits, so this is just some cleanups and
small fixes. Everything can be reviewed without knowledge about the Exynos
platform. My hope is that I can get at least some of the
On 28 May 2015 at 06:33, Rob Herring robherri...@gmail.com wrote:
On Mon, May 25, 2015 at 9:53 AM, Tomeu Vizoso
tomeu.viz...@collabora.com wrote:
Hello,
I have a problem with the panel on my Tegra Chromebook taking longer than
expected to be ready during boot (Stéphane Marchesin reported
Checkpatch.pl complains about these:
WARNING: Possible unnecessary 'out of memory' message
The messages use a little extra RAM and they add a few extra lines of
code. We're probably never going to hit these out of memory situations
but if we did then kmalloc() has pretty good error messages
Quoting Kukjin Kim (2015-06-21 18:46:26)
Krzysztof Kozlowski wrote:
On 22.06.2015 10:38, Kukjin Kim wrote:
Krzysztof Kozlowski wrote:
2015-05-08 9:18 GMT+09:00 Krzysztof Kozlowski k.kozlow...@samsung.com:
2015-04-04 1:43 GMT+09:00 Bartlomiej Zolnierkiewicz
We were allocating enough space because sizeof(-grp) and
sizeof(-mux) are both equal to 5 but in the snprintf() we only allowed
for 4 characters so the last 'p' and 'x' characters were truncated.
The allocate and sprintf can be done in one step with the kasprintf().
Signed-off-by: Dan Carpenter
On 23.06.2015 01:00, Anand Moon wrote:
Hi Krzysztof
On 13 June 2015 at 13:45, Krzysztof Kozlowski k.kozlow...@samsung.com
mailto:k.kozlow...@samsung.com wrote:
2015-06-13 14:47 GMT+09:00 Krzysztof Kozlowski
k.kozlow...@samsung.com mailto:k.kozlow...@samsung.com:
W dniu
On 23.06.2015 00:04, Michael Turquette wrote:
Quoting Kukjin Kim (2015-06-21 18:46:26)
Krzysztof Kozlowski wrote:
On 22.06.2015 10:38, Kukjin Kim wrote:
Krzysztof Kozlowski wrote:
2015-05-08 9:18 GMT+09:00 Krzysztof Kozlowski k.kozlow...@samsung.com:
2015-04-04 1:43 GMT+09:00 Bartlomiej
On 23.06.2015 00:13, Dan Carpenter wrote:
Checkpatch.pl complains about these:
WARNING: Possible unnecessary 'out of memory' message
The messages use a little extra RAM and they add a few extra lines of
code. We're probably never going to hit these out of memory situations
but if we did
On Mon, Jun 22, 2015 at 10:23 AM, Tomeu Vizoso
tomeu.viz...@collabora.com wrote:
On 28 May 2015 at 06:33, Rob Herring robherri...@gmail.com wrote:
On Mon, May 25, 2015 at 9:53 AM, Tomeu Vizoso
tomeu.viz...@collabora.com wrote:
Hello,
I have a problem with the panel on my Tegra Chromebook
On 23.06.2015 08:46, Krzysztof Kozlowski wrote:
On 23.06.2015 00:04, Michael Turquette wrote:
Quoting Kukjin Kim (2015-06-21 18:46:26)
Krzysztof Kozlowski wrote:
On 22.06.2015 10:38, Kukjin Kim wrote:
Krzysztof Kozlowski wrote:
2015-05-08 9:18 GMT+09:00 Krzysztof Kozlowski
On 23.06.2015 00:12, Dan Carpenter wrote:
We were allocating enough space because sizeof(-grp) and
sizeof(-mux) are both equal to 5 but in the snprintf() we only allowed
for 4 characters so the last 'p' and 'x' characters were truncated.
The allocate and sprintf can be done in one step with
On 2015년 06월 22일 20:41, Varka Bhadram wrote:
Hi,
On 06/22/2015 04:46 PM, Inki Dae wrote:
From: Joonyoung Shim jy0922.s...@samsung.com
DECON(Display and Enhancement Controller) is new IP replacing FIMD in
Exynos5433. This patch adds Exynos5433 decon driver.
Changelog v7:
- Rebased on
From: Joonyoung Shim jy0922.s...@samsung.com
DECON(Display and Enhancement Controller) is new IP replacing FIMD in
Exynos5433. This patch adds Exynos5433 decon driver.
Changelog v7:
- Rebased on top of exynos-drm-next.
- Added runtime pm support.
Signed-off-by: Joonyoung Shim
Hi,
On 06/22/2015 04:46 PM, Inki Dae wrote:
From: Joonyoung Shim jy0922.s...@samsung.com
DECON(Display and Enhancement Controller) is new IP replacing FIMD in
Exynos5433. This patch adds Exynos5433 decon driver.
Changelog v7:
- Rebased on top of exynos-drm-next.
- Added runtime pm support.
On 06/22/2015 05:27 PM, Inki Dae wrote:
On 2015년 06월 22일 20:41, Varka Bhadram wrote:
(..)
+platform_set_drvdata(pdev, ctx);
You are setting the driver data as ctx..
But no where you are using it...?
Am i missing anything ?
See decon_bind and decon_unbind functions. :)
Cleared.
2015-06-22 20:42 GMT+09:00 Inki Dae inki@samsung.com:
+ Krzysztof
On 2015년 06월 22일 18:10, Inki Dae wrote:
On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
The clock which was named as 'pll_clk' is actually not the clock source
of PLL in MIPI DSI. This patch fixes this disagreement.
Mr.
On 2015년 06월 22일 20:59, Krzysztof Kozlowski wrote:
2015-06-22 20:42 GMT+09:00 Inki Dae inki@samsung.com:
+ Krzysztof
On 2015년 06월 22일 18:10, Inki Dae wrote:
On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
The clock which was named as 'pll_clk' is actually not the clock source
of PLL in
On 23.06.2015 11:28, Inki Dae wrote:
On 2015년 06월 23일 11:10, Krzysztof Kozlowski wrote:
2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski k.kozlow...@samsung.com:
2015-06-22 20:42 GMT+09:00 Inki Dae inki@samsung.com:
+ Krzysztof
On 2015년 06월 22일 18:10, Inki Dae wrote:
On 2015년 06월 12일
2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski k.kozlow...@samsung.com:
2015-06-22 20:42 GMT+09:00 Inki Dae inki@samsung.com:
+ Krzysztof
On 2015년 06월 22일 18:10, Inki Dae wrote:
On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
The clock which was named as 'pll_clk' is actually not the clock
On 2015년 06월 23일 11:10, Krzysztof Kozlowski wrote:
2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski k.kozlow...@samsung.com:
2015-06-22 20:42 GMT+09:00 Inki Dae inki@samsung.com:
+ Krzysztof
On 2015년 06월 22일 18:10, Inki Dae wrote:
On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
The clock
Hi Bartlomiej,
[Adding Rafael Rob to cc list. Please don't forget for any PM
specific patches :)]
First of all, really sorry for missing this mail thread. Don't know
how I missed it though. And please please please, do send a ping
reminder (to me at least), if you think the mail thread is
Hi Krzysztof
On 23 June 2015 at 05:27, Krzysztof Kozlowski k.kozlow...@samsung.com wrote:
On 23.06.2015 01:00, Anand Moon wrote:
Hi Krzysztof
On 13 June 2015 at 13:45, Krzysztof Kozlowski k.kozlow...@samsung.com
mailto:k.kozlow...@samsung.com wrote:
2015-06-13 14:47 GMT+09:00 Krzysztof
2015-06-22 20:42 GMT+09:00 Inki Dae inki@samsung.com:
+ Krzysztof
On 2015년 06월 22일 18:10, Inki Dae wrote:
On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
The clock which was named as 'pll_clk' is actually not the clock source
of PLL in MIPI DSI. This patch fixes this disagreement.
Mr.
looking at next-20150622 and file
drivers/gpu/drm/exynos/exynos_drm_dsi.c. There is no such code there.
There is only pll_clk. No sclk_mipi.
Maybe it was changed by other patch... but I haven't received it. Also
I cannot find such patch on linux-kernel, linux-arm-kernel and
linux-samsung-soc. I
+ Samsung SoC mailing list.
On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk
is actually not the pll input clock for dsi. The pll input clock comes
from the board's oscillator directly. But for the backward
compatibility,
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