On 01.10.2013, at 21:21, Yoder Stuart-B08248 wrote:
>>> static int __init vfio_iommu_type1_init(void)
>>> {
>>> - if (!iommu_present(&pci_bus_type))
>>> +#ifdef CONFIG_PCI
>>> + if (iommu_present(&pci_bus_type)) {
>>> + iommu_bus_type = &pci_bus_type;
>>> + /* For PCI targ
On 02.10.2013, at 13:21, Antonios Motakis wrote:
> On Tue, Oct 1, 2013 at 9:32 PM, Yoder Stuart-B08248
> wrote:
>>> Antonios Motakis wrote
Alex Williamson wrote:
I notice all the open firmware calls here and I'm curious,
will all platform devices be making use of open firmware?
>
On 04/02/2013 12:44 PM, Kukjin Kim wrote:
> Alexander Graf wrote:
>> When running on an exynos 5250 SoC, we don't initialize the architected
>> timers. The chip however supports architected timers.
>>
> Yes, exynos5250 can support, mct(multi core timer) is us
On 14.03.2013, at 20:07, Sergei Shtylyov wrote:
> Hello.
>
> On 14-03-2013 4:59, Alexander Graf wrote:
>
>> When running on an exynos 5250 SoC, we don't initialize the architected
>> timers. The chip however supports architected timers.
>
>> When we
On 14.03.2013, at 15:58, Thomas Abraham wrote:
> On 14 March 2013 17:31, Alexander Graf wrote:
>>
>> On 14.03.2013, at 05:19, Thomas Abraham wrote:
>>
>>> On 14 March 2013 05:29, Alexander Graf wrote:
>>>> On my Exynos 5 based Arndale system, I need
On 14.03.2013, at 04:38, Doug Anderson wrote:
> Alexander,
>
> On Wed, Mar 13, 2013 at 4:59 PM, Alexander Graf wrote:
>> On my Exynos 5 based Arndale system, I need to pull the reset line down
>> and then let it go up again to actually perform a reset. Without that
>&
On 14.03.2013, at 05:19, Thomas Abraham wrote:
> On 14 March 2013 05:29, Alexander Graf wrote:
>> On my Exynos 5 based Arndale system, I need to pull the reset line down
>> and then let it go up again to actually perform a reset. Without that
>> reset, I can't f
The GIC in the exynos5250 SoC is A15 compliant. Show this through
the device tree, so that we can use the GIC for KVM.
Also add the respective A15 memory regions and interrupt links.
Signed-off-by: Alexander Graf
---
arch/arm/boot/dts/exynos5250.dtsi |8 ++--
1 file changed, 6
a real fix, but does get me
working with KVM on Arndale.
Signed-off-by: Alexander Graf
---
arch/arm/mach-exynos/mct.c |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index c9d6650..eefb8af 100644
--- a/arch/arm/mach-exynos/mct.c
est
alternative patches to fix the issues at hand.
Alex
Alexander Graf (3):
ARM: EXYNOS5250: dts: Declare the gic as a15 compatible
ARM: EXYNOS5250: dts: Add architected timer nodes
ARM: EXYNOS5250: Register architected timers
arch/arm/boot/dts/exynos5250.dtsi | 18 +++---
arch/
The exynos 5250 SoC supports A15 style architected timers. Indicate
this through the device tree.
This is required by KVM.
Signed-off-by: Alexander Graf
---
arch/arm/boot/dts/exynos5250.dtsi |8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b
found.
This way we don't accidently reserve the vbus GPIO pin, but later on
defer the creation of our controller, because the phy device tree node
hasn't been probed yet.
This patch implements the above logic, making EHCI and OHCI work on
Arndale systems for me.
Signed-off-by: Alexander
On 13.03.2013, at 18:59, Doug Anderson wrote:
> Alexander,
>
> On Wed, Mar 13, 2013 at 10:45 AM, Alexander Graf wrote:
>>
>>>> + gpio_free(gpio);
>>>
>>> Freeing the gpio is a little on the iffy side since you actually care
>>> ab
On 13.03.2013, at 18:28, Doug Anderson wrote:
> Alexander,
>
> On Tue, Mar 12, 2013 at 6:09 PM, Alexander Graf wrote:
>> - err = gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "ehci_vbus_gpio");
>> - if (err)
>> + /* reset pulls the line
rk on
Arndale systems for me.
Signed-off-by: Alexander Graf
CC: Vivek Gautam
CC: Jingoo Han
CC: Alan Stern
CC: Kukjin Kim
CC: Felipe Balbi
CC: Greg Kroah-Hartman
---
As this affects 3.9, this patch should definitely be considered for inclusion
there.
---
drivers/usb/host/ehci-s5p.c
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