.@samsung.com>
>> ---
>> Changelog:
>> v4:
>> - fixed broken conditional compilation and adjusted comments in dwc2_hsotg
>> structure documentation
>>
>> v3:
>> - rebased onto latest 'testing/next' from Felipe Balbi (includes
>> s3c_hso
On Mon, Sep 21, 2015 at 12:16:12PM +0200, Marek Szyprowski wrote:
> DWC2 module on some platforms needs three additional hardware
> resources: phy controller, clock and power supply. All of them must be
> enabled/activated to properly initialize and operate. This was initially
> handled in
On Thu, Oct 01, 2015 at 09:04:59PM +, John Youn wrote:
> On 10/1/2015 8:50 AM, Felipe Balbi wrote:
> > On Mon, Sep 21, 2015 at 12:16:12PM +0200, Marek Szyprowski wrote:
> >> DWC2 module on some platforms needs three additional hardware
> >> resources: phy control
On Thu, Oct 01, 2015 at 10:21:22PM +, John Youn wrote:
> On 10/1/2015 3:04 PM, Felipe Balbi wrote:
> > On Thu, Oct 01, 2015 at 09:04:59PM +, John Youn wrote:
> >> On 10/1/2015 8:50 AM, Felipe Balbi wrote:
> >>> On Mon, Sep 21, 2015 at 12:16:12PM +0200, Marek
On Mon, Jun 01, 2015 at 06:22:41PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Friday 29 May 2015 08:34 PM, Felipe Balbi wrote:
Hi,
On Fri, May 29, 2015 at 05:04:38PM +0530, Kishon Vijay Abraham I wrote:
Hi Felipe,
On Wednesday 27 May 2015 12:09 AM, Felipe Balbi wrote:
On Tue, May 26
Hi,
On Fri, May 29, 2015 at 05:04:38PM +0530, Kishon Vijay Abraham I wrote:
Hi Felipe,
On Wednesday 27 May 2015 12:09 AM, Felipe Balbi wrote:
On Tue, May 26, 2015 at 11:37:17AM -0700, Arun Ramamurthy wrote:
Hi
On 15-05-26 07:19 AM, Felipe Balbi wrote:
HI,
On Mon, May 25, 2015 at 02
On Tue, May 26, 2015 at 11:37:17AM -0700, Arun Ramamurthy wrote:
Hi
On 15-05-26 07:19 AM, Felipe Balbi wrote:
HI,
On Mon, May 25, 2015 at 02:19:58PM -0700, Arun Ramamurthy wrote:
On 15-05-14 05:52 PM, Felipe Balbi wrote:
Hi,
On Wed, Apr 22, 2015 at 04:04:10PM -0700, Arun
HI,
On Mon, May 25, 2015 at 02:19:58PM -0700, Arun Ramamurthy wrote:
On 15-05-14 05:52 PM, Felipe Balbi wrote:
Hi,
On Wed, Apr 22, 2015 at 04:04:10PM -0700, Arun Ramamurthy wrote:
Most of the phy providers use select to enable GENERIC_PHY. Since select
is only recommended when
On Fri, Nov 21, 2014 at 07:05:43PM +0530, Vivek Gautam wrote:
The series has dependency on
a) [PATCH v7 0/7] Enable support for Samsung Exynos7 SoC
http://www.spinics.net/lists/linux-samsung-soc/msg38734.html
b) [GIT PULL] Samsung clock changes for 3.19 - specifically the clock dt
On Fri, Oct 31, 2014 at 11:12:33AM +0100, Marek Szyprowski wrote:
This patch adds mutex, which protects initialization and
deinitialization procedures against suspend/resume methods.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
doesn't apply either:
checking file
On Mon, Nov 17, 2014 at 09:59:42AM +0100, Marek Szyprowski wrote:
This patch adds a call to s3c_hsotg_disconnect() from 'end session'
interrupt (GOTGINT_SES_END_DET) to correctly notify gadget subsystem
about unplugged usb cable. DISCONNINT interrupt cannot be used for this
purpose, because it
On Fri, Nov 14, 2014 at 07:01:37PM +, Paul Zimmerman wrote:
-Original Message-
From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
Sent: Friday, November 14, 2014 4:20 AM
This patch adds a call to s3c_hsotg_disconnect() from 'end session'
interrupt
Hi,
On Fri, Nov 14, 2014 at 07:43:23PM +, Paul Zimmerman wrote:
@@ -3699,6 +3717,8 @@ static int s3c_hsotg_resume(struct
platform_device *pdev)
s3c_hsotg_core_connect(hsotg);
spin_unlock_irqrestore(hsotg-lock, flags);
+ mutex_unlock(hsotg-init_mutex);
On Mon, Oct 20, 2014 at 12:45:33PM +0200, Marek Szyprowski wrote:
udc_stop() should clear -driver pointer unconditionally to let the UDC
framework to work correctly with both registering/unregistering gadgets
and enabling/disabling gadgets by writing to
/sys/class/udc/*hsotg/soft_connect
On Mon, Oct 20, 2014 at 12:45:34PM +0200, Marek Szyprowski wrote:
This patch fixes probe function to match the pattern used elsewhere in
the driver, where power regulators are turned off as the last element in
the device shutdown procedure.
Signed-off-by: Marek Szyprowski
On Thu, Oct 23, 2014 at 06:18:51PM +, Paul Zimmerman wrote:
From: Felipe Balbi [mailto:ba...@ti.com]
Sent: Thursday, October 23, 2014 8:02 AM
On Mon, Oct 20, 2014 at 12:45:33PM +0200, Marek Szyprowski wrote:
udc_stop() should clear -driver pointer unconditionally to let the UDC
On Thu, Oct 23, 2014 at 06:15:57PM +, Paul Zimmerman wrote:
From: Felipe Balbi [mailto:ba...@ti.com]
Sent: Thursday, October 23, 2014 8:01 AM
On Mon, Oct 20, 2014 at 12:45:34PM +0200, Marek Szyprowski wrote:
This patch fixes probe function to match the pattern used elsewhere
On Fri, Oct 17, 2014 at 12:43:48PM +0200, Marek Szyprowski wrote:
Hello,
On 2014-10-16 15:36, Felipe Balbi wrote:
On Thu, Oct 16, 2014 at 02:57:59PM +0200, Marek Szyprowski wrote:
Enabling and disabling usb gadget by writing to
/sys/class/udc/*hsotg/soft_connect results in calling udc_start
Hi,
On Fri, Oct 17, 2014 at 10:44:35AM -0500, Felipe Balbi wrote:
On Fri, Oct 17, 2014 at 12:43:48PM +0200, Marek Szyprowski wrote:
Hello,
On 2014-10-16 15:36, Felipe Balbi wrote:
On Thu, Oct 16, 2014 at 02:57:59PM +0200, Marek Szyprowski wrote:
Enabling and disabling usb gadget
On Fri, Oct 17, 2014 at 12:35:39PM +0200, Marek Szyprowski wrote:
Hello,
On 2014-10-16 15:33, Felipe Balbi wrote:
On Thu, Oct 16, 2014 at 02:57:57PM +0200, Marek Szyprowski wrote:
This patch adds a call to s3c_hsotg_disconnect() from 'end session'
interrupt to correctly notify gadget
On Thu, Oct 16, 2014 at 02:57:57PM +0200, Marek Szyprowski wrote:
This patch adds a call to s3c_hsotg_disconnect() from 'end session'
interrupt to correctly notify gadget subsystem about unplugged usb
cable.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
Hi,
On Thu, Oct 16, 2014 at 02:57:59PM +0200, Marek Szyprowski wrote:
Enabling and disabling usb gadget by writing to
/sys/class/udc/*hsotg/soft_connect results in calling udc_start/udc_stop
functions with the same usb gadget driver, so the driver should not WARN
about such case.
On Thu, Oct 16, 2014 at 02:58:02PM +0200, Marek Szyprowski wrote:
This patch changes s3c_hsotg_core_init function to leave hardware in
soft disconnect mode, so the actual moment of coupling the hardware to
the usb bus can be later controlled by the driver in the more accurate
what is this more
Hi,
your subject line is wrong. -pullup() is already implemented, you're
moving unnecessary code from -pullup() to other places.
On Thu, Oct 16, 2014 at 02:58:03PM +0200, Marek Szyprowski wrote:
This patch moves PHY enable and disable calls from pullup method to
udc_start/stop functions and
);
considering this is inside an IRQ handler, I'd rather use dev_vdbg() but
no strong feelings:
Reviewed-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
Description: Digital signature
Hi,
On Thu, Oct 16, 2014 at 02:58:04PM +0200, Marek Szyprowski wrote:
This patch moves calls to phy enable/disable out of spinlock protected
blocks in device suspend/resume to fix incorrect caller context. Phy
related functions must not be called from atomic context.
Signed-off-by: Marek
Hi,
On Tue, Oct 14, 2014 at 10:25:00AM +0530, Vivek Gautam wrote:
Hi Felipe,
On Tue, Oct 14, 2014 at 4:14 AM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Mon, Oct 13, 2014 at 01:54:59PM +0900, Anton Tikhomirov wrote:
Hi Vivek,
Exynos7 also has a separate special gate clock going
Hi,
On Mon, Oct 13, 2014 at 01:54:59PM +0900, Anton Tikhomirov wrote:
Hi Vivek,
Exynos7 also has a separate special gate clock going to the IP
apart from the usual AHB clock. So add support for the same.
As we discussed before, Exynos7 SoCs have 7 clocks to be controlled
by the driver.
On Tue, Oct 07, 2014 at 03:49:33PM +0530, Vivek Gautam wrote:
Exynos7 also has a separate special gate clock going to the IP
apart from the usual AHB clock. So add support for the same.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
I'll take this one once -rc1 is tagged. The others
Hi,
On Thu, Sep 11, 2014 at 09:10:21PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Wednesday 10 September 2014 01:26 PM, Vivek Gautam wrote:
On Wed, Sep 10, 2014 at 10:53 AM, Vivek Gautam gautam.vi...@samsung.com
wrote:
On Wed, Sep 10, 2014 at 10:23 AM, Felipe Balbi ba...@ti.com wrote
On Tue, Sep 09, 2014 at 07:19:50AM +0530, Vivek Gautam wrote:
Hi,
On Mon, Sep 8, 2014 at 7:14 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Mon, Sep 08, 2014 at 09:53:09AM +0530, Vivek Gautam wrote:
On Fri, Sep 5, 2014 at 11:26 PM, Felipe Balbi ba...@ti.com wrote:
On Thu, Sep 04
chromium id, since that seems to be more active.
On Tue, Sep 9, 2014 at 8:12 PM, Felipe Balbi ba...@ti.com wrote:
On Tue, Sep 09, 2014 at 07:19:50AM +0530, Vivek Gautam wrote:
Hi,
On Mon, Sep 8, 2014 at 7:14 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Mon, Sep 08, 2014 at 09
Hi,
On Mon, Sep 08, 2014 at 09:53:09AM +0530, Vivek Gautam wrote:
On Fri, Sep 5, 2014 at 11:26 PM, Felipe Balbi ba...@ti.com wrote:
On Thu, Sep 04, 2014 at 12:01:19PM +0530, Vivek Gautam wrote:
Don't we have phy_power_on()
for that ? It looks like you could just as well do this from
On Thu, Sep 04, 2014 at 12:01:19PM +0530, Vivek Gautam wrote:
Don't we have phy_power_on()
for that ? It looks like you could just as well do this from
phy_power_on() ?
No, unfortunately keeping these calibration settings in phy_power_on()
doesn't help, since we need to do this after
Hi,
On Wed, Sep 03, 2014 at 12:59:27PM +0530, Vivek Gautam wrote:
On Tue, Sep 02, 2014 at 04:42:18PM +0530, Vivek Gautam wrote:
Adding phy calibrate callback, which facilitates setting certain
PHY settings post initialization of the PHY controller.
Exynos5420 and Exynos5800 have 28nm USB
On Wed, Sep 03, 2014 at 09:32:14AM +0530, Vivek Gautam wrote:
On Tue, Sep 2, 2014 at 8:07 PM, Felipe Balbi ba...@ti.com wrote:
On Mon, Sep 01, 2014 at 01:30:21PM +0530, Vivek Gautam wrote:
On Thu, Aug 28, 2014 at 8:36 PM, Daniele Forsi dfo...@gmail.com wrote:
2014-08-28 10:02 GMT+02:00
Hi,
On Tue, Sep 02, 2014 at 04:42:18PM +0530, Vivek Gautam wrote:
Adding phy calibrate callback, which facilitates setting certain
PHY settings post initialization of the PHY controller.
Exynos5420 and Exynos5800 have 28nm USB 3.0 DRD PHY for which
the Loss-of-Signal (LOS) Detector Threshold
On Tue, Sep 02, 2014 at 04:09:08PM +0530, Vivek Gautam wrote:
Hi,
On Fri, Aug 29, 2014 at 12:18 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Aug 28, 2014 at 09:01:56AM +0100, Vivek Gautam wrote:
Exynos7 also has a separate special gate clock going to the IP
apart from the usual
hi,
On Thu, Aug 28, 2014 at 01:31:58PM +0530, Vivek Gautam wrote:
@@ -457,11 +458,19 @@ static int exynos5_usbdrd_phy_power_on(struct phy *phy)
clk_prepare_enable(phy_drd-ref_clk);
/* Enable VBUS supply */
+ if (phy_drd-vbus_boost) {
+ ret =
On Thu, Aug 28, 2014 at 01:31:59PM +0530, Vivek Gautam wrote:
The Exynos-DWC3 USB 3.0 DRD controller is also present on
Exynos7 platform, so adding the dependency on ARCH_EXYNOS7
for this driver.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/dwc3/Kconfig |2 +-
Hi,
On Fri, Aug 22, 2014 at 06:59:00PM +0200, Bartlomiej Zolnierkiewicz wrote:
Hi,
This patch series removes the old Samsung USB PHY drivers that
got replaced by the new ones using the generic PHY layer.
Depends on:
- v3.17-rc1 branch of Linus' kernel
Changes since v1
Hi,
On Fri, Aug 22, 2014 at 06:59:05PM +0200, Bartlomiej Zolnierkiewicz wrote:
drivers/usb/phy/phy-samsung-usb[2,3] drivers got replaced by
drivers/phy/phy-samsung-usb[2,3] ones and the old common Samsung
USB PHY code is no longer used.
Signed-off-by: Bartlomiej Zolnierkiewicz
Hi,
On Wed, Aug 27, 2014 at 11:42:25PM +0530, Vivek Gautam wrote:
On Wed, Aug 27, 2014 at 1:22 PM, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
dwc3 driver is using the new Exynos5 SoC series USB DRD PHY driver
(PHY_EXYNOS5_USBDRD which selects GENERIC_PHY) as can be seen by
Hi,
On Thu, Aug 14, 2014 at 04:25:22PM +0200, Bartlomiej Zolnierkiewicz wrote:
Hi,
This patch series removes the old Samsung USB PHY drivers that
got replaced by the new ones using the generic PHY layer.
Depends on:
- next-20140813 branch of linux-next kernel
this thread seems to have
On Wed, Jul 16, 2014 at 01:51:40PM +0530, Vivek Gautam wrote:
The host controller by itself may sometimes need to handle PHY
and/or calibrate some of the PHY settings to get full support out
of the PHY controller. The PHY core provides a calibration
funtionality now to do so.
Therefore,
On Thu, Jun 26, 2014 at 11:09:37AM +0530, Sachin Kamat wrote:
EHCI and OHCI drivers on Exynos platforms do not work without their
corresponding SoC specific phy drivers. Hence it makes no sense to
keep these phy drivers as user selectable. Instead select them from
the respective USB configs to
On Fri, Jun 27, 2014 at 08:55:31AM -0700, Doug Anderson wrote:
Felipe,
On Fri, Jun 27, 2014 at 8:46 AM, Felipe Balbi ba...@ti.com wrote:
On Thu, Jun 26, 2014 at 11:09:37AM +0530, Sachin Kamat wrote:
EHCI and OHCI drivers on Exynos platforms do not work without their
corresponding SoC
On Wed, Apr 09, 2014 at 05:24:45PM +0530, Vivek Gautam wrote:
Adding support to enable/disable VBUS hooked to a gpio
to enable vbus supply on the port.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Based on 'phy-exynos5-usbdrd' patches:
[PATCH V4 0/5] Add Exynos5 USB 3.0 phy
Hi,
On Tue, Dec 17, 2013 at 03:35:54PM -0800, David Cohen wrote:
On Tue, Dec 17, 2013 at 03:31:40PM -0800, David Cohen wrote:
On Thu, Dec 12, 2013 at 03:38:38PM -0600, Felipe Balbi wrote:
hi all,
these patches add pm_runtime support for all glue layers.
I plan to add
On Wed, Dec 18, 2013 at 09:36:14AM -0600, Felipe Balbi wrote:
Hi,
On Tue, Dec 17, 2013 at 03:35:54PM -0800, David Cohen wrote:
On Tue, Dec 17, 2013 at 03:31:40PM -0800, David Cohen wrote:
On Thu, Dec 12, 2013 at 03:38:38PM -0600, Felipe Balbi wrote:
hi all,
these patches add
On Wed, Dec 18, 2013 at 04:09:34PM +0530, Yuvaraj Kumar C D wrote:
From: Andrew Bresticker abres...@chromium.org
In addition to enabling async suspend/resume on the xhci-plat device,
we must enable it for the dwc3 device (the parent of xhci-plat) in order
to make the full USB stack resume
On Wed, Dec 18, 2013 at 04:09:33PM +0530, Yuvaraj Kumar C D wrote:
From: Andrew Bresticker abres...@chromium.org
In addition to enabling async suspend/resume on the xhci-plat device,
we must enable it for the dwc3-exynos platform device in order to make
the full USB stack resume
@vger.kernel.org; Linux OMAP Mailing List;
Kwok, WingMan
Subject: Re: [PATCH v2 1/7] usb: dwc3: keystone: add basic PM support
On Thursday 12 December 2013 04:45 PM, Felipe Balbi wrote:
A bare-minimum PM implementation which will server as building block
for more complex
s/server/serve
On Fri, Dec 13, 2013 at 02:01:32PM +0900, Anton Tikhomirov wrote:
Hi Felipe,
-static int dwc3_exynos_suspend(struct device *dev)
+static int __dwc3_exynos_suspend(struct dwc3_exynos *exynos)
{
- struct dwc3_exynos *exynos = dev_get_drvdata(dev);
-
clk_disable(exynos-clk);
On Fri, Dec 13, 2013 at 01:56:18PM -0600, Felipe Balbi wrote:
On Fri, Dec 13, 2013 at 02:01:32PM +0900, Anton Tikhomirov wrote:
Hi Felipe,
-static int dwc3_exynos_suspend(struct device *dev)
+static int __dwc3_exynos_suspend(struct dwc3_exynos *exynos)
{
- struct dwc3_exynos
On Thursday 12 December 2013 04:45 PM, Felipe Balbi wrote:
A bare-minimum PM implementation which will server as building
block for more complex
s/server/serve ;-)
PM implementation in the future.
At the least will not leave clocks on unnecessarily when e.g. a
user
teach Exynos glue about pm_runtime so that
it's easier to teach dwc3 core about it
later.
No functional changes otherwise.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/dwc3/dwc3-exynos.c | 65 --
1 file changed, 56 insertions(+), 9 deletions
If we want to suspend/runtime in runtime, we
can do so, in OMAP's case at least, with the
same implementation we use for system pm.
This patch adds basic pm_runtime support with
that in mind.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/dwc3/dwc3-omap.c | 39
even if pm_runtime_get*() fails, it still increments
pm usage counter, so we must pm_runtime_put*()
in that case too. Fix that observation in dwc3-omap.c.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/dwc3/dwc3-omap.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff
teach the PCI glue about pm_runtime so that
it's easier to teach dwc3 core about it
later.
No functional changes otherwise.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/dwc3/dwc3-pci.c | 66 ++---
1 file changed, 51 insertions(+), 15 deletions
pm_runtime_put_sync() will kill dwc3's clocks and,
since dwc3 core accesses registers during removal,
we must make sure to unregister core before
disabling clocks and pm_runtime.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/dwc3/dwc3-omap.c | 2 +-
1 file changed, 1 insertion(+), 1
hi all,
these patches add pm_runtime support for all glue layers.
I plan to add pm_runtime support for dwc3 after these
patches are merged upstream.
Please test.
Felipe Balbi (7):
usb: dwc3: keystone: add basic PM support
usb: dwc3: omap: add basic pm_runtime support
usb: dwc3: pci: add
it's best to just remove all ifdefs and always
define our dev_pm_ops structure.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/dwc3/dwc3-exynos.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
A bare-minimum PM implementation which will
server as building block for more complex
PM implementation in the future.
At the least will not leave clocks on unnecessarily
when e.g. a user write mem to /sys/power/state.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/usb/dwc3/dwc3
On Thu, Dec 12, 2013 at 03:38:39PM -0600, Felipe Balbi wrote:
A bare-minimum PM implementation which will
server as building block for more complex
PM implementation in the future.
At the least will not leave clocks on unnecessarily
when e.g. a user write mem to /sys/power/state.
Signed
A bare-minimum PM implementation which will
server as building block for more complex
PM implementation in the future.
At the least will not leave clocks on unnecessarily
when e.g. a user write mem to /sys/power/state.
Signed-off-by: Felipe Balbi ba...@ti.com
---
improve error path a little
Hi,
On Thu, Dec 12, 2013 at 03:45:55PM -0600, Felipe Balbi wrote:
+static const struct dev_pm_ops kdwc3_dev_pm_ops = {
+ .prepare= kdwc3_prepare,
+ .complete = kdwc3_complete,
+
+ SET_SYSTEM_SLEEP_PM_OPS(kdwc3_suspend, kdwc3_resume)
+ SET_RUNTIME_PM_OPS
it's best to just remove all ifdefs and always
define our dev_pm_ops structure.
Signed-off-by: Felipe Balbi ba...@ti.com
---
one more patch
drivers/usb/dwc3/dwc3-omap.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3
On Thu, Dec 12, 2013 at 07:29:24PM -0500, Santosh Shilimkar wrote:
On Thursday 12 December 2013 04:45 PM, Felipe Balbi wrote:
A bare-minimum PM implementation which will
server as building block for more complex
s/server/serve ;-)
hah! :-) will fix in my branch.
PM implementation
On Thu, Dec 12, 2013 at 05:56:05PM -0800, David Cohen wrote:
On Thu, Dec 12, 2013 at 03:38:41PM -0600, Felipe Balbi wrote:
teach the PCI glue about pm_runtime so that
it's easier to teach dwc3 core about it
later.
No functional changes otherwise.
Signed-off-by: Felipe Balbi ba
' [-Wunused-variable]
struct platform_device *pdev = to_platform_device(dsim-dev);
Reported-by: Olof Johansson o...@lixom.net
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
pretty obvious patch:
Reviewed-by: Felipe Balbi ba...@ti.com
--
balbi
callbacks, which may be called during the musb
device probing.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
you want me to carry this one through my tree or you prefer getting my
Acked-by ? Either way works for me:
Acked-by: Felipe Balbi ba...@ti.com
there's also the third option of me
Hi,
On Fri, Sep 20, 2013 at 02:49:38PM +0100, Russell King - ARM Linux wrote:
On Fri, Sep 20, 2013 at 08:11:25AM -0500, Felipe Balbi wrote:
Hi,
On Fri, Sep 20, 2013 at 12:14:38AM +0100, Russell King wrote:
Use platform_device_register_full() for those drivers which can, to
avoid
Hi,
On Tue, Aug 27, 2013 at 01:27:48PM -0700, Julius Werner wrote:
*Ping!*
Are there still unanswered concerns left with this patch? I hope my
prior mails could clear up why I think that the PMU register
description in the device tree for a specific PHY is represents the
hardware more
On Wed, Sep 04, 2013 at 02:27:06PM +0530, Kishon Vijay Abraham I wrote:
On Tuesday 03 September 2013 09:20 PM, Greg KH wrote:
On Tue, Sep 03, 2013 at 08:55:23PM +0530, Kishon Vijay Abraham I wrote:
Hi Greg,
On Wednesday 28 August 2013 12:50 AM, Felipe Balbi wrote:
Hi,
On Mon, Aug 26
On Tue, Sep 17, 2013 at 05:53:31PM +0200, Tomasz Figa wrote:
Hi Felipe,
On Tuesday 17 of September 2013 10:36:16 Felipe Balbi wrote:
Hi,
On Tue, Aug 27, 2013 at 01:27:48PM -0700, Julius Werner wrote:
*Ping!*
Are there still unanswered concerns left with this patch? I hope my
On Tue, Aug 13, 2013 at 02:11:27PM +0530, Tushar Behera wrote:
On 12 July 2013 12:27, Felipe Balbi ba...@ti.com wrote:
Hi,
On Wed, Jul 10, 2013 at 10:42:27AM -0700, Julius Werner wrote:
Hi Felipe,
This is intended to pull down a reset signal line, not to switch power
to the device
Hi,
On Mon, Aug 26, 2013 at 01:44:49PM +0530, Kishon Vijay Abraham I wrote:
On Wednesday 21 August 2013 11:16 AM, Kishon Vijay Abraham I wrote:
Added a generic PHY framework that provides a set of APIs for the PHY
drivers
to create/destroy a PHY and APIs for the PHY users to obtain a
Hi,
On Mon, Aug 19, 2013 at 10:58:09AM +0530, Kishon Vijay Abraham I wrote:
So maybe let's stop solving an already solved problem and just state that
you need to explicitly assign device ID to use this framework?
Felipe,
Can we have it the way I had in my v10 patch series till we find
nodes in the core instead of doing this manually
in each driver. So, fix the drivers and documentation, too.
Signed-off-by: Wolfram Sang w...@the-dreams.de
for i2c-omap.c:
Reviewed-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
Description: Digital signature
Hi,
On Thu, Aug 01, 2013 at 05:52:04PM -0700, Julius Werner wrote:
This patch simplifies the way the phy-samsung-usb code finds the correct
power management register to enable PHY clock gating. Previously, the
code would calculate the register address from a device tree supplied
base address
Hi,
On Wed, Jul 31, 2013 at 11:14:32AM +0530, Kishon Vijay Abraham I wrote:
IMHO we need a lookup method for PHYs, just like for clocks,
regulators, PWMs or even i2c busses because there are complex cases
when passing just a name using platform data will not work. I would
second what
On Sun, Jul 21, 2013 at 08:46:53AM -0700, Greg KH wrote:
On Sun, Jul 21, 2013 at 01:12:07PM +0200, Tomasz Figa wrote:
On Sunday 21 of July 2013 16:37:33 Kishon Vijay Abraham I wrote:
Hi,
On Sunday 21 July 2013 04:01 PM, Tomasz Figa wrote:
Hi,
On Saturday 20 of July 2013
On Mon, Jul 29, 2013 at 02:17:56PM -0700, Julius Werner wrote:
This patch simplifies the way the phy-samsung-usb code finds the correct
power management register to enable PHY clock gating. Previously, the
code would calculate the register address from a device tree supplied
base address and
Hi,
On Sun, Jul 28, 2013 at 03:43:19PM +0100, Mark Brown wrote:
From: Mark Brown broo...@linaro.org
Signed-off-by: Mark Brown broo...@linaro.org
Reviewed-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
Description: Digital signature
Hi,
On Wed, Jul 10, 2013 at 10:42:27AM -0700, Julius Werner wrote:
Hi Felipe,
This is intended to pull down a reset signal line, not to switch power
to the device. I could implement that with the regulator framework
too, but I think that would just be confusing and harder to understand
On Tue, Jul 09, 2013 at 05:34:15PM -0700, Julius Werner wrote:
This patch adds support for a new 'samsung,hsic-reset-gpio' in the
device tree, which will be interpreted as an active-low reset pin during
PHY initialization when it exists. Useful for intergrated HSIC devices
like an SMSC 3503
Hi,
On Tue, Jun 25, 2013 at 05:38:23PM +0200, Tomasz Figa wrote:
This patch adds OF match table to the driver to allow instantiating it
using device tree.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
I will take this one only, the
On Fri, Jun 28, 2013 at 04:15:32PM +0900, Jingoo Han wrote:
Add a PHY provider driver for the Samsung Exynos SoC DP PHY.
Signed-off-by: Jingoo Han jg1@samsung.com
Now that you fixed Kishon's concerns, this looks pretty good:
Acked-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
;
+ phy-names = dp;
for the label, I would use something more descriptive such as
'display-port'.
other than that:
Acked-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
Description: Digital signature
-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
Description: Digital signature
On Wed, Jun 26, 2013 at 05:00:34PM +0200, Sylwester Nawrocki wrote:
Hi,
On 06/25/2013 05:06 PM, Felipe Balbi wrote:
+static struct platform_driver exynos_video_phy_driver = {
+.probe = exynos_video_phy_probe,
you *must* provide a remove method. drivers with NULL remove
On Thu, Jun 27, 2013 at 09:47:47AM +0200, Andrzej Hajda wrote:
Hi Felipe,
On 06/27/2013 08:17 AM, Felipe Balbi wrote:
On Wed, Jun 26, 2013 at 05:00:34PM +0200, Sylwester Nawrocki wrote:
Hi,
On 06/25/2013 05:06 PM, Felipe Balbi wrote:
+static struct platform_driver
Acked-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
Description: Digital signature
On Wed, Jun 26, 2013 at 05:02:23PM +0200, Sylwester Nawrocki wrote:
Add PHY provider node for the MIPI CSIS and MIPI DSIM PHYs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Acked-by: Felipe Balbi ba...@ti.com
--
balbi
On Thu, Jun 27, 2013 at 10:37:12AM +0200, Sylwester Nawrocki wrote:
On 06/27/2013 09:52 AM, Felipe Balbi wrote:
On Wed, Jun 26, 2013 at 05:02:22PM +0200, Sylwester Nawrocki wrote:
Add a PHY provider driver for the Samsung S5P/Exynos SoC MIPI CSI-2
receiver and MIPI DSI transmitter DPHYs
On Wed, Jun 26, 2013 at 02:03:42PM +0200, Sylwester Nawrocki wrote:
On 06/26/2013 01:21 PM, Kishon Vijay Abraham I wrote:
+static int exynos_video_phy_probe(struct platform_device *pdev)
+{
+ struct exynos_video_phy *state;
+ struct device *dev = pdev-dev;
+ struct resource *res;
Hi,
On Tue, Jun 25, 2013 at 04:21:46PM +0200, Sylwester Nawrocki wrote:
+enum phy_id {
+ PHY_CSIS0,
+ PHY_DSIM0,
+ PHY_CSIS1,
+ PHY_DSIM1,
+ NUM_PHYS
please prepend these with EXYNOS_PHY_ or EXYNOS_MIPI_PHY_
+struct exynos_video_phy {
+ spinlock_t slock;
+
Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
this is awesome :-)
Acked-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
Description: Digital signature
s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Acked-by: Felipe Balbi ba...@ti.com
--
balbi
signature.asc
Description: Digital signature
1 - 100 of 243 matches
Mail list logo
