Hi,
On 12/05/14 22:44, Sonny Rao wrote:
Doug mentioned that James Hogan might have an answer. James, are
there Imgtec SoCs which use dw_mmc and use DMA but don't use the
IDMAC? If so, we can add that support into this reset procedure
patch.
Yes, the Toumaz TZ1090 SoC has the dw_mmc
Hi Sylwester
On 25/07/13 13:34, Sylwester Nawrocki wrote:
On 06/13/2013 06:06 PM, James Hogan wrote:
Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.
To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted
with JTAG. In any case it works if I
revert your patch so I think the clocks are fine. I'll continue
debugging it and see if I can figure out what's happening.
Cheers
James
Best Regards
Yuvaraj
On Mon, Nov 19, 2012 at 6:50 PM, James Hogan james.ho...@imgtec.com wrote:
On 19/11/12 13:01, Yuvaraj
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*ciu_clk;
struct dw_mci_slot *slot[MAX_MCI_SLOTS];
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1.7.5.4
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On 12 December 2011 10:55, Seungwon Jeon tgih@samsung.com wrote:
James Hogan wrote:
On 9 December 2011 05:49, Seungwon Jeon tgih@samsung.com wrote:
Signed-off-by: Seungwon Jeon tgih@samsung.com
A commit message would be useful.
This patch adds another capabilities field
