On 22.09.2014 14:17, Marek Szyprowski wrote:
> sclk_g3d clock doesn't have enable/disable bits, but the driver hijacked
> g3d gate clock bits for this purpose and didn't provide real g3d clock
> at all. This patch fixes this issue by adding proper definition for g3d
> clock and removing incorrect a
gned-off-by: Marek Szyprowski
> Acked-by: Tomasz Figa
> ---
> drivers/clk/samsung/clk-exynos4.c | 1 +
> include/dt-bindings/clock/exynos4.h | 10 +-
> 2 files changed, 6 insertions(+), 5 deletions(-)
>
Applied for next.
Best regards,
Tomasz
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The PWM block is required for system clock source so it must be always
enabled. This patch fixes boot issues on SMDK6410 which did not have the
node enabled explicitly for other purposes.
Fixes: eeb93d02c5d8 ("clocksource: of: Respect device tree node status")
Signed-off-by: T
Hi Abhilash,
On 22.09.2014 06:47, Abhilash Kesavan wrote:
> Changes since v4:
> - Fixed comments from Tomasz Figa:
> - Changed the namespace prefix from exynos to samsung
> - Defined bindings to take all input clocks
> - Sorted the Kconfig entries alphabet
On 22.09.2014 06:55, Pankaj Dubey wrote:
> Hi Tomasz,
>
> Will you please take this patch and following three Exynos3250 clock fixes
> in your tree.
>
> 1: clk: samsung: exynos3250: fix width field of mout_mmc0/1
>https://lkml.org/lkml/2014/9/5/265
> 2: clk: samsung: exynos3250: fix width and
On 09.09.2014 14:24, Krzysztof Kozłowski wrote:
> On 06.09.2014 15:03, Pankaj Dubey wrote:
>> As per user manual of Exynos3250 SRC_CAM can select
>> div_cam_blk_320 if it's value is 0xC, so placing
>> div_cam_blk_320 at proper index in parent list of mout_cam_blk.
>>
>> Signed-off-by: Pankaj Dubey
On 09.09.2014 14:14, Krzysztof Kozlowski wrote:
> On 05.09.2014 13:54, Pankaj Dubey wrote:
>> As per Exynos3250 user manual mmc0/1 mux selection has 4 bit wide.
>>
>> Signed-off-by: Pankaj Dubey
>> ---
>> drivers/clk/samsung/clk-exynos3250.c |4 ++--
>> 1 file changed, 2 insertions(+), 2 de
On 09.09.2014 14:14, Krzysztof Kozlowski wrote:
> On 09.09.2014 13:54, Pankaj Dubey wrote:
>> Update shift and width field of div_spi0_isp clock as per Exynos3250
>> user manual.
>>
>> Signed-off-by: Pankaj Dubey
>> ---
>> drivers/clk/samsung/clk-exynos3250.c |2 +-
>> 1 file changed, 1 ins
On 02.09.2014 15:21, Krzysztof Kozlowski wrote:
> Add clock provider for clocks in DMC domain including EPLL and BPLL. The
> DMC clocks are necessary for Exynos3 devfreq driver.
>
> The DMC clock domain uses different address space (0x105C) than
> standard clock domain (0x1003 - 0x1005
On 22.09.2014 08:17, Abhilash Kesavan wrote:
> Hi Tomasz,
>
> On Sat, Sep 13, 2014 at 4:57 PM, Tomasz Figa wrote:
>> Hi Abhilash,
>>
>> Please see my comments inline.
>>
>> On 13.09.2014 10:50, Abhilash Kesavan wrote:
>>> Exynos7 uses diff
On 22.09.2014 01:10, Alim Akhtar wrote:
[snip]
>>> As you said there is no support for ioremap on ARM, so this is not
>>> tested on ARM.
>>
>> Don't forget that this driver is primarily targeted for ARM platforms
>> (versus just one ARM64-based Exynos7), so either this feature should be
>> clearl
On 21.09.2014 16:36, Alim Akhtar wrote:
> Hi Tomasz,
> Thanks for your valuable feedback on this patch.
You're welcome.
>>> diff --git a/Documentation/kernel-parameters.txt
>>> b/Documentation/kernel-parameters.txt
>>> index 5ae8608..e01c0e5 100644
>>> --- a/Documentation/kernel-parameters.txt
>
important fix to v3.17-rcX. Without it support for Samsung
> S5PV210 SoCs is not functional.
>
> Mike, could you take it to the fixes branch?
Acked-by: Tomasz Figa
Mike, since it seems like this is the only fix to be queued for next -rc
release, I think it would be reasonable if
Hi Alim,
Please see my comments inline.
On 16.09.2014 13:32, Alim Akhtar wrote:
> Add earlycon support for the samsung serial port. This allows enabling
> the samsung serial port for console when early_params are parse and processed.
>
> Signed-off-by: Alim Akhtar
> ---
> Documentation/kernel-
On 19.09.2014 17:11, Tomasz Figa wrote:
>> +
>> +if (!of_device_is_available(np) ||
>
> Wouldn't it be enough to simply call of_find_device_by_node(np) and if
> it fails then instead create a dummy device?
>
>> +of_node_test_and_set_
Hi Pankaj,
Please see my comments inline.
On 19.09.2014 15:06, Pankaj Dubey wrote:
> Currently a syscon entity can be only registered directly through a
> platform device that binds to a dedicated syscon driver. However in
> certain use cases it is desirable to make a device used with another
> d
On 18.09.2014 21:29, Paul Bolle wrote:
> On Thu, 2014-09-04 at 12:16 +0200, Paul Bolle wrote:
>> On Wed, 2014-07-16 at 14:58 +0200, Tomasz Figa wrote:
>>> I had two patches fixing those, but apparently this was lost in action.
>>> The correct solution is s/PLAT_S5P/AR
On 16.09.2014 13:44, Krzysztof Kozłowski wrote:
> On 15.09.2014 19:57, Russell King - ARM Linux wrote:
>> On Mon, Sep 15, 2014 at 09:34:58AM -0700, Mark Brown wrote:
>>> On Mon, Sep 15, 2014 at 11:57:09AM +0100, Build bot for Mark Brown
>>> wrote:
>>>
>>> Today's -next got a build failure in ARM al
On 15.09.2014 11:03, Russell King - ARM Linux wrote:
>> diff --git a/arch/arm/mach-exynos/firmware.c
>> b/arch/arm/mach-exynos/firmware.c
>> index 554b350..71bcfbd 100644
>> --- a/arch/arm/mach-exynos/firmware.c
>> +++ b/arch/arm/mach-exynos/firmware.c
>> @@ -102,7 +102,9 @@ static int exynos_susp
>> +static void exynos_l2_write_sec(unsigned long val, unsigned reg)
>> +{
>> +switch (reg) {
>> +case L2X0_CTRL:
>> +if (val & L2X0_CTRL_EN)
>> +exynos_smc(SMC_CMD_L2X0INVALL, 0, 0, 0);
>
> If we're calling this with the cache already enabled, presumably yo
Russell, Olof, Kukjin,
On 26.08.2014 16:17, Tomasz Figa wrote:
> This series intends to add support for L2 cache on Exynos4 SoCs on boards
> running under secure firmware, which requires certain initialization steps
> to be done with help of firmware, as selected registers are writ
Hi Kukjin,
On 26.08.2014 16:10, Tomasz Figa wrote:
> On Exynos-based boards running secure firmware the sequence of low level
> operations to enter and leave system-wide sleep mode is different than
> on those without the firmware. Namely:
> - CP15 power control and diagnostic regi
Hi Abhilash,
On 13.09.2014 10:50, Abhilash Kesavan wrote:
> The following patches are tested based on Kgene's for-next tree.
> https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next
>
> Following patches are required for this series:
> 1- "tty/serial: fix config depe
Hi Abhilash,
Please see my comments inline.
On 13.09.2014 10:50, Abhilash Kesavan wrote:
> Exynos7 uses different offsets for wakeup interrupt configuration registers.
> So a new irq_chip instance for Exynos7 wakeup interrupts is added. The
> irq_chip
> selection is now based on the wakeup inter
Hi Naveen,
Please see my comments inline.
On 12.09.2014 17:26, Naveen Krishna Chatradhi wrote:
> While adding clock support for Exynos5260, the infrastructure to
> register multiple clock controllers was introduced. Factor out the
> support for registering multiple clock controller from Exynos526
Hi Naveen,
Please see my comments inline.
On 12.09.2014 17:26, Naveen Krishna Chatradhi wrote:
> Add initial clock support for Exynos7 SoC which is required
> to bring up platforms based on Exynos7.
[snip]
> +External clocks:
> +
> +There are several clocks that are generated outside the SoC. I
On 27.08.2014 13:34, Tomasz Figa wrote:
> Hi Naveen,
>
> On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
>> This patchset supports new Exynos7 Samsung SoC based on Cortex-A57.
>> Exynos7 is a System-On-Chip (SoC) that is based on 64-bit
>> ARMv8 RISC processor.
>
Hi Pankaj,
On 10.09.2014 07:56, Pankaj Dubey wrote:
> From: Chander Kashyap
>
> The parent name added in parent list as
> mout_phyclk_mipi_dphy_4l_m_txbyte_clkhs_p, is different
> than the defined parent due to typo.
>
> Signed-off-by: Abhilash Kesavan
> Signed-off-by: Chander Kashyap
Missed
+--
> drivers/clk/rockchip/clk.h | 2 +-
> drivers/clk/samsung/clk-s5pv210.c | 56
> ++---
For drivers/clk/samsung/*
Acked-by: Tomasz Figa
Best regards,
Tomasz
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On 07.09.2014 18:12, Javier Martinez Canillas wrote:
> Hello Tomasz,
>
> On 09/07/2014 05:52 PM, Tomasz Figa wrote:
>>
>> So I believe we've got a process issue here. If you don't have normal
>> support for display hardware, but you want to keep the displa
>>> Have you seen the very long "[PATCH 4/4] simplefb: add clock handling
>>> code" thread [0]?. I wonder if the problem is that the display clocks were
>>> not known to the kernel before 3.15 but now are getting disabled and thus
>>> the simplefb driver not working?
>>>
>>> So probably is worth to
Hi Naveen,
On 02.09.2014 17:35, Naveen Krishna Chatradhi wrote:
> Changes since v1:
> - Reduced the number of features targetted for the initial platform support.
>
Are you going to reply to my comments to previous version?
Btw. My @samsung.com e-mail is no longer valid. Please use my private
o
platform driver, and
> allows to create syscon objects first time when it is required by
> calling of syscon_regmap_lookup_by APIs and keeps a list of such syscon
> objects along with syscon provider device_nodes and regmap handles.
>
> Signed-off-by: Pankaj Dubey
> Signed-off-by: To
are 40 general port groups.
>>
>> Signed-off-by: Naveen Krishna Chatradhi
>> Cc: Tomasz Figa
>> Cc: linus.wall...@linaro.org
>> Cc: Thomas Abraham
>
> Tomasz can you have a look at this (from your private mail...)?
Sure. In fact I already took a look last week, a
On 27.08.2014 22:41, Tomasz Figa wrote:
> On 27.08.2014 22:25, Mark Brown wrote:
>> On Wed, Aug 27, 2014 at 09:58:55PM +0200, Tomasz Figa wrote:
>>> On 27.08.2014 21:44, Mark Brown wrote:
>>
>>>> The point is that if anything was setting the mode to something
On 27.08.2014 22:25, Mark Brown wrote:
> On Wed, Aug 27, 2014 at 09:58:55PM +0200, Tomasz Figa wrote:
>> On 27.08.2014 21:44, Mark Brown wrote:
>
>>> The point is that if anything was setting the mode to something other
>>> than normal it was almost certainly a pr
On 27.08.2014 21:44, Mark Brown wrote:
> On Wed, Aug 27, 2014 at 09:21:02PM +0200, Tomasz Figa wrote:
>> On 27.08.2014 21:15, Mark Brown wrote:
>
>>> This is in the scenario where the previously running Linux changed the
>>> mode to something other than normal and
On 27.08.2014 21:15, Mark Brown wrote:
> On Wed, Aug 27, 2014 at 08:52:49PM +0200, Tomasz Figa wrote:
>> On 27.08.2014 20:47, Mark Brown wrote:
>
>>> I'm not convinced that's worth it - chances are that if anything changed
>>> the mode it was a previously
On 27.08.2014 20:47, Mark Brown wrote:
> On Wed, Aug 27, 2014 at 08:39:39PM +0200, Tomasz Figa wrote:
>> On 27.08.2014 20:37, Mark Brown wrote:
>
>>> That's essentially the situation the patch is trying to fix - if we boot
>>> and the regulator is off th
On 27.08.2014 20:37, Mark Brown wrote:
> On Wed, Aug 27, 2014 at 08:32:38PM +0200, Tomasz Figa wrote:
>> On 26.08.2014 13:37, Javier Martinez Canillas wrote:
>
>>> + /*
>>> +* If the regulator is disabled and the system warm rebooted,
>>&
On 26.08.2014 13:37, Javier Martinez Canillas wrote:
> + /*
> + * If the regulator is disabled and the system warm rebooted,
> + * the hardware reports OFF as the regulator operating mode.
> + * Default to operating mode NORMAL in that case.
> +
On 27.08.2014 11:48, Naveen Krishna Chatradhi wrote:
> This patch adds clock description for MUX, DIV, GATE and PLL
> clocks available in TOPC, TOP0, TOP1, BUS0, BUS1, FSYS0, FSYS1,
> CCORE, PERIC0, PERIC1, PERIS, DISP, G3D, MSCL and MFC blocks.
[snip]
> +Phy clocks:
> +
> +There are several cloc
On 27.08.2014 11:48, Naveen Krishna Chatradhi wrote:
> By registers bits and offsets the 145xx PLL is similar to
> pll_type "pll_35xx". Also, 1460x PLL is similar to pll_type
> "pll_46xx".
>
> Hence, reusing the functions defined for pll_35xx and pll_46xx
> to support 145xx and 1460x PLLs respecti
Hi Naveen,
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
> This patchset supports new Exynos7 Samsung SoC based on Cortex-A57.
> Exynos7 is a System-On-Chip (SoC) that is based on 64-bit
> ARMv8 RISC processor.
A general issue with this series is that it introduces a very generic
name for
Hi Naveen,
Please see my comments inline.
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
> This patch adds initial dts file for the Espresso board
> based on Exynos7 from Samsung.
[snip]
> + mmc@1574 {
Please migrate this dts file to the reference-based syntax.
> + s
Hi Naveen,
Please see my comments inline.
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
> Add initial device tree nodes for EXYNOS7 SoC.
> Also, includes the dt-binding definitions for clock ids.
>
> Signed-off-by: Naveen Krishna Chatradhi
> Cc: Thomas Abraham
> Cc: Rob Herring
> Cc: C
Hi Naveen,
Please see my comments inline.
On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote:
> Add the required pin configuration support to EXYNOS7
[snip]
> +/ {
> + /* ALIVE block @1058 */
> + pinctrl@1058 {
This syntax repeating the whole hierarchy of nodes in every dts fi
-off-by: Tomasz Figa
---
MAINTAINERS | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index acd44c3..d57f6ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7062,7 +7062,7 @@ S:Maintained
F: drivers/pinctrl/sh-pfc/
PIN CONTROLLER
ed call to firmware to invalidate whole L2 cache before setting enable
bit in L2C control register (required by Exynos secure firmware).
Tomasz Figa (7):
ARM: l2c: Refactor the driver to use commit-like interface
ARM: l2c: Add interface to ask hypervisor to configure L2C
ARM: l2c: Get o
.
Signed-off-by: Tomasz Figa
---
Documentation/devicetree/bindings/arm/l2cc.txt | 10 +++
arch/arm/mm/cache-l2x0.c | 39 ++
2 files changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt
b/Documentation/devicetree/bindings
parameters. This patch adds such.
Signed-off-by: Tomasz Figa
---
arch/arm/include/asm/outercache.h | 3 +++
arch/arm/mm/cache-l2x0.c | 6 ++
2 files changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/outercache.h
b/arch/arm/include/asm/outercache.h
index 891a56b..563b92f
This patch adds device tree nodes for L2 cache controller present on
Exynos4 SoCs.
Signed-off-by: Tomasz Figa
---
arch/arm/boot/dts/exynos4210.dtsi | 9 +
arch/arm/boot/dts/exynos4x12.dtsi | 14 ++
2 files changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210
.configure callbacks is provided by this patch.
Signed-off-by: Tomasz Figa
---
arch/arm/mach-exynos/firmware.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index f5e626d..554b350 100644
-by: Tomasz Figa
---
arch/arm/mm/cache-l2x0.c | 210 ++-
1 file changed, 115 insertions(+), 95 deletions(-)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 5f2c988..b073563 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm
On Exynos SoCs it is necessary to resume operation of L2C early in
assembly code, because otherwise certain systems will crash. This patch
adds necessary code to non-secure resume handler.
Signed-off-by: Tomasz Figa
---
arch/arm/mach-exynos/common.h | 1 +
arch/arm/mach-exynos/firmware.c
earlier. This patch fixes this by making the assignment
conditional, depending on whether current .write_sec callback is NULL.
Signed-off-by: Tomasz Figa
---
arch/arm/kernel/irq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
-assisted suspend/resume by
leveraging recently introduced suspend and resume firmware operations
and modifying existing suspend/resume paths to account for presence of
secure firmware.
Signed-off-by: Tomasz Figa
---
arch/arm/mach-exynos/Makefile | 1 +
arch/arm/mach-exynos/common.h | 4
The group has the samsung,pin-pud property set to 4, which is not a
correct value. This patch fixes this by replacing it with 3, which is
the correct value for pull-up.
Signed-off-by: Tomasz Figa
---
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion
it needs to be done before MMU is enabled,
- surrounded CP15 save with a check for cpuid part, because it is valid only
on Cortex A9,
- rebased on next-20140717 tag of linux-next tree.
Tomasz Figa (5):
ARM: firmware: Introduce suspend and resume operations
ARM: EXYNOS: Add support for
boards.
Signed-off-by: Tomasz Figa
---
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
index 99b26df..927fec6 100644
--- a/arch/arm/boot/dts
platform suspend code after waking up to restore low
level hardware state, which can't be restored in non-secure mode.
While at it, outdated version of the structure is removed from the
documentation and replaced with a reference to the header file.
Signed-off-by: Tomasz Figa
Acked-by: Alex
This patch adds sleep mode pin configuration using pin control hog
mechanism to configure states of GPIO pins in sleep mode. This is
required to reduce leakage current in sleep mode and prevent glitching
of components on the board.
Signed-off-by: Tomasz Figa
---
arch/arm/boot/dts/exynos4412
disabled by I2C control to allow it to be turned off
by GPIO control.
This patch removes regulator-always-on properties from both regulators
and, while at it, also unsupported regulator-mem-off.
Signed-off-by: Tomasz Figa
---
arch/arm/boot/dts/exynos4412-trats2.dts | 4
1 file changed, 4
On 25.08.2014 17:32, Kevin Hilman wrote:
> Hi Chander,
>
> Chander Kashyap writes:
>
> [...]
>
I'm trying it on the 5800/Chromebook2 and it's not terribly stable. I'm
testing along with CPUidle, so there may be some untested interactions
there as it seems a bit more stable witho
Hi Kevin,
Thanks for taking a look at this.
On 23.08.2014 01:54, Kevin Hilman wrote:
> Tomasz Figa writes:
>
>> Kukjin,
>>
>> On 31.07.2014 20:32, Kukjin Kim wrote:
>>> On 07/30/14 17:07, Thomas Abraham wrote:
>>>> The new CPU clock type allo
On 21.08.2014 16:07, Pankaj Dubey wrote:
> +Arnd, Lee Jones
>
> Hi Tomasz,
>
> On Tuesday, August 19, 2014 Tomasz Figa wrote:
>
>>
>> Hi Bart,
>>
>> On 18.08.2014 19:42, Bartlomiej Zolnierkiewicz wrote:
>>>
>>> Hi,
>>>
>&g
Hi Bart,
On 18.08.2014 19:42, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Monday, July 28, 2014 08:40:52 AM Pankaj Dubey wrote:
>> Hi Tomasz,
>>
>> On Friday, July 25, 2014 Tomasz Figa wrote:
>>
>>> To: Pankaj Dubey; 'Kukjin Kim'; linu
> slot sub-node.
>>>
>>> Reported-by: Doug Anderson
>>> Cc: Jaehoon Chung
>>> Reviewed-by: Tomasz Figa
>>> Signed-off-by: Andreas Färber
>>
>> Let's land this one before Jaehoon's, since it was a hidden
>> functionality change in
On 18.08.2014 15:21, Vikas Sajjan wrote:
> Hi Tomasz,
>
> On Mon, Aug 18, 2014 at 5:42 PM, Tomasz Figa wrote:
>> Hi Vikas,
>>
>> On 07.08.2014 13:59, Vikas Sajjan wrote:
>>> Move the Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c to make
>&g
Vikas Sajjan
> ---
> arch/arm/mach-exynos/pm.c | 168
> +--
> arch/arm/mach-exynos/regs-pmu.h |1 +
> 2 files changed, 126 insertions(+), 43 deletions(-)
>
Reviewed-by: Tomasz Figa
Best regards,
Tomas
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Hi Vikas,
On 07.08.2014 13:59, Vikas Sajjan wrote:
> Move the Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c to make way
> for
> refactoring of pm.c and to create common functions across exynos4 and
> exynos5250.
>
> Signed-off-by: Vikas Sajjan
> ---
> arch/arm/mach-exynos/pm.c |
Hi Humberto,
Sorry for long delay, I've been quite busy with certain things and I
couldn't reply earlier.
Thanks a lot for the patch. In general it looks very nice and finally
makes the semantics of this code sane, but please see few minor comments
inline.
On 04.08.2014 16:02, Humberto Silva Nav
gned-off-by: Marek Szyprowski
> ---
> drivers/clk/samsung/clk-exynos4.c | 1 +
> include/dt-bindings/clock/exynos4.h | 10 +-
> 2 files changed, 6 insertions(+), 5 deletions(-)
Acked-by: Tomasz Figa
Best regards,
Tomasz
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On 18.08.2014 13:02, Bartlomiej Zolnierkiewicz wrote:
> On Thursday, August 14, 2014 08:07:40 PM Vivek Gautam wrote:
>> On Thursday, August 14, 2014 7:55 PM, Bartlomiej Zolnierkiewicz
>> wrote
>
>> There's one thing that I would want to comment here, since we don't have any
>> new usb-phy drive
>> no-op while the second call is the one that actually setups the hw correctly.
>> Does this make any sense? Maybe is related to the pin not being muxed in the
>> correct function when the "interrupts" property is parsed by OF?
>>
>
> So after a conversation
+CC Thomas, Jason and Ben
On 08.08.2014 15:24, Javier Martinez Canillas wrote:
> Hello,
>
> On 08/07/2014 06:47 PM, Dmitry Torokhov wrote:
>>
>> Actually, I take this back. In mainline everything as it should: if
>> pdata does not specify particular trigger the flags requested end up
>> being IRQ
Hi,
Please see my comment inline.
On 28.07.2014 14:18, Andreas Färber wrote:
> From: Hakjoo Kim
>
> Add the required pin configuration support to Exynos5410 using pinctrl
> interface.
[snip]
> + pinctrl_0: pinctrl@1340 {
> + compatible = "samsung,exynos5410-pinctrl";
> +
Linus, Andreas,
On 08.08.2014 14:55, Linus Walleij wrote:
> On Mon, Jul 28, 2014 at 2:18 PM, Andreas Färber wrote:
>
>> From: Hakjoo Kim
>>
>> Add Samsung EXYNOS5410 SoC specific data to enable pinctrl
>> support for all platforms based on EXYNOS5410.
>>
>> Cc: Hakjoo Kim
>> [AF: Rebased onto
Hi Javier,
On 07.08.2014 02:48, Javier Martinez Canillas wrote:
> The Atmel maXTouch driver assumed that the IRQ type flags will
> always be passed using platform data but this is not true when
> booting using Device Trees. In these setups the interrupt type
> was ignored by the driver when reques
On 06.08.2014 14:58, Vikas Sajjan wrote:
> On Wed, Aug 6, 2014 at 1:35 AM, Tomasz Figa wrote:
>> On 25.07.2014 13:49, Vikas Sajjan wrote:
[snip]
>
>>> +
>>> + /* Disable USE_RETENTION of JPEG_MEM_OPTION */
>>> + tmp = pmu_raw_readl(
Hi Daniel,
On 05.08.2014 22:48, Gachet Daniel wrote:
> Hi Thomasz,
>
> I’m currently trying to use the Hardkernel ODROID-XU board under Linux
> version 3.14 (hard kernel sources “odroid-3.14.y-linaro”.
> I’m almost happy with that version, but I still have a problem by migrating
> the “odroidxu
n() is called by:
> - cpu_leave_power (hotplug.c)
> - platform_do_lowpower (hotplug.c)
> - exynos_boot_secondary (platsmp.c)
>
> so merging everything into one file seemed simpler and cleaner.
mach-exynos/hotplug.c does not have too much code right now and as
Krzysztof noticed the o
Hi Vikas,
Please see my comments inline.
On 25.07.2014 13:49, Vikas Sajjan wrote:
> Refactoring the pm.c to avoid using "soc_is_exynos" checks,
> instead use the DT based lookup.
>
> While at it, consolidate the common code across SoCs
> and create a static helper functions.
[snip]
> @@ -241,1
On 03.08.2014 00:09, Russell King - ARM Linux wrote:
> On Thu, Jul 17, 2014 at 06:38:56PM +0200, Tomasz Figa wrote:
>> Certain implementations of secure hypervisors (namely the one found on
>> Samsung Exynos-based boards) do not provide access to individual L2C
>> regi
to dp-hpd-gpio node in pinctrl_0 (Doug Anderson)
> * Fixed alphabetical order of sd1_* nodes (Doug Anderson)
>
Reviewed-by: Tomasz Figa
Best regards,
Tomasz
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On 02.08.2014 12:25, Andreas Färber wrote:
[snip]
> One thing I've wondered is whether we should put status = "disabled" on
> the dp node with some comment, since it's known not to work as is (but
> better having the data here than leaving it out, I believe).
Does the DP node itself need more da
On 02.08.2014 15:08, Andreas Färber wrote:
> Am 02.08.2014 14:56, schrieb Tomasz Figa:
>> On 02.08.2014 14:21, Tomasz Figa wrote:
>>> On 02.08.2014 02:52, Andreas Färber wrote:
>>>> Use the new style of referencing inherited nodes and use symbolic names.
>>>&
;
> - #address-cells = <0x1>;
> - #size-cells = <0x0>;
> -
> - usb_hub {
> - compatible = "smsc,usb3503a";
> - reset-gpios = <0xc 0x5 0x1>;
> - connect-gpios = <0x10 0x7 0x1&g
t; 1 file changed, 318 insertions(+), 314 deletions(-)
This in fact ends up with empty diff after compiling and decompiling the
dts, so obviously will not break anything. :)
Reviewed-by: Tomasz Figa
Best regards,
Tomasz
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On 02.08.2014 14:21, Tomasz Figa wrote:
> On 02.08.2014 02:52, Andreas Färber wrote:
>> Use the new style of referencing inherited nodes and use symbolic names.
>> Reorder one pinctrl node in GPIO order.
>>
>> Goal is the alignment of all exynos5250 based
On 01.08.2014 05:17, Andreas Färber wrote:
> Am 31.07.2014 21:05, schrieb Tomasz Figa:
>>> +
>>> +&i2c_2 {
>>> + status = "okay";
>>> + samsung,i2c-sda-delay = <100>;
>>> + samsung,i2c-max-bus-freq = <66000>;
>>&
gt; Reviewed-by: Doug Anderson
> Signed-off-by: Andreas Färber
> ---
> v5 -> v6:
> * Split off label additions (Doug Anderson)
> * Fixed alphabetical order of sd3_* nodes (Doug Anderson)
>
> v4 -> v5:
> * Introduced labels to consistently use new referencing style (
Andreas,
Ehh, one more thing. It looks like my memory is playing tricks on me.
Please see inline.
On 02.08.2014 02:52, Andreas Färber wrote:
> Allows them to be extended by reference.
>
> Signed-off-by: Andreas Färber
> ---
> v6: Split off from Snow/SMDK cleanups (Doug Anderson)
[snip]
> -
mode 100644 arch/arm/boot/dts/exynos5250-cros-common.dtsi
> create mode 100644 arch/arm/boot/dts/exynos5250-spring.dts
>
I have looked through all the patches and they look good to me, so, for
the whole series:
Reviewed-by: Tomasz Figa
There is one unrelated issue I reported in my
Just wanted to report one issue unrelated to your changes I spotted
while reviewing this patch. See below.
On 01.08.2014 06:54, Andreas Färber wrote:
> Use the new style of referencing inherited nodes, use symbolic names,
> tidy indentation and reorder includes.
>
> Goal is the alignment of all e
On 01.08.2014 22:54, Andreas Färber wrote:
> Doug,
>
> Am 01.08.2014 22:33, schrieb Doug Anderson:
>> On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
>>> Spring uses a different GPIO, so this is not a generic SoC piece.
>>>
>>> Suggested-by: Toma
From: Tomasz Figa
Due to recent consolidation of Exynos suspend and cpuidle code, some
parts of suspend and resume sequences are executed two times, once from
exynos_pm_syscore_ops and then from exynos_cpu_pm_notifier() and thus it
breaks suspend, at least on Exynos4-based boards. In addition
;
> This patch was suggested by Tomasz Figa in
> http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34982.html
There is a Suggested-by tag that can be added before your sign-off.
Similarly there are few other useful tags which are good to know.
>
> Signed-o
Humberto,
[dropping few addresses from Cc as this topic is rather irrelevant for
them and adding Mike and Sylwester]
On 31.07.2014 23:19, Humberto Naves wrote:
> Hi,
>
> On Thu, Jul 31, 2014 at 5:19 PM, Tomasz Figa wrote:
>>
>> I'm not sure I get the idea of the fie
On 31.07.2014 22:36, Andreas Färber wrote:
> Am 31.07.2014 21:05, schrieb Tomasz Figa:
>>> + };
>>> +
>>> + fixed-rate-clocks {
>>> + xxti {
>>> + compatible = "samsung,clock-xxti&
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