[PATCH 1/5] ARM: mm: cache-l2x0: Add base address argument to write_sec callback

2014-06-11 Thread Tomasz Figa
For certain platforms (e.g. Exynos) it is necessary to read back some values from registers before they can be written (i.e. SMC calls that set multiple registers per call), so base address of L2C controller is needed for .write_sec operation. This patch adds base argument to .write_sec callback

Re: [PATCH 1/5] ARM: mm: cache-l2x0: Add base address argument to write_sec callback

2014-06-11 Thread Jon Loeliger
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index 060a75e..ddaebcd 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h @@ -46,7 +46,8 @@ struct machine_desc { enum reboot_modereboot_mode;/* default