Hi Tushar,
On Wednesday 19 of June 2013 10:20:14 Tushar Behera wrote:
On 06/17/2013 10:20 AM, Tushar Behera wrote:
On 06/11/2013 12:23 AM, Tomasz Figa wrote:
On Monday 10 of June 2013 09:13:11 Tushar Behera wrote:
On 06/08/2013 05:20 PM, Tomasz Figa wrote:
On Thursday 06 of June 2013
On 06/17/2013 10:20 AM, Tushar Behera wrote:
On 06/11/2013 12:23 AM, Tomasz Figa wrote:
On Monday 10 of June 2013 09:13:11 Tushar Behera wrote:
On 06/08/2013 05:20 PM, Tomasz Figa wrote:
On Thursday 06 of June 2013 16:52:28 Tushar Behera wrote:
[ ... ]
MUX_A(mout_core, mout_core,
On 06/11/2013 12:23 AM, Tomasz Figa wrote:
On Monday 10 of June 2013 09:13:11 Tushar Behera wrote:
On 06/08/2013 05:20 PM, Tomasz Figa wrote:
On Thursday 06 of June 2013 16:52:28 Tushar Behera wrote:
[ ... ]
MUX_A(mout_core, mout_core, mout_core_p4210,
- SRC_CPU, 16, 1,
On Monday 10 of June 2013 09:13:11 Tushar Behera wrote:
On 06/08/2013 05:20 PM, Tomasz Figa wrote:
On Thursday 06 of June 2013 16:52:28 Tushar Behera wrote:
cpufreq driver for EXYNOS4 based SoCs are not platform drivers, hence
we cannot currently pass the clock names through a device tree
On 06/08/2013 05:20 PM, Tomasz Figa wrote:
On Thursday 06 of June 2013 16:52:28 Tushar Behera wrote:
cpufreq driver for EXYNOS4 based SoCs are not platform drivers, hence
we cannot currently pass the clock names through a device tree node.
Instead, we need to make them available through a
On Thursday 06 of June 2013 16:52:28 Tushar Behera wrote:
cpufreq driver for EXYNOS4 based SoCs are not platform drivers, hence
we cannot currently pass the clock names through a device tree node.
Instead, we need to make them available through a global alias.
'armclk', 'moutcore',
cpufreq driver for EXYNOS4 based SoCs are not platform drivers, hence
we cannot currently pass the clock names through a device tree node.
Instead, we need to make them available through a global alias.
'armclk', 'moutcore', 'mout_mpll' and 'mout_apll' clock aliases are
defined.
Signed-off-by:
