On Mon, 16 Jun 2014, Doug Anderson wrote:
> Nicolas,
>
> On Mon, Jun 9, 2014 at 1:55 PM, Nicolas Pitre
> wrote:
> > On Mon, 9 Jun 2014, Kevin Hilman wrote:
> >
> >> On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre
> >> wrote:
> >> > On Mon, 9 Jun 2014, Andrew Bresticker wrote:
> >> >
> >> >> > [
Nicolas,
On Mon, Jun 9, 2014 at 1:55 PM, Nicolas Pitre wrote:
> On Mon, 9 Jun 2014, Kevin Hilman wrote:
>
>> On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre
>> wrote:
>> > On Mon, 9 Jun 2014, Andrew Bresticker wrote:
>> >
>> >> > [1] While waiting for the forth-coming patch from Andrew to enable
On Mon, 9 Jun 2014, Kevin Hilman wrote:
> On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre
> wrote:
> > On Mon, 9 Jun 2014, Andrew Bresticker wrote:
> >
> >> > [1] While waiting for the forth-coming patch from Andrew to enable the
> >> > CCI port for the boot cluster), I do this from u-boot bef
On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre wrote:
> On Mon, 9 Jun 2014, Andrew Bresticker wrote:
>
>> > [1] While waiting for the forth-coming patch from Andrew to enable the
>> > CCI port for the boot cluster), I do this from u-boot before starting
>> > the kernel (based on earlier ema
On Mon, 9 Jun 2014, Andrew Bresticker wrote:
> > [1] While waiting for the forth-coming patch from Andrew to enable the
> > CCI port for the boot cluster), I do this from u-boot before starting
> > the kernel (based on earlier email from Doug):
> >
> > mw.l 10d25000 3 # Enable CCI fro
> [1] While waiting for the forth-coming patch from Andrew to enable the
> CCI port for the boot cluster), I do this from u-boot before starting
> the kernel (based on earlier email from Doug):
>
> mw.l 10d25000 3 # Enable CCI from U-Boot
>From the other thread, it sounds like Nicolas
Doug Anderson writes:
> On exynos mcpm systems the firmware is hardcoded to jump to an address
> in SRAM (0x02073000) when secondary CPUs come up. By default the
> firmware puts a bunch of code at that location. That code expects the
> kernel to fill in a few slots with addresses that it uses t
On Fri, 6 Jun 2014, Doug Anderson wrote:
> On exynos mcpm systems the firmware is hardcoded to jump to an address
> in SRAM (0x02073000) when secondary CPUs come up. By default the
> firmware puts a bunch of code at that location. That code expects the
> kernel to fill in a few slots with addres
On exynos mcpm systems the firmware is hardcoded to jump to an address
in SRAM (0x02073000) when secondary CPUs come up. By default the
firmware puts a bunch of code at that location. That code expects the
kernel to fill in a few slots with addresses that it uses to jump back
to the kernel's entr
