Re: [PATCH v2 1/3] ARM: EXYNOS: Add support for clock handling in power domain

2014-06-10 Thread Tomasz Figa
Hi, On 26.05.2014 13:56, Shaik Ameer Basha wrote: From: Prathyush K prathyus...@samsung.com While powering on/off a local powerdomain in exynos5 chipsets, the input clocks to each device gets modified. This behaviour is based on the SYSCLK_SYS_PWR_REG registers. E.g. SYSCLK_MFC_SYS_PWR_REG

Re: [PATCH v2 1/3] ARM: EXYNOS: Add support for clock handling in power domain

2014-05-29 Thread Arun Kumar K
Hi, Can we have DT maintainers Ack for this binding change? Regards Arun On Mon, May 26, 2014 at 5:26 PM, Shaik Ameer Basha shaik.am...@samsung.com wrote: From: Prathyush K prathyus...@samsung.com While powering on/off a local powerdomain in exynos5 chipsets, the input clocks to each device

[PATCH v2 1/3] ARM: EXYNOS: Add support for clock handling in power domain

2014-05-26 Thread Shaik Ameer Basha
From: Prathyush K prathyus...@samsung.com While powering on/off a local powerdomain in exynos5 chipsets, the input clocks to each device gets modified. This behaviour is based on the SYSCLK_SYS_PWR_REG registers. E.g. SYSCLK_MFC_SYS_PWR_REG = 0x0, the parent of input clock to MFC