date:20120711

RE: [GIT PULL] Samsung devel-dma ops for v3.6

2012-07-11 Thread Kukjin Kim

Arnd Bergmann wrote:
 
 On Tuesday 10 July 2012, Kukjin Kim wrote:
  Hi Arnd, Olof,
 
  Here is updating DMA common operation for Samsung SoCs.
 
  Since some DMA client driver such as spi needs to change the
 configuration
  after dma_request() so this branch adds dma_config() can configure DMA
  transmit option which is included in dma_request() after that.
 
  Note, according to the changes, needs to update spi and ASoC drivers for
  Samsung SoCs and only got the ack from Mark Brown not Grant Likely and
 as I
  know, he is busy for moving. But I think, the spi change has no problem
 and
  it is simple.
 
  If any problems, please kindly let me know.
 
  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
 next/devel-dma-ops
 
 I've applied this to a new next/dma branch for now, as it sounds that you
 need these changes.
 
Arnd, thanks.

 However, my feeling is that the s3c-dma-ops support is moving in the wrong
 direction, or at least I do not see where you're heading with it.
 
 From what I see, there is the
 
 * arch/arm/plat-s3c24xx/dma.c driver with a proprietary s3c2410_dma_*
   interface, used by s3cmci and some asoc drivers.
 * arch/arm/mach-s3c64xx/dma.c implementing the same interface and
 exporting
   the same symbols.
 * The arch/arm/plat-samsung/dma-ops.c which is a wrapper around the
 generic
   dmaengine API, hardcoding the pl330 DMA driver
 * The arch/arm/plat-samsung/include/plat/dma-ops.h interface abstraction
   that gets used to pick between the two at compile time, and being used
 by
   the spi driver and again other asoc drivers
 
 Can you (or someone on the Cc list) explain what the plan is for this?
 Are you moving over the s3c2410_dma*() function to a dmaengine driver
 eventually? Do you expect to see more users of the nonstandard intefaces
 in the samsung code, or are they going away?
 
Yeah, let me explain the status for Samsung SoCs' DMA. There are 3 different
DMA IPs, samsung specific s3c24xx dma, pl080 and pl330. As you know, pl330
already moved in drivers/dma for using common DMA engine and Alim is
re-working on pl080
(http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg10954.html
) and let me check its progress. But s3c24xx dma is not ready yet. When
pl330 was moving, my colleague, Boojin Kim posted to use common DMA APIs for
Samsung drivers which are using DMA such as spi and ASoC. But it was
including too many ifdef for checking which DMA is used and it can occur
breakage for multiplatform
(http://www.spinics.net/lists/arm-kernel/msg131137.html). So we implemented
to use some dma_ops after discussing with Grant Likely
(http://lists.infradead.org/pipermail/linux-arm-kernel/2011-July/058171.html
).

Anyway, we will try to use common DMA APIs for all Samsung SoCs. But need
more time ;)

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [GIT PULL] Samsung devel-dma ops for v3.6

2012-07-11 Thread Arnd Bergmann

On Wednesday 11 July 2012, Kukjin Kim wrote:
 Yeah, let me explain the status for Samsung SoCs' DMA. There are 3 different
 DMA IPs, samsung specific s3c24xx dma, pl080 and pl330. As you know, pl330
 already moved in drivers/dma for using common DMA engine and Alim is
 re-working on pl080
 (http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg10954.html
 ) and let me check its progress. But s3c24xx dma is not ready yet. When
 pl330 was moving, my colleague, Boojin Kim posted to use common DMA APIs for
 Samsung drivers which are using DMA such as spi and ASoC. But it was
 including too many ifdef for checking which DMA is used and it can occur
 breakage for multiplatform
 (http://www.spinics.net/lists/arm-kernel/msg131137.html). So we implemented
 to use some dma_ops after discussing with Grant Likely
 (http://lists.infradead.org/pipermail/linux-arm-kernel/2011-July/058171.html
 ).
 
 Anyway, we will try to use common DMA APIs for all Samsung SoCs. But need
 more time ;)

Ok, sounds good. Thanks for the background information!

Arnd
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[PATCH 0/7] Add device tree based discovery support for drm-fimd

2012-07-11 Thread Leela Krishna Amudala

From: Leela Krishna l.kris...@samsung.com

The patches are created against for-next branch of Kukjin Kim's tree at:
 git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

This patch set adds Backlight, LCD support and device tree based discovery 
support for drm-fimd

Leela Krishna (3):
  ARM: EXYNOS5: add device tree based discovery support for FIMD
  ARM: EXYNOS5: Add the bus clock for FIMD
  ARM: EXYNOS5: Set parent clock to fimd

Leela Krishna Amudala (4):
  ARM: SAMSUNG: add additional registers and SFR definitions for
writeback
  ARM: EXYNOS5: add machine specific support for backlight
  ARM: EXYNOS5: add machine specific support for LCD
  ARM: EXYNOS: Adding DRM platform device

 arch/arm/boot/dts/exynos5250-smdk5250.dts   |   16 +++
 arch/arm/boot/dts/exynos5250.dtsi   |7 ++
 arch/arm/mach-exynos/Kconfig|1 +
 arch/arm/mach-exynos/clock-exynos5.c|   30 --
 arch/arm/mach-exynos/include/mach/map.h |1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c  |  125 +++
 arch/arm/plat-samsung/include/plat/clock.h  |2 +
 arch/arm/plat-samsung/include/plat/regs-fb-v4.h |   10 ++
 arch/arm/plat-samsung/include/plat/regs-fb.h|   51 +
 drivers/video/Kconfig   |6 +
 10 files changed, 239 insertions(+), 10 deletions(-)

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[PATCH 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback

2012-07-11 Thread Leela Krishna Amudala

This patch updates the register address offsets and adds SFR definitions
for writeback for Samsung's V8 display controller.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/plat-samsung/include/plat/regs-fb-v4.h |   10 
 arch/arm/plat-samsung/include/plat/regs-fb.h|   51 +++
 drivers/video/Kconfig   |6 +++
 3 files changed, 67 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h 
b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
index 4c3647f..1639c17 100644
--- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
@@ -30,9 +30,16 @@
 #define VIDCON1_FSTATUS_EVEN   (1  15)
 
 /* Video timing controls */
+#ifdef CONFIG_FB_EXYNOS_FIMD_V8
+#define VIDTCON0(0x20010)
+#define VIDTCON1(0x20014)
+#define VIDTCON3(0x2001C)
+#else
 #define VIDTCON0   (0x10)
 #define VIDTCON1   (0x14)
 #define VIDTCON2   (0x18)
+#define VIDTCON3   (0x1C)
+#endif
 
 /* Window position controls */
 
@@ -43,9 +50,12 @@
 #define VIDOSD_BASE(0x40)
 
 #define VIDINTCON0 (0x130)
+#define VIDINTCON1  (0x134)
 
 /* WINCONx */
 
+#define WINCONx_CSC_CON_EQ709   (1  28)
+#define WINCONx_CSC_CON_EQ601   (0  28)
 #define WINCONx_CSCWIDTH_MASK  (0x3  26)
 #define WINCONx_CSCWIDTH_SHIFT (26)
 #define WINCONx_CSCWIDTH_WIDE  (0x0  26)
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h 
b/arch/arm/plat-samsung/include/plat/regs-fb.h
index 9a78012..6d2ee16 100644
--- a/arch/arm/plat-samsung/include/plat/regs-fb.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
@@ -32,12 +32,28 @@
 
 #define VIDCON0(0x00)
 #define VIDCON0_INTERLACE  (1  29)
+
+#ifdef CONFIG_FB_EXYNOS_FIMD_V8
+#define VIDOUT_CON (0x2)
+#define VIDOUT_CON_VIDOUT_UP_MASK  (0x1  16)
+#define VIDOUT_CON_VIDOUT_UP_SHIFT (16)
+#define VIDOUT_CON_VIDOUT_UP_ALWAYS(0x0  16)
+#define VIDOUT_CON_VIDOUT_UP_START_FRAME   (0x1  16)
+#define VIDOUT_CON_VIDOUT_F_MASK   (0x7  8)
+#define VIDOUT_CON_VIDOUT_F_SHIFT  (8)
+#define VIDOUT_CON_VIDOUT_F_RGB(0x0  8)
+#define VIDOUT_CON_VIDOUT_F_I80_LDI0   (0x2  8)
+#define VIDOUT_CON_VIDOUT_F_I80_LDI1   (0x3  8)
+#define VIDOUT_CON_VIDOUT_F_WB (0x4  8)
+#endif
+
 #define VIDCON0_VIDOUT_MASK(0x3  26)
 #define VIDCON0_VIDOUT_SHIFT   (26)
 #define VIDCON0_VIDOUT_RGB (0x0  26)
 #define VIDCON0_VIDOUT_TV  (0x1  26)
 #define VIDCON0_VIDOUT_I80_LDI0(0x2  26)
 #define VIDCON0_VIDOUT_I80_LDI1(0x3  26)
+#define VIDCON0_VIDOUT_WB   (0x4  26)
 
 #define VIDCON0_L1_DATA_MASK   (0x7  23)
 #define VIDCON0_L1_DATA_SHIFT  (23)
@@ -81,7 +97,13 @@
 #define VIDCON0_ENVID  (1  1)
 #define VIDCON0_ENVID_F(1  0)
 
+#ifdef CONFIG_FB_EXYNOS_FIMD_V8
+#define VIDOUT_CON  (0x2)
+#define VIDCON1 (0x20004)
+#else
 #define VIDCON1(0x04)
+#endif
+
 #define VIDCON1_LINECNT_MASK   (0x7ff  16)
 #define VIDCON1_LINECNT_SHIFT  (16)
 #define VIDCON1_LINECNT_GET(_v)(((_v)  16)  0x7ff)
@@ -111,6 +133,14 @@
 #define VIDCON2_TVFMTSEL1_RGB  (0x0  12)
 #define VIDCON2_TVFMTSEL1_YUV422   (0x1  12)
 #define VIDCON2_TVFMTSEL1_YUV444   (0x2  12)
+#define VIDCON2_TVFMTSEL1_SHIFT(12)
+#define VIDCON2_TVFMTSEL_SW(1  14)
+#define VIDCON2_TVFORMATSEL_YUV444 (0x2  12)
+
+#define VIDCON2_TVFMTSEL1_MASK (0x3  12)
+#define VIDCON2_TVFMTSEL1_RGB  (0x0  12)
+#define VIDCON2_TVFMTSEL1_YUV422   (0x1  12)
+#define VIDCON2_TVFMTSEL1_YUV444   (0x2  12)
 
 #define VIDCON2_ORGYCbCr   (1  8)
 #define VIDCON2_YUVORDCrCb (1  7)
@@ -165,8 +195,15 @@
 #define VIDTCON1_HSPW_SHIFT(0)
 #define VIDTCON1_HSPW_LIMIT(0xff)
 #define VIDTCON1_HSPW(_x)  ((_x)  0)
+#define VIDCON1_VCLK_MASK   (0x3  9)
+#define VIDCON1_VCLK_HOLD   (0x0  9)
+#define VIDCON1_VCLK_RUN(0x1  9)
 
+#ifdef

[PATCH 2/7] ARM: EXYNOS5: add machine specific support for backlight

2012-07-11 Thread Leela Krishna Amudala

Adds machine specific support for LCD backlight for SMDK board based
on Exynos5

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/mach-exynos/Kconfig   |1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c |   28 
 2 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 498596b..a2a2940 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -412,6 +412,7 @@ config MACH_EXYNOS5_DT
select SOC_EXYNOS5250
select USE_OF
select ARM_AMBA
+   select SAMSUNG_DEV_BACKLIGHT
help
  Machine support for Samsung Exynos4 machine with device tree enabled.
  Select this if a fdt blob is available for the EXYNOS4 SoC based 
board.
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 7b1e11a..0a200fd 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -11,6 +11,8 @@
 
 #include linux/of_platform.h
 #include linux/serial_core.h
+#include linux/pwm_backlight.h
+#include linux/gpio.h
 
 #include asm/mach/arch.h
 #include asm/hardware/gic.h
@@ -18,9 +20,34 @@
 
 #include plat/cpu.h
 #include plat/regs-serial.h
+#include plat/backlight.h
+#include plat/gpio-cfg.h
 
 #include common.h
 
+
+static int smdk5250_bl_notify(struct device *unused, int brightness)
+{
+   /* manage lcd_bl_en signal */
+   if (brightness)
+   gpio_set_value(EXYNOS5_GPX3(0), 1);
+   else
+   gpio_set_value(EXYNOS5_GPX3(0), 0);
+
+   return brightness;
+}
+
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdk5250_bl_gpio_info = {
+   .no = EXYNOS5_GPB2(0),
+   .func   = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdk5250_bl_data = {
+   .pwm_period_ns  = 100,
+   .notify = smdk5250_bl_notify,
+};
+
 /*
  * The following lookup table is used to override device names when devices
  * are registered from device tree. This is temporarily added to enable
@@ -61,6 +88,7 @@ static void __init exynos5250_dt_map_io(void)
 
 static void __init exynos5250_dt_machine_init(void)
 {
+   samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
of_platform_populate(NULL, of_default_bus_match_table,
exynos5250_auxdata_lookup, NULL);
 }
-- 
1.7.0.4

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[PATCH 3/7] ARM: EXYNOS5: add machine specific support for LCD

2012-07-11 Thread Leela Krishna Amudala

This patch adds machine specific support for LCD controller like setting power 
to LCD
and adding LCD platform device.

Signed-off-by: Prathyush K prathyus...@samsung.com
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/mach-exynos/mach-exynos5-dt.c |   57 
 1 files changed, 57 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 0a200fd..652a537 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -13,6 +13,7 @@
 #include linux/serial_core.h
 #include linux/pwm_backlight.h
 #include linux/gpio.h
+#include linux/delay.h
 
 #include asm/mach/arch.h
 #include asm/hardware/gic.h
@@ -25,6 +26,8 @@
 
 #include common.h
 
+#include video/platform_lcd.h
+
 
 static int smdk5250_bl_notify(struct device *unused, int brightness)
 {
@@ -48,6 +51,55 @@ static struct platform_pwm_backlight_data smdk5250_bl_data = 
{
.notify = smdk5250_bl_notify,
 };
 
+static void lcd_set_power(struct plat_lcd_data *pd,
+   unsigned int power)
+{
+
+   /* reset */
+   gpio_request_one(EXYNOS5_GPX1(5), GPIOF_OUT_INIT_HIGH, GPX1);
+
+   mdelay(20);
+   if (power) {
+   /* fire nRESET on power up */
+   gpio_set_value(EXYNOS5_GPX1(5), 0);
+   mdelay(20);
+   gpio_set_value(EXYNOS5_GPX1(5), 1);
+   mdelay(20);
+   gpio_free(EXYNOS5_GPX1(5));
+   } else {
+   /* fire nRESET on power off */
+   gpio_set_value(EXYNOS5_GPX1(5), 0);
+   mdelay(20);
+   gpio_set_value(EXYNOS5_GPX1(5), 1);
+   mdelay(20);
+   gpio_free(EXYNOS5_GPX1(5));
+   }
+   mdelay(20);
+
+   /*
+* Request lcd_bl_en GPIO for smdk5250_bl_notify().
+* TODO: Fix this so we are not at risk of requesting the GPIO
+* multiple times, this should be done with device tree, and
+* likely integrated into the plat-samsung/dev-backlight.c init.
+*/
+   gpio_request_one(EXYNOS5_GPX3(0), GPIOF_OUT_INIT_LOW, GPX3);
+}
+
+static int smdk5250_match_fb(struct plat_lcd_data *pd, struct fb_info *info)
+{
+   /* Don't call .set_power callback while unblanking */
+   return 0;
+}
+
+static struct plat_lcd_data smdk5250_lcd_data = {
+   .set_power  = lcd_set_power,
+   .match_fb   = smdk5250_match_fb,
+};
+
+static struct platform_device smdk5250_lcd = {
+   .name   = platform-lcd,
+   .dev.platform_data  = smdk5250_lcd_data,
+};
 /*
  * The following lookup table is used to override device names when devices
  * are registered from device tree. This is temporarily added to enable
@@ -80,6 +132,10 @@ static const struct of_dev_auxdata 
exynos5250_auxdata_lookup[] __initconst = {
{},
 };
 
+static struct platform_device *smdk5250_devices[] __initdata = {
+   smdk5250_lcd, /* for platform_lcd device */
+};
+
 static void __init exynos5250_dt_map_io(void)
 {
exynos_init_io(NULL, 0);
@@ -91,6 +147,7 @@ static void __init exynos5250_dt_machine_init(void)
samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
of_platform_populate(NULL, of_default_bus_match_table,
exynos5250_auxdata_lookup, NULL);
+   platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
 }
 
 static char const *exynos5250_dt_compat[] __initdata = {
-- 
1.7.0.4

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[PATCH 4/7] ARM: EXYNOS: Adding DRM platform device

2012-07-11 Thread Leela Krishna Amudala

Add DRM platform device to machine file for exynos5.

Signed-off-by: Prathyush K prathyus...@samsung.com
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/mach-exynos/mach-exynos5-dt.c |   27 +++
 1 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 652a537..a91c928 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -17,6 +17,7 @@
 
 #include asm/mach/arch.h
 #include asm/hardware/gic.h
+#include asm/io.h
 #include mach/map.h
 
 #include plat/cpu.h
@@ -29,6 +30,22 @@
 #include video/platform_lcd.h
 
 
+static void exynos_fimd_gpio_setup_24bpp(void)
+{
+   unsigned int reg = 0;
+   /*
+* Set DISP1BLK_CFG register for Display path selection
+* FIMD of DISP1_BLK Bypass selection : DISP1BLK_CFG[15]
+* -
+* 0 | MIE/MDNIE
+* 1 | FIMD : selected
+*/
+   reg = __raw_readl(S3C_VA_SYS + 0x0214);
+   reg = ~(1  15);  /* To save other reset values */
+   reg |= (1  15);
+   __raw_writel(reg, S3C_VA_SYS + 0x0214);
+}
+
 static int smdk5250_bl_notify(struct device *unused, int brightness)
 {
/* manage lcd_bl_en signal */
@@ -51,6 +68,14 @@ static struct platform_pwm_backlight_data smdk5250_bl_data = 
{
.notify = smdk5250_bl_notify,
 };
 
+static struct platform_device exynos_drm_device = {
+   .name   = exynos-drm,
+   .dev = {
+   .dma_mask = exynos_drm_device.dev.coherent_dma_mask,
+   .coherent_dma_mask = 0xUL,
+   }
+};
+
 static void lcd_set_power(struct plat_lcd_data *pd,
unsigned int power)
 {
@@ -134,6 +159,7 @@ static const struct of_dev_auxdata 
exynos5250_auxdata_lookup[] __initconst = {
 
 static struct platform_device *smdk5250_devices[] __initdata = {
smdk5250_lcd, /* for platform_lcd device */
+   exynos_drm_device,
 };
 
 static void __init exynos5250_dt_map_io(void)
@@ -147,6 +173,7 @@ static void __init exynos5250_dt_machine_init(void)
samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
of_platform_populate(NULL, of_default_bus_match_table,
exynos5250_auxdata_lookup, NULL);
+   exynos_fimd_gpio_setup_24bpp();
platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
 }
 
-- 
1.7.0.4

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[PATCH 5/7] ARM: EXYNOS5: add device tree based discovery support for FIMD

2012-07-11 Thread Leela Krishna Amudala

From: Leela Krishna l.kris...@samsung.com

This patch adds support for device tree based discovery for Samsung's
display controller. Adds DRM-Fimd plat data for smdk5250
evt1 to the corresponding dts file

Signed-off-by: Leela Krishna l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5250-smdk5250.dts |   16 
 arch/arm/boot/dts/exynos5250.dtsi |7 +++
 arch/arm/mach-exynos/include/mach/map.h   |1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c|2 ++
 4 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 49945cc..781f836 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -71,4 +71,20 @@
i2c@12CD {
status = disabled;
};
+
+   lcd_fimd0: lcd_panel0 {
+   lcd-htiming = 4 4 4 1280;
+   lcd-vtiming = 4 4 4 800;
+   supports-mipi-panel;
+   };
+
+   fimd {
+   samsung,fimd-display = lcd_fimd0;
+   samsung,fimd-vidout-rgb;
+   samsung,fimd-inv-vclk;
+   samsung,fimd-frame-rate = 60;
+   samsung,default-window = 0;
+   samsung,fimd-win-bpp = 32;
+   };
+
 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 4272b29..f9954fe 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -424,4 +424,11 @@
#gpio-cells = 4;
};
};
+
+   fimd {
+   compatible = samsung,exynos5-drm;
+   interrupt-parent = combiner;
+   reg = 0x1440 0x4;
+   interrupts = 18 5, 18 4, 18 6;
+   };
 };
diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index ca4aa89..731b56e 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -167,6 +167,7 @@
 #define EXYNOS4_PA_MIPI_CSIS1  0x1189
 
 #define EXYNOS4_PA_FIMD0   0x11C0
+#define EXYNOS5_PA_FIMD1   0x1440
 
 #define EXYNOS4_PA_HSMMC(x)(0x1251 + ((x) * 0x1))
 #define EXYNOS4_PA_DWMCI   0x1255
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index a91c928..9d5bccc 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -154,6 +154,8 @@ static const struct of_dev_auxdata 
exynos5250_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA0, dma-pl330.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA1, dma-pl330.1, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_MDMA1, dma-pl330.2, NULL),
+   OF_DEV_AUXDATA(samsung,exynos5-drm, EXYNOS5_PA_FIMD1,
+   exynos5-fb, NULL),
{},
 };
 
-- 
1.7.0.4

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[PATCH 6/7] ARM: EXYNOS5: Add the bus clock for FIMD

2012-07-11 Thread Leela Krishna Amudala

From: Leela Krishna l.kris...@samsung.com

This patch adds the bus clock for FIMD and changes
the device name for lcd clock

Signed-off-by: Leela Krishna l.kris...@samsung.com
---
 arch/arm/mach-exynos/clock-exynos5.c |7 ++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
b/arch/arm/mach-exynos/clock-exynos5.c
index fefa336..61bf88d 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -629,6 +629,11 @@ static struct clk exynos5_init_clocks_off[] = {
.enable = exynos5_clk_ip_disp1_ctrl,
.ctrlbit= (1  3),
}, {
+   .name   = fimd,
+   .devname= exynos5-fb,
+   .enable = exynos5_clk_ip_disp1_ctrl,
+   .ctrlbit= (1  0),
+   }, {
.name   = iis,
.devname= samsung-i2s.1,
.enable = exynos5_clk_ip_peric_ctrl,
@@ -1046,7 +1051,7 @@ static struct clksrc_clk exynos5_clksrcs[] = {
}, {
.clk= {
.name   = sclk_fimd,
-   .devname= s3cfb.1,
+   .devname= exynos5-fb,
.enable = exynos5_clksrc_mask_disp1_0_ctrl,
.ctrlbit= (1  0),
},
-- 
1.7.0.4

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[PATCH 7/7] ARM: EXYNOS5: Set parent clock to fimd

2012-07-11 Thread Leela Krishna Amudala

From: Leela Krishna l.kris...@samsung.com

This patch sets mout_mpll_user as parent clock to fimd also
sets Fimd source clock rate to 800 MHz for MIPI LCD

Signed-off-by: Leela Krishna l.kris...@samsung.com
---
 arch/arm/mach-exynos/clock-exynos5.c   |   25 +++--
 arch/arm/mach-exynos/mach-exynos5-dt.c |   11 +++
 arch/arm/plat-samsung/include/plat/clock.h |2 ++
 3 files changed, 28 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
b/arch/arm/mach-exynos/clock-exynos5.c
index 61bf88d..a0d65f6 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -1039,6 +1039,18 @@ static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
.reg_div = { .reg = EXYNOS5_CLKDIV_FSYS2, .shift = 24, .size = 8 },
 };
 
+struct clksrc_clk exynos5_clk_sclk_fimd = {
+   .clk= {
+   .name   = sclk_fimd,
+   .devname= exynos5-fb,
+   .enable = exynos5_clksrc_mask_disp1_0_ctrl,
+   .ctrlbit= (1  0),
+   },
+   .sources = exynos5_clkset_group,
+   .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },
+   .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
+};
+
 static struct clksrc_clk exynos5_clksrcs[] = {
{
.clk= {
@@ -1050,16 +1062,6 @@ static struct clksrc_clk exynos5_clksrcs[] = {
.reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 
},
}, {
.clk= {
-   .name   = sclk_fimd,
-   .devname= exynos5-fb,
-   .enable = exynos5_clksrc_mask_disp1_0_ctrl,
-   .ctrlbit= (1  0),
-   },
-   .sources = exynos5_clkset_group,
-   .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 
4 },
-   .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 
4 },
-   }, {
-   .clk= {
.name   = aclk_266_gscl,
},
.sources = clk_src_gscl_266,
@@ -1153,6 +1155,7 @@ static struct clksrc_clk *exynos5_sysclks[] = {
exynos5_clk_dout_mmc4,
exynos5_clk_aclk_acp,
exynos5_clk_pclk_acp,
+   exynos5_clk_sclk_fimd,
 };
 
 static struct clk *exynos5_clk_cdev[] = {
@@ -1402,6 +1405,8 @@ void __init_or_cpufreq exynos5_setup_clocks(void)
 
clk_set_rate(exynos5_clk_aclk_acp.clk, 26700);
clk_set_rate(exynos5_clk_pclk_acp.clk, 13400);
+   clk_set_parent(exynos5_clk_sclk_fimd.clk,
+   exynos5_clk_mout_mpll_user.clk);
 
for (ptr = 0; ptr  ARRAY_SIZE(exynos5_clksrcs); ptr++)
s3c_set_clksrc(exynos5_clksrcs[ptr], true);
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 9d5bccc..248ca58 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -24,6 +24,9 @@
 #include plat/regs-serial.h
 #include plat/backlight.h
 #include plat/gpio-cfg.h
+#include plat/clock.h
+#include plat/s5p-clock.h
+#include plat/clock-clksrc.h
 
 #include common.h
 
@@ -172,9 +175,17 @@ static void __init exynos5250_dt_map_io(void)
 
 static void __init exynos5250_dt_machine_init(void)
 {
+   struct device_node *fimd_node;
+
samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
of_platform_populate(NULL, of_default_bus_match_table,
exynos5250_auxdata_lookup, NULL);
+
+   fimd_node = of_find_node_with_property(NULL, supports-mipi-panel);
+   if (of_get_property(fimd_node, supports-mipi-panel, NULL))
+   clk_set_rate(exynos5_clk_sclk_fimd.clk, 8);
+   of_node_put(fimd_node);
+
exynos_fimd_gpio_setup_24bpp();
platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
 }
diff --git a/arch/arm/plat-samsung/include/plat/clock.h 
b/arch/arm/plat-samsung/include/plat/clock.h
index a62753d..3d27783 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -83,6 +83,8 @@ extern struct clk clk_ext;
 extern struct clksrc_clk clk_epllref;
 extern struct clksrc_clk clk_esysclk;
 
+extern struct clksrc_clk exynos5_clk_sclk_fimd;
+
 /* S3C64XX specific clocks */
 extern struct clk clk_h2;
 extern struct clk clk_27m;
-- 
1.7.0.4

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Re: [PATCH 0/7] Add device tree based discovery support for drm-fimd

2012-07-11 Thread Sachin Kamat

Hi Leela,

Some nits and suggestions.
Please include device tree list (devicetree-disc...@lists.ozlabs.org)
for all dt related patches.

On 11/07/2012, Leela Krishna Amudala l.kris...@samsung.com wrote:
 From: Leela Krishna l.kris...@samsung.com

 The patches are created against for-next branch of Kukjin Kim's tree at:
  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

 This patch set adds Backlight, LCD support and device tree based discovery
 support for drm-fimd

 Leela Krishna (3):
   ARM: EXYNOS5: add device tree based discovery support for FIMD

Just keep it EXYNOS (not EXYNOS5).


   ARM: EXYNOS5: Add the bus clock for FIMD
   ARM: EXYNOS5: Set parent clock to fimd

 Leela Krishna Amudala (4):

Better maintain same (author) name style atleast in a series.


   ARM: SAMSUNG: add additional registers and SFR definitions for
 writeback
   ARM: EXYNOS5: add machine specific support for backlight
   ARM: EXYNOS5: add machine specific support for LCD
   ARM: EXYNOS: Adding DRM platform device

  arch/arm/boot/dts/exynos5250-smdk5250.dts   |   16 +++
  arch/arm/boot/dts/exynos5250.dtsi   |7 ++
  arch/arm/mach-exynos/Kconfig|1 +
  arch/arm/mach-exynos/clock-exynos5.c|   30 --
  arch/arm/mach-exynos/include/mach/map.h |1 +
  arch/arm/mach-exynos/mach-exynos5-dt.c  |  125
 +++
  arch/arm/plat-samsung/include/plat/clock.h  |2 +
  arch/arm/plat-samsung/include/plat/regs-fb-v4.h |   10 ++
  arch/arm/plat-samsung/include/plat/regs-fb.h|   51 +
  drivers/video/Kconfig   |6 +
  10 files changed, 239 insertions(+), 10 deletions(-)

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Re: [PATCH 2/7] ARM: EXYNOS5: add machine specific support for backlight

2012-07-11 Thread Sachin Kamat

On 11/07/2012, Leela Krishna Amudala l.kris...@samsung.com wrote:
 Adds machine specific support for LCD backlight for SMDK board based
 on Exynos5

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/mach-exynos/Kconfig   |1 +
  arch/arm/mach-exynos/mach-exynos5-dt.c |   28 
  2 files changed, 29 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
 index 498596b..a2a2940 100644
 --- a/arch/arm/mach-exynos/Kconfig
 +++ b/arch/arm/mach-exynos/Kconfig
 @@ -412,6 +412,7 @@ config MACH_EXYNOS5_DT
   select SOC_EXYNOS5250
   select USE_OF
   select ARM_AMBA
 + select SAMSUNG_DEV_BACKLIGHT
   help
 Machine support for Samsung Exynos4 machine with device tree enabled.
 Select this if a fdt blob is available for the EXYNOS4 SoC based 
 board.
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 7b1e11a..0a200fd 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -11,6 +11,8 @@

  #include linux/of_platform.h
  #include linux/serial_core.h
 +#include linux/pwm_backlight.h
 +#include linux/gpio.h

  #include asm/mach/arch.h
  #include asm/hardware/gic.h
 @@ -18,9 +20,34 @@

  #include plat/cpu.h
  #include plat/regs-serial.h
 +#include plat/backlight.h
 +#include plat/gpio-cfg.h

  #include common.h

 +
 +static int smdk5250_bl_notify(struct device *unused, int brightness)
 +{
 + /* manage lcd_bl_en signal */
 + if (brightness)
 + gpio_set_value(EXYNOS5_GPX3(0), 1);
 + else
 + gpio_set_value(EXYNOS5_GPX3(0), 0);
 +
 + return brightness;

Why do you need to return the brightness?


 +}
 +
 +/* LCD Backlight data */
 +static struct samsung_bl_gpio_info smdk5250_bl_gpio_info = {
 + .no = EXYNOS5_GPB2(0),
 + .func   = S3C_GPIO_SFN(2),
 +};
 +
 +static struct platform_pwm_backlight_data smdk5250_bl_data = {
 + .pwm_period_ns  = 100,
 + .notify = smdk5250_bl_notify,
 +};
 +
  /*
   * The following lookup table is used to override device names when
 devices
   * are registered from device tree. This is temporarily added to enable
 @@ -61,6 +88,7 @@ static void __init exynos5250_dt_map_io(void)

  static void __init exynos5250_dt_machine_init(void)
  {
 + samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
   of_platform_populate(NULL, of_default_bus_match_table,
   exynos5250_auxdata_lookup, NULL);
  }
 --
 1.7.0.4

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Re: [PATCH 5/7] ARM: EXYNOS5: add device tree based discovery support for FIMD

2012-07-11 Thread Sachin Kamat

On 11/07/2012, Leela Krishna Amudala l.kris...@samsung.com wrote:
 From: Leela Krishna l.kris...@samsung.com

 This patch adds support for device tree based discovery for Samsung's
 display controller. Adds DRM-Fimd plat data for smdk5250
 evt1 to the corresponding dts file

 Signed-off-by: Leela Krishna l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5250-smdk5250.dts |   16 
  arch/arm/boot/dts/exynos5250.dtsi |7 +++
  arch/arm/mach-exynos/include/mach/map.h   |1 +
  arch/arm/mach-exynos/mach-exynos5-dt.c|2 ++

You also need to update the documentation for the bindings.

  4 files changed, 26 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
 b/arch/arm/boot/dts/exynos5250-smdk5250.dts
 index 49945cc..781f836 100644
 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
 +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
 @@ -71,4 +71,20 @@
   i2c@12CD {
   status = disabled;
   };
 +
 + lcd_fimd0: lcd_panel0 {
 + lcd-htiming = 4 4 4 1280;
 + lcd-vtiming = 4 4 4 800;
 + supports-mipi-panel;
 + };
 +
 + fimd {
 + samsung,fimd-display = lcd_fimd0;
 + samsung,fimd-vidout-rgb;
 + samsung,fimd-inv-vclk;
 + samsung,fimd-frame-rate = 60;
 + samsung,default-window = 0;
 + samsung,fimd-win-bpp = 32;
 + };
 +
  };
 diff --git a/arch/arm/boot/dts/exynos5250.dtsi
 b/arch/arm/boot/dts/exynos5250.dtsi
 index 4272b29..f9954fe 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -424,4 +424,11 @@
   #gpio-cells = 4;
   };
   };
 +
 + fimd {
 + compatible = samsung,exynos5-drm;
 + interrupt-parent = combiner;
 + reg = 0x1440 0x4;
 + interrupts = 18 5, 18 4, 18 6;
 + };
  };
 diff --git a/arch/arm/mach-exynos/include/mach/map.h
 b/arch/arm/mach-exynos/include/mach/map.h
 index ca4aa89..731b56e 100644
 --- a/arch/arm/mach-exynos/include/mach/map.h
 +++ b/arch/arm/mach-exynos/include/mach/map.h
 @@ -167,6 +167,7 @@
  #define EXYNOS4_PA_MIPI_CSIS10x1189

  #define EXYNOS4_PA_FIMD0 0x11C0
 +#define EXYNOS5_PA_FIMD1 0x1440

  #define EXYNOS4_PA_HSMMC(x)  (0x1251 + ((x) * 0x1))
  #define EXYNOS4_PA_DWMCI 0x1255
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index a91c928..9d5bccc 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -154,6 +154,8 @@ static const struct of_dev_auxdata
 exynos5250_auxdata_lookup[] __initconst = {
   OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA0, dma-pl330.0, NULL),
   OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA1, dma-pl330.1, NULL),
   OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_MDMA1, dma-pl330.2, NULL),
 + OF_DEV_AUXDATA(samsung,exynos5-drm, EXYNOS5_PA_FIMD1,
 + exynos5-fb, NULL),
   {},
  };

 --
 1.7.0.4

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RE: [PATCH 2/7] ARM: EXYNOS5: add machine specific support for backlight

2012-07-11 Thread Jingoo Han

On July 11, 2012 6:11 PM, Leela Krishna Amudala l.kris...@samsung.com wrote:

 
 Adds machine specific support for LCD backlight for SMDK board based
 on Exynos5
 
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/mach-exynos/Kconfig   |1 +
  arch/arm/mach-exynos/mach-exynos5-dt.c |   28 
  2 files changed, 29 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
 index 498596b..a2a2940 100644
 --- a/arch/arm/mach-exynos/Kconfig
 +++ b/arch/arm/mach-exynos/Kconfig
 @@ -412,6 +412,7 @@ config MACH_EXYNOS5_DT
   select SOC_EXYNOS5250
   select USE_OF
   select ARM_AMBA
 + select SAMSUNG_DEV_BACKLIGHT
   help
 Machine support for Samsung Exynos4 machine with device tree enabled.
 Select this if a fdt blob is available for the EXYNOS4 SoC based 
 board.
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 7b1e11a..0a200fd 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -11,6 +11,8 @@
 
  #include linux/of_platform.h
  #include linux/serial_core.h
 +#include linux/pwm_backlight.h
 +#include linux/gpio.h
 
  #include asm/mach/arch.h
  #include asm/hardware/gic.h
 @@ -18,9 +20,34 @@
 
  #include plat/cpu.h
  #include plat/regs-serial.h
 +#include plat/backlight.h
 +#include plat/gpio-cfg.h
 
  #include common.h
 
 +

Delete this useless line.

 +static int smdk5250_bl_notify(struct device *unused, int brightness)
 +{
 + /* manage lcd_bl_en signal */
 + if (brightness)
 + gpio_set_value(EXYNOS5_GPX3(0), 1);
 + else
 + gpio_set_value(EXYNOS5_GPX3(0), 0);
 +
 + return brightness;
 +}
 +
 +/* LCD Backlight data */
 +static struct samsung_bl_gpio_info smdk5250_bl_gpio_info = {
 + .no = EXYNOS5_GPB2(0),
 + .func   = S3C_GPIO_SFN(2),
 +};
 +
 +static struct platform_pwm_backlight_data smdk5250_bl_data = {
 + .pwm_period_ns  = 100,
 + .notify = smdk5250_bl_notify,
 +};
 +
  /*
   * The following lookup table is used to override device names when devices
   * are registered from device tree. This is temporarily added to enable
 @@ -61,6 +88,7 @@ static void __init exynos5250_dt_map_io(void)
 
  static void __init exynos5250_dt_machine_init(void)
  {
 + samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
   of_platform_populate(NULL, of_default_bus_match_table,
   exynos5250_auxdata_lookup, NULL);
  }
 --
 1.7.0.4
 
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RE: [PATCH 0/7] Add device tree based discovery support for drm-fimd

2012-07-11 Thread Jingoo Han

On July 11, 2012 6:11 PM, Leela Krishna Amudala l.kris...@samsung.com wrote:
 
 From: Leela Krishna l.kris...@samsung.com
 
 The patches are created against for-next branch of Kukjin Kim's tree at:
  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
 
 This patch set adds Backlight, LCD support and device tree based discovery
 support for drm-fimd

Your patchset seems FB-FIMD, not DRM-FIMD.

FIMD IP can be used by FB or DRM framework.
Please, use the term clearly.

If your patches use ./drivers/video/s3c-fb.c, please use the term 'FB'.
If your patches use ./drivers/gpu/drm/exynos/*, please use the term 'DRM'.

Best regards,
Jingoo Han

 
 Leela Krishna (3):
   ARM: EXYNOS5: add device tree based discovery support for FIMD
   ARM: EXYNOS5: Add the bus clock for FIMD
   ARM: EXYNOS5: Set parent clock to fimd
 
 Leela Krishna Amudala (4):
   ARM: SAMSUNG: add additional registers and SFR definitions for
 writeback
   ARM: EXYNOS5: add machine specific support for backlight
   ARM: EXYNOS5: add machine specific support for LCD
   ARM: EXYNOS: Adding DRM platform device
 
  arch/arm/boot/dts/exynos5250-smdk5250.dts   |   16 +++
  arch/arm/boot/dts/exynos5250.dtsi   |7 ++
  arch/arm/mach-exynos/Kconfig|1 +
  arch/arm/mach-exynos/clock-exynos5.c|   30 --
  arch/arm/mach-exynos/include/mach/map.h |1 +
  arch/arm/mach-exynos/mach-exynos5-dt.c  |  125 
 +++
  arch/arm/plat-samsung/include/plat/clock.h  |2 +
  arch/arm/plat-samsung/include/plat/regs-fb-v4.h |   10 ++
  arch/arm/plat-samsung/include/plat/regs-fb.h|   51 +
  drivers/video/Kconfig   |6 +
  10 files changed, 239 insertions(+), 10 deletions(-)

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RE: [PATCH 3/7] ARM: EXYNOS5: add machine specific support for LCD

2012-07-11 Thread Jingoo Han

On July 11, 2012 6:42 PM, Leela Krishna Amudala l.kris...@samsung.com wrote:

 -Original Message-
 From: Leela Krishna Amudala [mailto:l.kris...@samsung.com]
 Sent: Wednesday, July 11, 2012 6:42 PM
 To: linux-arm-ker...@lists.infradead.org
 Cc: grant.lik...@secretlab.ca; ol...@google.com; thomas...@samsung.com; 
 kgene@samsung.com;
 jo...@samsung.com; jg1@samsung.com
 Subject: [PATCH 3/7] ARM: EXYNOS5: add machine specific support for LCD
 
 This patch adds machine specific support for LCD controller like setting 
 power to LCD
 and adding LCD platform device.
 
 Signed-off-by: Prathyush K prathyus...@samsung.com
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/mach-exynos/mach-exynos5-dt.c |   57 
 
  1 files changed, 57 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 0a200fd..652a537 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -13,6 +13,7 @@
  #include linux/serial_core.h
  #include linux/pwm_backlight.h
  #include linux/gpio.h
 +#include linux/delay.h
 
  #include asm/mach/arch.h
  #include asm/hardware/gic.h
 @@ -25,6 +26,8 @@
 
  #include common.h
 
 +#include video/platform_lcd.h
 +

Delete this useless line.

 
  static int smdk5250_bl_notify(struct device *unused, int brightness)
  {
 @@ -48,6 +51,55 @@ static struct platform_pwm_backlight_data smdk5250_bl_data 
 = {
   .notify = smdk5250_bl_notify,
  };
 
 +static void lcd_set_power(struct plat_lcd_data *pd,
 + unsigned int power)
 +{
 +
 + /* reset */
 + gpio_request_one(EXYNOS5_GPX1(5), GPIOF_OUT_INIT_HIGH, GPX1);
 +
 + mdelay(20);
 + if (power) {
 + /* fire nRESET on power up */
 + gpio_set_value(EXYNOS5_GPX1(5), 0);
 + mdelay(20);
 + gpio_set_value(EXYNOS5_GPX1(5), 1);
 + mdelay(20);
 + gpio_free(EXYNOS5_GPX1(5));
 + } else {
 + /* fire nRESET on power off */
 + gpio_set_value(EXYNOS5_GPX1(5), 0);
 + mdelay(20);
 + gpio_set_value(EXYNOS5_GPX1(5), 1);
 + mdelay(20);
 + gpio_free(EXYNOS5_GPX1(5));
 + }
 + mdelay(20);
 +
 + /*
 +  * Request lcd_bl_en GPIO for smdk5250_bl_notify().
 +  * TODO: Fix this so we are not at risk of requesting the GPIO
 +  * multiple times, this should be done with device tree, and
 +  * likely integrated into the plat-samsung/dev-backlight.c init.
 +  */
 + gpio_request_one(EXYNOS5_GPX3(0), GPIOF_OUT_INIT_LOW, GPX3);
 +}
 +
 +static int smdk5250_match_fb(struct plat_lcd_data *pd, struct fb_info *info)
 +{
 + /* Don't call .set_power callback while unblanking */
 + return 0;
 +}
 +
 +static struct plat_lcd_data smdk5250_lcd_data = {
 + .set_power  = lcd_set_power,
 + .match_fb   = smdk5250_match_fb,
 +};
 +
 +static struct platform_device smdk5250_lcd = {
 + .name   = platform-lcd,
 + .dev.platform_data  = smdk5250_lcd_data,
 +};
  /*
   * The following lookup table is used to override device names when devices
   * are registered from device tree. This is temporarily added to enable
 @@ -80,6 +132,10 @@ static const struct of_dev_auxdata 
 exynos5250_auxdata_lookup[] __initconst = {
   {},
  };
 
 +static struct platform_device *smdk5250_devices[] __initdata = {
 + smdk5250_lcd, /* for platform_lcd device */
 +};
 +
  static void __init exynos5250_dt_map_io(void)
  {
   exynos_init_io(NULL, 0);
 @@ -91,6 +147,7 @@ static void __init exynos5250_dt_machine_init(void)
   samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
   of_platform_populate(NULL, of_default_bus_match_table,
   exynos5250_auxdata_lookup, NULL);
 + platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
  }
 
  static char const *exynos5250_dt_compat[] __initdata = {
 --
 1.7.0.4

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RE: [PATCH 4/7] ARM: EXYNOS: Adding DRM platform device

2012-07-11 Thread Jingoo Han



 -Original Message-
 From: Leela Krishna Amudala [mailto:l.kris...@samsung.com]
 Sent: Wednesday, July 11, 2012 6:42 PM
 To: linux-arm-ker...@lists.infradead.org
 Cc: grant.lik...@secretlab.ca; ol...@google.com; thomas...@samsung.com; 
 kgene@samsung.com;
 jo...@samsung.com; jg1@samsung.com
 Subject: [PATCH 4/7] ARM: EXYNOS: Adding DRM platform device
 
 Add DRM platform device to machine file for exynos5.
 
 Signed-off-by: Prathyush K prathyus...@samsung.com
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/mach-exynos/mach-exynos5-dt.c |   27 +++
  1 files changed, 27 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 652a537..a91c928 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -17,6 +17,7 @@
 
  #include asm/mach/arch.h
  #include asm/hardware/gic.h
 +#include asm/io.h
  #include mach/map.h
 
  #include plat/cpu.h
 @@ -29,6 +30,22 @@
  #include video/platform_lcd.h
 
 
 +static void exynos_fimd_gpio_setup_24bpp(void)
 +{
 + unsigned int reg = 0;
 + /*
 +  * Set DISP1BLK_CFG register for Display path selection
 +  * FIMD of DISP1_BLK Bypass selection : DISP1BLK_CFG[15]
 +  * -
 +  * 0 | MIE/MDNIE
 +  * 1 | FIMD : selected
 +  */
 + reg = __raw_readl(S3C_VA_SYS + 0x0214);
 + reg = ~(1  15);  /* To save other reset values */
 + reg |= (1  15);
 + __raw_writel(reg, S3C_VA_SYS + 0x0214);
 +}
 +
  static int smdk5250_bl_notify(struct device *unused, int brightness)
  {
   /* manage lcd_bl_en signal */
 @@ -51,6 +68,14 @@ static struct platform_pwm_backlight_data smdk5250_bl_data 
 = {
   .notify = smdk5250_bl_notify,
  };
 
 +static struct platform_device exynos_drm_device = {
 + .name   = exynos-drm,
 + .dev = {
 + .dma_mask = exynos_drm_device.dev.coherent_dma_mask,
 + .coherent_dma_mask = 0xUL,
 + }
 +};
 +


If your patches use ./drivers/video/s3c-fb.c, please use the term 'FB'.
In this case, this 'exynos_drm_device' is not unnecessary.

Um... Have you tested this patchset with board such as SMDK5250?
Does it work properly?


  static void lcd_set_power(struct plat_lcd_data *pd,
   unsigned int power)
  {
 @@ -134,6 +159,7 @@ static const struct of_dev_auxdata 
 exynos5250_auxdata_lookup[] __initconst = {
 
  static struct platform_device *smdk5250_devices[] __initdata = {
   smdk5250_lcd, /* for platform_lcd device */
 + exynos_drm_device,
  };
 
  static void __init exynos5250_dt_map_io(void)
 @@ -147,6 +173,7 @@ static void __init exynos5250_dt_machine_init(void)
   samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
   of_platform_populate(NULL, of_default_bus_match_table,
   exynos5250_auxdata_lookup, NULL);
 + exynos_fimd_gpio_setup_24bpp();
   platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
  }
 
 --
 1.7.0.4

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RE: [PATCH 7/7] ARM: EXYNOS5: Set parent clock to fimd

2012-07-11 Thread Jingoo Han

On July 11, 2012 6:42 PM, Leela Krishna Amudala l.kris...@samsung.com wrote:

 
 From: Leela Krishna l.kris...@samsung.com
 
 This patch sets mout_mpll_user as parent clock to fimd also
 sets Fimd source clock rate to 800 MHz for MIPI LCD
 
 Signed-off-by: Leela Krishna l.kris...@samsung.com
 ---
  arch/arm/mach-exynos/clock-exynos5.c   |   25 +++--
  arch/arm/mach-exynos/mach-exynos5-dt.c |   11 +++
  arch/arm/plat-samsung/include/plat/clock.h |2 ++
  3 files changed, 28 insertions(+), 10 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
 b/arch/arm/mach-exynos/clock-exynos5.c
 index 61bf88d..a0d65f6 100644
 --- a/arch/arm/mach-exynos/clock-exynos5.c
 +++ b/arch/arm/mach-exynos/clock-exynos5.c
 @@ -1039,6 +1039,18 @@ static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
   .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS2, .shift = 24, .size = 8 },
  };
 
 +struct clksrc_clk exynos5_clk_sclk_fimd = {
 + .clk= {
 + .name   = sclk_fimd,
 + .devname= exynos5-fb,
 + .enable = exynos5_clksrc_mask_disp1_0_ctrl,
 + .ctrlbit= (1  0),
 + },
 + .sources = exynos5_clkset_group,
 + .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },

Please use spaces instead of tab.

 + .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
 +};
 +
  static struct clksrc_clk exynos5_clksrcs[] = {
   {
   .clk= {
 @@ -1050,16 +1062,6 @@ static struct clksrc_clk exynos5_clksrcs[] = {
   .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 
 },
   }, {
   .clk= {
 - .name   = sclk_fimd,
 - .devname= exynos5-fb,
 - .enable = exynos5_clksrc_mask_disp1_0_ctrl,
 - .ctrlbit= (1  0),
 - },
 - .sources = exynos5_clkset_group,
 - .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 
 4 },
 - .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 
 4 },
 - }, {
 - .clk= {
   .name   = aclk_266_gscl,
   },
   .sources = clk_src_gscl_266,
 @@ -1153,6 +1155,7 @@ static struct clksrc_clk *exynos5_sysclks[] = {
   exynos5_clk_dout_mmc4,
   exynos5_clk_aclk_acp,
   exynos5_clk_pclk_acp,
 + exynos5_clk_sclk_fimd,
  };
 
  static struct clk *exynos5_clk_cdev[] = {
 @@ -1402,6 +1405,8 @@ void __init_or_cpufreq exynos5_setup_clocks(void)
 
   clk_set_rate(exynos5_clk_aclk_acp.clk, 26700);
   clk_set_rate(exynos5_clk_pclk_acp.clk, 13400);
 + clk_set_parent(exynos5_clk_sclk_fimd.clk,
 + exynos5_clk_mout_mpll_user.clk);
 
   for (ptr = 0; ptr  ARRAY_SIZE(exynos5_clksrcs); ptr++)
   s3c_set_clksrc(exynos5_clksrcs[ptr], true);
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 9d5bccc..248ca58 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -24,6 +24,9 @@
  #include plat/regs-serial.h
  #include plat/backlight.h
  #include plat/gpio-cfg.h
 +#include plat/clock.h
 +#include plat/s5p-clock.h
 +#include plat/clock-clksrc.h
 
  #include common.h
 
 @@ -172,9 +175,17 @@ static void __init exynos5250_dt_map_io(void)
 
  static void __init exynos5250_dt_machine_init(void)
  {
 + struct device_node *fimd_node;
 +
   samsung_bl_set(smdk5250_bl_gpio_info, smdk5250_bl_data);
   of_platform_populate(NULL, of_default_bus_match_table,
   exynos5250_auxdata_lookup, NULL);
 +

Delete this useless line.

 + fimd_node = of_find_node_with_property(NULL, supports-mipi-panel);
 + if (of_get_property(fimd_node, supports-mipi-panel, NULL))
 + clk_set_rate(exynos5_clk_sclk_fimd.clk, 8);
 + of_node_put(fimd_node);
 +
   exynos_fimd_gpio_setup_24bpp();
   platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
  }
 diff --git a/arch/arm/plat-samsung/include/plat/clock.h 
 b/arch/arm/plat-samsung/include/plat/clock.h
 index a62753d..3d27783 100644
 --- a/arch/arm/plat-samsung/include/plat/clock.h
 +++ b/arch/arm/plat-samsung/include/plat/clock.h
 @@ -83,6 +83,8 @@ extern struct clk clk_ext;
  extern struct clksrc_clk clk_epllref;
  extern struct clksrc_clk clk_esysclk;
 
 +extern struct clksrc_clk exynos5_clk_sclk_fimd;
 +
  /* S3C64XX specific clocks */
  extern struct clk clk_h2;
  extern struct clk clk_27m;
 --
 1.7.0.4

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[PATCH v5 5/6] spi: s3c64xx: Remove the 'set_level' callback from controller data

2012-07-11 Thread Thomas Abraham

The set_level callback in the controller data, which is used to configure
the slave select line, cannot be supported when migrating the driver to
device tree based discovery. Since all the platforms currently use gpio
as the slave select line, this callback can be removed from the
controller data and replaced with call to gpio_set_value in the driver.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Jaswinder Singh jaswinder.si...@linaro.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |2 -
 drivers/spi/spi-s3c64xx.c|   30 ++---
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h 
b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index c818a7c..ceba18d 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -18,7 +18,6 @@ struct platform_device;
  * @fb_delay: Slave specific feedback delay.
  *Refer to FB_CLK_SEL register definition in SPI chapter.
  * @line: Custom 'identity' of the CS line.
- * @set_level: CS line control.
  *
  * This is per SPI-Slave Chipselect information.
  * Allocate and initialize one in machine init code and make the
@@ -27,7 +26,6 @@ struct platform_device;
 struct s3c64xx_spi_csinfo {
u8 fb_delay;
unsigned line;
-   void (*set_level)(unsigned line_id, int lvl);
 };
 
 /**
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 0a9e43e..ba5193b 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -27,6 +27,7 @@
 #include linux/platform_device.h
 #include linux/pm_runtime.h
 #include linux/spi/spi.h
+#include linux/gpio.h
 
 #include mach/dma.h
 #include plat/s3c64xx-spi.h
@@ -411,14 +412,14 @@ static inline void enable_cs(struct 
s3c64xx_spi_driver_data *sdd,
if (sdd-tgl_spi != spi) { /* if last mssg on diff device */
/* Deselect the last toggled device */
cs = sdd-tgl_spi-controller_data;
-   cs-set_level(cs-line,
-   spi-mode  SPI_CS_HIGH ? 0 : 1);
+   gpio_set_value(cs-line,
+   spi-mode  SPI_CS_HIGH ? 0 : 1);
}
sdd-tgl_spi = NULL;
}
 
cs = spi-controller_data;
-   cs-set_level(cs-line, spi-mode  SPI_CS_HIGH ? 1 : 0);
+   gpio_set_value(cs-line, spi-mode  SPI_CS_HIGH ? 1 : 0);
 }
 
 static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd,
@@ -504,7 +505,7 @@ static inline void disable_cs(struct 
s3c64xx_spi_driver_data *sdd,
if (sdd-tgl_spi == spi)
sdd-tgl_spi = NULL;
 
-   cs-set_level(cs-line, spi-mode  SPI_CS_HIGH ? 0 : 1);
+   gpio_set_value(cs-line, spi-mode  SPI_CS_HIGH ? 0 : 1);
 }
 
 static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
@@ -833,11 +834,21 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
unsigned long flags;
int err = 0;
 
-   if (cs == NULL || cs-set_level == NULL) {
+   if (cs == NULL) {
dev_err(spi-dev, No CS for SPI(%d)\n, spi-chip_select);
return -ENODEV;
}
 
+   if (!spi_get_ctldata(spi)) {
+   err = gpio_request(cs-line, dev_name(spi-dev));
+   if (err) {
+   dev_err(spi-dev, request for slave select gpio 
+   line [%d] failed\n, cs-line);
+   return -EBUSY;
+   }
+   spi_set_ctldata(spi, cs);
+   }
+
sdd = spi_master_get_devdata(spi-master);
sci = sdd-cntrlr_info;
 
@@ -908,6 +919,15 @@ setup_exit:
return err;
 }
 
+static void s3c64xx_spi_cleanup(struct spi_device *spi)
+{
+   struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi);
+
+   if (cs)
+   gpio_free(cs-line);
+   spi_set_ctldata(spi, NULL);
+}
+
 static irqreturn_t s3c64xx_spi_irq(int irq, void *data)
 {
struct s3c64xx_spi_driver_data *sdd = data;
-- 
1.6.6.rc2

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[PATCH v5 6/6] spi: s3c64xx: add device tree support

2012-07-11 Thread Thomas Abraham

Add support for device based discovery.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Jaswinder Singh jaswinder.si...@linaro.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
 .../devicetree/bindings/spi/spi-samsung.txt|  113 +++
 drivers/spi/spi-s3c64xx.c  |  306 +---
 2 files changed, 379 insertions(+), 40 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-samsung.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-samsung.txt 
b/Documentation/devicetree/bindings/spi/spi-samsung.txt
new file mode 100644
index 000..59bfc4f
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-samsung.txt
@@ -0,0 +1,113 @@
+* Samsung SPI Controller
+
+The Samsung SPI controller is used to interface with various devices such as 
flash
+and display controllers using the SPI communication interface.
+
+Required SoC Specific Properties:
+
+- compatible: should be one of the following.
+- samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
+- samsung,s3c6410-spi: for s3c6410 platforms
+- samsung,s5p6440-spi: for s5p6440 and s5p6450 platforms
+- samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
+- samsung,exynos4210-spi: for exynos4 and exynos5 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+- interrupts: The interrupt number to the cpu. The interrupt specifier format
+  depends on the interrupt controller.
+
+- tx-dma-channel: The dma channel specifier for tx operations. The format of
+  the dma specifier depends on the dma controller.
+
+- rx-dma-channel: The dma channel specifier for rx operations. The format of
+  the dma specifier depends on the dma controller.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- gpios: The gpio specifier for clock, mosi and miso interface lines (in the
+  order specified). The format of the gpio specifier depends on the gpio
+  controller.
+
+Optional Board Specific Properties:
+
+- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
+  select the clock source for the spi bus clock, this property can be used to
+  indicate the clock to be used for driving the spi bus clock. If not 
specified,
+  the clock number 0 is used as default.
+
+- num-cs: Specifies the number of chip select lines supported. If
+  not specified, the default number of chip select lines is set to 1.
+
+SPI Controller specific data in SPI slave nodes:
+
+- The spi slave nodes should provide the following information which is 
required
+  by the spi controller.
+
+  - cs-gpio: A gpio specifier that specifies the gpio line used as
+the slave select line by the spi controller. The format of the gpio
+specifier depends on the gpio controller.
+
+  - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
+miso line (to account for any lag in the miso line). The following are the
+valid values.
+
+  - 0: No phase shift.
+  - 1: 90 degree phase shift sampling.
+  - 2: 180 degree phase shift sampling.
+  - 3: 270 degree phase shift sampling.
+
+Aliases:
+
+- All the SPI controller nodes should be represented in the aliases node using
+  the following format 'spi{n}' where n is a unique number for the alias.
+
+
+Example:
+
+- SoC Specific Portion:
+
+   spi_0: spi@12d2 {
+   compatible = samsung,exynos4210-spi;
+   reg = 0x12d2 0x100;
+   interrupts = 0 66 0;
+   tx-dma-channel = pdma0 5;
+   rx-dma-channel = pdma0 4;
+   };
+
+- Board Specific Portion:
+
+   spi_0: spi@12d2 {
+   #address-cells = 1;
+   #size-cells = 0;
+   gpios = gpa2 4 2 3 0,
+   gpa2 6 2 3 0,
+   gpa2 7 2 3 0;
+
+   w25q80bw@0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = w25x80;
+   reg = 0;
+   spi-max-frequency = 1;
+
+   controller-data {
+   cs-gpio = gpa2 5 1 0 3;
+   samsung,spi-feedback-delay = 0;
+   };
+
+   partition@0 {
+   label = U-Boot;
+   reg = 0x0 0x4;
+   read-only;
+   };
+
+   partition@4 {
+   label = Kernel;
+   reg = 0x4 0xc;
+   };
+   };
+   };
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index ba5193b..6c15f05 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -28,6 +28,8 @@
 #include linux/pm_runtime.h
 #include

Re: [PATCH v5 5/6] spi: s3c64xx: Remove the 'set_level' callback from controller data

2012-07-11 Thread Mark Brown

On Wed, Jul 11, 2012 at 04:45:59PM +0530, Thomas Abraham wrote:
 The set_level callback in the controller data, which is used to configure
 the slave select line, cannot be supported when migrating the driver to
 device tree based discovery. Since all the platforms currently use gpio
 as the slave select line, this callback can be removed from the
 controller data and replaced with call to gpio_set_value in the driver.

I don't seem to have patches 1-4?


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Re: [PATCH v5 5/6] spi: s3c64xx: Remove the 'set_level' callback from controller data

2012-07-11 Thread Thomas Abraham

On 11 July 2012 17:17, Mark Brown broo...@opensource.wolfsonmicro.com wrote:
 On Wed, Jul 11, 2012 at 04:45:59PM +0530, Thomas Abraham wrote:
 The set_level callback in the controller data, which is used to configure
 the slave select line, cannot be supported when migrating the driver to
 device tree based discovery. Since all the platforms currently use gpio
 as the slave select line, this callback can be removed from the
 controller data and replaced with call to gpio_set_value in the driver.

 I don't seem to have patches 1-4?

Based on your comments to add the gpio request, only two patches 5/6
and 6/6 in this series have changed since. I have cc'ed you in the
other 4 patches as well. If you do not have those patches, please let
me know, I will repost the whole series again. Thanks.
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Re: Re: [PATCH 2/2] ARM: EXYNOS5: Add gscalar device from DT

2012-07-11 Thread AMEER BASHA SHAIK

Hi Sylwester,


On Sat, Jul 7, 2012 at 12:20 AM, Sylwester Nawrocki 
sylvester.nawro...@gmail.com wrote:

 Hi Shaik,


 On 07/06/2012 02:45 PM, Shaik Ameer Basha wrote:

 Adding all 4 gscalar devices from DT device list in machine file.


 nit: s/gscalar/gscaler

 The above sentence doesn't quite parse though.


OK. I will fix it.


 Signed-off-by: Abhilash Kesavana.kesa...@samsung.com
 Signed-off-by: Leela Krishna Amudalal.kris...@samsung.com
 Signed-off-by: Shaik Ameer Bashashaik.am...@samsung.com
 ---
   arch/arm/boot/dts/exynos5250.dtsi  |   31
 +++
   arch/arm/mach-exynos/mach-exynos5-dt.c |8 
   2 files changed, 39 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos5250.dtsi
 b/arch/arm/boot/dts/exynos5250.dtsi
 index 4272b29..b945c00 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -23,6 +23,13 @@
 compatible = samsung,exynos5250;
 interrupt-parent =gic;

 +   aliases {
 +   gsc0 =gsc_0;
 +   gsc1 =gsc_1;
 +   gsc2 =gsc_2;
 +   gsc3 =gsc_3;
 +   };
 +


 What are these aliases useful for ?

GScaler driver uses the of_alias_get_id() call to retrieve the device IDs, 
which 
internally uses these aliases...

 Also I think all DT related patches should be posted to
 devicetree-disc...@lists.ozlabs.org as well.


I will post the v2 version of this patch to the specified mailing list.


 gic:interrupt-controller@10481000 {
 compatible = arm,cortex-a9-gic;
 #interrupt-cells =3;
 @@ -424,4 +431,28 @@
 #gpio-cells =4;
 };
 };
 +
 +   gsc_0:  gsc@0x13e0 {
 +   compatible = samsung,exynos-gsc;
 +   reg =0x13e0 0x1000;
 +   interrupts =0 85 0;
 +   };
 +
 +   gsc_1:  gsc@0x13e1 {
 +   compatible = samsung,exynos-gsc;
 +   reg =0x13e1 0x1000;
 +   interrupts =0 86 0;
 +   };
 +
 +   gsc_2:  gsc@0x13e2 {
 +   compatible = samsung,exynos-gsc;
 +   reg =0x13e2 0x1000;
 +   interrupts =0 87 0;
 +   };
 +
 +   gsc_3:  gsc@0x13e3 {
 +   compatible = samsung,exynos-gsc;
 +   reg =0x13e3 0x1000;
 +   interrupts =0 88 0;
 +   };
   };
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 7b1e11a..76b081c 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -50,6 +50,14 @@ static const struct of_dev_auxdata
 exynos5250_auxdata_lookup[] __initconst = {
 OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA0, dma-pl330.0,
 NULL),
 OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA1, dma-pl330.1,
 NULL),
 OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_MDMA1, dma-pl330.2,
 NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E0,
 +   exynos-gsc.0, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E1,
 +   exynos-gsc.1, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E2,
 +   exynos-gsc.2, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E3,
 +   exynos-gsc.3, NULL),


 It's probably better to add relevant entry at
 arch/arm/mach-exynos/include/mach/map. It's just a one line, e.g.

 /* x = 0...3 */
 #define EXYNOS5_PA_GSC(x)   (0x13e0 + ((x) * 0x1))

 And use it here instead of plain numbers.

OK. will address these comments in v2.


 --
 Thanks,
 Sylwester


Regards,
Shaik Ameer 
BashaN‹§²æìr¸›yúèšØb²X¬¶Ç§vØ^–)Þº{.nÇ+‰·¥Š{±±©¬ºx,¡È§¶›¡Ü¨}©ž²Æ zÚj:+v‰¨¾«‘êçzZ+€Ê+zf£¢·hšˆ§~††Ûiÿûàz¹®w¥¢¸?™¨èÚ¢)ß¢f

Re: Re: [PATCH 2/2] ARM: EXYNOS5: Add gscalar device from DT

2012-07-11 Thread AMEER BASHA SHAIK

Hi Sachin,

On Sat, Jul 7, 2012 at 11:58 AM, Sachin Kamat sachin.ka...@linaro.org wrote:
 Hi Shaik,


 On 6 July 2012 18:15, Shaik Ameer Basha shaik.am...@samsung.com wrote:
 Adding all 4 gscalar devices from DT device list in machine file.

 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
 ---
  arch/arm/boot/dts/exynos5250.dtsi  |   31
 +++
  arch/arm/mach-exynos/mach-exynos5-dt.c |8 
  2 files changed, 39 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos5250.dtsi
 b/arch/arm/boot/dts/exynos5250.dtsi
 index 4272b29..b945c00 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -23,6 +23,13 @@
 compatible = samsung,exynos5250;
 interrupt-parent = gic;

 +   aliases {
 +   gsc0 = gsc_0;
 +   gsc1 = gsc_1;
 +   gsc2 = gsc_2;
 +   gsc3 = gsc_3;
 +   };
 +
 gic:interrupt-controller@10481000 {
 compatible = arm,cortex-a9-gic;
 #interrupt-cells = 3;
 @@ -424,4 +431,28 @@
 #gpio-cells = 4;
 };
 };
 +
 +   gsc_0:  gsc@0x13e0 {
 +   compatible = samsung,exynos-gsc;
 +   reg = 0x13e0 0x1000;
 +   interrupts = 0 85 0;
 +   };
 +
 +   gsc_1:  gsc@0x13e1 {
 +   compatible = samsung,exynos-gsc;
 +   reg = 0x13e1 0x1000;
 +   interrupts = 0 86 0;
 +   };
 +
 +   gsc_2:  gsc@0x13e2 {
 +   compatible = samsung,exynos-gsc;
 +   reg = 0x13e2 0x1000;
 +   interrupts = 0 87 0;
 +   };
 +
 +   gsc_3:  gsc@0x13e3 {
 +   compatible = samsung,exynos-gsc;
 +   reg = 0x13e3 0x1000;
 +   interrupts = 0 88 0;
 +   };
  };


 Please also update the documentaion for these bindings.


Ok. I will update the documentation in the v2 release for this patch.


 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 7b1e11a..76b081c 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -50,6 +50,14 @@ static const struct of_dev_auxdata
 exynos5250_auxdata_lookup[] __initconst = {
 OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA0, dma-pl330.0,
 NULL),
 OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA1, dma-pl330.1,
 NULL),
 OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_MDMA1, dma-pl330.2,
 NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E0,
 +   exynos-gsc.0, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E1,
 +   exynos-gsc.1, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E2,
 +   exynos-gsc.2, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E3,
 +   exynos-gsc.3, NULL),
 {},
  };

 --
 1.7.0.4

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 --
 With warm regards,
 Sachin

---
Regards,
Shaik Ameer Basha

Re: Re: [PATCH 1/2] ARM: EXYNOS5: Add clock support for Gscaler

2012-07-11 Thread AMEER BASHA SHAIK

Hi Sachin,


On Fri, Jul 6, 2012 at 8:30 PM, Sachin Kamat sachin.ka...@linaro.org wrote:
 Hi Shaik,

 Some nits:

 Patch subject: s/EXYNOS5/EXYNOS


OK. I will change this.

 On 6 July 2012 18:15, Shaik Ameer Basha shaik.am...@samsung.com wrote:
 Add required clock support for Gscaler for exynos5

 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Signed-off-by: Prathyush K prathyus...@samsung.com
 Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
 ---
  arch/arm/mach-exynos/clock-exynos5.c |   79 
 ++
  1 files changed, 79 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
 b/arch/arm/mach-exynos/clock-exynos5.c
 index fefa336..49f98cd 100644
 --- a/arch/arm/mach-exynos/clock-exynos5.c
 +++ b/arch/arm/mach-exynos/clock-exynos5.c
 @@ -741,6 +741,26 @@ static struct clk exynos5_init_clocks_off[] = {
 .enable = exynos5_clk_ip_peric_ctrl,
 .ctrlbit= (1  14),
 }, {
 +   .name   = gscl,
 +   .devname= exynos-gsc.0,
 +   .enable = exynos5_clk_ip_gscl_ctrl,
 +   .ctrlbit= (1  0),
 +   }, {
 +   .name   = gscl,
 +   .devname= exynos-gsc.1,
 +   .enable = exynos5_clk_ip_gscl_ctrl,
 +   .ctrlbit= (1  1),
 +   }, {
 +   .name   = gscl,
 +   .devname= exynos-gsc.2,
 +   .enable = exynos5_clk_ip_gscl_ctrl,
 +   .ctrlbit= (1  2),
 +   }, {
 +   .name   = gscl,
 +   .devname= exynos-gsc.3,
 +   .enable = exynos5_clk_ip_gscl_ctrl,
 +   .ctrlbit= (1  3),
 +   }, {
 .name   = SYSMMU_CLOCK_NAME,
 .devname= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),
 .enable = exynos5_clk_ip_mfc_ctrl,
 @@ -1116,6 +1136,61 @@ static struct clksrc_clk exynos5_clksrcs[] = {
 },
  };

 +/* For ACLK_300_gscl_mid */
 +static struct clksrc_clk exynos5_clk_mout_aclk_300_gscl_mid = {
 +   .clk= {
 +   .name   = mout_aclk_300_gscl_mid,
 +   },
 +   .sources = exynos5_clkset_aclk,
 +   .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 24, .size = 1 },
 +};
 +
 +/* For ACLK_300_gscl */
 +struct clk *exynos5_clkset_aclk_300_gscl_list[] = {
 +   [0] = exynos5_clk_mout_aclk_300_gscl_mid.clk,
 +   [1] = exynos5_clk_sclk_vpll.clk,
 +};
 +
 +struct clksrc_sources exynos5_clkset_aclk_300_gscl = {
 +   .sources= exynos5_clkset_aclk_300_gscl_list,
 +   .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_300_gscl_list),
 +};
 +
 +static struct clksrc_clk exynos5_clk_mout_aclk_300_gscl = {
 +   .clk= {
 +   .name   = mout_aclk_300_gscl,
 +   },
 +   .sources = exynos5_clkset_aclk_300_gscl,
 +   .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 25, .size = 1 },
 +};
 +
 +static struct clksrc_clk exynos5_clk_dout_aclk_300_gscl = {
 +   .clk= {
 +   .name   = dout_aclk_300_gscl,
 +   .parent = exynos5_clk_mout_aclk_300_gscl.clk,
 +   },
 +   .reg_div = { .reg = EXYNOS5_CLKDIV_TOP1, .shift = 12, .size = 3 },
 +};
 +
 +/* Possible clock sources for aclk_300_gscl_sub Mux */
 +static struct clk *clk_src_gscl_300_list[] = {
 +   [0] = clk_ext_xtal_mux,
 +   [1] = exynos5_clk_dout_aclk_300_gscl.clk,
 +};
 +
 +static struct clksrc_sources clk_src_gscl_300 = {
 +   .sources= clk_src_gscl_300_list,
 +   .nr_sources = ARRAY_SIZE(clk_src_gscl_300_list),
 +};
 +
 +static struct clksrc_clk exynos5_clk_aclk_300_gscl = {
 +   .clk= {
 +   .name   = aclk_300_gscl,
 +   },
 +   .sources = clk_src_gscl_300,
 +   .reg_src = { .reg = EXYNOS5_CLKSRC_TOP3, .shift = 10, .size = 1 },
 +};
 +
  /* Clock initialization code */
  static struct clksrc_clk *exynos5_sysclks[] = {
 exynos5_clk_mout_apll,
 @@ -1139,6 +1214,10 @@ static struct clksrc_clk *exynos5_sysclks[] = {
 exynos5_clk_aclk_266,
 exynos5_clk_aclk_200,
 exynos5_clk_aclk_166,
 +   exynos5_clk_mout_aclk_300_gscl_mid,
 +   exynos5_clk_mout_aclk_300_gscl,
 +   exynos5_clk_dout_aclk_300_gscl,
 +   exynos5_clk_aclk_300_gscl,
 exynos5_clk_aclk_66_pre,
 exynos5_clk_aclk_66,
 exynos5_clk_dout_mmc0,

 Please maintain the alphabetic order.

OK. I will re-order this.


 --
 1.7.0.4

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 --
 With warm regards,
 Sachin


---
Regards,
Shaik Ameer Basha

Re: [PATCH v5 5/6] spi: s3c64xx: Remove the 'set_level' callback from controller data

2012-07-11 Thread Mark Brown

On Wed, Jul 11, 2012 at 05:51:13PM +0530, Thomas Abraham wrote:

 Based on your comments to add the gpio request, only two patches 5/6
 and 6/6 in this series have changed since. I have cc'ed you in the
 other 4 patches as well. If you do not have those patches, please let
 me know, I will repost the whole series again. Thanks.

Please resend the full series.


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[PATCH v2 0/2] Add device tree and clock support for Gscaler.

2012-07-11 Thread Shaik Ameer Basha

This patch series adds clock support for Gscaler and device node
 entries for Gscaler on exynos5.

This patch is based on Kukjin Kim's (linux-samsung) for-next branch.
https://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

changes since v1:
- Addressed review comments from Sylwester Nawrocki
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg11177.html
- Addressed review comments from Sachin Kamat
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg11176.html
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg11178.html
 

Shaik Ameer Basha (2):
  ARM: EXYNOS: Add clock support for Gscaler
  ARM: EXYNOS: Add gscaler device from DT

 .../devicetree/bindings/media/exynos5-gsc.txt  |   16 
 arch/arm/boot/dts/exynos5250.dtsi  |   31 
 arch/arm/mach-exynos/clock-exynos5.c   |   79 
 arch/arm/mach-exynos/include/mach/map.h|3 +
 arch/arm/mach-exynos/mach-exynos5-dt.c |8 ++
 5 files changed, 137 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/exynos5-gsc.txt

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[PATCH v2 1/2] ARM: EXYNOS: Add clock support for Gscaler

2012-07-11 Thread Shaik Ameer Basha

Add required clock support for Gscaler for exynos5

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Prathyush K prathyus...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
 arch/arm/mach-exynos/clock-exynos5.c |   79 ++
 1 files changed, 79 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
b/arch/arm/mach-exynos/clock-exynos5.c
index fefa336..c8293a3 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -741,6 +741,26 @@ static struct clk exynos5_init_clocks_off[] = {
.enable = exynos5_clk_ip_peric_ctrl,
.ctrlbit= (1  14),
}, {
+   .name   = gscl,
+   .devname= exynos-gsc.0,
+   .enable = exynos5_clk_ip_gscl_ctrl,
+   .ctrlbit= (1  0),
+   }, {
+   .name   = gscl,
+   .devname= exynos-gsc.1,
+   .enable = exynos5_clk_ip_gscl_ctrl,
+   .ctrlbit= (1  1),
+   }, {
+   .name   = gscl,
+   .devname= exynos-gsc.2,
+   .enable = exynos5_clk_ip_gscl_ctrl,
+   .ctrlbit= (1  2),
+   }, {
+   .name   = gscl,
+   .devname= exynos-gsc.3,
+   .enable = exynos5_clk_ip_gscl_ctrl,
+   .ctrlbit= (1  3),
+   }, {
.name   = SYSMMU_CLOCK_NAME,
.devname= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),
.enable = exynos5_clk_ip_mfc_ctrl,
@@ -1116,6 +1136,61 @@ static struct clksrc_clk exynos5_clksrcs[] = {
},
 };
 
+/* For ACLK_300_gscl_mid */
+static struct clksrc_clk exynos5_clk_mout_aclk_300_gscl_mid = {
+   .clk= {
+   .name   = mout_aclk_300_gscl_mid,
+   },
+   .sources = exynos5_clkset_aclk,
+   .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 24, .size = 1 },
+};
+
+/* For ACLK_300_gscl */
+struct clk *exynos5_clkset_aclk_300_gscl_list[] = {
+   [0] = exynos5_clk_mout_aclk_300_gscl_mid.clk,
+   [1] = exynos5_clk_sclk_vpll.clk,
+};
+
+struct clksrc_sources exynos5_clkset_aclk_300_gscl = {
+   .sources= exynos5_clkset_aclk_300_gscl_list,
+   .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_300_gscl_list),
+};
+
+static struct clksrc_clk exynos5_clk_mout_aclk_300_gscl = {
+   .clk= {
+   .name   = mout_aclk_300_gscl,
+   },
+   .sources = exynos5_clkset_aclk_300_gscl,
+   .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 25, .size = 1 },
+};
+
+static struct clksrc_clk exynos5_clk_dout_aclk_300_gscl = {
+   .clk= {
+   .name   = dout_aclk_300_gscl,
+   .parent = exynos5_clk_mout_aclk_300_gscl.clk,
+   },
+   .reg_div = { .reg = EXYNOS5_CLKDIV_TOP1, .shift = 12, .size = 3 },
+};
+
+/* Possible clock sources for aclk_300_gscl_sub Mux */
+static struct clk *clk_src_gscl_300_list[] = {
+   [0] = clk_ext_xtal_mux,
+   [1] = exynos5_clk_dout_aclk_300_gscl.clk,
+};
+
+static struct clksrc_sources clk_src_gscl_300 = {
+   .sources= clk_src_gscl_300_list,
+   .nr_sources = ARRAY_SIZE(clk_src_gscl_300_list),
+};
+
+static struct clksrc_clk exynos5_clk_aclk_300_gscl = {
+   .clk= {
+   .name   = aclk_300_gscl,
+   },
+   .sources = clk_src_gscl_300,
+   .reg_src = { .reg = EXYNOS5_CLKSRC_TOP3, .shift = 10, .size = 1 },
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *exynos5_sysclks[] = {
exynos5_clk_mout_apll,
@@ -1139,6 +1214,10 @@ static struct clksrc_clk *exynos5_sysclks[] = {
exynos5_clk_aclk_266,
exynos5_clk_aclk_200,
exynos5_clk_aclk_166,
+   exynos5_clk_aclk_300_gscl,
+   exynos5_clk_dout_aclk_300_gscl,
+   exynos5_clk_mout_aclk_300_gscl,
+   exynos5_clk_mout_aclk_300_gscl_mid,
exynos5_clk_aclk_66_pre,
exynos5_clk_aclk_66,
exynos5_clk_dout_mmc0,
-- 
1.7.0.4

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[PATCH v2 2/2] ARM: EXYNOS: Add gscaler device from DT

2012-07-11 Thread Shaik Ameer Basha

This patch adds,
- 4 Gscaler devices to the DT device list
- Gscaler specific entries to the machine file
- binding documentation for Gscaler entries

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
 .../devicetree/bindings/media/exynos5-gsc.txt  |   16 ++
 arch/arm/boot/dts/exynos5250.dtsi  |   31 
 arch/arm/mach-exynos/include/mach/map.h|3 ++
 arch/arm/mach-exynos/mach-exynos5-dt.c |8 +
 4 files changed, 58 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/exynos5-gsc.txt

diff --git a/Documentation/devicetree/bindings/media/exynos5-gsc.txt 
b/Documentation/devicetree/bindings/media/exynos5-gsc.txt
new file mode 100644
index 000..f743c60
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/exynos5-gsc.txt
@@ -0,0 +1,16 @@
+* Samsung Exynos5 Gscaler device
+
+Gscaler is used for scaling and color space conversion on EXYNOS5 SoCs.
+
+Required properties:
+- compatible: should be samsung,exynos-gsc
+- reg: should contian Gsaler physical address location and length.
+- interrupts: should contain Gscaler interrupt number
+
+Example:
+
+gsc_0:  gsc@0x13e0 {
+   compatible = samsung,exynos-gsc;
+   reg = 0x13e0 0x1000;
+   interrupts = 0 85 0;
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 4272b29..b945c00 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -23,6 +23,13 @@
compatible = samsung,exynos5250;
interrupt-parent = gic;
 
+   aliases {
+   gsc0 = gsc_0;
+   gsc1 = gsc_1;
+   gsc2 = gsc_2;
+   gsc3 = gsc_3;
+   };
+
gic:interrupt-controller@10481000 {
compatible = arm,cortex-a9-gic;
#interrupt-cells = 3;
@@ -424,4 +431,28 @@
#gpio-cells = 4;
};
};
+
+   gsc_0:  gsc@0x13e0 {
+   compatible = samsung,exynos-gsc;
+   reg = 0x13e0 0x1000;
+   interrupts = 0 85 0;
+   };
+
+   gsc_1:  gsc@0x13e1 {
+   compatible = samsung,exynos-gsc;
+   reg = 0x13e1 0x1000;
+   interrupts = 0 86 0;
+   };
+
+   gsc_2:  gsc@0x13e2 {
+   compatible = samsung,exynos-gsc;
+   reg = 0x13e2 0x1000;
+   interrupts = 0 87 0;
+   };
+
+   gsc_3:  gsc@0x13e3 {
+   compatible = samsung,exynos-gsc;
+   reg = 0x13e3 0x1000;
+   interrupts = 0 88 0;
+   };
 };
diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index ca4aa89..e68d249 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -121,6 +121,9 @@
 #define EXYNOS4_PA_SYSMMU_MFC_L0x1362
 #define EXYNOS4_PA_SYSMMU_MFC_R0x1363
 
+/* x = 0...3 */
+#define EXYNOS5_PA_GSC(x)  (0x13e0 + ((x) * 0x1))
+
 #define EXYNOS5_PA_SYSMMU_MDMA10x10A4
 #define EXYNOS5_PA_SYSMMU_SSS  0x10A5
 #define EXYNOS5_PA_SYSMMU_2D   0x10A6
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 7b1e11a..9eb83b6 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -50,6 +50,14 @@ static const struct of_dev_auxdata 
exynos5250_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA0, dma-pl330.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA1, dma-pl330.1, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_MDMA1, dma-pl330.2, NULL),
+   OF_DEV_AUXDATA(samsung,exynos-gsc, EXYNOS5_PA_GSC(0),
+   exynos-gsc.0, NULL),
+   OF_DEV_AUXDATA(samsung,exynos-gsc, EXYNOS5_PA_GSC(1),
+   exynos-gsc.1, NULL),
+   OF_DEV_AUXDATA(samsung,exynos-gsc, EXYNOS5_PA_GSC(2),
+   exynos-gsc.2, NULL),
+   OF_DEV_AUXDATA(samsung,exynos-gsc, EXYNOS5_PA_GSC(3),
+   exynos-gsc.3, NULL),
{},
 };
 
-- 
1.7.0.4

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[PATCH v5 0/6] spi: s3c64xx: add support for device tree

2012-07-11 Thread Thomas Abraham

Changes since v4:
- Includes the missing gpio request for slave select line gpio as suggested
  by Mark Brown.

Changes since v3:
- Fixed the build breakage after applying 3rd patch in this series (which
  had dependency on the 6th patch). This was reported by Doug Anderson.

Changes since v2:
- Removed renaming of platform device name at runtime
- Includes other minor fixes suggested by Olof, Grant, Kukjin and Abhilash.
- Rebased to Linux 3.5-rc1

Changes since v1:
- Incorporated changes suggested by Mark Brown
 - Merged 2nd, 3rd and 5th patch into one single patch.
 - Listed the order of gpios in the device tree support documentation.
 - Switched to generic property names for chip select gpio line and
   number of slave select lines.
- Moved the platform enablement patches for Exynos4 and Exynos5 into a
 different patch series.
- Included Ack from Jaswinder Singh jaswinder.si...@linaro.org.

This patch series adds device tree based discovery support for Samsung's
s3c64xx compatible spi controller. This is mainly tested for Exynos4210
and Exynos5250 with onboard spi nor flash device.

The patch series (6 patches) that add board/platform specific support has
no changes since the v2 version. This series is available at:
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-May/100812.html

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[PATCH v5 1/6] spi: s3c64xx: remove unused S3C64XX_SPI_ST_TRLCNTZ macro

2012-07-11 Thread Thomas Abraham

The macro S3C64XX_SPI_ST_TRLCNTZ is not used and hence it is removed.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Jaswinder Singh jaswinder.si...@linaro.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
 drivers/spi/spi-s3c64xx.c |4 
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 3c36cfa..6e60eec 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -113,10 +113,6 @@
 
 #define S3C64XX_SPI_FBCLK_MSK  (30)
 
-#define S3C64XX_SPI_ST_TRLCNTZ(v, i) v)  (i)-rx_lvl_offset)  \
-   (((i)-fifo_lvl_mask + 1))) \
-   ? 1 : 0)
-
 #define S3C64XX_SPI_ST_TX_DONE(v, i) (((v)  (1  (i)-tx_st_done)) ? 1 : 0)
 #define TX_FIFO_LVL(v, i) (((v)  6)  (i)-fifo_lvl_mask)
 #define RX_FIFO_LVL(v, i) (((v)  (i)-rx_lvl_offset)  (i)-fifo_lvl_mask)
-- 
1.6.6.rc2

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[PATCH v5 2/6] spi: s3c64xx: move controller information into driver data

2012-07-11 Thread Thomas Abraham

Platform data is used to specify controller hardware specific information
such as the tx/rx fifo level mask and bit offset of rx fifo level. Such
information is not suitable to be supplied from device tree. Instead,
it can be moved into the driver data and removed from platform data.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Jaswinder Singh jaswinder.si...@linaro.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
 arch/arm/mach-exynos/clock-exynos4.c |   18 ++--
 arch/arm/mach-exynos/setup-spi.c |   25 
 arch/arm/mach-s3c24xx/clock-s3c2416.c|3 +-
 arch/arm/mach-s3c24xx/clock-s3c2443.c|2 +-
 arch/arm/mach-s3c24xx/common-s3c2443.c   |4 +-
 arch/arm/mach-s3c24xx/setup-spi.c|8 -
 arch/arm/mach-s3c64xx/clock.c|   20 ++--
 arch/arm/mach-s3c64xx/setup-spi.c|   13 --
 arch/arm/mach-s5p64x0/clock-s5p6440.c|   12 +-
 arch/arm/mach-s5p64x0/clock-s5p6450.c|   12 +-
 arch/arm/mach-s5p64x0/setup-spi.c|   16 ---
 arch/arm/mach-s5pc100/clock.c|   30 ++--
 arch/arm/mach-s5pc100/setup-spi.c|   22 ---
 arch/arm/mach-s5pv210/clock.c|   14 +-
 arch/arm/mach-s5pv210/setup-spi.c|   15 --
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |   15 --
 drivers/spi/spi-s3c64xx.c|  150 ++
 17 files changed, 181 insertions(+), 198 deletions(-)

diff --git a/arch/arm/mach-exynos/clock-exynos4.c 
b/arch/arm/mach-exynos/clock-exynos4.c
index bcb7db4..10a46a9 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -586,17 +586,17 @@ static struct clk exynos4_init_clocks_off[] = {
.ctrlbit= (1  13),
}, {
.name   = spi,
-   .devname= s3c64xx-spi.0,
+   .devname= exynos4210-spi.0,
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit= (1  16),
}, {
.name   = spi,
-   .devname= s3c64xx-spi.1,
+   .devname= exynos4210-spi.1,
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit= (1  17),
}, {
.name   = spi,
-   .devname= s3c64xx-spi.2,
+   .devname= exynos4210-spi.2,
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit= (1  18),
}, {
@@ -1245,7 +1245,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc3 = {
 static struct clksrc_clk exynos4_clk_sclk_spi0 = {
.clk= {
.name   = sclk_spi,
-   .devname= s3c64xx-spi.0,
+   .devname= exynos4210-spi.0,
.enable = exynos4_clksrc_mask_peril1_ctrl,
.ctrlbit= (1  16),
},
@@ -1257,7 +1257,7 @@ static struct clksrc_clk exynos4_clk_sclk_spi0 = {
 static struct clksrc_clk exynos4_clk_sclk_spi1 = {
.clk= {
.name   = sclk_spi,
-   .devname= s3c64xx-spi.1,
+   .devname= exynos4210-spi.1,
.enable = exynos4_clksrc_mask_peril1_ctrl,
.ctrlbit= (1  20),
},
@@ -1269,7 +1269,7 @@ static struct clksrc_clk exynos4_clk_sclk_spi1 = {
 static struct clksrc_clk exynos4_clk_sclk_spi2 = {
.clk= {
.name   = sclk_spi,
-   .devname= s3c64xx-spi.2,
+   .devname= exynos4210-spi.2,
.enable = exynos4_clksrc_mask_peril1_ctrl,
.ctrlbit= (1  24),
},
@@ -1347,9 +1347,9 @@ static struct clk_lookup exynos4_clk_lookup[] = {
CLKDEV_INIT(dma-pl330.0, apb_pclk, exynos4_clk_pdma0),
CLKDEV_INIT(dma-pl330.1, apb_pclk, exynos4_clk_pdma1),
CLKDEV_INIT(dma-pl330.2, apb_pclk, exynos4_clk_mdma1),
-   CLKDEV_INIT(s3c64xx-spi.0, spi_busclk0, exynos4_clk_sclk_spi0.clk),
-   CLKDEV_INIT(s3c64xx-spi.1, spi_busclk0, exynos4_clk_sclk_spi1.clk),
-   CLKDEV_INIT(s3c64xx-spi.2, spi_busclk0, exynos4_clk_sclk_spi2.clk),
+   CLKDEV_INIT(exynos4210-spi.0, spi_busclk0, 
exynos4_clk_sclk_spi0.clk),
+   CLKDEV_INIT(exynos4210-spi.1, spi_busclk0, 
exynos4_clk_sclk_spi1.clk),
+   CLKDEV_INIT(exynos4210-spi.2, spi_busclk0, 
exynos4_clk_sclk_spi2.clk),
 };
 
 static int xtal_rate;
diff --git a/arch/arm/mach-exynos/setup-spi.c b/arch/arm/mach-exynos/setup-spi.c
index 833ff40..a71ec4d 100644
--- a/arch/arm/mach-exynos/setup-spi.c
+++ b/arch/arm/mach-exynos/setup-spi.c
@@ -12,17 +12,8 @@
 #include linux/platform_device.h
 
 #include plat/gpio-cfg.h
-#include plat/s3c64xx-spi.h
 
 #ifdef CONFIG_S3C64XX_DEV_SPI0
-struct

[PATCH v5 3/6] ARM: Samsung: Remove pdev pointer parameter from spi gpio setup functions

2012-07-11 Thread Thomas Abraham

The platform data pointer that is passed to the spi gpio setup functions
is not used. Hence, this parameter is removed from all the spi gpio setup
functions.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Jaswinder Singh jaswinder.si...@linaro.org
---
 arch/arm/mach-exynos/setup-spi.c |8 +++-
 arch/arm/mach-s3c24xx/setup-spi.c|2 +-
 arch/arm/mach-s3c64xx/setup-spi.c|6 ++
 arch/arm/mach-s5p64x0/setup-spi.c|5 ++---
 arch/arm/mach-s5pc100/setup-spi.c|8 +++-
 arch/arm/mach-s5pv210/setup-spi.c|6 ++
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |8 
 drivers/spi/spi-s3c64xx.c|5 ++---
 8 files changed, 19 insertions(+), 29 deletions(-)

diff --git a/arch/arm/mach-exynos/setup-spi.c b/arch/arm/mach-exynos/setup-spi.c
index a71ec4d..4999829 100644
--- a/arch/arm/mach-exynos/setup-spi.c
+++ b/arch/arm/mach-exynos/setup-spi.c
@@ -9,12 +9,10 @@
  */
 
 #include linux/gpio.h
-#include linux/platform_device.h
-
 #include plat/gpio-cfg.h
 
 #ifdef CONFIG_S3C64XX_DEV_SPI0
-int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi0_cfg_gpio(void)
 {
s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2));
s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP);
@@ -25,7 +23,7 @@ int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
 #endif
 
 #ifdef CONFIG_S3C64XX_DEV_SPI1
-int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi1_cfg_gpio(void)
 {
s3c_gpio_cfgpin(EXYNOS4_GPB(4), S3C_GPIO_SFN(2));
s3c_gpio_setpull(EXYNOS4_GPB(4), S3C_GPIO_PULL_UP);
@@ -36,7 +34,7 @@ int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
 #endif
 
 #ifdef CONFIG_S3C64XX_DEV_SPI2
-int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi2_cfg_gpio(void)
 {
s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5));
s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP);
diff --git a/arch/arm/mach-s3c24xx/setup-spi.c 
b/arch/arm/mach-s3c24xx/setup-spi.c
index 42abe15..3d47e02 100644
--- a/arch/arm/mach-s3c24xx/setup-spi.c
+++ b/arch/arm/mach-s3c24xx/setup-spi.c
@@ -18,7 +18,7 @@
 #include mach/regs-gpio.h
 
 #ifdef CONFIG_S3C64XX_DEV_SPI0
-int s3c64xx_spi0_cfg_gpio(struct platform_device *pdev)
+int s3c64xx_spi0_cfg_gpio(void)
 {
/* enable hsspi bit in misccr */
s3c2410_modify_misccr(S3C2416_MISCCR_HSSPI_EN2, 1);
diff --git a/arch/arm/mach-s3c64xx/setup-spi.c 
b/arch/arm/mach-s3c64xx/setup-spi.c
index ff999d9..4dc5345 100644
--- a/arch/arm/mach-s3c64xx/setup-spi.c
+++ b/arch/arm/mach-s3c64xx/setup-spi.c
@@ -9,12 +9,10 @@
  */
 
 #include linux/gpio.h
-#include linux/platform_device.h
-
 #include plat/gpio-cfg.h
 
 #ifdef CONFIG_S3C64XX_DEV_SPI0
-int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi0_cfg_gpio(void)
 {
s3c_gpio_cfgall_range(S3C64XX_GPC(0), 3,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
@@ -23,7 +21,7 @@ int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
 #endif
 
 #ifdef CONFIG_S3C64XX_DEV_SPI1
-int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi1_cfg_gpio(void)
 {
s3c_gpio_cfgall_range(S3C64XX_GPC(4), 3,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
diff --git a/arch/arm/mach-s5p64x0/setup-spi.c 
b/arch/arm/mach-s5p64x0/setup-spi.c
index 1cf84b5..7664356 100644
--- a/arch/arm/mach-s5p64x0/setup-spi.c
+++ b/arch/arm/mach-s5p64x0/setup-spi.c
@@ -9,11 +9,10 @@
  */
 
 #include linux/gpio.h
-#include linux/platform_device.h
 #include plat/gpio-cfg.h
 
 #ifdef CONFIG_S3C64XX_DEV_SPI0
-int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi0_cfg_gpio(void)
 {
if (soc_is_s5p6450())
s3c_gpio_cfgall_range(S5P6450_GPC(0), 3,
@@ -26,7 +25,7 @@ int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
 #endif
 
 #ifdef CONFIG_S3C64XX_DEV_SPI1
-int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi1_cfg_gpio(void)
 {
if (soc_is_s5p6450())
s3c_gpio_cfgall_range(S5P6450_GPC(4), 3,
diff --git a/arch/arm/mach-s5pc100/setup-spi.c 
b/arch/arm/mach-s5pc100/setup-spi.c
index 4b42718..1835679 100644
--- a/arch/arm/mach-s5pc100/setup-spi.c
+++ b/arch/arm/mach-s5pc100/setup-spi.c
@@ -9,12 +9,10 @@
  */
 
 #include linux/gpio.h
-#include linux/platform_device.h
-
 #include plat/gpio-cfg.h
 
 #ifdef CONFIG_S3C64XX_DEV_SPI0
-int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi0_cfg_gpio(void)
 {
s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
@@ -23,7 +21,7 @@ int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
 #endif
 
 #ifdef CONFIG_S3C64XX_DEV_SPI1
-int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi1_cfg_gpio(void)
 {
s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,

[PATCH v5 4/6] ARM: Samsung: Modify s3c64xx_spi{0|1|2}_set_platdata function

2012-07-11 Thread Thomas Abraham

With the spi controller hardware configuration moved into the driver data, there
are no more default hardware configuration data that is passed through platform
data. Accordingly, the s3c64xx_spi{0|1|2}_set_platdata functions are adapted to
these changes.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Jaswinder Singh jaswinder.si...@linaro.org
---
 arch/arm/mach-s3c64xx/mach-crag6410.c|2 +-
 arch/arm/plat-samsung/devs.c |   60 -
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |   14 +++---
 3 files changed, 31 insertions(+), 45 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c 
b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 161c3b6..3627444 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -798,7 +798,7 @@ static void __init crag6410_machine_init(void)
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 
samsung_keypad_set_platdata(crag6410_keypad_data);
-   s3c64xx_spi0_set_platdata(s3c64xx_spi0_pdata, 0, 1);
+   s3c64xx_spi0_set_platdata(NULL, 0, 1);
 
platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
 
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 1d214cb..86d0758 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1512,7 +1512,7 @@ static struct resource s3c64xx_spi0_resource[] = {
 };
 
 struct platform_device s3c64xx_device_spi0 = {
-   .name   = s3c64xx-spi,
+   .name   = s3c6410-spi,
.id = 0,
.num_resources  = ARRAY_SIZE(s3c64xx_spi0_resource),
.resource   = s3c64xx_spi0_resource,
@@ -1522,13 +1522,10 @@ struct platform_device s3c64xx_device_spi0 = {
},
 };
 
-void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
- int src_clk_nr, int num_cs)
+void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
+   int num_cs)
 {
-   if (!pd) {
-   pr_err(%s:Need to pass platform data\n, __func__);
-   return;
-   }
+   struct s3c64xx_spi_info pd;
 
/* Reject invalid configuration */
if (!num_cs || src_clk_nr  0) {
@@ -1536,12 +1533,11 @@ void __init s3c64xx_spi0_set_platdata(struct 
s3c64xx_spi_info *pd,
return;
}
 
-   pd-num_cs = num_cs;
-   pd-src_clk_nr = src_clk_nr;
-   if (!pd-cfg_gpio)
-   pd-cfg_gpio = s3c64xx_spi0_cfg_gpio;
+   pd.num_cs = num_cs;
+   pd.src_clk_nr = src_clk_nr;
+   pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
 
-   s3c_set_platdata(pd, sizeof(*pd), s3c64xx_device_spi0);
+   s3c_set_platdata(pd, sizeof(pd), s3c64xx_device_spi0);
 }
 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
 
@@ -1554,7 +1550,7 @@ static struct resource s3c64xx_spi1_resource[] = {
 };
 
 struct platform_device s3c64xx_device_spi1 = {
-   .name   = s3c64xx-spi,
+   .name   = s3c6410-spi,
.id = 1,
.num_resources  = ARRAY_SIZE(s3c64xx_spi1_resource),
.resource   = s3c64xx_spi1_resource,
@@ -1564,26 +1560,20 @@ struct platform_device s3c64xx_device_spi1 = {
},
 };
 
-void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
- int src_clk_nr, int num_cs)
+void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
+   int num_cs)
 {
-   if (!pd) {
-   pr_err(%s:Need to pass platform data\n, __func__);
-   return;
-   }
-
/* Reject invalid configuration */
if (!num_cs || src_clk_nr  0) {
pr_err(%s: Invalid SPI configuration\n, __func__);
return;
}
 
-   pd-num_cs = num_cs;
-   pd-src_clk_nr = src_clk_nr;
-   if (!pd-cfg_gpio)
-   pd-cfg_gpio = s3c64xx_spi1_cfg_gpio;
+   pd.num_cs = num_cs;
+   pd.src_clk_nr = src_clk_nr;
+   pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
 
-   s3c_set_platdata(pd, sizeof(*pd), s3c64xx_device_spi1);
+   s3c_set_platdata(pd, sizeof(pd), s3c64xx_device_spi1);
 }
 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
 
@@ -1596,7 +1586,7 @@ static struct resource s3c64xx_spi2_resource[] = {
 };
 
 struct platform_device s3c64xx_device_spi2 = {
-   .name   = s3c64xx-spi,
+   .name   = s3c6410-spi,
.id = 2,
.num_resources  = ARRAY_SIZE(s3c64xx_spi2_resource),
.resource   = s3c64xx_spi2_resource,
@@ -1606,13 +1596,10 @@ struct platform_device s3c64xx_device_spi2 = {
},
 };
 
-void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
- int src_clk_nr, int num_cs)
+void __init s3c64xx_spi2_set_platdata(int

[PATCH v5 5/6] spi: s3c64xx: Remove the 'set_level' callback from controller data

2012-07-11 Thread Thomas Abraham

The set_level callback in the controller data, which is used to configure
the slave select line, cannot be supported when migrating the driver to
device tree based discovery. Since all the platforms currently use gpio
as the slave select line, this callback can be removed from the
controller data and replaced with call to gpio_set_value in the driver.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Jaswinder Singh jaswinder.si...@linaro.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |2 -
 drivers/spi/spi-s3c64xx.c|   31 ++---
 2 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h 
b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index c818a7c..ceba18d 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -18,7 +18,6 @@ struct platform_device;
  * @fb_delay: Slave specific feedback delay.
  *Refer to FB_CLK_SEL register definition in SPI chapter.
  * @line: Custom 'identity' of the CS line.
- * @set_level: CS line control.
  *
  * This is per SPI-Slave Chipselect information.
  * Allocate and initialize one in machine init code and make the
@@ -27,7 +26,6 @@ struct platform_device;
 struct s3c64xx_spi_csinfo {
u8 fb_delay;
unsigned line;
-   void (*set_level)(unsigned line_id, int lvl);
 };
 
 /**
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 0a9e43e..e4182ea 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -27,6 +27,7 @@
 #include linux/platform_device.h
 #include linux/pm_runtime.h
 #include linux/spi/spi.h
+#include linux/gpio.h
 
 #include mach/dma.h
 #include plat/s3c64xx-spi.h
@@ -411,14 +412,14 @@ static inline void enable_cs(struct 
s3c64xx_spi_driver_data *sdd,
if (sdd-tgl_spi != spi) { /* if last mssg on diff device */
/* Deselect the last toggled device */
cs = sdd-tgl_spi-controller_data;
-   cs-set_level(cs-line,
-   spi-mode  SPI_CS_HIGH ? 0 : 1);
+   gpio_set_value(cs-line,
+   spi-mode  SPI_CS_HIGH ? 0 : 1);
}
sdd-tgl_spi = NULL;
}
 
cs = spi-controller_data;
-   cs-set_level(cs-line, spi-mode  SPI_CS_HIGH ? 1 : 0);
+   gpio_set_value(cs-line, spi-mode  SPI_CS_HIGH ? 1 : 0);
 }
 
 static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd,
@@ -504,7 +505,7 @@ static inline void disable_cs(struct 
s3c64xx_spi_driver_data *sdd,
if (sdd-tgl_spi == spi)
sdd-tgl_spi = NULL;
 
-   cs-set_level(cs-line, spi-mode  SPI_CS_HIGH ? 0 : 1);
+   gpio_set_value(cs-line, spi-mode  SPI_CS_HIGH ? 0 : 1);
 }
 
 static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
@@ -833,11 +834,21 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
unsigned long flags;
int err = 0;
 
-   if (cs == NULL || cs-set_level == NULL) {
+   if (cs == NULL) {
dev_err(spi-dev, No CS for SPI(%d)\n, spi-chip_select);
return -ENODEV;
}
 
+   if (!spi_get_ctldata(spi)) {
+   err = gpio_request(cs-line, dev_name(spi-dev));
+   if (err) {
+   dev_err(spi-dev, request for slave select gpio 
+   line [%d] failed\n, cs-line);
+   return -EBUSY;
+   }
+   spi_set_ctldata(spi, cs);
+   }
+
sdd = spi_master_get_devdata(spi-master);
sci = sdd-cntrlr_info;
 
@@ -908,6 +919,15 @@ setup_exit:
return err;
 }
 
+static void s3c64xx_spi_cleanup(struct spi_device *spi)
+{
+   struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi);
+
+   if (cs)
+   gpio_free(cs-line);
+   spi_set_ctldata(spi, NULL);
+}
+
 static irqreturn_t s3c64xx_spi_irq(int irq, void *data)
 {
struct s3c64xx_spi_driver_data *sdd = data;
@@ -1049,6 +1069,7 @@ static int __init s3c64xx_spi_probe(struct 
platform_device *pdev)
 
master-bus_num = sdd-port_id;
master-setup = s3c64xx_spi_setup;
+   master-cleanup = s3c64xx_spi_cleanup;
master-prepare_transfer_hardware = s3c64xx_spi_prepare_transfer;
master-transfer_one_message = s3c64xx_spi_transfer_one_message;
master-unprepare_transfer_hardware = s3c64xx_spi_unprepare_transfer;
-- 
1.6.6.rc2

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[PATCH v5 6/6] spi: s3c64xx: add device tree support

2012-07-11 Thread Thomas Abraham

Add support for device based discovery.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Jaswinder Singh jaswinder.si...@linaro.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
 .../devicetree/bindings/spi/spi-samsung.txt|  113 
 drivers/spi/spi-s3c64xx.c  |  305 +---
 2 files changed, 378 insertions(+), 40 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-samsung.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-samsung.txt 
b/Documentation/devicetree/bindings/spi/spi-samsung.txt
new file mode 100644
index 000..59bfc4f
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-samsung.txt
@@ -0,0 +1,113 @@
+* Samsung SPI Controller
+
+The Samsung SPI controller is used to interface with various devices such as 
flash
+and display controllers using the SPI communication interface.
+
+Required SoC Specific Properties:
+
+- compatible: should be one of the following.
+- samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
+- samsung,s3c6410-spi: for s3c6410 platforms
+- samsung,s5p6440-spi: for s5p6440 and s5p6450 platforms
+- samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
+- samsung,exynos4210-spi: for exynos4 and exynos5 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+- interrupts: The interrupt number to the cpu. The interrupt specifier format
+  depends on the interrupt controller.
+
+- tx-dma-channel: The dma channel specifier for tx operations. The format of
+  the dma specifier depends on the dma controller.
+
+- rx-dma-channel: The dma channel specifier for rx operations. The format of
+  the dma specifier depends on the dma controller.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- gpios: The gpio specifier for clock, mosi and miso interface lines (in the
+  order specified). The format of the gpio specifier depends on the gpio
+  controller.
+
+Optional Board Specific Properties:
+
+- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
+  select the clock source for the spi bus clock, this property can be used to
+  indicate the clock to be used for driving the spi bus clock. If not 
specified,
+  the clock number 0 is used as default.
+
+- num-cs: Specifies the number of chip select lines supported. If
+  not specified, the default number of chip select lines is set to 1.
+
+SPI Controller specific data in SPI slave nodes:
+
+- The spi slave nodes should provide the following information which is 
required
+  by the spi controller.
+
+  - cs-gpio: A gpio specifier that specifies the gpio line used as
+the slave select line by the spi controller. The format of the gpio
+specifier depends on the gpio controller.
+
+  - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
+miso line (to account for any lag in the miso line). The following are the
+valid values.
+
+  - 0: No phase shift.
+  - 1: 90 degree phase shift sampling.
+  - 2: 180 degree phase shift sampling.
+  - 3: 270 degree phase shift sampling.
+
+Aliases:
+
+- All the SPI controller nodes should be represented in the aliases node using
+  the following format 'spi{n}' where n is a unique number for the alias.
+
+
+Example:
+
+- SoC Specific Portion:
+
+   spi_0: spi@12d2 {
+   compatible = samsung,exynos4210-spi;
+   reg = 0x12d2 0x100;
+   interrupts = 0 66 0;
+   tx-dma-channel = pdma0 5;
+   rx-dma-channel = pdma0 4;
+   };
+
+- Board Specific Portion:
+
+   spi_0: spi@12d2 {
+   #address-cells = 1;
+   #size-cells = 0;
+   gpios = gpa2 4 2 3 0,
+   gpa2 6 2 3 0,
+   gpa2 7 2 3 0;
+
+   w25q80bw@0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = w25x80;
+   reg = 0;
+   spi-max-frequency = 1;
+
+   controller-data {
+   cs-gpio = gpa2 5 1 0 3;
+   samsung,spi-feedback-delay = 0;
+   };
+
+   partition@0 {
+   label = U-Boot;
+   reg = 0x0 0x4;
+   read-only;
+   };
+
+   partition@4 {
+   label = Kernel;
+   reg = 0x4 0xc;
+   };
+   };
+   };
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index e4182ea..6c15f05 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -28,6 +28,8 @@
 #include linux/pm_runtime.h
 #include

Re: [PATCH v5 5/6] spi: s3c64xx: Remove the 'set_level' callback from controller data

2012-07-11 Thread Thomas Abraham

On 11 July 2012 19:01, Mark Brown broo...@opensource.wolfsonmicro.com wrote:
 On Wed, Jul 11, 2012 at 05:51:13PM +0530, Thomas Abraham wrote:

 Based on your comments to add the gpio request, only two patches 5/6
 and 6/6 in this series have changed since. I have cc'ed you in the
 other 4 patches as well. If you do not have those patches, please let
 me know, I will repost the whole series again. Thanks.

 Please resend the full series.

The full series (6 patches) has been re-posted as v5 version.
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Re: [PATCH v5 0/6] spi: s3c64xx: add support for device tree

2012-07-11 Thread Mark Brown

On Wed, Jul 11, 2012 at 09:10:59PM +0530, Thomas Abraham wrote:
 Changes since v4:
 - Includes the missing gpio request for slave select line gpio as suggested
   by Mark Brown.

These looked OK (and have had quite a bit of review already so we're
probably at the stage where incremental fixes are better anyway) so I
tried to apply them but git am was really unhappy.  I tried applying on

  git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc.git spi-next

and -next.  Can you check what's going on here please?


signature.asc
Description: Digital signature

Re: [PATCH v5 0/6] spi: s3c64xx: add support for device tree

2012-07-11 Thread Thomas Abraham

On 11 July 2012 23:19, Mark Brown broo...@opensource.wolfsonmicro.com wrote:
 On Wed, Jul 11, 2012 at 09:10:59PM +0530, Thomas Abraham wrote:
 Changes since v4:
 - Includes the missing gpio request for slave select line gpio as suggested
   by Mark Brown.

 These looked OK (and have had quite a bit of review already so we're
 probably at the stage where incremental fixes are better anyway) so I
 tried to apply them but git am was really unhappy.  I tried applying on

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc.git spi-next

 and -next.  Can you check what's going on here please?

These patches were based on Samsung maintainer's for-next branch with
Grant's spi/next branch merged. I will check with your spi-next
branch. Thanks.
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Re: [PATCH 2/2] ARM: EXYNOS5: Add gscalar device from DT

2012-07-11 Thread Sylwester Nawrocki

Hi Shaik,

On 07/11/2012 03:06 PM, AMEER BASHA SHAIK wrote:
 diff --git a/arch/arm/boot/dts/exynos5250.dtsi
 b/arch/arm/boot/dts/exynos5250.dtsi
 index 4272b29..b945c00 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -23,6 +23,13 @@
  compatible = samsung,exynos5250;
  interrupt-parent =gic;

 +   aliases {
 +   gsc0 =gsc_0;
 +   gsc1 =gsc_1;
 +   gsc2 =gsc_2;
 +   gsc3 =gsc_3;
 +   };
 +


 What are these aliases useful for ?
 
 GScaler driver uses the of_alias_get_id() call to retrieve the device IDs, 
 which
 internally uses these aliases...

Yeah, just figured it out already... I didn't know then it was a preferred
way to represent device IDs in DT. I looked at the driver's code and it
seemed slightly incorrect to me. Let me comment on the relevant patch shortly.

Would be good to have things like this documented in the GScaler bindings
documentation. These aliases seem quite essential for the driver to work.

 Also I think all DT related patches should be posted to
 devicetree-disc...@lists.ozlabs.org as well.

 
 I will post the v2 version of this patch to the specified mailing list.
 

  gic:interrupt-controller@10481000 {
  compatible = arm,cortex-a9-gic;
  #interrupt-cells =3;
 @@ -424,4 +431,28 @@
  #gpio-cells =4;
  };
  };
 +
 +   gsc_0:  gsc@0x13e0 {
 +   compatible = samsung,exynos-gsc;
 +   reg =0x13e0 0x1000;
 +   interrupts =0 85 0;
 +   };
 +
 +   gsc_1:  gsc@0x13e1 {
 +   compatible = samsung,exynos-gsc;
 +   reg =0x13e1 0x1000;
 +   interrupts =0 86 0;
 +   };
 +
 +   gsc_2:  gsc@0x13e2 {
 +   compatible = samsung,exynos-gsc;
 +   reg =0x13e2 0x1000;
 +   interrupts =0 87 0;
 +   };
 +
 +   gsc_3:  gsc@0x13e3 {
 +   compatible = samsung,exynos-gsc;
 +   reg =0x13e3 0x1000;
 +   interrupts =0 88 0;
 +   };
};
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 7b1e11a..76b081c 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -50,6 +50,14 @@ static const struct of_dev_auxdata
 exynos5250_auxdata_lookup[] __initconst = {
  OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA0, dma-pl330.0,
 NULL),
  OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA1, dma-pl330.1,
 NULL),
  OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_MDMA1, dma-pl330.2,
 NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E0,
 +   exynos-gsc.0, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E1,
 +   exynos-gsc.1, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E2,
 +   exynos-gsc.2, NULL),
 +   OF_DEV_AUXDATA(samsung,exynos-gsc, 0x13E3,
 +   exynos-gsc.3, NULL),


 It's probably better to add relevant entry at
 arch/arm/mach-exynos/include/mach/map. It's just a one line, e.g.

 /* x = 0...3 */
 #define EXYNOS5_PA_GSC(x)   (0x13e0 + ((x) * 0x1))

 And use it here instead of plain numbers.
 
 OK. will address these comments in v2.

Thanks.

--
Regards,
Sylwester

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[PATCH] ARM: samsung: adc: fix race in s3c_adc_start

2012-07-11 Thread Todd Poynor

Checking for adc-ts_pend already claimed should be done with the
lock held.

Change-Id: Ic9f15e26bd19934ab8c2885ce5df265933ac304a
Signed-off-by: Todd Poynor toddpoy...@google.com
---
 arch/arm/plat-samsung/adc.c |8 +---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index 33ecd0c..b1e05cc 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -157,11 +157,13 @@ int s3c_adc_start(struct s3c_adc_client *client,
return -EINVAL;
}
 
-   if (client-is_ts  adc-ts_pend)
-   return -EAGAIN;
-
spin_lock_irqsave(adc-lock, flags);
 
+   if (client-is_ts  adc-ts_pend) {
+   spin_unlock_irqrestore(adc-lock, flags);
+   return -EAGAIN;
+   }
+
client-channel = channel;
client-nr_samples = nr_samples;
 
-- 
1.7.7.3

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Re: [PATCH v4 1/5] thermal: Add generic cpufreq cooling implementation

2012-07-11 Thread amit kachhap

On Tue, Jul 10, 2012 at 12:31 PM, Hongbo Zhang hongbo.zh...@linaro.org wrote:


 On 12 May 2012 17:40, Amit Daniel Kachhap amit.kach...@linaro.org wrote:

 This patch adds support for generic cpu thermal cooling low level
 implementations using frequency scaling up/down based on the registration
 parameters. Different cpu related cooling devices can be registered by the
 user and the binding of these cooling devices to the corresponding
 trip points can be easily done as the registration APIs return the
 cooling device pointer. The user of these APIs are responsible for
 passing clipping frequency . The drivers can also register to recieve
 notification about any cooling action called.

 Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
 ---
  Documentation/thermal/cpu-cooling-api.txt |   60 
  drivers/thermal/Kconfig   |   11 +
  drivers/thermal/Makefile  |3 +-
  drivers/thermal/cpu_cooling.c |  483
 +
  include/linux/cpu_cooling.h   |   99 ++
  5 files changed, 655 insertions(+), 1 deletions(-)
  create mode 100644 Documentation/thermal/cpu-cooling-api.txt
  create mode 100644 drivers/thermal/cpu_cooling.c
  create mode 100644 include/linux/cpu_cooling.h

 diff --git a/Documentation/thermal/cpu-cooling-api.txt
 b/Documentation/thermal/cpu-cooling-api.txt
 new file mode 100644
 index 000..557adb8
 --- /dev/null
 +++ b/Documentation/thermal/cpu-cooling-api.txt
 @@ -0,0 +1,60 @@
 +CPU cooling APIs How To
 +===
 +
 +Written by Amit Daniel Kachhap amit.kach...@linaro.org
 +
 +Updated: 12 May 2012
 +
 +Copyright (c)  2012 Samsung Electronics Co., Ltd(http://www.samsung.com)
 +
 +0. Introduction
 +
 +The generic cpu cooling(freq clipping, cpuhotplug etc) provides
 +registration/unregistration APIs to the caller. The binding of the
 cooling
 +devices to the trip point is left for the user. The registration APIs
 returns
 +the cooling device pointer.
 +
 +1. cpu cooling APIs
 +
 +1.1 cpufreq registration/unregistration APIs
 +1.1.1 struct thermal_cooling_device *cpufreq_cooling_register(
 +   struct freq_clip_table *tab_ptr, unsigned int tab_size)
 +
 +This interface function registers the cpufreq cooling device with the
 name
 +thermal-cpufreq-%x. This api can support multiple instances of
 cpufreq
 +cooling devices.
 +
 +tab_ptr: The table containing the maximum value of frequency to be
 clipped
 +for each cooling state.
 +   .freq_clip_max: Value of frequency to be clipped for each allowed
 +cpus.
 +   .temp_level: Temperature level at which the frequency clamping
 will
 +   happen.
 +   .mask_val: cpumask of the allowed cpu's
 +tab_size: the total number of cpufreq cooling states.
 +
 +1.1.2 void cpufreq_cooling_unregister(struct thermal_cooling_device
 *cdev)
 +
 +This interface function unregisters the thermal-cpufreq-%x cooling
 device.
 +
 +cdev: Cooling device pointer which has to be unregistered.
 +
 +
 +1.2 CPU cooling action notifier register/unregister interface
 +1.2.1 int cputherm_register_notifier(struct notifier_block *nb,
 +   unsigned int list)
 +
 +This interface registers a driver with cpu cooling layer. The driver
 will
 +be notified when any cpu cooling action is called.
 +
 +nb: notifier function to register
 +list: CPUFREQ_COOLING_START or CPUFREQ_COOLING_STOP
 +
 +1.2.2 int cputherm_unregister_notifier(struct notifier_block *nb,
 +   unsigned int list)
 +
 +This interface registers a driver with cpu cooling layer. The driver
 will
 +be notified when any cpu cooling action is called.
 +
 +nb: notifier function to register
 +list: CPUFREQ_COOLING_START or CPUFREQ_COOLING_STOP
 diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
 index 514a691..d9c529f 100644
 --- a/drivers/thermal/Kconfig
 +++ b/drivers/thermal/Kconfig
 @@ -19,6 +19,17 @@ config THERMAL_HWMON
 depends on HWMON=y || HWMON=THERMAL
 default y

 +config CPU_THERMAL
 +   bool generic cpu cooling support
 +   depends on THERMAL  CPU_FREQ
 +   help
 + This implements the generic cpu cooling mechanism through
 frequency
 + reduction, cpu hotplug and any other ways of reducing
 temperature. An
 + ACPI version of this already
 exists(drivers/acpi/processor_thermal.c).
 + This will be useful for platforms using the generic thermal
 interface
 + and not the ACPI interface.
 + If you want this support, you should say Y or M here.
 +
  config SPEAR_THERMAL
 bool SPEAr thermal sensor driver
 depends on THERMAL
 diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
 index a9fff0b..30c456c 100644
 --- a/drivers/thermal/Makefile
 +++ b/drivers/thermal/Makefile
 @@ -3,4 +3,5 @@
  #

  obj-$(CONFIG_THERMAL)  += thermal_sys.o
 -obj-$(CONFIG_SPEAR_THERMAL)+= spear_thermal.o

[PATCH] ARM: Exynos: Add device tree node for Exynos4 interrupt combiner controller

2012-07-11 Thread Thomas Abraham

Add node for Exynos4 interrupt combiner controller.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 arch/arm/boot/dts/exynos4210.dtsi |   11 +++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index a1dd2ee..0e4f659 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -33,6 +33,17 @@
reg = 0x1049 0x1000, 0x1048 0x100;
};
 
+   combiner:interrupt-controller@1044 {
+   compatible = samsung,exynos4210-combiner;
+   interrupt-controller;
+   #interrupt-cells = 2;
+   reg = 0x1044 0x1000;
+   interrupts = 0 0 0, 0 1 0, 0 2 0, 0 3 0,
+0 4 0, 0 5 0, 0 6 0, 0 7 0,
+0 8 0, 0 9 0, 0 10 0, 0 11 0,
+0 12 0, 0 13 0, 0 14 0, 0 15 0;
+   };
+
watchdog@1006 {
compatible = samsung,s3c2410-wdt;
reg = 0x1006 0x100;
-- 
1.6.6.rc2

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