[PATCH] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support

2012-09-03 Thread Taehun Kim
This patch adds WIZnet W5300E01 board. I tested this code in the board.
Please review this patch and apply it if do not have any problems.

Taehun kim

Signed-off-by: Taehun Kim kth3...@gmail.com
---
 arch/arm/mach-s3c24xx/Kconfig |5 +
 arch/arm/mach-s3c24xx/Makefile|1 +
 arch/arm/mach-s3c24xx/mach-w5300e01.c |  186 +
 3 files changed, 192 insertions(+)
 create mode 100644 arch/arm/mach-s3c24xx/mach-w5300e01.c

diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index d56b0f7..94b60ca 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -248,6 +248,11 @@ config MACH_VR1000
help
  Say Y here if you are using the Thorcom VR1000 board.
 
+config MACH_W5300E01
+   bool WIZnet W5300E01-ARM Board
+   help
+ Say Y here if you are using the Wiznet W5300E01-ARM board.
+
 endif  # CPU_S3C2410
 
 config S3C2412_PM_SLEEP
diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile
index 0ab6ab1..fc1a89e 100644
--- a/arch/arm/mach-s3c24xx/Makefile
+++ b/arch/arm/mach-s3c24xx/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o
 obj-$(CONFIG_ARCH_SMDK2410)+= mach-smdk2410.o
 obj-$(CONFIG_MACH_TCT_HAMMER)  += mach-tct_hammer.o
 obj-$(CONFIG_MACH_VR1000)  += mach-vr1000.o
+obj-$(CONFIG_MACH_W5300E01)+= mach-w5300e01.o
 
 obj-$(CONFIG_MACH_JIVE)+= mach-jive.o
 obj-$(CONFIG_MACH_SMDK2413)+= mach-smdk2413.o
diff --git a/arch/arm/mach-s3c24xx/mach-w5300e01.c 
b/arch/arm/mach-s3c24xx/mach-w5300e01.c
new file mode 100644
index 000..5ed79f5
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/mach-w5300e01.c
@@ -0,0 +1,186 @@
+/* linux/arch/arm/mach-s3c24xx/mach-w5300e01.c
+ *
+ * Copyright (c) 2012 Taehun Kim kth3...@gmail.com
+ *
+ * For product information, visit http://www.wiznet.co.kr/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * @History:
+ * derived from linux/arch/arm/mach-s3c24xx/mach-bast.c, written by
+ * Ben Dooks b...@simtec.co.uk
+ */
+
+#include linux/kernel.h
+#include linux/types.h
+#include linux/interrupt.h
+#include linux/list.h
+#include linux/timer.h
+#include linux/init.h
+#include linux/serial_core.h
+#include linux/platform_device.h
+#include linux/gpio.h
+#include linux/io.h
+#include linux/mtd/mtd.h
+#include linux/mtd/nand.h
+#include linux/mtd/map.h
+#include linux/mtd/partitions.h
+
+#include asm/mach/arch.h
+#include asm/mach/map.h
+#include asm/mach/irq.h
+#include asm/mach-types.h
+
+#include mach/regs-gpio.h
+#include plat/gpio-cfg.h
+#include plat/cpu.h
+#include plat/devs.h
+#include plat/regs-serial.h
+#include plat/nand.h
+#include plat/pm.h
+
+static struct map_desc w5300e01_iodesc[] __initdata = {
+   /* Character LCD register map. */
+   { 0xf800, __phys_to_pfn(S3C2410_CS3), SZ_1M, MT_DEVICE }
+};
+
+#define UCON S3C2410_UCON_DEFAULT
+#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
+#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
+
+static struct s3c2410_uartcfg w5300e01_uartcfgs[] __initdata = {
+   [0] = {
+   .hwport  = 0,
+   .flags   = 0,
+   .ucon= UCON,
+   .ulcon   = ULCON,
+   .ufcon   = UFCON,
+   },
+   [1] = {
+   .hwport  = 1,
+   .flags   = 0,
+   .ucon= UCON,
+   .ulcon   = ULCON,
+   .ufcon   = UFCON,
+   },
+   [2] = {
+   .hwport  = 2,
+   .flags   = 0,
+   .ucon= UCON,
+   .ulcon   = ULCON,
+   .ufcon   = UFCON,
+   }
+};
+
+static struct mtd_partition w5300e01_mtd_partitions[] = {
+   [0] = {
+   .name   = Bootloader,
+   .size   = 0x2,
+   .offset = 0,
+   .mask_flags = MTD_WRITEABLE,
+   },
+   [1] = {
+   .name   = Boot Param,
+   .size   = 0x2,
+   .offset = MTDPART_OFS_APPEND,
+   },
+   [2] = {
+   .name   = Kernel,
+   .size   = 0x3C,
+   .offset = MTDPART_OFS_APPEND,
+   },
+   [3] = {
+   .name   = Ramdisk,
+   .size   = 0x100,
+   .offset = MTDPART_OFS_APPEND,
+   },
+   [4] = {
+   .name   = JFFS2 FileSystem,
+   .size   = MTDPART_SIZ_FULL,
+   .offset = MTDPART_OFS_APPEND,
+   },
+};
+
+static struct resource w5300_resources[] = {
+   [0] = {
+   .start  = S3C2410_CS2,
+   .end= S3C2410_CS2 + SZ_1M,
+   .flags  = IORESOURCE_MEM,
+   },

Re: [PATCH] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support

2012-09-03 Thread Vasily Khoruzhick
On Mon, Sep 3, 2012 at 9:20 AM, Taehun Kim kth3...@gmail.com wrote:
 This patch adds WIZnet W5300E01 board. I tested this code in the board.
 Please review this patch and apply it if do not have any problems.

Hi,

 Taehun kim

 Signed-off-by: Taehun Kim kth3...@gmail.com
 ---
  arch/arm/mach-s3c24xx/Kconfig |5 +
  arch/arm/mach-s3c24xx/Makefile|1 +
  arch/arm/mach-s3c24xx/mach-w5300e01.c |  186 
 +
  3 files changed, 192 insertions(+)
  create mode 100644 arch/arm/mach-s3c24xx/mach-w5300e01.c

 diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
 index d56b0f7..94b60ca 100644
 --- a/arch/arm/mach-s3c24xx/Kconfig
 +++ b/arch/arm/mach-s3c24xx/Kconfig
 @@ -248,6 +248,11 @@ config MACH_VR1000
 help
   Say Y here if you are using the Thorcom VR1000 board.

 +config MACH_W5300E01
 +   bool WIZnet W5300E01-ARM Board
 +   help
 + Say Y here if you are using the Wiznet W5300E01-ARM board.
 +
  endif  # CPU_S3C2410

  config S3C2412_PM_SLEEP
 diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile
 index 0ab6ab1..fc1a89e 100644
 --- a/arch/arm/mach-s3c24xx/Makefile
 +++ b/arch/arm/mach-s3c24xx/Makefile
 @@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o
  obj-$(CONFIG_ARCH_SMDK2410)+= mach-smdk2410.o
  obj-$(CONFIG_MACH_TCT_HAMMER)  += mach-tct_hammer.o
  obj-$(CONFIG_MACH_VR1000)  += mach-vr1000.o
 +obj-$(CONFIG_MACH_W5300E01)+= mach-w5300e01.o

  obj-$(CONFIG_MACH_JIVE)+= mach-jive.o
  obj-$(CONFIG_MACH_SMDK2413)+= mach-smdk2413.o
 diff --git a/arch/arm/mach-s3c24xx/mach-w5300e01.c 
 b/arch/arm/mach-s3c24xx/mach-w5300e01.c
 new file mode 100644
 index 000..5ed79f5
 --- /dev/null
 +++ b/arch/arm/mach-s3c24xx/mach-w5300e01.c
 @@ -0,0 +1,186 @@
 +/* linux/arch/arm/mach-s3c24xx/mach-w5300e01.c
 + *
 + * Copyright (c) 2012 Taehun Kim kth3...@gmail.com
 + *
 + * For product information, visit http://www.wiznet.co.kr/
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 + * @History:
 + * derived from linux/arch/arm/mach-s3c24xx/mach-bast.c, written by
 + * Ben Dooks b...@simtec.co.uk
 + */
 +
 +#include linux/kernel.h
 +#include linux/types.h
 +#include linux/interrupt.h
 +#include linux/list.h
 +#include linux/timer.h
 +#include linux/init.h
 +#include linux/serial_core.h
 +#include linux/platform_device.h
 +#include linux/gpio.h
 +#include linux/io.h
 +#include linux/mtd/mtd.h
 +#include linux/mtd/nand.h
 +#include linux/mtd/map.h
 +#include linux/mtd/partitions.h
 +
 +#include asm/mach/arch.h
 +#include asm/mach/map.h
 +#include asm/mach/irq.h
 +#include asm/mach-types.h
 +
 +#include mach/regs-gpio.h
 +#include plat/gpio-cfg.h
 +#include plat/cpu.h
 +#include plat/devs.h
 +#include plat/regs-serial.h
 +#include plat/nand.h
 +#include plat/pm.h
 +
 +static struct map_desc w5300e01_iodesc[] __initdata = {
 +   /* Character LCD register map. */
 +   { 0xf800, __phys_to_pfn(S3C2410_CS3), SZ_1M, MT_DEVICE }
 +};
 +
 +#define UCON S3C2410_UCON_DEFAULT
 +#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 +#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 +
 +static struct s3c2410_uartcfg w5300e01_uartcfgs[] __initdata = {
 +   [0] = {
 +   .hwport  = 0,
 +   .flags   = 0,
 +   .ucon= UCON,
 +   .ulcon   = ULCON,
 +   .ufcon   = UFCON,
 +   },
 +   [1] = {
 +   .hwport  = 1,
 +   .flags   = 0,
 +   .ucon= UCON,
 +   .ulcon   = ULCON,
 +   .ufcon   = UFCON,
 +   },
 +   [2] = {
 +   .hwport  = 2,
 +   .flags   = 0,
 +   .ucon= UCON,
 +   .ulcon   = ULCON,
 +   .ufcon   = UFCON,
 +   }
 +};
 +
 +static struct mtd_partition w5300e01_mtd_partitions[] = {
 +   [0] = {
 +   .name   = Bootloader,
 +   .size   = 0x2,
 +   .offset = 0,
 +   .mask_flags = MTD_WRITEABLE,
 +   },
 +   [1] = {
 +   .name   = Boot Param,
 +   .size   = 0x2,
 +   .offset = MTDPART_OFS_APPEND,
 +   },
 +   [2] = {
 +   .name   = Kernel,
 +   .size   = 0x3C,
 +   .offset = MTDPART_OFS_APPEND,
 +   },
 +   [3] = {
 +   .name   = Ramdisk,
 +   .size   = 0x100,
 +   .offset = MTDPART_OFS_APPEND,
 +   },
 +   [4] = {
 +   .name   = JFFS2 FileSystem,
 +   .size   = MTDPART_SIZ_FULL,
 +   .offset = MTDPART_OFS_APPEND,
 

Re: [PATCH] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support

2012-09-03 Thread Sylwester Nawrocki
Hi,

On 09/03/2012 09:56 AM, Vasily Khoruzhick wrote:
 +static void __init w5300e01_init(void)
 +{
 +   s3c_nand_set_platdata(w5300e01_nand_info);
 +   platform_add_devices(w5300e01_devices, ARRAY_SIZE(w5300e01_devices));
 +
 +   /* W5300 interrupt pin. */
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(0), S3C2410_GPIO_IRQ);
 +
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT);
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT);
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT);
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT);
 +
 +   s3c2410_gpio_setpin(S3C2410_GPF(0), 1);
 +   s3c2410_gpio_setpin(S3C2410_GPF(4), 1);
 +   s3c2410_gpio_setpin(S3C2410_GPF(5), 1);
 +   s3c2410_gpio_setpin(S3C2410_GPF(6), 1);
 +   s3c2410_gpio_setpin(S3C2410_GPF(7), 1);
 +
 
 Please use gpiolib API, legacy s3c2410_gpio_* API will be removed soon.

Right, you'll find some information about this in
Documentation/arm/Samsung-S3C24XX/GPIO.txt.

These links may be useful as well:
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg11985.html
http://www.spinics.net/lists/arm-kernel/msg192119.html

--

Regards,
Sylwester
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Re: [PATCH v3 1/4] pinctrl: add samsung pinctrl and gpiolib driver

2012-09-03 Thread Linus Walleij
On Thu, Aug 23, 2012 at 1:15 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:

 Add a new device tree enabled pinctrl and gpiolib driver for Samsung
 SoC's. This driver provides a common and extensible framework for all
 Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This
 driver supports only device tree based instantiation and hence can be
 used only on those Samsung platforms that have device tree enabled.

 This driver is split into two parts: the pinctrl interface and the gpiolib
 interface. The pinctrl interface registers pinctrl devices with the pinctrl
 subsystem and gpiolib interface registers gpio chips with the gpiolib
 subsystem. The information about the pins, pin groups, pin functions and
 gpio chips, which are SoC specific, are parsed from device tree node.

 Cc: Linus Walleij linus.wall...@linaro.org
 Cc: Kukjin Kim kgene@samsung.com
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org

Looks good to me, I saw Stephen had some minor comments and
I expect that you probably fix them before applying to the Samsung
tree so:
Reviewed-by: Linus Walleij linus.wall...@linaro.org

Feel free to push this through ARM SoC, I guess that's the plan?

Yours,
Linus Walleij
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Re: [PATCH v3 2/4] pinctrl: add exynos4210 specific extensions for samsung pinctrl driver

2012-09-03 Thread Linus Walleij
On Thu, Aug 23, 2012 at 1:15 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:

 Add information about the Exynos4210 pin banks and driver data which is
 used by the Samsung pinctrl driver. In addition to this, the support for
 external gpio and wakeup interrupt support is included and hooked up with
 the Samsung pinctrl driver.

 Cc: Linus Walleij linus.wall...@linaro.org
 Cc: Kukjin Kim kgene@samsung.com
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org

Reviewed-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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Re: [PATCH v3 4/4] ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used

2012-09-03 Thread Linus Walleij
On Thu, Aug 23, 2012 at 1:15 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:

 Pinctrl driver includes support for configuring the external wakeup
 interrupts. On exynos platforms that use pinctrl driver, the setup
 of wakeup interrupts in the exynos platform code can be skipped.

 Cc: Kukjin Kim kgene@samsung.com
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org

Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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Re: [PATCH v2 1/2] ARM: dts: Add pinctrl node entries for Samsung Exynos4210 SoC

2012-09-03 Thread Linus Walleij
On Thu, Aug 23, 2012 at 1:24 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:

 Add pinctrl driver nodes for the three instances of pin controllers
 in Samsung Exynos4210 SoC and add the pin group nodes available in the
 each of those three instances.

 Cc: Kukjin Kim kgene@samsung.com
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org

Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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Re: [PATCH v2 2/2] ARM: EXYNOS: Enable pinctrl driver support for Exynos4 device tree enabled platform

2012-09-03 Thread Linus Walleij
On Thu, Aug 23, 2012 at 1:24 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:

 This enables support for Samsung and Exynos4 pinctrl driver for device
 tree enabled Exynos4 platforms.

 Cc: Kukjin Kim kgene@samsung.com
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org

Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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Re: [PATCH 1/6] ARM: dts: Move parts common to Exynos4 from Exynos4210.dtsi to Exynos4.dtsi

2012-09-03 Thread Tomasz Figa
Hi Thomas,

Thanks for reviewing the patch.

On Friday 31 of August 2012 09:18:26 Thomas Abraham wrote:
 A similar patch was submitted by Dongjin Kim
 dongjin@agreeyamobility.net as well.
 [PATCH v2] arm/dts: exynos4: Add DTS files derived from common Exynos4

OK, I haven't noticed it.

  +   gic:interrupt-controller@1049 {
  +   compatible = arm,cortex-a9-gic;
  +   #interrupt-cells = 3;
  +   interrupt-controller;
  +   cpu-offset = 0x8000;
 
 The value of cpu-offset is different for Exynos4210 and Exynos4412
 (not sure if it is different on Exynos4212 as well). Since
 exynos4.dtsi will be included in the other Exynos4 specific dtsi
 files, cpu-offset property can be removed from here and included in
 SoC specific dtsi files.

OK.

  +   combiner:interrupt-controller@1044 {
  +   compatible = samsung,exynos4210-combiner;
  +   #interrupt-cells = 2;
  +   interrupt-controller;
  +   reg = 0x1044 0x1000;
  +   interrupts = 0 0 0, 0 1 0, 0 2 0, 0 3 0,
  +0 4 0, 0 5 0, 0 6 0, 0 7 0,
  +0 8 0, 0 9 0, 0 10 0, 0 11 0,
  +0 12 0, 0 13 0, 0 14 0, 0 15 0;
  +   };
 
 Similarly, the number of interrupts generated by the combiner is also
 specific to the Exynos4 SoC. So the interrupts property could also be
 moved into SoC specific dtsi files.

OK.

  +   gpio-controllers {
  +   #address-cells = 1;
  +   #size-cells = 1;
  +   gpio-controller;
  +   ranges;
 
 Should we just retain the gpio nodes in exynos4210.dtsi file itself
 for now. If we manage to get the pinctrl driver support for exynos4210
 and exynos4412 merged, these gpio nodes would anyway be removed. And
 since there are differences in gpio banks in Exynos4 SoC's, maybe we
 could just leave these in exynos4210.dtsi file for now.

Yes, might be a good idea indeed.

 While we are at it, should we mark the nodes in exynos4.dtsi and
 exynos4210.dtsi as disabled. The board dts files will have to
 explicitly enable those nodes which it uses.

Definitely. Actually I was going to submit patches for it a bit later.
I have them ready now and I'm going to send them today, along with 
corrected version of this patch.

Best regards,
-- 
Tomasz Figa
Samsung Poland RD Center

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Re: [PATCH 4/6] ARM: Exynos4: Add OF compatibility lookups for Exynos4 i2c adapters

2012-09-03 Thread Tomasz Figa
Hi Thomas,

Thanks for reviewing the patch.

On Friday 31 of August 2012 09:29:42 Thomas Abraham wrote:
  +   OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS4_PA_IIC(0),
  +   s3c2440-i2c.0, NULL),
 
 i2c0 lookup information is already in this list. So the above line
 should not be included in this patch.

Right, I must have overlooked it.

Best regards,
-- 
Tomasz Figa
Samsung Poland RD Center

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Re: [PATCH 6/6] ARM: Exynos: Add basic dts file for Samsung Trats board

2012-09-03 Thread Tomasz Figa
Hi Thomas,

Thanks for reviewing the patch.

On Friday 31 of August 2012 09:54:20 Thomas Abraham wrote:
  +   wakeup_eint: interrupt-controller-wakeup-eint {
  +   compatible = samsung,exynos4210-wakeup-eint;
  +   reg = 0x1100 0x1000;
  +   #interrupt-cells = 2;
  +   interrupt-controller;
  +   interrupts =0 16 0, 0 17 0, 0 18 0, 0 19 0,
  +   0 20 0, 0 21 0, 0 22 0, 0 23 0,
  +   0 24 0, 0 25 0, 0 26 0, 0 27 0,
  +   0 28 0, 0 29 0, 0 30 0, 0 31 0,
  +   0 32 0;
  +   };
 
 The external wakeup node should be in the exynos4.dtsi file since this
 is common across all Exynos4 SoC's. Besides, the device tree support
 patches for wakeup-interrupts is not being pursed anymore, since it is
 now handled in pinctrl driver itself. So it would be better not to
 include this node.

Right. We will eventually add support for external wakeup sources using 
pinctrl.

  +   spi_2: spi@1394 {
  +   status = disabled;
  +   };
  +};
 
 If we choose to mark the nodes in dtsi files as disabled then we can
 avoid these here.

OK.

Best regards,
-- 
Tomasz Figa
Samsung Poland RD Center

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[PATCH 0/3] ARM: dts: Exynos4 dts reorganization

2012-09-03 Thread Tomasz Figa
This patch series prepares existing Exynos4210 DT infrastructure to be
further extended for new SoCs from Exynos4 line and new boards.

Tomasz Figa (3):
  ARM: dts: Move parts common to Exynos4 from Exynos4210.dtsi to
Exynos4.dtsi
  ARM: EXYNOS: exynos4-dt: Use exynos4 prefix instead of exynos4210
  ARM: dts: exynos4: Assume status of all optional nodes as disabled

 arch/arm/boot/dts/exynos4.dtsi| 232 ++
 arch/arm/boot/dts/exynos4210-origen.dts   |  58 +---
 arch/arm/boot/dts/exynos4210-smdkv310.dts |  52 +--
 arch/arm/boot/dts/exynos4210.dtsi | 181 +--
 arch/arm/mach-exynos/mach-exynos4-dt.c|  18 +--
 5 files changed, 248 insertions(+), 293 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos4.dtsi

-- 
1.7.12

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[PATCH 1/3] ARM: dts: Move parts common to Exynos4 from Exynos4210.dtsi to Exynos4.dtsi

2012-09-03 Thread Tomasz Figa
Most definitions from Exynos4210.dtsi can be applied for other SoCs from
Exynos4 line as well, so move the common part into separate file that
can be included by dtsi files of other Exynos4 SoCs (as well as current
Exynos4210.dtsi).

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/boot/dts/exynos4.dtsi| 210 ++
 arch/arm/boot/dts/exynos4210.dtsi | 181 +---
 2 files changed, 211 insertions(+), 180 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos4.dtsi

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
new file mode 100644
index 000..e446fe7
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -0,0 +1,210 @@
+/*
+ * Samsung's Exynos4 SoC series common device tree source
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2010-2011 Linaro Ltd.
+ * www.linaro.org
+ *
+ * Samsung's Exynos4 SoC series device nodes are listed in this file. 
Particular
+ * SoCs from Exynos4 series can include this file and provide values for SoCs
+ * specfic bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/include/ skeleton.dtsi
+
+/ {
+   interrupt-parent = gic;
+
+   aliases {
+   spi0 = spi_0;
+   spi1 = spi_1;
+   spi2 = spi_2;
+   };
+
+   gic:interrupt-controller@1049 {
+   compatible = arm,cortex-a9-gic;
+   #interrupt-cells = 3;
+   interrupt-controller;
+   reg = 0x1049 0x1000, 0x1048 0x100;
+   };
+
+   combiner:interrupt-controller@1044 {
+   compatible = samsung,exynos4210-combiner;
+   #interrupt-cells = 2;
+   interrupt-controller;
+   reg = 0x1044 0x1000;
+   };
+
+   watchdog@1006 {
+   compatible = samsung,s3c2410-wdt;
+   reg = 0x1006 0x100;
+   interrupts = 0 43 0;
+   };
+
+   rtc@1007 {
+   compatible = samsung,s3c6410-rtc;
+   reg = 0x1007 0x100;
+   interrupts = 0 44 0, 0 45 0;
+   };
+
+   keypad@100A {
+   compatible = samsung,s5pv210-keypad;
+   reg = 0x100A 0x100;
+   interrupts = 0 109 0;
+   };
+
+   sdhci@1251 {
+   compatible = samsung,exynos4210-sdhci;
+   reg = 0x1251 0x100;
+   interrupts = 0 73 0;
+   };
+
+   sdhci@1252 {
+   compatible = samsung,exynos4210-sdhci;
+   reg = 0x1252 0x100;
+   interrupts = 0 74 0;
+   };
+
+   sdhci@1253 {
+   compatible = samsung,exynos4210-sdhci;
+   reg = 0x1253 0x100;
+   interrupts = 0 75 0;
+   };
+
+   sdhci@1254 {
+   compatible = samsung,exynos4210-sdhci;
+   reg = 0x1254 0x100;
+   interrupts = 0 76 0;
+   };
+
+   serial@1380 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1380 0x100;
+   interrupts = 0 52 0;
+   };
+
+   serial@1381 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1381 0x100;
+   interrupts = 0 53 0;
+   };
+
+   serial@1382 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1382 0x100;
+   interrupts = 0 54 0;
+   };
+
+   serial@1383 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1383 0x100;
+   interrupts = 0 55 0;
+   };
+
+   i2c@1386 {
+   compatible = samsung,s3c2440-i2c;
+   reg = 0x1386 0x100;
+   interrupts = 0 58 0;
+   };
+
+   i2c@1387 {
+   compatible = samsung,s3c2440-i2c;
+   reg = 0x1387 0x100;
+   interrupts = 0 59 0;
+   };
+
+   i2c@1388 {
+   compatible = samsung,s3c2440-i2c;
+   reg = 0x1388 0x100;
+   interrupts = 0 60 0;
+   };
+
+   i2c@1389 {
+   compatible = samsung,s3c2440-i2c;
+   reg = 0x1389 0x100;
+   interrupts = 0 61 0;
+   };
+
+   i2c@138A {
+   compatible = samsung,s3c2440-i2c;
+   reg = 0x138A 0x100;
+   interrupts = 0 62 0;
+   };
+
+   i2c@138B {
+   

[PATCH 3/3] ARM: dts: exynos4: Assume status of all optional nodes as disabled

2012-09-03 Thread Tomasz Figa
Currently all boards must explicitly disable all unused device tree
nodes of unused components (e.g. i2c, sdhci, etc...). This makes it
necessary to all boards to be aware of all components on the SoC, which
in turns makes board dts files longer and more difficult to maintain
(e.g. adding new components to SoC-level tree requires adding nodes with
status=disabled to every board).

This patch changes status of all optional components in SoC-level dts
file to disabled, adds status=okay to respective nodes of used
components in dts of all boards and removes all nodes with only
status=disabled from boards dts.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/boot/dts/exynos4.dtsi| 22 
 arch/arm/boot/dts/exynos4210-origen.dts   | 58 ++-
 arch/arm/boot/dts/exynos4210-smdkv310.dts | 52 +++
 3 files changed, 28 insertions(+), 104 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index e446fe7..9b71b61 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -48,114 +48,133 @@
compatible = samsung,s3c2410-wdt;
reg = 0x1006 0x100;
interrupts = 0 43 0;
+   status = disabled;
};
 
rtc@1007 {
compatible = samsung,s3c6410-rtc;
reg = 0x1007 0x100;
interrupts = 0 44 0, 0 45 0;
+   status = disabled;
};
 
keypad@100A {
compatible = samsung,s5pv210-keypad;
reg = 0x100A 0x100;
interrupts = 0 109 0;
+   status = disabled;
};
 
sdhci@1251 {
compatible = samsung,exynos4210-sdhci;
reg = 0x1251 0x100;
interrupts = 0 73 0;
+   status = disabled;
};
 
sdhci@1252 {
compatible = samsung,exynos4210-sdhci;
reg = 0x1252 0x100;
interrupts = 0 74 0;
+   status = disabled;
};
 
sdhci@1253 {
compatible = samsung,exynos4210-sdhci;
reg = 0x1253 0x100;
interrupts = 0 75 0;
+   status = disabled;
};
 
sdhci@1254 {
compatible = samsung,exynos4210-sdhci;
reg = 0x1254 0x100;
interrupts = 0 76 0;
+   status = disabled;
};
 
serial@1380 {
compatible = samsung,exynos4210-uart;
reg = 0x1380 0x100;
interrupts = 0 52 0;
+   status = disabled;
};
 
serial@1381 {
compatible = samsung,exynos4210-uart;
reg = 0x1381 0x100;
interrupts = 0 53 0;
+   status = disabled;
};
 
serial@1382 {
compatible = samsung,exynos4210-uart;
reg = 0x1382 0x100;
interrupts = 0 54 0;
+   status = disabled;
};
 
serial@1383 {
compatible = samsung,exynos4210-uart;
reg = 0x1383 0x100;
interrupts = 0 55 0;
+   status = disabled;
};
 
i2c@1386 {
compatible = samsung,s3c2440-i2c;
reg = 0x1386 0x100;
interrupts = 0 58 0;
+   status = disabled;
};
 
i2c@1387 {
compatible = samsung,s3c2440-i2c;
reg = 0x1387 0x100;
interrupts = 0 59 0;
+   status = disabled;
};
 
i2c@1388 {
compatible = samsung,s3c2440-i2c;
reg = 0x1388 0x100;
interrupts = 0 60 0;
+   status = disabled;
};
 
i2c@1389 {
compatible = samsung,s3c2440-i2c;
reg = 0x1389 0x100;
interrupts = 0 61 0;
+   status = disabled;
};
 
i2c@138A {
compatible = samsung,s3c2440-i2c;
reg = 0x138A 0x100;
interrupts = 0 62 0;
+   status = disabled;
};
 
i2c@138B {
compatible = samsung,s3c2440-i2c;
reg = 0x138B 0x100;
interrupts = 0 63 0;
+   status = disabled;
};
 
i2c@138C {
compatible = samsung,s3c2440-i2c;
reg = 0x138C 0x100;
interrupts = 0 64 0;
+   status = disabled;
};
 
i2c@138D {
compatible = samsung,s3c2440-i2c;
reg = 0x138D 0x100;
interrupts = 0 65 0;
+   status = disabled;

[PATCH 2/3] ARM: EXYNOS: exynos4-dt: Use exynos4 prefix instead of exynos4210

2012-09-03 Thread Tomasz Figa
Since mach-exynos4-dt.c is also going to be used for other SoCs from Exynos4
line, rename internal structures and functions to use exynos4_ prefix, instead
of exynos4210_.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/mach-exynos4-dt.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c 
b/arch/arm/mach-exynos/mach-exynos4-dt.c
index b2b5d5f..8dad4ec 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -1,5 +1,5 @@
 /*
- * Samsung's Exynos4210 flattened device tree enabled machine
+ * Samsung's Exynos4 flattened device tree enabled machine
  *
  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  * http://www.samsung.com
@@ -36,7 +36,7 @@
  * at some point, the drivers should be capable of parsing all the platform
  * data from the device tree.
  */
-static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
+static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA(samsung,exynos4210-uart, EXYNOS4_PA_UART0,
exynos4210-uart.0, NULL),
OF_DEV_AUXDATA(samsung,exynos4210-uart, EXYNOS4_PA_UART1,
@@ -66,19 +66,19 @@ static const struct of_dev_auxdata 
exynos4210_auxdata_lookup[] __initconst = {
{},
 };
 
-static void __init exynos4210_dt_map_io(void)
+static void __init exynos4_dt_map_io(void)
 {
exynos_init_io(NULL, 0);
s3c24xx_init_clocks(2400);
 }
 
-static void __init exynos4210_dt_machine_init(void)
+static void __init exynos4_dt_machine_init(void)
 {
of_platform_populate(NULL, of_default_bus_match_table,
-   exynos4210_auxdata_lookup, NULL);
+   exynos4_auxdata_lookup, NULL);
 }
 
-static char const *exynos4210_dt_compat[] __initdata = {
+static char const *exynos4_dt_compat[] __initdata = {
samsung,exynos4210,
NULL
 };
@@ -86,11 +86,11 @@ static char const *exynos4210_dt_compat[] __initdata = {
 DT_MACHINE_START(EXYNOS4210_DT, Samsung Exynos4 (Flattened Device Tree))
/* Maintainer: Thomas Abraham thomas.abra...@linaro.org */
.init_irq   = exynos4_init_irq,
-   .map_io = exynos4210_dt_map_io,
+   .map_io = exynos4_dt_map_io,
.handle_irq = gic_handle_irq,
-   .init_machine   = exynos4210_dt_machine_init,
+   .init_machine   = exynos4_dt_machine_init,
.init_late  = exynos_init_late,
.timer  = exynos4_timer,
-   .dt_compat  = exynos4210_dt_compat,
+   .dt_compat  = exynos4_dt_compat,
.restart= exynos4_restart,
 MACHINE_END
-- 
1.7.12

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[PATCH v1 0/2] Add MFC device tree support

2012-09-03 Thread Arun Kumar K
This patchset adds device tree support for s5p-mfc driver.
The first patch adds DT support for both Exynos4 and 5 SoCs
which has different versions of MFC. The second patch which
adds DT support for the driver has to be applied over the 
patchset [1] which adds the MFCv6 support.

Changelog:
- Moved board specific DT information to different dtsi file
- Changed compatible name for the device
- Addressed other review comments

[1] http://www.mail-archive.com/linux-media@vger.kernel.org/msg51284.html

Arun Kumar K (1):
  [media] s5p-mfc: Add device tree support

Naveen Krishna Chatradhi (1):
  ARM: EXYNOS: Add MFC device tree support

 .../devicetree/bindings/media/s5p-mfc.txt  |   27 +
 arch/arm/boot/dts/exynos4210-origen.dts|7 ++
 arch/arm/boot/dts/exynos4210.dtsi  |6 +
 arch/arm/boot/dts/exynos5250-smdk5250.dts  |7 ++
 arch/arm/boot/dts/exynos5250.dtsi  |6 +
 arch/arm/mach-exynos/Kconfig   |2 +
 arch/arm/mach-exynos/clock-exynos5.c   |2 +-
 arch/arm/mach-exynos/mach-exynos4-dt.c |9 ++
 arch/arm/mach-exynos/mach-exynos5-dt.c |9 ++
 drivers/media/platform/s5p-mfc/s5p_mfc.c   |  104 +---
 10 files changed, 162 insertions(+), 17 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/s5p-mfc.txt

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[PATCH v1 1/2] ARM: EXYNOS: Add MFC device tree support

2012-09-03 Thread Arun Kumar K
From: Naveen Krishna Chatradhi ch.nav...@samsung.com

This patch adds device tree entry for MFC in the Exynos
machines. Exynos4 SoCs support MFC v5 version and Exynos5 has
MFC v6 version. So making the required changes in the clock
files and adds MFC to the DT device list.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Signed-off-by: Arun Kumar K arun...@samsung.com
---
 arch/arm/boot/dts/exynos4210-origen.dts   |7 +++
 arch/arm/boot/dts/exynos4210.dtsi |6 ++
 arch/arm/boot/dts/exynos5250-smdk5250.dts |7 +++
 arch/arm/boot/dts/exynos5250.dtsi |6 ++
 arch/arm/mach-exynos/Kconfig  |2 ++
 arch/arm/mach-exynos/clock-exynos5.c  |2 +-
 arch/arm/mach-exynos/mach-exynos4-dt.c|9 +
 arch/arm/mach-exynos/mach-exynos5-dt.c|9 +
 8 files changed, 47 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-origen.dts 
b/arch/arm/boot/dts/exynos4210-origen.dts
index 0c49caa..5cf9e93 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -146,4 +146,11 @@
spi_2: spi@1394 {
status = disabled;
};
+
+   mfc {
+   samsung,mfc-r = 0x4300;
+   samsung,mfc-r-size = 8388608;
+   samsung,mfc-l = 0x5100;
+   samsung,mfc-l-size = 8388608;
+   };
 };
diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index 02891fe..5d57348 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -56,6 +56,12 @@
interrupts = 0 43 0;
};
 
+   mfc {
+   compatible = samsung,mfc-v5;
+   reg = 0x1340 0x1;
+   interrupts = 0 94 0;
+   };
+
rtc@1007 {
compatible = samsung,s3c6410-rtc;
reg = 0x1007 0x100;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 8a5e348..5824c97 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -109,4 +109,11 @@
spi_2: spi@12d4 {
status = disabled;
};
+
+   mfc {
+   samsung,mfc-r = 0x4300;
+   samsung,mfc-r-size = 8388608;
+   samsung,mfc-l = 0x5100;
+   samsung,mfc-l-size = 8388608;
+   };
 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 004aaa8..d727b8b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -58,6 +58,12 @@
interrupts = 0 42 0;
};
 
+   mfc {
+   compatible = samsung,mfc-v6;
+   reg = 0x1100 0x1;
+   interrupts = 0 96 0;
+   };
+
rtc {
compatible = samsung,s3c6410-rtc;
reg = 0x101E 0x100;
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index b5b4c8c..19e8313 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -36,6 +36,7 @@ config CPU_EXYNOS4210
select S5P_PM if PM
select S5P_SLEEP if PM
select PM_GENERIC_DOMAINS
+   select S5P_DEV_MFC
help
  Enable EXYNOS4210 CPU support
 
@@ -64,6 +65,7 @@ config SOC_EXYNOS5250
select SAMSUNG_DMADEV
select S5P_PM if PM
select S5P_SLEEP if PM
+   select S5P_DEV_MFC
help
  Enable EXYNOS5250 SoC support
 
diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
b/arch/arm/mach-exynos/clock-exynos5.c
index 774533c..480c251 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -612,7 +612,7 @@ static struct clk exynos5_init_clocks_off[] = {
.ctrlbit= (1  25),
}, {
.name   = mfc,
-   .devname= s5p-mfc,
+   .devname= s5p-mfc-v6,
.enable = exynos5_clk_ip_mfc_ctrl,
.ctrlbit= (1  0),
}, {
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c 
b/arch/arm/mach-exynos/mach-exynos4-dt.c
index b2b5d5f..44bcfa4 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -13,6 +13,7 @@
 
 #include linux/of_platform.h
 #include linux/serial_core.h
+#include linux/memblock.h
 
 #include asm/mach/arch.h
 #include asm/hardware/gic.h
@@ -20,6 +21,7 @@
 
 #include plat/cpu.h
 #include plat/regs-serial.h
+#include plat/mfc.h
 
 #include common.h
 
@@ -63,6 +65,7 @@ static const struct of_dev_auxdata 
exynos4210_auxdata_lookup[] __initconst = {
exynos4210-spi.2, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_PDMA0, dma-pl330.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_PDMA1, dma-pl330.1, NULL),
+   

[PATCH v1 2/2] [media] s5p-mfc: Add device tree support

2012-09-03 Thread Arun Kumar K
This patch will add the device tree support for MFC driver.

Signed-off-by: Arun Kumar K arun...@samsung.com
---
 .../devicetree/bindings/media/s5p-mfc.txt  |   27 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c   |  104 +---
 2 files changed, 115 insertions(+), 16 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/s5p-mfc.txt

diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt 
b/Documentation/devicetree/bindings/media/s5p-mfc.txt
new file mode 100644
index 000..9a74d09
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -0,0 +1,27 @@
+* Samsung Multi Format Codec (MFC)
+
+Mult Format Codec (MFC) is the IP present in Samsung SoCs which
+supports high resolution decoding and encoding functionalities.
+The MFC device driver is a v4l2 driver which can encode/decode
+video raw/elementary streams and has support for all popular
+video codecs.
+
+Required properties:
+  - compatible : value should be either one among the following
+   (a) samsung,mfc-v5 for MFC v5 present in Exynos4 SoCs
+   (b) samsung,mfc-v6 for MFC v6 present in Exynos5 SoCs
+
+  - reg : Physical base address of the IP registers and length of memory
+ mapped region.
+
+  - interrupts : MFC interupt number to the CPU.
+
+  - samsung,mfc-r : Base address of the first memory bank used by MFC
+   for DMA contiguous memory allocation.
+
+  - samsung,mfc-r-size : Size of the first memory bank.
+
+  - samsung,mfc-l : Base address of the second memory bank used by MFC
+   for DMA contiguous memory allocation.
+
+  - samsung,mfc-l-size : Size of the second memory bank.
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 80f0555..365b6f5 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -957,6 +957,8 @@ static int match_child(struct device *dev, void *data)
return !strcmp(dev_name(dev), (char *)data);
 }
 
+static void *mfc_get_drv_data(struct platform_device *pdev);
+
 /* MFC probe function */
 static int s5p_mfc_probe(struct platform_device *pdev)
 {
@@ -964,6 +966,8 @@ static int s5p_mfc_probe(struct platform_device *pdev)
struct video_device *vfd;
struct resource *res;
int ret;
+   unsigned int base_addr;
+   unsigned int bank_size;
 
pr_debug(%s++\n, __func__);
dev = devm_kzalloc(pdev-dev, sizeof *dev, GFP_KERNEL);
@@ -980,8 +984,7 @@ static int s5p_mfc_probe(struct platform_device *pdev)
return -ENODEV;
}
 
-   dev-variant = (struct s5p_mfc_variant *)
-   platform_get_device_id(pdev)-driver_data;
+   dev-variant = mfc_get_drv_data(pdev);
 
ret = s5p_mfc_init_pm(dev);
if (ret  0) {
@@ -1011,20 +1014,59 @@ static int s5p_mfc_probe(struct platform_device *pdev)
goto err_res;
}
 
-   dev-mem_dev_l = device_find_child(dev-plat_dev-dev, s5p-mfc-l,
-  match_child);
-   if (!dev-mem_dev_l) {
-   mfc_err(Mem child (L) device get failed\n);
-   ret = -ENODEV;
-   goto err_res;
-   }
+   if (pdev-dev.of_node) {
+   dev-mem_dev_l = kzalloc(sizeof(struct device), GFP_KERNEL);
+   if (!dev-mem_dev_l) {
+   mfc_err(Not enough memory\n);
+   ret = -ENOMEM;
+   goto err_res;
+   }
+   of_property_read_u32(pdev-dev.of_node, samsung,mfc-l,
+   base_addr);
+   of_property_read_u32(pdev-dev.of_node, samsung,mfc-l-size,
+   bank_size);
+   if (dma_declare_coherent_memory(dev-mem_dev_l, base_addr,
+   base_addr, bank_size,
+   DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0) {
+   mfc_err(Failed to declare coherent memory for\n
+   MFC device\n);
+   ret = -ENOMEM;
+   goto err_res;
+   }
 
-   dev-mem_dev_r = device_find_child(dev-plat_dev-dev, s5p-mfc-r,
-  match_child);
-   if (!dev-mem_dev_r) {
-   mfc_err(Mem child (R) device get failed\n);
-   ret = -ENODEV;
-   goto err_res;
+   dev-mem_dev_r = kzalloc(sizeof(struct device), GFP_KERNEL);
+   if (!dev-mem_dev_r) {
+   mfc_err(Not enough memory\n);
+   ret = -ENOMEM;
+   goto err_res;
+   }
+   of_property_read_u32(pdev-dev.of_node, samsung,mfc-r,
+   base_addr);
+   of_property_read_u32(pdev-dev.of_node, samsung,mfc-r-size,
+   bank_size);
+   

[PATCH] ARM: dts: exynos4: Enable serial controllers on Origen and SMDKV310

2012-09-03 Thread Tomasz Figa
This patch adds status override of serial nodes to enable used serial ports
on Origen and SMDKV310 board.

Signed-off-by: Tomasz Figa t.f...@samsung.com
---
 arch/arm/boot/dts/exynos4210-origen.dts   | 16 
 arch/arm/boot/dts/exynos4210-smdkv310.dts | 16 
 2 files changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-origen.dts 
b/arch/arm/boot/dts/exynos4210-origen.dts
index d1a1101..c7295fb 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -57,6 +57,22 @@
status = okay;
};
 
+   serial@1380 {
+   status = okay;
+   };
+
+   serial@1381 {
+   status = okay;
+   };
+
+   serial@1382 {
+   status = okay;
+   };
+
+   serial@1383 {
+   status = okay;
+   };
+
gpio_keys {
compatible = gpio-keys;
#address-cells = 1;
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts 
b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index b87cca2..f634907 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -43,6 +43,22 @@
status = okay;
};
 
+   serial@1380 {
+   status = okay;
+   };
+
+   serial@1381 {
+   status = okay;
+   };
+
+   serial@1382 {
+   status = okay;
+   };
+
+   serial@1383 {
+   status = okay;
+   };
+
keypad@100A {
samsung,keypad-num-rows = 2;
samsung,keypad-num-columns = 8;
-- 
1.7.12


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Re: [PATCH] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support

2012-09-03 Thread Taehun Kim
2012/9/3 Sylwester Nawrocki s.nawro...@samsung.com:
 Hi,

 On 09/03/2012 09:56 AM, Vasily Khoruzhick wrote:
 +static void __init w5300e01_init(void)
 +{
 +   s3c_nand_set_platdata(w5300e01_nand_info);
 +   platform_add_devices(w5300e01_devices, 
 ARRAY_SIZE(w5300e01_devices));
 +
 +   /* W5300 interrupt pin. */
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(0), S3C2410_GPIO_IRQ);
 +
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT);
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT);
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT);
 +   s3c2410_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT);
 +
 +   s3c2410_gpio_setpin(S3C2410_GPF(0), 1);
 +   s3c2410_gpio_setpin(S3C2410_GPF(4), 1);
 +   s3c2410_gpio_setpin(S3C2410_GPF(5), 1);
 +   s3c2410_gpio_setpin(S3C2410_GPF(6), 1);
 +   s3c2410_gpio_setpin(S3C2410_GPF(7), 1);
 +

 Please use gpiolib API, legacy s3c2410_gpio_* API will be removed soon.

 Right, you'll find some information about this in
 Documentation/arm/Samsung-S3C24XX/GPIO.txt.

 These links may be useful as well:
 http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg11985.html
 http://www.spinics.net/lists/arm-kernel/msg192119.html

 --

 Regards,
 Sylwester

Thank you for the feedback. I will rewrite the gpio functions and
propose the new patch soon.
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[PATCH v2] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support

2012-09-03 Thread Taehun Kim
This patch adds WIZnet W5300E01 board changed to the new gpio functions.
Please review this patch and apply it if do not have any problems.

Signed-off-by: Taehun Kim kth3...@gmail.com
---
 arch/arm/mach-s3c24xx/Kconfig |5 +
 arch/arm/mach-s3c24xx/Makefile|1 +
 arch/arm/mach-s3c24xx/mach-w5300e01.c |  186
+
 3 files changed, 192 insertions(+)
 create mode 100644 arch/arm/mach-s3c24xx/mach-w5300e01.c

diff --git a/arch/arm/mach-s3c24xx/Kconfig
b/arch/arm/mach-s3c24xx/Kconfig
index d56b0f7..94b60ca 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -248,6 +248,11 @@ config MACH_VR1000
help
  Say Y here if you are using the Thorcom VR1000 board.
 
+config MACH_W5300E01
+   bool WIZnet W5300E01-ARM Board
+   help
+ Say Y here if you are using the Wiznet W5300E01-ARM board.
+
 endif  # CPU_S3C2410
 
 config S3C2412_PM_SLEEP
diff --git a/arch/arm/mach-s3c24xx/Makefile
b/arch/arm/mach-s3c24xx/Makefile
index 0ab6ab1..fc1a89e 100644
--- a/arch/arm/mach-s3c24xx/Makefile
+++ b/arch/arm/mach-s3c24xx/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o
 obj-$(CONFIG_ARCH_SMDK2410)+= mach-smdk2410.o
 obj-$(CONFIG_MACH_TCT_HAMMER)  += mach-tct_hammer.o
 obj-$(CONFIG_MACH_VR1000)  += mach-vr1000.o
+obj-$(CONFIG_MACH_W5300E01)+= mach-w5300e01.o
 
 obj-$(CONFIG_MACH_JIVE)+= mach-jive.o
 obj-$(CONFIG_MACH_SMDK2413)+= mach-smdk2413.o
diff --git a/arch/arm/mach-s3c24xx/mach-w5300e01.c
b/arch/arm/mach-s3c24xx/mach-w5300e01.c
new file mode 100644
index 000..7daf82e
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/mach-w5300e01.c
@@ -0,0 +1,186 @@
+/* linux/arch/arm/mach-s3c24xx/mach-w5300e01.c
+ *
+ * Copyright (c) 2012 Taehun Kim kth3...@gmail.com
+ *
+ * For product information, visit http://www.wiznet.co.kr/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * @History:
+ * derived from linux/arch/arm/mach-s3c24xx/mach-bast.c, written by
+ * Ben Dooks b...@simtec.co.uk
+ */
+
+#include linux/kernel.h
+#include linux/types.h
+#include linux/interrupt.h
+#include linux/list.h
+#include linux/timer.h
+#include linux/init.h
+#include linux/serial_core.h
+#include linux/platform_device.h
+#include linux/gpio.h
+#include linux/io.h
+#include linux/mtd/mtd.h
+#include linux/mtd/nand.h
+#include linux/mtd/map.h
+#include linux/mtd/partitions.h
+
+#include asm/mach/arch.h
+#include asm/mach/map.h
+#include asm/mach/irq.h
+#include asm/mach-types.h
+
+#include mach/regs-gpio.h
+#include plat/gpio-cfg.h
+#include plat/cpu.h
+#include plat/devs.h
+#include plat/regs-serial.h
+#include plat/nand.h
+#include plat/pm.h
+
+static struct map_desc w5300e01_iodesc[] __initdata = {
+   /* Character LCD register map. */
+   { 0xf800, __phys_to_pfn(S3C2410_CS3), SZ_1M, MT_DEVICE }
+};
+
+#define UCON S3C2410_UCON_DEFAULT
+#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE |
S3C2410_LCON_STOPB)
+#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
+
+static struct s3c2410_uartcfg w5300e01_uartcfgs[] __initdata = {
+   [0] = {
+   .hwport = 0,
+   .flags  = 0,
+   .ucon   = UCON,
+   .ulcon  = ULCON,
+   .ufcon  = UFCON,
+   },
+   [1] = {
+   .hwport = 1,
+   .flags  = 0,
+   .ucon   = UCON,
+   .ulcon  = ULCON,
+   .ufcon  = UFCON,
+   },
+   [2] = {
+   .hwport = 2,
+   .flags  = 0,
+   .ucon   = UCON,
+   .ulcon  = ULCON,
+   .ufcon  = UFCON,
+   }
+};
+
+static struct mtd_partition w5300e01_mtd_partitions[] = {
+   [0] = {
+   .name   = Bootloader,
+   .size   = 0x2,
+   .offset = 0,
+   .mask_flags = MTD_WRITEABLE,
+   },
+   [1] = {
+   .name   = Boot Param,
+   .size   = 0x2,
+   .offset = MTDPART_OFS_APPEND,
+   },
+   [2] = {
+   .name   = Kernel,
+   .size   = 0x3C,
+   .offset = MTDPART_OFS_APPEND,
+   },
+   [3] = {
+   .name   = Ramdisk,
+   .size   = 0x100,
+   .offset = MTDPART_OFS_APPEND,
+   },
+   [4] = {
+   .name   = JFFS2 FileSystem,
+   .size   = MTDPART_SIZ_FULL,
+   .offset = MTDPART_OFS_APPEND,
+   },
+};
+
+static struct resource w5300_resources[] = {
+   [0] = {
+   .start  = S3C2410_CS2,
+   .end= S3C2410_CS2 + SZ_1M,
+   

Re: [PATCH v2] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support

2012-09-03 Thread Vasily Khoruzhick
On Mon, Sep 3, 2012 at 8:36 PM, Taehun Kim kth3...@gmail.com wrote:
 This patch adds WIZnet W5300E01 board changed to the new gpio functions.
 Please review this patch and apply it if do not have any problems.

 Signed-off-by: Taehun Kim kth3...@gmail.com
 ---
  arch/arm/mach-s3c24xx/Kconfig |5 +
  arch/arm/mach-s3c24xx/Makefile|1 +
  arch/arm/mach-s3c24xx/mach-w5300e01.c |  186
 +
  3 files changed, 192 insertions(+)
  create mode 100644 arch/arm/mach-s3c24xx/mach-w5300e01.c

 diff --git a/arch/arm/mach-s3c24xx/Kconfig
 b/arch/arm/mach-s3c24xx/Kconfig
 index d56b0f7..94b60ca 100644
 --- a/arch/arm/mach-s3c24xx/Kconfig
 +++ b/arch/arm/mach-s3c24xx/Kconfig
 @@ -248,6 +248,11 @@ config MACH_VR1000
 help
   Say Y here if you are using the Thorcom VR1000 board.

 +config MACH_W5300E01
 +   bool WIZnet W5300E01-ARM Board
 +   help
 + Say Y here if you are using the Wiznet W5300E01-ARM board.
 +
  endif  # CPU_S3C2410

  config S3C2412_PM_SLEEP
 diff --git a/arch/arm/mach-s3c24xx/Makefile
 b/arch/arm/mach-s3c24xx/Makefile
 index 0ab6ab1..fc1a89e 100644
 --- a/arch/arm/mach-s3c24xx/Makefile
 +++ b/arch/arm/mach-s3c24xx/Makefile
 @@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o
  obj-$(CONFIG_ARCH_SMDK2410)+= mach-smdk2410.o
  obj-$(CONFIG_MACH_TCT_HAMMER)  += mach-tct_hammer.o
  obj-$(CONFIG_MACH_VR1000)  += mach-vr1000.o
 +obj-$(CONFIG_MACH_W5300E01)+= mach-w5300e01.o

  obj-$(CONFIG_MACH_JIVE)+= mach-jive.o
  obj-$(CONFIG_MACH_SMDK2413)+= mach-smdk2413.o
 diff --git a/arch/arm/mach-s3c24xx/mach-w5300e01.c
 b/arch/arm/mach-s3c24xx/mach-w5300e01.c
 new file mode 100644
 index 000..7daf82e
 --- /dev/null
 +++ b/arch/arm/mach-s3c24xx/mach-w5300e01.c
 @@ -0,0 +1,186 @@
 +/* linux/arch/arm/mach-s3c24xx/mach-w5300e01.c
 + *
 + * Copyright (c) 2012 Taehun Kim kth3...@gmail.com
 + *
 + * For product information, visit http://www.wiznet.co.kr/
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 + * @History:
 + * derived from linux/arch/arm/mach-s3c24xx/mach-bast.c, written by
 + * Ben Dooks b...@simtec.co.uk
 + */
 +
 +#include linux/kernel.h
 +#include linux/types.h
 +#include linux/interrupt.h
 +#include linux/list.h
 +#include linux/timer.h
 +#include linux/init.h
 +#include linux/serial_core.h
 +#include linux/platform_device.h
 +#include linux/gpio.h
 +#include linux/io.h
 +#include linux/mtd/mtd.h
 +#include linux/mtd/nand.h
 +#include linux/mtd/map.h
 +#include linux/mtd/partitions.h
 +
 +#include asm/mach/arch.h
 +#include asm/mach/map.h
 +#include asm/mach/irq.h
 +#include asm/mach-types.h
 +
 +#include mach/regs-gpio.h
 +#include plat/gpio-cfg.h
 +#include plat/cpu.h
 +#include plat/devs.h
 +#include plat/regs-serial.h
 +#include plat/nand.h
 +#include plat/pm.h
 +
 +static struct map_desc w5300e01_iodesc[] __initdata = {
 +   /* Character LCD register map. */
 +   { 0xf800, __phys_to_pfn(S3C2410_CS3), SZ_1M, MT_DEVICE }
 +};
 +
 +#define UCON S3C2410_UCON_DEFAULT
 +#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE |
 S3C2410_LCON_STOPB)
 +#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 +
 +static struct s3c2410_uartcfg w5300e01_uartcfgs[] __initdata = {
 +   [0] = {
 +   .hwport = 0,
 +   .flags  = 0,
 +   .ucon   = UCON,
 +   .ulcon  = ULCON,
 +   .ufcon  = UFCON,
 +   },
 +   [1] = {
 +   .hwport = 1,
 +   .flags  = 0,
 +   .ucon   = UCON,
 +   .ulcon  = ULCON,
 +   .ufcon  = UFCON,
 +   },
 +   [2] = {
 +   .hwport = 2,
 +   .flags  = 0,
 +   .ucon   = UCON,
 +   .ulcon  = ULCON,
 +   .ufcon  = UFCON,
 +   }
 +};
 +
 +static struct mtd_partition w5300e01_mtd_partitions[] = {
 +   [0] = {
 +   .name   = Bootloader,
 +   .size   = 0x2,
 +   .offset = 0,
 +   .mask_flags = MTD_WRITEABLE,
 +   },
 +   [1] = {
 +   .name   = Boot Param,
 +   .size   = 0x2,
 +   .offset = MTDPART_OFS_APPEND,
 +   },
 +   [2] = {
 +   .name   = Kernel,
 +   .size   = 0x3C,
 +   .offset = MTDPART_OFS_APPEND,
 +   },
 +   [3] = {
 +   .name   = Ramdisk,
 +   .size   = 0x100,
 +   .offset = MTDPART_OFS_APPEND,
 +   },
 +   [4] = {
 +   .name   = JFFS2 FileSystem,
 +   .size   = MTDPART_SIZ_FULL,
 +   

Re: [PATCH v2] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support

2012-09-03 Thread Sylwester Nawrocki
On 09/03/2012 07:36 PM, Taehun Kim wrote:
 +static void __init w5300e01_init(void)
 +{
 + s3c_nand_set_platdata(w5300e01_nand_info);
 + platform_add_devices(w5300e01_devices, ARRAY_SIZE(w5300e01_devices));
 +
 + /* W5300 interrupt pin. */
 + s3c_gpio_cfgpin(S3C2410_GPF(0), S3C2410_GPIO_IRQ);
 +
 + s3c_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT);
 + s3c_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT);
 + s3c_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT);
 + s3c_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT);

Please don't use these obsolete S3C2410_GPIO_* defines, they will be
gone soon, if aren't yet.

 + gpio_set_value(S3C2410_GPF(0), 1);
 + gpio_set_value(S3C2410_GPF(4), 1);
 + gpio_set_value(S3C2410_GPF(5), 1);
 + gpio_set_value(S3C2410_GPF(6), 1);
 + gpio_set_value(S3C2410_GPF(7), 1);

Instead I would do something like:

8-

static const struct gpio gpios[] = {
{ S3C2410_GPF(4), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(5), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(6), GPIOF_OUT_INIT_HIGH, NULL },
{ S3C2410_GPF(7), GPIOF_OUT_INIT_HIGH, NULL },
};

if (!WARN_ON(gpio_request_array(gpios, ARRAY_SIZE(gpios)))
gpios_free_array(gpios);

/* W5300 interrupt pin. */
if (!WARN_ON(gpio_request(S3C2410_GPF(0), GPIOF_IN, NULL))) {
s3c_gpio_cfgpin(S3C2410_GPF(0), S3C_GPIO_SFN(2)); /* EINT0 */
gpio_free(S3C2410_GPF(0));
}

8-

--

Regards,
Sylwester
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