Re: [PATCH v4] ARM: EXYNOS: Add MFC device tree support
On 09/22/2012 08:07 PM, Arun Kumar K wrote: This patch adds device tree entry for MFC v6 in the Exynos5 SoC. Makes the required changes in the clock files and adds MFC to the DT device list. Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com Signed-off-by: Arun Kumar K arun...@samsung.com Looks good for me. FWIW, I could probably add Acked-by: Karol Lewandowski k.lewando...@samsung.com Regards, -- Karol Lewandowski | Samsung Poland RD Center | Linux/Platform -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 1/5] usb: phy: samsung: Introducing usb phy driver for hsotg
Hi Kishon, Felipe, Any further comments on these patches? Can they be merged now? Thanks, Praveen On Mon, Sep 17, 2012 at 6:24 PM, Praveen Paneri p.pan...@samsung.com wrote: This driver uses usb_phy interface to interact with s3c-hsotg. Supports phy_init and phy_shutdown functions to enable/disable phy. Tested with smdk6410 and smdkv310. More SoCs can be brought under later. Signed-off-by: Praveen Paneri p.pan...@samsung.com Acked-by: Heiko Stuebner he...@sntech.de --- .../devicetree/bindings/usb/samsung-usbphy.txt |9 + drivers/usb/phy/Kconfig|8 + drivers/usb/phy/Makefile |1 + drivers/usb/phy/samsung-usbphy.c | 360 include/linux/platform_data/samsung-usbphy.h | 27 ++ 5 files changed, 405 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt create mode 100644 drivers/usb/phy/samsung-usbphy.c create mode 100644 include/linux/platform_data/samsung-usbphy.h diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt new file mode 100644 index 000..fefd9c8 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt @@ -0,0 +1,9 @@ +* Samsung's usb phy transceiver + +The Samsung's phy transceiver is used for controlling usb otg phy for +s3c-hsotg usb device controller. + +Required properties: +- compatible : should be samsung,exynos4210-usbphy +- reg : base physical address of the phy registers and length of memory mapped + region. diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 63c339b..313685f 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -32,3 +32,11 @@ config MV_U3D_PHY help Enable this to support Marvell USB 3.0 phy controller for Marvell SoC. + +config SAMSUNG_USBPHY + bool Samsung USB PHY controller Driver + depends on USB_S3C_HSOTG + select USB_OTG_UTILS + help + Enable this to support Samsung USB phy controller for samsung + SoCs. diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index b069f29..55dcfc1 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2) += omap-usb2.o obj-$(CONFIG_USB_ISP1301) += isp1301.o obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c new file mode 100644 index 000..95ec4d0 --- /dev/null +++ b/drivers/usb/phy/samsung-usbphy.c @@ -0,0 +1,360 @@ +/* linux/drivers/usb/phy/samsung-usbphy.c + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Author: Praveen Paneri p.pan...@samsung.com + * + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include linux/module.h +#include linux/platform_device.h +#include linux/clk.h +#include linux/delay.h +#include linux/err.h +#include linux/io.h +#include linux/of.h +#include linux/usb/otg.h +#include linux/platform_data/samsung-usbphy.h + +/* Register definitions */ + +#define S3C_PHYPWR (0x00) + +#define S3C_PHYPWR_NORMAL_MASK (0x19 0) +#define S3C_PHYPWR_OTG_DISABLE (1 4) +#define S3C_PHYPWR_ANALOG_POWERDOWN(1 3) +#define S3C_PHYPWR_FORCE_SUSPEND (1 1) +/* For Exynos4 */ +#define EXYNOS4_PHYPWR_NORMAL_MASK (0x39 0) +#define EXYNOS4_PHYPWR_SLEEP (1 5) + +#define S3C_PHYCLK (0x04) + +#define S3C_PHYCLK_MODE_SERIAL (1 6) +#define S3C_PHYCLK_EXT_OSC (1 5) +#define S3C_PHYCLK_COMMON_ON_N (1 4) +#define S3C_PHYCLK_ID_PULL (1 2) +#define S3C_PHYCLK_CLKSEL_MASK (0x3 0) +#define S3C_PHYCLK_CLKSEL_SHIFT(0) +#define S3C_PHYCLK_CLKSEL_48M (0x0 0) +#define S3C_PHYCLK_CLKSEL_12M (0x2 0) +#define S3C_PHYCLK_CLKSEL_24M (0x3 0) + +#define S3C_RSTCON (0x08) + +#define S3C_RSTCON_PHYCLK
[PATCH RFC] s5p-tv: Report only multi-plane capabilities in vidioc_querycap
The mixer video node supports only multi-planar API so the driver
should not be setting V4L2_CAP_VIDEO_OUTPUT flags. Fix this and
also switch to device_caps. Additionally fix the VIDIOC_ENUM_FMT
ioctl handler which now works for V4L2_BUF_TYPE_CAPTURE, rather
than expected V4L2_BUF_TYPE_CAPTURE_MPLANE.
Cc: Tomasz Stanislawski t.stanisl...@samsung.com
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/media/platform/s5p-tv/mixer_video.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/media/platform/s5p-tv/mixer_video.c
b/drivers/media/platform/s5p-tv/mixer_video.c
index 8649de01..9876bd9 100644
--- a/drivers/media/platform/s5p-tv/mixer_video.c
+++ b/drivers/media/platform/s5p-tv/mixer_video.c
@@ -164,9 +164,8 @@ static int mxr_querycap(struct file *file, void *priv,
strlcpy(cap-driver, MXR_DRIVER_NAME, sizeof cap-driver);
strlcpy(cap-card, layer-vfd.name, sizeof cap-card);
sprintf(cap-bus_info, %d, layer-idx);
- cap-version = KERNEL_VERSION(0, 1, 0);
- cap-capabilities = V4L2_CAP_STREAMING |
- V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_VIDEO_OUTPUT_MPLANE;
+ cap-device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT_MPLANE;
+ cap-capabilities = cap-device_caps | V4L2_CAP_DEVICE_CAPS;
return 0;
}
@@ -727,7 +726,7 @@ static int mxr_streamoff(struct file *file, void *priv,
enum v4l2_buf_type i)
static const struct v4l2_ioctl_ops mxr_ioctl_ops = {
.vidioc_querycap = mxr_querycap,
/* format handling */
- .vidioc_enum_fmt_vid_out = mxr_enum_fmt,
+ .vidioc_enum_fmt_vid_out_mplane = mxr_enum_fmt,
.vidioc_s_fmt_vid_out_mplane = mxr_s_fmt,
.vidioc_g_fmt_vid_out_mplane = mxr_g_fmt,
/* buffer control */
--
1.7.11.3
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Re: [RFC PATCH 0/6] pinctrl: samsung: Convert the driver to use per-bank GPIO and interrupt specifiers
On Fri, Sep 21, 2012 at 4:22 PM, Tomasz Figa t.f...@samsung.com wrote: This is a continuation of work focused on improving the pinctrl-samsung driver. All look good to me, I guess these will go through the Samsung tree? Acked-by: Linus Walleij linus.wall...@linaro.org for all. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3] video: exynos_dp: Add device tree support to DP driver
This patch enables device tree based discovery support for DP driver.
The driver is modified to handle platform data in both the cases:
with DT and non-DT.
Documentation is also added for the DT bindings.
DP-PHY should be regarded as a seperate device node while
being passed from device tree list, and device node for
DP should contain DP-PHY as child node with property name dp-phy
associated with it.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
.../devicetree/bindings/video/exynos_dp.txt| 83 ++
drivers/video/exynos/exynos_dp_core.c | 168 ++--
drivers/video/exynos/exynos_dp_core.h |2 +
3 files changed, 239 insertions(+), 14 deletions(-)
create mode 100644 Documentation/devicetree/bindings/video/exynos_dp.txt
diff --git a/Documentation/devicetree/bindings/video/exynos_dp.txt
b/Documentation/devicetree/bindings/video/exynos_dp.txt
new file mode 100644
index 000..c27f892
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/exynos_dp.txt
@@ -0,0 +1,83 @@
+Exynos Displayport driver should configure the displayport interface
+based on the type of panel connected to it.
+
+We use two nodes:
+ -dptx_phy node
+ -display-port-controller node
+
+For the dp-phy initialization, we use a dptx_phy node.
+Required properties for dptx_phy:
+ -compatible:
+ Should be samsung,dp-phy.
+ -samsung,dptx_phy_reg:
+ Base address of DP PHY register.
+ -samsung,enable_bit:
+ The bit used to enable/disable DP PHY.
+
+For the Panel initialization, we read data from display-port-controller node.
+Required properties for display-port-controller:
+ -compatible:
+ Should be samsung,exynos5-dp.
+ -reg:
+ physical base address of the controller and length
+ of memory mapped region.
+ -interrupts:
+ Internet combiner values.
+ -interrupt-parent:
+ Address of Interrupt combiner node.
+ -dp_phy:
+ Address of dptx_phy node.
+ -samsung,color_space:
+ input video data format.
+ COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
+ -samsung,dynamic_range:
+ dynamic range for input video data.
+ VESA = 0, CEA = 1
+ -samsung,ycbcr_coeff:
+ YCbCr co-efficients for input video.
+ COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
+ -samsung,color_depth:
+ Bit per color component.
+ COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
+ -samsung,link_rate:
+ link rates supportd by the panel.
+ LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A
+ -samsung,lane_count:
+ number of lanes supported by the panel.
+ LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4
+ -samsung,interlaced:
+ Interlace scan mode.
+ Progressive if defined, Interlaced if not defined
+ -samsung,v_sync_polarity:
+ VSYNC polarity configuration.
+ High if defined, Low if not defined
+ -samsung,h_sync_polarity:
+ HSYNC polarity configuration.
+ High if defined, Low if not defined
+
+Example:
+
+SOC specific portion:
+ dptx_phy: dptx_phy@0x10040720 {
+ compatible = samsung,dp-phy;
+ samsung,dptx_phy_reg = 0x10040720;
+ samsung,enable_bit = 1;
+ };
+
+ display-port-controller {
+ compatible = samsung,exynos5-dp;
+ reg = 0x145B 0x1;
+ interrupts = 10 3;
+ interrupt-parent = combiner;
+ dp_phy = dptx_phy;
+};
+
+Board Specific portion:
+ display-port-controller {
+ samsung,color_space = 0;
+ samsung,dynamic_range = 0;
+ samsung,ycbcr_coeff = 0;
+ samsung,color_depth = 1;
+ samsung,link_rate = 0x0a;
+ samsung,lane_count = 2;
+ };
diff --git a/drivers/video/exynos/exynos_dp_core.c
b/drivers/video/exynos/exynos_dp_core.c
index cdc1398..bb0f10c 100644
--- a/drivers/video/exynos/exynos_dp_core.c
+++ b/drivers/video/exynos/exynos_dp_core.c
@@ -18,6 +18,7 @@
#include linux/io.h
#include linux/interrupt.h
#include linux/delay.h
+#include linux/of.h
#include video/exynos_dp.h
@@ -856,6 +857,106 @@ static irqreturn_t exynos_dp_irq_handler(int irq, void
*arg)
return IRQ_HANDLED;
}
+#ifdef CONFIG_OF
+struct exynos_dp_platdata *exynos_dp_dt_parse_pdata(struct device *dev)
+{
+ struct device_node *dp_node = dev-of_node;
+ struct exynos_dp_platdata *pd;
+ struct video_info *dp_video_config;
+
+ pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
+ if (!pd) {
+
[PATCH v2 0/6] ARM: EXYNOS: Add secure firmware support
Some Exynos-based boards are running with secure firmware running in TrustZone secure world, which changes the way some things have to be initialized. This series adds support for specifying firmware operations, implements some firmware operations for Exynos secure firmware and adds a method of enabling secure firmware operations on Exynos-based boards through board file and device tree. Changes since v1 http://thread.gmane.org/gmane.linux.kernel.samsung-soc/12583/focus=12820 - Changed return types of all operations to int - Defined all operations to return 0 on success, -ENOSYS when not implemented or appropriate error code on error Tomasz Figa (6): ARM: Add interface for registering and calling firmware-specific operations ARM: EXYNOS: Add support for secure monitor calls ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 ARM: EXYNOS: Add IO mapping for non-secure SYSRAM. ARM: EXYNOS: Add support for Exynos secure firmware ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up .../devicetree/bindings/arm/samsung-boards.txt | 8 arch/arm/common/Makefile | 2 + arch/arm/common/firmware.c | 18 arch/arm/include/asm/firmware.h| 31 + arch/arm/mach-exynos/Makefile | 6 +++ arch/arm/mach-exynos/common.c | 34 ++ arch/arm/mach-exynos/common.h | 2 + arch/arm/mach-exynos/exynos-smc.S | 22 + arch/arm/mach-exynos/firmware.c| 54 ++ arch/arm/mach-exynos/include/mach/map.h| 3 ++ arch/arm/mach-exynos/mach-exynos4-dt.c | 1 + arch/arm/mach-exynos/platsmp.c | 36 --- arch/arm/mach-exynos/smc.h | 31 + arch/arm/plat-samsung/include/plat/map-s5p.h | 1 + 14 files changed, 243 insertions(+), 6 deletions(-) create mode 100644 arch/arm/common/firmware.c create mode 100644 arch/arm/include/asm/firmware.h create mode 100644 arch/arm/mach-exynos/exynos-smc.S create mode 100644 arch/arm/mach-exynos/firmware.c create mode 100644 arch/arm/mach-exynos/smc.h -- 1.7.12 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/6] ARM: EXYNOS: Add IO mapping for non-secure SYSRAM.
On TrustZone-enabled boards the non-secure SYSRAM is used for secondary
CPU bring-up, so add a mapping for it.
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/common.c| 34
arch/arm/mach-exynos/include/mach/map.h | 3 +++
arch/arm/plat-samsung/include/plat/map-s5p.h | 1 +
3 files changed, 38 insertions(+)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4eb39cd..ddec3d5 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -214,6 +214,33 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
},
};
+static struct map_desc exynos4210_iodesc[] __initdata = {
+ {
+ .virtual= (unsigned long)S5P_VA_SYSRAM_NS,
+ .pfn= __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
+static struct map_desc exynos4x12_iodesc[] __initdata = {
+ {
+ .virtual= (unsigned long)S5P_VA_SYSRAM_NS,
+ .pfn= __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
+static struct map_desc exynos5250_iodesc[] __initdata = {
+ {
+ .virtual= (unsigned long)S5P_VA_SYSRAM_NS,
+ .pfn= __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
static struct map_desc exynos5_iodesc[] __initdata = {
{
.virtual= (unsigned long)S3C_VA_SYS,
@@ -321,6 +348,13 @@ static void __init exynos4_map_io(void)
else
iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
+ if (soc_is_exynos4210())
+ iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
+ if (soc_is_exynos4212() || soc_is_exynos4412())
+ iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
+ if (soc_is_exynos5250())
+ iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
+
/* initialize device information early */
exynos4_default_sdhci0();
exynos4_default_sdhci1();
diff --git a/arch/arm/mach-exynos/include/mach/map.h
b/arch/arm/mach-exynos/include/mach/map.h
index c72b675..f4a8ac3 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -26,6 +26,9 @@
#define EXYNOS4_PA_SYSRAM0 0x02025000
#define EXYNOS4_PA_SYSRAM1 0x0202
#define EXYNOS5_PA_SYSRAM 0x0202
+#define EXYNOS4210_PA_SYSRAM_NS0x0203F000
+#define EXYNOS4x12_PA_SYSRAM_NS0x0204F000
+#define EXYNOS5250_PA_SYSRAM_NS0x0204F000
#define EXYNOS4_PA_FIMC0 0x1180
#define EXYNOS4_PA_FIMC1 0x1181
diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h
b/arch/arm/plat-samsung/include/plat/map-s5p.h
index c2d7bda..c186786 100644
--- a/arch/arm/plat-samsung/include/plat/map-s5p.h
+++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
@@ -22,6 +22,7 @@
#define S5P_VA_GPIO3 S3C_ADDR(0x0228)
#define S5P_VA_SYSRAM S3C_ADDR(0x0240)
+#define S5P_VA_SYSRAM_NS S3C_ADDR(0x0241)
#define S5P_VA_DMC0S3C_ADDR(0x0244)
#define S5P_VA_DMC1S3C_ADDR(0x0248)
#define S5P_VA_SROMC S3C_ADDR(0x024C)
--
1.7.12
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[PATCH 6/6] ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up
Boards using secure firmware must use different CPU boot registers and
call secure firmware to boot the CPU.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/platsmp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index a7f4031..4a18250 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -25,6 +25,7 @@
#include asm/hardware/gic.h
#include asm/smp_plat.h
#include asm/smp_scu.h
+#include asm/firmware.h
#include mach/hardware.h
#include mach/regs-clock.h
@@ -44,6 +45,8 @@ static inline void __iomem *cpu_boot_reg_base(void)
static inline void __iomem *cpu_boot_reg(int cpu)
{
void __iomem *boot_reg;
+ if (!call_firmware_op(cpu_boot_reg, cpu, boot_reg))
+ return boot_reg;
boot_reg = cpu_boot_reg_base();
if (soc_is_exynos4412())
boot_reg += 4*cpu;
@@ -153,6 +156,10 @@ int __cpuinit boot_secondary(unsigned int cpu, struct
task_struct *idle)
__raw_writel(virt_to_phys(exynos4_secondary_startup),
cpu_boot_reg(phys_cpu));
+
+ /* Call Exynos specific smc call */
+ call_firmware_op(cpu_boot, phys_cpu);
+
gic_raise_softirq(cpumask_of(cpu), 1);
if (pen_release == -1)
--
1.7.12
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[PATCH 3/6] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
Exynos4412 uses different information register for each core. This patch
adjusts the bring-up code to take that into account.
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-exynos/platsmp.c | 29 +++--
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 36c3984..a7f4031 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -34,8 +34,21 @@
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline void __iomem *cpu_boot_reg_base(void)
+{
+ if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
+ return S5P_INFORM5;
+ return S5P_VA_SYSRAM;
+}
+
+static inline void __iomem *cpu_boot_reg(int cpu)
+{
+ void __iomem *boot_reg;
+ boot_reg = cpu_boot_reg_base();
+ if (soc_is_exynos4412())
+ boot_reg += 4*cpu;
+ return boot_reg;
+}
/*
* control for which core is the next to come out of the secondary
@@ -89,6 +102,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
+ unsigned long phys_cpu = cpu_logical_map(cpu);
/*
* Set synchronisation state between this boot processor
@@ -104,7 +118,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct
task_struct *idle)
* Note that pen_release is the hardware CPU ID, whereas
* cpu is Linux's internal ID.
*/
- write_pen_release(cpu_logical_map(cpu));
+ write_pen_release(phys_cpu);
if (!(__raw_readl(S5P_ARM_CORE1_STATUS) S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
@@ -138,7 +152,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct
task_struct *idle)
smp_rmb();
__raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ cpu_boot_reg(phys_cpu));
gic_raise_softirq(cpumask_of(cpu), 1);
if (pen_release == -1)
@@ -186,6 +200,8 @@ void __init smp_init_cpus(void)
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
+ int i;
+
if (!soc_is_exynos5250())
scu_enable(scu_base_addr());
@@ -195,6 +211,7 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ for (i = 1; i max_cpus; ++i)
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+ cpu_boot_reg(cpu_logical_map(i)));
}
--
1.7.12
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[PATCH 1/6] ARM: Add interface for registering and calling firmware-specific operations
Some boards are running with secure firmware running in TrustZone secure
world, which changes the way some things have to be initialized.
This patch adds an interface for platforms to specify available firmware
operations and call them.
A wrapper macro, call_firmware_op(), checks if the operation is provided
and calls it if so, otherwise returns -ENOSYS to allow fallback to l
By default no operations are provided.
Example of use:
In code using firmware ops:
__raw_writel(virt_to_phys(exynos4_secondary_startup),
CPU1_BOOT_REG);
/* Call Exynos specific smc call */
if (call_firmware_op(cpu_boot, cpu) == -ENOSYS)
cpu_boot_legacy(cpu); /* Try legacy way */
gic_raise_softirq(cpumask_of(cpu), 1);
In board-/platform-specific code:
static int platformX_do_idle(void)
{
/* tell platformX firmware to enter idle */
return 0;
}
static int platformX_cpu_boot(int i)
{
/* tell platformX firmware to boot CPU i */
return 0;
}
static const struct firmware_ops platformX_firmware_ops = {
.do_idle= exynos_do_idle,
.cpu_boot = exynos_cpu_boot,
/* cpu_boot_reg not available on platformX */
};
static void __init board_init_early(void)
{
register_firmware_ops(platformX_firmware_ops);
}
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/common/Makefile| 2 ++
arch/arm/common/firmware.c | 18 ++
arch/arm/include/asm/firmware.h | 31 +++
3 files changed, 51 insertions(+)
create mode 100644 arch/arm/common/firmware.c
create mode 100644 arch/arm/include/asm/firmware.h
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index e8a4e58..55d4182 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -2,6 +2,8 @@
# Makefile for the linux kernel.
#
+obj-y += firmware.o
+
obj-$(CONFIG_ARM_GIC) += gic.o
obj-$(CONFIG_ARM_VIC) += vic.o
obj-$(CONFIG_ICST) += icst.o
diff --git a/arch/arm/common/firmware.c b/arch/arm/common/firmware.c
new file mode 100644
index 000..27ddccb
--- /dev/null
+++ b/arch/arm/common/firmware.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics.
+ * Kyungmin Park kyungmin.p...@samsung.com
+ * Tomasz Figa t.f...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/suspend.h
+
+#include asm/firmware.h
+
+static const struct firmware_ops default_firmware_ops;
+
+const struct firmware_ops *firmware_ops = default_firmware_ops;
diff --git a/arch/arm/include/asm/firmware.h b/arch/arm/include/asm/firmware.h
new file mode 100644
index 000..5d87d8e
--- /dev/null
+++ b/arch/arm/include/asm/firmware.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics.
+ * Kyungmin Park kyungmin.p...@samsung.com
+ * Tomasz Figa t.f...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_FIRMWARE_H
+#define __ASM_ARM_FIRMWARE_H
+
+struct firmware_ops {
+ int (*do_idle)(void);
+ int (*cpu_boot)(int cpu);
+ int (*cpu_boot_reg)(int cpu, void __iomem **ptr);
+ int (*l2x0_init)(void);
+};
+
+extern const struct firmware_ops *firmware_ops;
+
+#define call_firmware_op(op, ...) \
+ ((firmware_ops-op) ? firmware_ops-op(__VA_ARGS__) : (-ENOSYS))
+
+static inline void register_firmware_ops(const struct firmware_ops *ops)
+{
+ firmware_ops = ops;
+}
+
+#endif
--
1.7.12
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Re: [RFC 0/6] pinctrl: samsung: Remove static platform-specific data
On 09/21/2012 01:31 PM, Tomasz Figa wrote: On Friday 21 of September 2012 12:40:35 Stephen Warren wrote: On 09/20/2012 02:53 AM, Tomasz Figa wrote: This RFC series is a work on replacing static platform-specific data in pinctrl-samsung driver with data dynamically parsed from device tree. ... It aims at reducing the SoC-specific part of the driver and thus the amount of modifications to driver sources when adding support for next SoCs (like Exynos4x12). Furthermore, moving definitions of pin banks to device tree will allow to simplify GPIO and GEINT specification to a format similar to used previously by gpiolib-based implementation, using a phandle to the bank and pin index inside the bank, e.g. gpios = gpa1 4 0; interrupt-parent = gpa1; interrupts = 4 0; I don't think those two are correlated; the GPIO specifier format could just as easily be bank pin irrespective of whether the pinctrl driver contains SoC-specific tables or not. Correct me if I'm wrong, but each bank needs to have its own subnode to be able to address pins like this. That was the starting point of the whole series and the idea that if all the banks (which are SoC-specific) have to be defined anyway, maybe it wouldn't be too bad to put all the SoC-specific parameters there too. If you write your own custom .xlate function, I think you can do basically anything you want; all of the following are possible, I believe: a) Single DT node covering all banks, with GPIO specifier being n where n is some linearized GPIO ID across all banks. b) Single DT node covering all banks, with GPIO specifier being b n where b is the bank number, and n is the GPIO ID within the bank (xlate would presumably calculate (b * MAX_GPIOS_PER_BANK) + n and up with the same data as in (a) above. c) One DT node per bank, one gpio_chip registered per node, with the GPIO specifier being n where n is the GPIO ID within the bank the phandle points at. d) One DT node per bank, all contained within a single parent DT node, one gpio_chip registered per node (one for each bank node, and one for the parent node), with GPIO phandles pointing at the parent node, with GPIO specifier in the format of either (a) or (b) above, and the top-level node's .xlate returning a different gpio_chip (for one of the child bank-specific nodes) rather than the parent chip. At least, IIRC, Grant Likely was going to extend a gpio_chip's .xlate to be able to return a different chip; I'm not sure if that was implemented yet or not. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC 6/6] ARM: dts: exynos4210: Add platform-specific descriptions for pin controllers
On 09/21/2012 01:54 PM, Tomasz Figa wrote: On Friday 21 of September 2012 12:56:41 Stephen Warren wrote: On 09/20/2012 02:53 AM, Tomasz Figa wrote: The patch pinctrl: samsung: Parse pin banks from DT introduced platform-specific data parsing from DT. This patch adds all necessary nodes and properties to exynos4210 device tree sources. +++ b/arch/arm/boot/dts/exynos4210-pinctrl-banks.dtsi + samsung,pctl-offset = 0x000; + samsung,pin-bank = gpa0; + samsung,pin-count = 8; + samsung,func-width = 4; + samsung,pud-width = 2; + samsung,drv-width = 2; + samsung,conpdn-width = 2; + samsung,pudpdn-width = 2; The properties above represent the width of the fields. Must all fields always be packed together into say the LSB of the registers? What if there are gaps between the fields in a future SoC variant, or the order of the fields in the register changes? I think you want to add either a samsung,func-bit/samsung,func-position property for each of the fields, or change from samsung,func-width=4 to samsung,field-mask=0xf. IIRC, the generic pinctrl binding used a mask for this purpose. What if a future SoC variant adds more fields to the register? At that point, you'd need to edit the driver anyway in order to define a new DT property to represent the new field. Perhaps instead of having an explicit named property per field in the register, you want a simple list of fields: samsung,pin-property-names = func, pud, drv, conpdn, pudpdn; samsung,pin-propert-masks = 0xf 0x30 0xc0 0x300 0xc00; That would allow a completely arbitrary number of fields and layouts to be described. I wonder if for absolute generality you want a samsung,pin-stride property to represent the difference in register address per pin. I assume that's hard-coded as 4 right now. Hmm, considering so many different possible changes, maybe a more conservative solution would be better, like reducing the amount of information held in DT to bank type, e.g. samsung,bank-type = exynos4; or maybe compatible = samsung,exynos4-pin-bank*; and then define supported bank types in the driver. SoC-specific data would remain in DT, i.e. pctl-offset, pin-bank, pin-count, eint-offset, etc. Yes, removing much of the data from DT and putting it into a tiny table in the driver makes sense to me in this case. diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index ecbc707..0e93717 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -59,6 +59,10 @@ reg = 0x1140 0x1000; interrupts = 0 47 0; interrupt-controller; + samsung,geint-con = 0x700; + samsung,geint-mask = 0x900; + samsung,geint-pend = 0xA00; + samsung,svc = 0xB08; I assume those new properties represent register addresses within the block. If not, I don't understand what they are. Yes, they do. It's unclear to me why those properties aren't all part of exynos4210-pinctrl-banks.dtsi. Do you really have multiple SoCs where the register addresses for the pinctrl registers are the same (hence can be in a shared exynos4210-pinctrl-banks.dtsi), yet the register addresses for the geint registers are different (hence must be in non-shared exynos4210.dtsi)? Exynos4210-pincstrl-banks.dtsi isn't shared, it's specific to Exynos4210. Other SoCs are going to have their own whatever-pinctrl-banks.dtsi. OK, so my point here is: why not put all the pinctrl-related properties into a single file, rather than spreading them across different files. Having separate files makes sense if they can be re-used in different places, but not if they're single-use. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 7/6] pinctrl: exynos: Fix wakeup IRQ domain registration check
On Thu, Sep 20, 2012 at 4:53 PM, Tomasz Figa t.f...@samsung.com wrote: Because of a typo, incorrect field of a structure was being checked. This patch fixes the check to use correct field. Signed-off-by: Tomasz Figa t.f...@samsung.com Acked-by: Linus Walleij linus.wall...@linaro.org I assume you'll take this through the Samsung tree. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 0/6] pinctrl: samsung: Convert the driver to use per-bank GPIO and interrupt specifiers
On Mon, Sep 24, 2012 at 12:45 PM, Kyungmin Park kyungmin.p...@samsung.com wrote: On 9/24/12, Linus Walleij linus.wall...@linaro.org wrote: On Fri, Sep 21, 2012 at 4:22 PM, Tomasz Figa t.f...@samsung.com wrote: This is a continuation of work focused on improving the pinctrl-samsung driver. All look good to me, I guess these will go through the Samsung tree? Acked-by: Linus Walleij linus.wall...@linaro.org for all. Now samsung tree is merged so if you don't mind, can you merge it by pinctl tree? Yes but not until after the merge window... I have closed my tree. I think all dependencies are in the ARM SoC tree now, so I suspect it wouldn't apply anyway? Tomasz can you repost this after the merge window so I don't forget about applying it? Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 0/6] pinctrl: samsung: Convert the driver to use per-bank GPIO and interrupt specifiers
Hi Linus, On Monday 24 of September 2012 12:43:23 Linus Walleij wrote: On Fri, Sep 21, 2012 at 4:22 PM, Tomasz Figa t.f...@samsung.com wrote: This is a continuation of work focused on improving the pinctrl-samsung driver. All look good to me, I guess these will go through the Samsung tree? Acked-by: Linus Walleij linus.wall...@linaro.org for all. Hmm, these patches are just at RFC stage at the moment and depend on the first part which does somewhat heavy reorganization of the driver. So this is more like a proof of concept. After we settle all the things being discussed I will send a ready patch series including both of these parts. Thanks for your ack anyway. Best regards, Tomasz Figa -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
