On Mon, Feb 10, 2014 at 11:03:54AM +0100, Wolfram Sang wrote:
With I2C, class based instantiation means if a master driver has e.g.
I2C_CLASS_HWMON set, all slave drivers with this class will try to probe a
device using an array of possible addresses and some heuristics. That creates
traffic
Kukjin Kim wrote:
On 03/19/14 13:01, Mike Turquette wrote:
Quoting Olof Johansson (2014-03-10 19:52:01)
On Mon, Mar 10, 2014 at 6:50 PM, Kukjin Kimkgene@samsung.com
wrote:
Olof Johansson wrote:
Hi,
I don't see a single cc or acked-by line from Mike Turquette here.
I'll
Kukjin Kim wrote:
The following changes since commit
19a964644f1e655c3f67d539c1e99a9fbcc4588c:
ARM: SAMSUNG: remove all custom uncompress.h (2014-03-11 22:05:18
+0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
Kukjin Kim wrote:
Signed-off-by: Kukjin Kim kgene@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Catalin Marinas catalin.mari...@arm.com
---
Changes since v3:
- addressed comments from Mark
: updated reserved memory
:
Dear Tomasz,
On 16-Mar-2014, at 6:23 pm, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi,
On 14.03.2014 09:04, armdev wrote:
Hi,
We are trying to enable the UART3 on COM18 pins of arndale board. The UART3
RXD and TXD are on pins 2 and 4 which as per the base board specification is
Hi,
This patchset adds drivers and bindings to the following devices:
- Exynos DSI master,
- S6E8AA0 DSI panel,
It adds also display support in DTS files for the following boards:
- Exynos4210/Trats,
- Exynos4412/Trats2.
The patchset is based on exynos_drm_next branch.
It is the 3rd iteration
The patch adds DT bindings for Exynos DSI Master. DSIM follows rules
for DSI bus host bindings [1].
Properties describes its resources: memory, interrupt, clocks,
phy, regulators, frequencies of clocks and video interfaces.
[1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt
The patch adds driver for Exynos DSI master (DSIM). It is a platform driver
which is registered as exynos_drm_display sub-driver of exynos_drm framework
and implements DRM encoder/connector pair.
It is also MIPI-DSI host driver and provides DSI bus for panels.
It interacts with its panel(s) using
The patch adds s6e8aa0 panel node for trats2.
It adds also trats2 specific properties for DSI
and regulator required by panel.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
arch/arm/boot/dts/exynos4412-trats2.dts | 66 +
1 file changed, 66 insertions(+)
This patch adds explicit check if there is a connector with
connected status before fbdev initialization. It prevents creation
of default fbdev 1024x768 which is unusable on panels with bigger resolutions.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
MIPI DSI host node can contain child nodes which are not DSI devices.
Checking for existence of reg property can be used to distinguish such nodes.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/drm_mipi_dsi.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff
The patch adds bindings for s6e8aa0 panel.
Bindings describes panel resources, boot delays,
display timings, orientation and physical size.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
v2
- removed samsung prefix from panel physical size props,
- renamed file to follow convention of panel
This patch adds flags field to mipi_dsi_msg structure and two flags:
- MIPI_DSI_MSG_REQ_ACK - request ACK from peripheral for given message,
- MIPI_DSI_MSG_USE_LPM - use Low Power Mode to transmit message.
The first flag is usually helpful during DSI diagnostic, the second
flag is required by some
The patch adds MIPI-DSI based S6E8AA0 AMOLED LCD panel driver.
Driver uses mipi_dsi bus to communicate with panel and exposes drm_panel
interface.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
v2
- added bus error handling,
- set maxmimum DSI packet size on init,
- removed unsupported
The patch changes fimd node status to OK.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
arch/arm/boot/dts/exynos4210-trats.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index 996c7e3..02c6768
The patch adds s6e8aa0 panel node for trats.
It adds also trats specific properties for DSI.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
arch/arm/boot/dts/exynos4210-trats.dts | 57 ++
1 file changed, 57 insertions(+)
diff --git
This is a common part of DSI node for all Exynos4 boards.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 08452e1..3d14cdb
The patch changes fimd node status to OK.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
arch/arm/boot/dts/exynos4412-trats2.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index f7070e9..53c717b
Fix stall after hotplugging CPU1. Affected are SoCs where Multi Core Timer
interrupts are shared (SPI), e.g. Exynos 4210. The stall was a result of
starting the CPU1 local timer not in L1 timer but in L0 (which is used
by CPU0).
Trigger:
$ echo 0 /sys/bus/cpu/devices/cpu1/online echo 1
After hotplugging CPU1 the first call of interrupt handler for CPU1
oneshot timer was called on CPU0 because it fired up before setting IRQ
affinity. Affected are SoCs where Multi Core Timer interrupts are shared
(SPI), e.g. Exynos 4210.
During setup of the MCT timers the clock event device
Return value of exynos4_mct_tick_clear() was never checked so it can
be safely changed to void.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/clocksource/exynos_mct.c |8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-exynos/common.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index cd53b72449a0..0d19a1b0444e 100644
---
* Russell King rmk+ker...@arm.linux.org.uk [140328 08:22]:
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to preserve the value of bit 30
in the auxiliary control
As defined in the new binding.
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
drivers/pci/host/pci-imx6.c | 74 ++---
1 file changed, 29 insertions(+), 45 deletions(-)
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index
Friendly ping.
Bjorn could you please pick the patches labeled PCI: ... up? Both the
Tegra and i.MX dts changes are already queued up for 3.15 and I think
all patches gathered enough acks and tested-bys for this to be low risk.
Regards,
Lucas
Am Mittwoch, den 05.03.2014, 14:25 +0100 schrieb
The glue around the core designware IP is significantly
different between the Exynos and i.MX implementation,
which is reflected in the DT bindings.
This changes the i.MX6 binding to reuse as much as
possible from the common designware binding and
removes old cruft.
I removed the optional GPIOs
They are dropped with the new binding.
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
drivers/pci/host/pci-imx6.c | 42 --
1 file changed, 42 deletions(-)
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index
We don't need this anymore. The irqs are now
properly mapped through the DT.
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
drivers/pci/host/pci-imx6.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index
On i.MX6 the host controller MSI irq is shared
with PCI legacy INTD. Make sure we don't bail too
early from the irq handler.
The issue is fairly theoretical as it would require
a system setup with a PCIe switch where one connected
device is using legacy INTD and another one using
MSI, but better
Allows fror proper refcounting of the parent clocks
when enabling the clock output on CLK1/2 pads.
Signed-off-by: Lucas Stach l.st...@pengutronix.de
---
arch/arm/mach-imx/clk-imx6q.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/clk-imx6q.c
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to preserve the value of bit 30
in the auxiliary control register.
Signed-off-by: Russell King
From: Byungho An bh74...@samsung.com
This fixes following:
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c:1828 sxgbe_hw_init()
error: potential null dereference 'priv-hw'. (kmalloc returns null)
Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Byungho An
From: Byungho An bh74...@samsung.com
This fixes followings:
sparse warnings: (new ones prefixed by )
drivers/net/ethernet/samsung/sxgbe/sxgbe_platform.c:197:5:
sparse: symbol 'sxgbe_platform_freeze' was not declared. Should it be static?
* Russell King rmk+ker...@arm.linux.org.uk [140328 08:22]:
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess. Split them out
into those which are L2C-310 specific and ones which refer to earlier
devices. Provide full
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess. Split them out
into those which are L2C-310 specific and ones which refer to earlier
devices. Provide full auxiliary control register definitions.
Signed-off-by: Russell
While working on MSI support for the i.MX6 PCIe host driver
it has been discovered that the binding for this host controller
is broken in many ways (refer to the patch descriptions for more
info) and was introduced without proper discussion about what
should/should not be in the binding.
This
From: Byungho An bh74...@samsung.com
Date: Fri, 28 Mar 2014 10:57:44 -0700
From: Byungho An bh74...@samsung.com
This fixes following:
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c:1828 sxgbe_hw_init()
error: potential null dereference 'priv-hw'. (kmalloc returns null)
Reported-by:
From: Byungho An bh74...@samsung.com
Date: Fri, 28 Mar 2014 10:57:36 -0700
From: Byungho An bh74...@samsung.com
This fixes followings:
sparse warnings: (new ones prefixed by )
drivers/net/ethernet/samsung/sxgbe/sxgbe_platform.c:197:5:
sparse: symbol 'sxgbe_platform_freeze' was not
Thanks Russel,
On 03/28/2014 04:18 PM, Russell King wrote:
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess. Split them out
into those which are L2C-310 specific and ones which refer to earlier
devices. Provide full
On Fri, Mar 28, 2014 at 4:18 PM, Russell King
rmk+ker...@arm.linux.org.uk wrote:
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess. Split them out
into those which are L2C-310 specific and ones which refer to earlier
On Fri, Mar 28, 2014 at 09:00:48AM -0700, Tony Lindgren wrote:
* Russell King rmk+ker...@arm.linux.org.uk [140328 08:22]:
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess. Split them out
into those which are
* Russell King - ARM Linux li...@arm.linux.org.uk [140328 14:06]:
On Fri, Mar 28, 2014 at 09:00:48AM -0700, Tony Lindgren wrote:
* Russell King rmk+ker...@arm.linux.org.uk [140328 08:22]:
We have a mixture of different devices with different register layouts,
but we group all the bits
On Friday 28 March 2014, Kukjin Kim wrote:
Kukjin Kim wrote:
On 03/19/14 13:01, Mike Turquette wrote:
Thanks :-)
Acked-by: Mike Turquettemturque...@linaro.org
It's time. Please pull this [5/6] and [GIT PULL 6/6] Samsung
clk-s3c24xx updates for v3.15.
Hi Arnd, Olof and
On Tuesday 18 March 2014, Kukjin Kim wrote:
The following changes since commit d9671ca923445aa870ecc34df3db01dd602d87fc:
ARM: EXYNOS: Remove uncompress.h (2014-02-24 09:39:18 +0900)
are available in the git repository at:
On Tuesday 18 March 2014, Kukjin Kim wrote:
The following changes since commit 86feafebbec2b510daf36ffbdbe10228ed890b00:
ARM: dts: use macros in clock bindings for exynos5440 (2014-02-26
09:53:31 +0900)
are available in the git repository at:
On Thursday 20 March 2014, Kukjin Kim wrote:
Samsung 3rd cleanup for v3.15
- Remove mach/hardware.h in mach-exynos
- Remove invalid code from mach/hardware.h in mach-s3c24xx
Note that this is based on previous
On Thursday 20 March 2014, Kukjin Kim wrote:
Samsung 3rd DT updates for v3.15
- Arndale Octa board updates:
LDO3 and LDO23 enabled for soft-reset
LDO9 enabled for USB operation
MDMA1 disabled to avoid imprecise external abort
Note that this is based on previous tags/samsung-dt-2
On Thursday 20 March 2014, Kukjin Kim wrote:
Exynos cleanup for v3.15
- reorganize code for
- add support reserve memory for mfc-v7
- consolidate exynos4 and exynos5 machine codes
- add generic compatible strings for exynos4 and exynos5
- update DT with generic compatible strings
- move
On Thursday 20 March 2014, Kukjin Kim wrote:
Samsung PM related 2nd updates for v3.15
From Tomasz Figa t.f...@samsung.com:
Current Samsung PM code is heavily unprepared for multiplatform
systems. The design implies accessing functions and global
variables defined in particular mach-
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