Hello Doug,
On 10 June 2014 23:56, Doug Anderson diand...@chromium.org wrote:
Naveen,
Not a full review, but a few quick things I happened to notice:
On Tue, Jun 10, 2014 at 3:08 AM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
@@ -94,7 +93,6 @@ Example:
Hello Dan,
On 2014년 06월 10일 21:38, Dan Carpenter wrote:
Hello Inki Dae,
The patch df5225bc9a87: drm/exynos: consider deferred probe case
from May 29, 2014, leads to the following static checker warning:
drivers/gpu/drm/exynos/exynos_drm_fimd.c:996 fimd_probe()
warn:
Hello Tomasz,
On 11 June 2014 01:19, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Naveen,
On 10.06.2014 12:08, Naveen Krishna Chatradhi wrote:
Currently, spi-s3c64xx.c needs cs-gpio chip select GPIO to be
defined under controller-data node under each slave node.
[snip]
@@ -85,6 +83,7 @@
This patch moves the cs-gpio field from controller-data child
node to under the spi device node.
Respective changes are preposed to spi-s3c64xx.c driver.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Acked-by: Rob Herring r...@kernel.org
Cc: Javier Martinez Canillas
We recently changed this function to return a pointer instead of an int
so we need to change this zero to a NULL or Sparse complains:
drivers/gpu/drm/exynos/exynos_drm_drv.h:346:47:
warning: Using plain integer as NULL pointer
Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
On pią, 2014-04-04 at 11:48 +0200, Daniel Lezcano wrote:
The following driver is for exynos4210. I did not yet finished the other
boards, so
I created a specific driver for 4210 which could be merged later.
The driver is based on Colin Cross's driver found at:
On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Tue, 10 Jun 2014, Doug Anderson wrote:
My S-state knowledge is not strong, but I believe that Lorenzo's
questions matter if
Hello Naveen,
On 06/11/2014 08:31 AM, Naveen Krishna Chatradhi wrote:
This patch moves the cs-gpio field from controller-data child
node to under the spi device node.
Your patch looks good to me but I think that the commit message is inaccurate.
It does not move the cs-gpio property to the
Hello Javier,
On 11 June 2014 16:51, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Hello Naveen,
On 06/11/2014 08:31 AM, Naveen Krishna Chatradhi wrote:
This patch moves the cs-gpio field from controller-data child
node to under the spi device node.
Your patch looks good
Hello Javier,
On 11 June 2014 16:43, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Hello Naveen,
Thanks a lot for your patches and sorry that I didn't review your prior two
versions but I didn't have the time yesterday.
On 06/11/2014 08:31 AM, Naveen Krishna Chatradhi
On Wed, Jun 11, 2014 at 3:43 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Tue, 10 Jun 2014, Doug Anderson wrote:
My
On 10/06/14 22:32, Rob Herring wrote:
On Tue, Jun 10, 2014 at 1:09 PM, Doug Anderson diand...@chromium.org wrote:
Naveen / Sylwester,
On Tue, Jun 10, 2014 at 4:00 AM, Naveen Krishna Ch
naveenkrishna...@gmail.com wrote:
Can we support both cs-gpio and cs-gpios for backward compatibility ?
This patch use key code macros on exynos4 series boards.
Using macros improve readability on device tree.
Signed-off-by: Beomho Seo beomho@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi |1 +
arch/arm/boot/dts/exynos4210-origen.dts |1 -
Rob Herring wrote:
From: Rob Herring r...@kernel.org
The addition of Exynos to multi-platform configs creates a mess of config
options with options appearing before the Exynos config option. This is
due to arch/arm/plat-samsung/Kconfig being included out of order with the
other Samsung
On Wed, Jun 11, 2014 at 01:14:21PM +0100, Chander Kashyap wrote:
On Wed, Jun 11, 2014 at 3:43 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre
On 11 June 2014 18:45, Lorenzo Pieralisi lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 01:14:21PM +0100, Chander Kashyap wrote:
On Wed, Jun 11, 2014 at 3:43 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
Hi
Hi Lorenzo and Chander,
On Wed, Jun 11, 2014 at 6:45 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 01:14:21PM +0100, Chander Kashyap wrote:
On Wed, Jun 11, 2014 at 3:43 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 05:52:10AM
Paul,
On Wed, Jun 11, 2014 at 3:37 AM, Paul Bolle pebo...@tiscali.nl wrote:
On Tue, 2014-05-20 at 09:46 +0100, Lee Jones wrote:
On Wed, 30 Apr 2014, Doug Anderson wrote:
From: Bill Richardson wfric...@chromium.org
This just updates include/linux/mfd/cros_ec_commands.h to match the
On 06/04/14 17:07, Santosh Shukla wrote:
On 2 June 2014 15:40, Dave Martindave.mar...@arm.com wrote:
On Mon, May 26, 2014 at 09:23:45PM +0530, Santosh Shukla wrote:
From: santosh shuklasantosh.shu...@linaro.org
Add non-global symbol .LLl2x0_regs_phys to avoid build break in thumb2 mode.
Chander,
On Tue, Jun 10, 2014 at 9:52 PM, Chander Kashyap k.chan...@samsung.com wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Tue, 10 Jun 2014, Doug Anderson wrote:
My S-state knowledge is not strong, but I believe that Lorenzo's
On 06/12/14 00:19, Doug Anderson wrote:
Chander,
On Tue, Jun 10, 2014 at 9:52 PM, Chander Kashyapk.chan...@samsung.com wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitrenicolas.pi...@linaro.org wrote:
On Tue, 10 Jun 2014, Doug Anderson wrote:
My S-state knowledge is not
This series intends to add support for L2 cache on Exynos4 SoCs on boards
running under secure firmware, which requires certain initialization steps
to be done with help of firmware, as selected registers are writable only
from secure mode.
First three patches extend existing support for secure
According to the documentation, TAG_LATENCY_CTRL and DATA_LATENCY_CTRL
registers of L2C-310 can be written only in secure mode, so
l2c_write_sec() should be used to change them, instead of plain
writel_relaxed().
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mm/cache-l2x0.c | 8
This patch adds device tree nodes for L2 cache controller present on
Exynos4 SoCs.
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/boot/dts/exynos4210.dtsi | 9 +
arch/arm/boot/dts/exynos4x12.dtsi | 9 +
2 files changed, 18 insertions(+)
diff --git
Exynos4 SoCs equipped with an L2C-310 cache controller and running under
secure firmware require certain registers of aforementioned IP to be
accessed only from secure mode. This means that SMC calls are required
for certain register writes. To handle this, an implementation of
.write_sec callback
Certain platforms (i.e. Exynos) might need to set .write_sec callback
from firmware initialization which is happenning in .init_early callback
of machine descriptor. However current code will overwrite the pointer
with whatever is present in machine descriptor, even though it can be
already set
For certain platforms (e.g. Exynos) it is necessary to read back some
values from registers before they can be written (i.e. SMC calls that
set multiple registers per call), so base address of L2C controller is
needed for .write_sec operation. This patch adds base argument to
.write_sec callback
On Fri, 6 Jun 2014, Vivek Gautam wrote:
Facilitate getting required 3.3V and 1.0V VDD supply for
EHCI controller on Exynos.
With patches for regulators' nodes merged in 3.15:
c8c253f ARM: dts: Add regulator entries to smdk5420
275dcd2 ARM: dts: add max77686 pmic node for smdk5250,
On 06/11/14 00:28, Tomasz Figa wrote:
Hi Kukjin,
Hi Tomasz,
On 30.05.2014 20:18, Kukjin Kim wrote:
On 05/30/14 20:41, Tomasz Figa wrote:
Hi,
On 23.05.2014 16:39, Tomasz Figa wrote:
This patch fixes reg entry sizes in GIC node that were not large enough
to cover whole regions.
Hello Tushar,
On 06/11/2014 07:39 AM, Tushar Behera wrote:
On 06/11/2014 01:56 AM, Doug Anderson wrote:
Javier,
On Tue, Jun 10, 2014 at 1:03 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Yes, I did not have this issue before. However... I installed the latest
Peach
diff --git a/arch/arm/include/asm/mach/arch.h
b/arch/arm/include/asm/mach/arch.h
index 060a75e..ddaebcd 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -46,7 +46,8 @@ struct machine_desc {
enum reboot_modereboot_mode;/* default
On Wed, Jun 11, 2014 at 7:32 AM, Tushar Behera tusha...@samsung.com wrote:
When the output clock of AUDSS mux is disabled, we are getting kernel
oops while doing a clk_get() on other clocks provided by AUDSS. Though
user manual doesn't specify this dependency, we came across this issue
while
Quoting Tushar Behera (2014-06-10 22:32:17)
When the output clock of AUDSS mux is disabled, we are getting kernel
oops while doing a clk_get() on other clocks provided by AUDSS. Though
user manual doesn't specify this dependency, we came across this issue
while disabling the parent of AUDSS
Tushar Behera tusha...@samsung.com writes:
When the output clock of AUDSS mux is disabled, we are getting kernel
oops while doing a clk_get() on other clocks provided by AUDSS.
Though user manual doesn't specify this dependency, we came across
this issue while disabling the parent of AUDSS
Hello Naveen,
On 06/11/2014 01:38 PM, Naveen Krishna Ch wrote:
Hello Javier,
On 11 June 2014 16:43, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Hello Naveen,
Thanks a lot for your patches and sorry that I didn't review your prior two
versions but I didn't have the
Hi Tushar,
On 11.06.2014 07:32, Tushar Behera wrote:
When the output clock of AUDSS mux is disabled, we are getting kernel
oops while doing a clk_get() on other clocks provided by AUDSS. Though
user manual doesn't specify this dependency, we came across this issue
while disabling the parent
On 11.06.2014 19:27, Javier Martinez Canillas wrote:
On 06/11/2014 01:38 PM, Naveen Krishna Ch wrote:
On 11 June 2014 16:43, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
On 06/11/2014 08:31 AM, Naveen Krishna Chatradhi wrote:
[snip]
return ERR_PTR(-EINVAL);
Hello Tomasz,
On 11 June 2014 23:20, Tomasz Figa tomasz.f...@gmail.com wrote:
On 11.06.2014 19:27, Javier Martinez Canillas wrote:
On 06/11/2014 01:38 PM, Naveen Krishna Ch wrote:
On 11 June 2014 16:43, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
On 06/11/2014 08:31 AM,
On Wed, Jun 11, 2014 at 11:53:30PM +0530, Naveen Krishna Ch wrote:
On 11 June 2014 23:20, Tomasz Figa tomasz.f...@gmail.com wrote:
- in DT case, don't do anything in the driver about the GPIO chip
select, because it will be handled automatically by the core.
But, i see that
This series is based on exynos-drm-next branch of Inki Dae's tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git
I have tested this after adding few DT changes for exynos5250-snow,
exynos5420-peach-pit and exynos5800-peach-pi boards.
This patchset also consolidates
On 11.06.2014 20:23, Naveen Krishna Ch wrote:
Hello Tomasz,
On 11 June 2014 23:20, Tomasz Figa tomasz.f...@gmail.com wrote:
On 11.06.2014 19:27, Javier Martinez Canillas wrote:
On 06/11/2014 01:38 PM, Naveen Krishna Ch wrote:
On 11 June 2014 16:43, Javier Martinez Canillas
Add helper functions to create bridge chain and to call the
corresponding next_bridge functions.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
Suggested-by: Rob Clark robdcl...@gmail.com
---
include/drm/drm_crtc.h | 72
1 file changed, 72
exynos_dp supports a simple bridge chain with ptn3460 bridge
and an LVDS panel attached to it.
This patch creates the bridge chain with ptn3460 as the head
of the list and panel_binder being the tail.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/gpu/drm/exynos/exynos_dp_core.c
This patch adds a simple driver to handle all the LCD and LED
powerup/down routines needed to support eDP/LVDS panels.
The LCD and LED units are usually powered up via regulators,
and almost on all boards, we will have a BACKLIGHT_EN pin to
enable/ disable the backlight.
Sometimes, we can have
Move the DP training and video enable from the hotplug handler into
a seperate function and call the same during dpms ON.
With existing code, DP HPD should be generated just few ms before
calling enable_irq in dp_poweron.
This patch removes that stringent time constraint.
Signed-off-by: Ajay
From: Rahul Sharma rahul.sha...@samsung.com
This patch adds ps8622 lvds bridge discovery code to the dp driver.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/gpu/drm/exynos/exynos_dp_core.c |5 +
1 file changed, 5
Modify the driver to invoke callbacks for the next bridge
in the bridge chain.
Also, remove the drm_connector implementation from ptn3460,
since the same is implemented using panel_binder.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/gpu/drm/bridge/ptn3460.c| 136
Hi,
I am running lubuntu 14.04 with the latest Linaro kernel
(git.linaro.org/kernel/linux-linaro-tracking)
on arndale, I found once X is started ('xinit' is enough) , any one of
the following operations will
very easily cause kernel panic or hang,
(1) Ctrl+Alt+F1 and Alt+F7 switch between
On Thursday, June 12, 2014 12:39 AM, Alan Stern wrote:
On Fri, 6 Jun 2014, Vivek Gautam wrote:
Facilitate getting required 3.3V and 1.0V VDD supply for
EHCI controller on Exynos.
With patches for regulators' nodes merged in 3.15:
c8c253f ARM: dts: Add regulator entries to smdk5420
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