The following changes since commit 7171511eaec5bf23fb06078f59784a3a0626b38f:
Linux 3.16-rc1 (2014-06-15 17:45:28 -1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
tags/samsung-fixes-1
for you to fetch changes up to
On Sat, Jun 21, 2014 at 10:53:14PM +0530, Naveen Krishna Ch wrote:
The revisions were pretty quick
Yes, this is part of what I'm concerned about - it often means that
there are problems, either the review wasn't very detailed or the code
is being written too hastily. In this case this is
On Sun, Jun 01, 2014 at 08:15:57PM +0300, Vasily Khoruzhick wrote:
Use dmaengine instead of legacy s3c24xx DMA API for s3c24xx and s3c2412
These fail to apply against current code, can you please check and
resend?
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On Mon, Jun 16, 2014 at 4:56 PM, Tushar Behera trbli...@gmail.com wrote:
On 06/11/2014 09:28 PM, Javier Martinez Canillas wrote:
On Wed, Jun 11, 2014 at 7:32 AM, Tushar Behera tusha...@samsung.com wrote:
Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
As per the user
Hello,
Both on kgene's for-next 053341b6993a3e838cfa35c9f594fb94ee3da9ce and on
Linus' 401c58fcbbf570e7e4a8ee0e21ffd829deb4de0b my Arndale Octa board
fails to boot with an Unhandled fault: synchronous external abort
(0x210). This is a regression from v3.15, 100% reproducible.
[6.251931]
Hi Andreas,
On 22.06.2014 18:13, Andreas Färber wrote:
Hello,
Both on kgene's for-next 053341b6993a3e838cfa35c9f594fb94ee3da9ce and on
Linus' 401c58fcbbf570e7e4a8ee0e21ffd829deb4de0b my Arndale Octa board
fails to boot with an Unhandled fault: synchronous external abort
(0x210). This is a
On Sunday 22 June 2014 17:22:16 Kukjin Kim wrote:
The following changes since commit 7171511eaec5bf23fb06078f59784a3a0626b38f:
Linux 3.16-rc1 (2014-06-15 17:45:28 -1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
It's 1.6 GHz for the Cortex-A15.
Avoids warnings like /cpus/cpu@0 missing clock-frequency property.
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/exynos5410.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5410.dtsi
Am 30.05.2014 11:25, schrieb Daniel Lezcano:
Hi all,
I am trying an upstream kernel + some patches to enable ethernet on
arndale octa.
Unfortunately, only 4 cores boot up. The other ones fail to boot.
[12.179453] CPU6: failed to come online
[13.189479] CPU7: failed to come online
Hi
PTAL https://patchwork.kernel.org/patch/4315711/
I hope your tree already includes
http://www.gossamer-threads.com/lists/linux/kernel/1940123
Regards,
Alim
On Mon, Jun 23, 2014 at 2:32 AM, Andreas Färber afaer...@suse.de wrote:
Am 30.05.2014 11:25, schrieb Daniel Lezcano:
Hi all,
I am
Sachin Kamat wrote:
Hi Jaewon,
On Thu, Jun 19, 2014 at 7:33 AM, Jaewon Kim jaewon02@samsung.com wrote:
pwm-cells should be 3. Third cell is optional PWM flags. And This flag
supported by this binding is PWM_POLARITY_INVERTED.
Signed-off-by: Jaewon Kim jaewon02@samsung.com
It's 1, not 1.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/s2mps11.txt
b/Documentation/devicetree/bindings/mfd/s2mps11.txt
index
Adds initial support for the HP Chromebook 11.
Cc: Vincent Palatin vpala...@chromium.org
Cc: Doug Anderson diand...@chromium.org
Cc: Stephan van Schaik step...@synkhronix.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/Makefile | 1 +
On Tue, Jun 17, 2014 at 8:55 PM, Thomas Abraham thomas...@samsung.com wrote:
From: Thomas Abraham thomas...@samsung.com
The CPU clock provider supplies the clock to the CPU clock domain. The
composition and organization of the CPU clock provider could vary among
Exynos SoCs. A CPU clock
On Tue, Jun 17, 2014 at 8:55 PM, Thomas Abraham thomas...@samsung.com wrote:
From: Thomas Abraham thomas...@samsung.com
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type and the independent
clock blocks that made up the arm
On Mon, Jun 23, 2014 at 6:51 AM, Andreas Färber afaer...@suse.de wrote:
It's LDO2, not LD02.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt | 2 +-
On Mon, Jun 23, 2014 at 6:51 AM, Andreas Färber afaer...@suse.de wrote:
It's 1, not 1.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Adding linux-samsung-soc and linux-arm-kernel ML for wider audience.
On 06/19/2014 04:12 PM, Tushar Behera wrote:
On 06/19/2014 03:02 PM, Tushar Behera wrote:
On 06/18/2014 09:22 AM, Kevin Hilman wrote:
On Tue, Jun 17, 2014 at 8:26 PM, Tushar Behera trbli...@gmail.com wrote:
On 06/17/2014
On 06/22/2014 09:43 PM, Andreas Färber wrote:
Hello,
Both on kgene's for-next 053341b6993a3e838cfa35c9f594fb94ee3da9ce and on
Linus' 401c58fcbbf570e7e4a8ee0e21ffd829deb4de0b my Arndale Octa board
fails to boot with an Unhandled fault: synchronous external abort
(0x210). This is a regression
Hi Tim,
On Sat, Jun 21, 2014 at 2:31 AM, Tim Kryger tim.kry...@gmail.com wrote:
On Thu, Jun 19, 2014 at 8:33 PM, Sachin Kamat spk.li...@gmail.com wrote:
On Thu, Jun 19, 2014 at 6:11 PM, Jaehoon Chung jh80.ch...@samsung.com
wrote:
On 06/19/2014 07:40 PM, Sachin Kamat wrote:
On Thu, Jun 19,
On Fri, May 30, 2014 at 11:49 PM, Andreas Färber afaer...@suse.de wrote:
Am 28.05.2014 06:13, schrieb Sachin Kamat:
Almost all Exynos-series of SoCs that run in secure mode don't need
additional offset for every CPU, with Exynos4412 being the only
exception.
Tested on Origen-Quad
'display-timings' should be a subnode for fimd node. Moving this
node appropriately gets the display back on Origen/Origen-Quad boards.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
Based on next-20140620.
Tested on Exynos4210-Origen board. Looks like there are still some pending
bits on
Mixer soft reset is a recommended step before reconfiguring
the mixer after power on. Mixer looses the previous state of
DMAs if soft reset. This is the recommendation from the
hardware team.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_mixer.c |2 ++
mixer_wait_for_vblank function expects that the upcoming
vsync interrupt handler routine will clear the
wait_vsync_event atomic variable.
For this to happen, interrupts should be enabled and
disabled properly.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Allowing only one layer update per vsync can cause issues
while there are update available for both layers. There is
a good amount of possibility to loose updates if we allow
single update per vsync.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_mixer.c |
Power state variable holds the state of the mixer device.
Power on and power off functions are toggling these variable
at wrong place.
State variable should be changed to true only after Runtime
PM and clocks are enabled. Else it may result to a situation
where mixer registers are accessed with
Fixes for various issues which are to Power On/Off sequence,
Layer update, waiting for vblank in exynos mixer driver.
v2: 1) Repalce mixer_enable_vblank with drm_vblank_get.
This series is based on exynos-drm-fixes branch in Inki dae's tree.
Rahul Sharma (5):
drm/exynos: set power state
Mixer should be power gated only after it is gracefully stopped.
The recommended sequence is to Stop the mixer and wait till
it enters to IDLE state before gating the clocks and power to
the mixer.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_mixer.c |
HDMI probe proceeds with dummy regulators when the regulators
are not provided in DT node or regulator provider has not get
probed or failed to register the regulators.
This patch modify hdmi driver to defer the probe in case the
regulators are not available.
Signed-off-by: Rahul Sharma
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