This patch resolves the issue that component object isn't removed
correctly.
A given component object couldn't be placed to head of drm_component_list
so all component objects added to the drm_component_list should be checked
to remove the given component object.
Signed-off-by: Inki Dae
Let's handle i2c interrupt re-configuration in i2c driver. This will
help us in removing some soc specific checks from machine files and
will help in removing static iomapping of SYS register in exynos.c
Also handle saving and restoring of SYS_I2C_CFG register during
suspend and resume of i2c
Hi Kukjin,
Lukasz Majewski wrote:
+ Bart, Tomasz and MLs
Hi Lukasz,
Please post including MLs, even resending.
Will apply for v3.19, and just note that you asked me to apply this
for 3.18 in personal talk but I couldn't see any requirements for
fixes-3.18. If I'm missing
As all these code has been moved into i2c driver, now we can
safely remove them from machine files.
CC: Russell King li...@arm.linux.org.uk
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
arch/arm/mach-exynos/exynos.c | 39 ++-
This patch adds syscon based phandle to i2c device nodes of exynos5250
and exynos5420. These phandles will be used to save restore i2c sysreg
configuration register during s2r from i2c driver.
CC: Rob Herring robh...@kernel.org
CC: Randy Dunlap rdun...@infradead.org
CC: Russell King
On Saturday 22 November 2014 06:18 AM, Kukjin Kim wrote:
Wolfram Sang wrote:
Hi Wolfram,
I usually don't take DTS patches. They should go via arm-soc. Please say
so if there are reasons I should take them.
I CC'ed to you because same patch contains changes in i2c driver.
Yes, those
This patch adds component support for vidi driver.
vidi driver is a kms driver so it doesn't need to be registered
to exynos_drm_subdrv_list. For this, it changes for the component
framework to be used for vidi driver.
This patch fixes below error also,
# echo 1
This patch adds component support for vidi driver.
vidi driver is a kms driver so it doesn't need to be registered
to exynos_drm_subdrv_list. For this, it changes for the component
framework to be used for vidi driver.
This patch fixes below error also,
# echo 1
Hi Kevin,
On Sat, Nov 22, 2014 at 12:53 AM, Kevin Hilman khil...@kernel.org wrote:
Hi Ajay,
AJAY KUMAR RAMAKRISHNA SHYMALAMMA ajaykumar...@samsung.com writes:
I tried to reproduce the issue which you reported,
but I am sorry I am not able to reproduce it.
I tried with my patches for DRM
On Sun, Nov 23, 2014 at 12:26 AM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
Hello Vivek
On Wed, Nov 19, 2014 at 1:03 PM, Vivek Gautam gautamvivek1...@gmail.com
wrote:
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Thanks for testing.
You are welcome
On Mon, Nov 24, 2014 at 02:03:38PM +0530, Pankaj Dubey wrote:
Let's handle i2c interrupt re-configuration in i2c driver. This will
help us in removing some soc specific checks from machine files and
will help in removing static iomapping of SYS register in exynos.c
Also handle saving and
Hell Krzysztof,
On 11/22/2014 11:21 AM, Krzysztof Kozlowski wrote:
By bisecting I found that the commit introducing both regressions is:
ae43b32 (ARM: 8202/1: dmaengine: pl330: Add runtime Power Management
support v12)
By reverting ae43b32, next-20141121 boots with both
On 11/24/2014 10:38 AM, Javier Martinez Canillas wrote:
Hell Krzysztof
An unfortunate typo, this was Hello of course :-)
Best regards,
Javier
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More majordomo info
On pią, 2014-11-21 at 21:49 +0100, Javier Martinez Canillas wrote:
Hello Kevin,
On 11/21/2014 05:38 PM, Kevin Hilman wrote:
So, I see two different boot failures on the Peach Pi[t] Chromebooks:
1) next20141121 boot fails due snd-soc-snow
Disabling CONFIG_SND_SOC_SNOW makes the boot
Hello Ajay,
On 11/21/2014 09:57 PM, Javier Martinez Canillas wrote:
On 11/21/2014 06:32 PM, Ajay kumar wrote:
Hi,
I have rebased my bridge series on top of linux-next.
This is my git log:
4b38a6f Revert Revert ARM: exynos_defconfig: Enable options for
display panel support
6fb39a7 ARM:
On pon, 2014-11-24 at 10:38 +0100, Javier Martinez Canillas wrote:
Hell Krzysztof,
On 11/22/2014 11:21 AM, Krzysztof Kozlowski wrote:
By bisecting I found that the commit introducing both regressions is:
ae43b32 (ARM: 8202/1: dmaengine: pl330: Add runtime Power Management
support
On Mon, Nov 24, 2014 at 11:11:23AM +0530, Vivek Gautam wrote:
DP PHY now require pmu-system-controller to handle PMU register
to control PHY's power isolation. Adding the same to dp-phy
node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Jingoo Han jg1@samsung.com
On 24/11/14 08:30, Andrzej Hajda wrote:
sclk_hdmiphy clock is generated by HDMI-PHY and depends on hdmi gate clock.
The patch models this dependency using parent/child hirerarchy.
The patch fixes issue with system hangs during mixer device access, mixer uses
sclk_hdmiphy descendant clock.
Hi,
On Mon, Nov 24, 2014 at 4:02 PM, Thierry Reding
thierry.red...@gmail.com wrote:
On Mon, Nov 24, 2014 at 11:11:23AM +0530, Vivek Gautam wrote:
DP PHY now require pmu-system-controller to handle PMU register
to control PHY's power isolation. Adding the same to dp-phy
node.
Signed-off-by:
On Mon, Nov 24, 2014 at 04:17:18PM +0530, Vivek Gautam wrote:
Hi,
On Mon, Nov 24, 2014 at 4:02 PM, Thierry Reding
thierry.red...@gmail.com wrote:
On Mon, Nov 24, 2014 at 11:11:23AM +0530, Vivek Gautam wrote:
DP PHY now require pmu-system-controller to handle PMU register
to control
This patchset adds the support of Exynos3250-based Monk board and Exynos-based
boards compatible string and description to remove build warning. Also, this
patchset includes a patch which remove unused dt node for command line in
Exynos3250-based Rinato dts file.
Changes from v2:
- Include new
This patch removes unused dt node of command line from Exynos3250-based
Rinato board because kernel use the command line from bootloader.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
arch/arm/boot/dts/exynos3250-rinato.dts | 4
1 file changed, 4 deletions(-)
diff --git
From: Youngjun Cho yj44@samsung.com
This patch adds new board dts file to support Samsung Monk board which is
based on Exynos3250 SoC and has different H/W configuration from Rinato.
This patch is based on linux-samsung.git for-next branch and depends on
[PATCHv2 0/2] ARM: dts: Add new board
This patch adds the missing compatible/description of Exynos-based boards
to remove following build warning.
WARNING: DT compatible string samsung,... appears un-documented --
check ./Documentation/devicetree/bindings/
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
On Mon, Nov 24, 2014 at 12:48:31PM +0530, D Krishna Mohan wrote:
Attaching the patch with changes suggested by Uwe. Though there is another
patch which I submitted, but I leave it to Mark Brown as to which patch to
pick.
Please send patches in the format covered in SubmittingPatches, the
tools
Hello Krzysztof,
On 11/24/2014 11:13 AM, Krzysztof Kozlowski wrote:
Ok, please let me know if you need anything else from me.
Thanks! I replied before seeing your response. Anyway the dmatests are
the same I got on Arndale Octa.
It seems that mau_epll has to be enabled... or something is
On pon, 2014-11-24 at 12:07 +0100, Javier Martinez Canillas wrote:
Hello Krzysztof,
On 11/24/2014 11:13 AM, Krzysztof Kozlowski wrote:
Ok, please let me know if you need anything else from me.
Thanks! I replied before seeing your response. Anyway the dmatests are
the same I got on
Fixes the following compilation warning:
Warning: 'rt5631_i2c_dt_ids' defined but not used - when DT is not used.
Signed-off-by: Claude Youn claude.y...@gmail.com
Signed-off-by: Krishna Mohan Dani krishna...@samsung.com
---
sound/soc/codecs/rt5631.c |2 +-
1 file changed, 1 insertion(+), 1
On Mon, Nov 24, 2014 at 4:26 PM, Thierry Reding
thierry.red...@gmail.com wrote:
On Mon, Nov 24, 2014 at 04:17:18PM +0530, Vivek Gautam wrote:
Hi,
On Mon, Nov 24, 2014 at 4:02 PM, Thierry Reding
thierry.red...@gmail.com wrote:
On Mon, Nov 24, 2014 at 11:11:23AM +0530, Vivek Gautam wrote:
Hello Vivek, Thierry,
On 11/24/2014 12:29 PM, Vivek Gautam wrote:
Yes. Back at the time a decision was made that device trees need to be
stable ABI because eventually they'd be shipped with the device rather
than the distribution. As such it may not at all be possible to update
them (they
Posting this series as RFC to get more clarity as lot of power domain related
discussion is happening in mailing lists.
This patch series[1 - 12] performs several implementations as listed below,
1) Converts power domain driver to platform driver.
2) Registers this driver as MFD client driver.
2014-11-22 Inki Dae inki@samsung.com:
2014-11-21 8:54 GMT+09:00 Gustavo Padovan gust...@padovan.org:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
DP was leaked everytime function returns EPROBE_DEFER, free it before
returning.
It seems that you misunderstood devm_* api.
USB and Power regulator on Exynos7 require gpios available
in BUS1 pin controller block.
So adding the BUS1 pinctrl support.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Linus Walleij linus.wall...@linaro.org
---
This patch
This patch modifies Exynos Power Domain driver initialization
implementation in following way:
- Added platform driver support and probe function where Exynos PM
Domain driver will finally register itself as MFD PMU client driver.
In this way,all the Exynos power domains are probed
This patch moves arch/arm/mach-exynos/pm_domains.c to driver/soc/samsung
folder. In this way it can be used for both arm and arm64 platforms.
This file is moved in this directory as this driver is soc specific and
only used by exynos platforms.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by:
This is used to probe exynos power domain. This method can be also used
for probing other PMU client drivers like pm sleep etc. Currently no
platform data is supplied but can be easily extended when required.
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap
This patch moves PD domain on/off implementation inside the PMU driver.
The handlers will be supplied via the MFD platform data. Power domains
are basically sparse memories in the Exynos PMU controllers, so with
this restructuring all the register access operations reside inside pmu
file.
This
BUS1 pinctrl provides gpios for usb and power regulator
available on exynos7-espresso board. So add relevant device
node for pinctrl-bus1.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
This patch was part of series:
[PATCH
This patch adds support for second optional compatible complate name. If
this compatible name is present then this name will be used to create
the Power Domain and not the DT node name. This will be useful to carry
out any power domain specific changes in the PD on/off handlers for new
SoCs.
This
[adding Tushar Behera and Doug Anderson to cc list]
Hello,
On 11/24/2014 12:12 PM, Krzysztof Kozlowski wrote:
On pon, 2014-11-24 at 12:07 +0100, Javier Martinez Canillas wrote:
Hello Krzysztof,
It seems that mau_epll has to be enabled... or something is wrong with
clock hierarchy.
This patch uses the restructuring done in PD handlers and adds PD
on/off/status handlers for exynos7. In this SoC, some extra settings
need to be done prior to turning on/off power domains. Some of those
settings are also different from different power domains so is uses
the power domain
This API may be needed to set the power domain parent/child relationship
in the power domain platform driver. The parent relationship is
generally set after the child power domain is registered with the power
domain subsystem. In this case, pm_genpd_lookup_name API might be
useful.
Signed-off-by:
This patch adds supports for parent power domain. This will ensure
invoking of parent/child power domain on/off in a correct sequence.
In exynos7 SOC's, power domain controllers have parent and child
hierarchy.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap
This patch updates the parent clock bindings to make it more generic.
The current bindings limits the transient parent clocks to just one
clock as oscclk. This patch extends it to allow any clock as
intermediate parent clock.
The reparent clock sets are of form tclkX, pclkX, clkX where X:0-9.
Hi,
On Monday, November 24, 2014 07:36:10 AM Amit Daniel Kachhap wrote:
This patch series [1 - 5] performs,
1) Moves pmu driver to driver/soc/samsung folder. This is needed as exynos7 is
an arm64 based platform and hence PMU driver should be in driver folder.
Some discussion happened
While turning power domain to on/off, some clocks rates might change and
need to be saved/restored in the Exynos7 SOC. This patch adds the
framework for saving those clocks before power off and restoring it back
after power on operation.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Use power domain driver for Exynos7 SOC's
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
arch/arm64/Kconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 30bd4d5..b102d0b 100644
--- a/arch/arm64/Kconfig
+++
While turning power domain to on/off, some clocks need to be enabled
in the Exynos7 SOC. This patch adds the framework for enabling those
clocks before on/off and restoring it back after the operation. Also
these list of clocks may be different for on/off operation so not using
the generic pm
On Mon, Nov 24, 2014 at 6:46 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
[adding Tushar Behera and Doug Anderson to cc list]
Hello,
On 11/24/2014 12:12 PM, Krzysztof Kozlowski wrote:
On pon, 2014-11-24 at 12:07 +0100, Javier Martinez Canillas wrote:
Hello Krzysztof,
On 20/11/14 03:48, Viresh Kumar wrote:
Oh, you are still alive? I thought you were about to get married :)
Just kidding !!
On 20 November 2014 00:58, Sudeep Holla sudeep.ho...@arm.com wrote:
Sorry for raising this issue always with Exynos cpufreq drivers. IMO the
bindings for
On pon, 2014-11-24 at 14:16 +0100, Javier Martinez Canillas wrote:
[adding Tushar Behera and Doug Anderson to cc list]
Hello,
On 11/24/2014 12:12 PM, Krzysztof Kozlowski wrote:
On pon, 2014-11-24 at 12:07 +0100, Javier Martinez Canillas wrote:
Hello Krzysztof,
It seems that
This patch adds regulator-haptic device node controlled by regulator.
Signed-off-by: Jaewon Kim jaewon02@samsung.com
---
arch/arm/boot/dts/exynos3250-rinato.dts |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
This patch adds support for haptic driver controlled by
voltage of regulator. And this driver support for
Force Feedback interface from input framework
Signed-off-by: Jaewon Kim jaewon02@samsung.com
Signed-off-by: Hyunhee Kim hyunhee@samsung.com
Acked-by: Kyungmin Park
This patch series adds regulator-haptic driver.
The regulator-haptic has haptic motor and it is controlled by
voltage of regulator via force feedback framework.
Changes in v2:
- remove driver owner
- merge enable/disable function
- support platform data
- fix wrong suspends_state check in
Hi All,
On 21/11/14 14:31, Thomas Abraham wrote:
Changes since v11:
- Rebased on top of git://linuxtv.org/snawrocki/samsung.git
for-v3.19-exynos-clk
This patch series removes the use of Exynos4210 and Exynos5250 specific
cpufreq
drivers and enables the use of cpufreq-dt driver for these
Hi,
This is initial idea to solve dependency between AudioSS clocks
and main clock controller on Exynos platform.
This solves boot failure of Peach Pi/Pit and Arndale Octa [1].
It is only RFC/proof of concept because I would like to hear whether
this is good direction to solve this particular
Audio subsystem clocks are located in separate block. If parent clock
(from main clock domain) 'mau_epll' is gated then any read or write to
audss registers will block.
This was observed on Exynos 5420 platforms (Arndale Octa and Peach
Pi/Pit) after introducing runtime PM to pl330 DMA driver.
For clocks depending on some other clock domain one may want to perform
specific ops before actual enable/disable of gate clock. Allow such case
by accepting supplied ops in new exported function:
clk_register_gate_ops().
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Hi Vivek,
Vivek Gautam gautamvivek1...@gmail.com writes:
On Sat, Nov 22, 2014 at 12:53 AM, Kevin Hilman khil...@kernel.org wrote:
Hi Ajay,
AJAY KUMAR RAMAKRISHNA SHYMALAMMA ajaykumar...@samsung.com writes:
I tried to reproduce the issue which you reported,
but I am sorry I am not able to
On Mon, Nov 24, 2014 at 04:52:42PM +0530, Krishna Mohan Dani wrote:
Fixes the following compilation warning:
Warning: 'rt5631_i2c_dt_ids' defined but not used - when DT is not used.
This doesn't apply, please check and resend.
signature.asc
Description: Digital signature
On Mon, Nov 24, 2014 at 12:21:51PM +0530, Krishna Mohan Dani wrote:
Document the device tree binding for the Arndale board based machine driver.
This is adding binding documentation but I'm not seeing the matching
driver - please send the two together.
signature.asc
Description: Digital
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
exynos_dpi_remove() should receive a exynos_drm_display but when
DRM_EXYNOS_DPI was disabled it was receiving a struct device resulting in
ia compiler warning.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
Hello Krzysztof,
On 11/24/2014 04:18 PM, Krzysztof Kozlowski wrote:
Hi,
This is initial idea to solve dependency between AudioSS clocks
and main clock controller on Exynos platform.
This solves boot failure of Peach Pi/Pit and Arndale Octa [1].
I tested this series on an Exynos5420
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
With this change we allow other pieces of the code to use this macro.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 3 ---
drivers/gpu/drm/exynos/exynos_drm_drv.h | 3 +++
2
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct exynos_drm_overlay has no practical advantage nor serves as
important piece of the exynos API design. The only place it was used
was inside the struct exynos_plane which was just causing a extra
access overhead. Users had to access the
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
This functions were doing nothing but calling a manager op function,
so remove them and call the manager directly.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 33
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Let other pieces of the driver access struct exynos_drm_crtc as well.
struct exynos_drm_manager will be merged into struct exynos_drm_crtc, in
the sense we will move all its members to exynos_drm_crtc, so to start
this conversion
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The component must be deleted if the probe fails.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Hi Thomas,
Thomas Abraham thomas...@samsung.com writes:
Changes since v11:
- Rebased on top of git://linuxtv.org/snawrocki/samsung.git
for-v3.19-exynos-clk
Thanks for rebasing/reposting.
This patch series removes the use of Exynos4210 and Exynos5250 specific
cpufreq
drivers and enables
Kukjin,
On Mon, Nov 10, 2014 at 11:35 AM, Kevin Hilman khil...@kernel.org wrote:
Kukjin Kim kg...@kernel.org writes:
Kevin Hilman wrote:
From: Kevin Hilman khil...@linaro.org
The option CONFIG_EXYNOS5420_MCPM is causing imprecise external aborts
during boot testing, causing various
On Mon, Nov 24, 2014 at 11:51 AM, Kevin Hilman khil...@kernel.org wrote:
Kukjin,
On Mon, Nov 10, 2014 at 11:35 AM, Kevin Hilman khil...@kernel.org wrote:
Kukjin Kim kg...@kernel.org writes:
Kevin Hilman wrote:
From: Kevin Hilman khil...@linaro.org
The option CONFIG_EXYNOS5420_MCPM is
On 11/24/2014 11:50 PM, Jaewon Kim wrote:
This patch adds regulator-haptic device node controlled by regulator.
Signed-off-by: Jaewon Kim jaewon02@samsung.com
---
arch/arm/boot/dts/exynos3250-rinato.dts |7 +++
1 file changed, 7 insertions(+)
diff --git
On 11/24/2014 11:50 PM, Jaewon Kim wrote:
This patch adds support for haptic driver controlled by
voltage of regulator. And this driver support for
Force Feedback interface from input framework
Signed-off-by: Jaewon Kim jaewon02@samsung.com
Signed-off-by: Hyunhee Kim
Quoting Krzysztof Kozlowski (2014-11-24 07:18:31)
For clocks depending on some other clock domain one may want to perform
specific ops before actual enable/disable of gate clock. Allow such case
by accepting supplied ops in new exported function:
clk_register_gate_ops().
If you are not going
On Mon, Nov 24, 2014 at 4:25 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 11:51 AM, Kevin Hilman khil...@kernel.org wrote:
Kukjin,
On Mon, Nov 10, 2014 at 11:35 AM, Kevin Hilman khil...@kernel.org wrote:
Kukjin Kim kg...@kernel.org writes:
Kevin Hilman wrote:
From:
On Mon, Nov 24, 2014 at 5:35 PM, Kevin Hilman khil...@kernel.org wrote:
On Mon, Nov 24, 2014 at 4:25 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 11:51 AM, Kevin Hilman khil...@kernel.org wrote:
Kukjin,
On Mon, Nov 10, 2014 at 11:35 AM, Kevin Hilman khil...@kernel.org
On Mon, Nov 24, 2014 at 5:37 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 5:35 PM, Kevin Hilman khil...@kernel.org wrote:
On Mon, Nov 24, 2014 at 4:25 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 11:51 AM, Kevin Hilman khil...@kernel.org wrote:
Kukjin,
Olof Johansson wrote:
On Mon, Nov 24, 2014 at 5:37 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 5:35 PM, Kevin Hilman khil...@kernel.org wrote:
On Mon, Nov 24, 2014 at 4:25 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 11:51 AM, Kevin Hilman
On Mon, Nov 24, 2014 at 5:37 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 5:35 PM, Kevin Hilman khil...@kernel.org wrote:
On Mon, Nov 24, 2014 at 4:25 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 11:51 AM, Kevin Hilman khil...@kernel.org wrote:
Kukjin,
Hi Mark,
OK. I don't have provision to test on this board. I will try to test
on older boards by disabling manual mode.
I tested on exynos5420 peach-pit by enabling auto mode. I used dd
command to read 1MB data from spi flash and I compared the result with
manual mode. Both are same.
I
On Mon, Nov 24, 2014 at 5:50 PM, Kukjin Kim kg...@kernel.org wrote:
Olof Johansson wrote:
On Mon, Nov 24, 2014 at 5:37 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 5:35 PM, Kevin Hilman khil...@kernel.org wrote:
On Mon, Nov 24, 2014 at 4:25 PM, Olof Johansson
line:
console=ttySAC3,115200N8 debug earlyprintk root=/dev/mmcblk1p2 rootwait rw
I tested Spring with next-20141124, and finally got it to work! :)
That's great to hear!
Thanks a lot, Ajay and Javier!
To be on the safe side, I reverted the patch pointed out by Javier and
was still using
Hello Kevin,
On Tue, Nov 25, 2014 at 8:50 AM, Kevin Hilman khil...@kernel.org wrote:
On Mon, Nov 24, 2014 at 5:50 PM, Kukjin Kim kg...@kernel.org wrote:
Olof Johansson wrote:
On Mon, Nov 24, 2014 at 5:37 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Nov 24, 2014 at 5:35 PM, Kevin Hilman
From: Kevin Hilman khil...@linaro.org
Using the current exynos_defconfig on the exynos5422-odroid-xu3, only
6 of 8 CPUs come online with MCPM boot. CPU0 is an A7, CPUs 1-4 are
A15s and CPU5-7 are the other A7s, but with the current code, CPUs 5
and 7 do not boot:
[...]
Exynos MCPM support
On 24 November 2014 at 14:04, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
This patch uses the restructuring done in PD handlers and adds PD
on/off/status handlers for exynos7. In this SoC, some extra settings
need to be done prior to turning on/off power domains. Some of those
settings
On 24 November 2014 at 14:04, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
This API may be needed to set the power domain parent/child relationship
in the power domain platform driver. The parent relationship is
generally set after the child power domain is registered with the power
On 24 November 2014 at 14:04, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
This patch adds supports for parent power domain. This will ensure
invoking of parent/child power domain on/off in a correct sequence.
In exynos7 SOC's, power domain controllers have parent and child
hierarchy.
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