On śro, 2015-03-18 at 03:05 +0900, Kukjin Kim wrote:
On 03/11/15 19:29, Krzysztof Kozlowski wrote:
On śro, 2015-03-11 at 11:20 +0100, Krzysztof Kozlowski wrote:
On Exynos4412 boards (Trats2, Odroid U3) after enabling L2 cache in
56b60b8bce4a (ARM: 8265/1: dts: exynos4: Add nodes for L2
Hi,
On Wednesday, March 18, 2015 09:57:27 AM Krzysztof Kozlowski wrote:
On śro, 2015-03-18 at 03:05 +0900, Kukjin Kim wrote:
On 03/11/15 19:29, Krzysztof Kozlowski wrote:
On śro, 2015-03-11 at 11:20 +0100, Krzysztof Kozlowski wrote:
On Exynos4412 boards (Trats2, Odroid U3) after
+people involved in Exynos5420 S2R support (Abhilash, Vikas and Pankaj)
Hello Kevin,
On 03/17/2015 06:35 PM, Kevin Hilman wrote:
I've tried suspend/resume on peach-pi using v4.0-rc4, next/master and
samsung/for-next, and it doesn't seem to work on any of them.
The first problem was the
Hello Thomas,
On Tue, Feb 17, 2015 at 9:25 PM, Tobias Jakobi liquid.a...@gmx.net wrote:
Hello!
Lukasz Majewski wrote:
Hi Krzysztof, Thomas,
2015-01-08 22:17 GMT+01:00 Kevin Hilman khil...@kernel.org:
Hi Thomas,
Do you plan to continue with this work? It would be very helpful.
+1 from
On Wed, 2015-03-18 at 09:08 +0100, Lukasz Majewski wrote:
Hi Sjoerd,
Hey Jingoo, Kukjijn, Lukasz,
Pinging on this one again, could you please review this patch so it
can be merged through the PWM tree?
As fair as I remember, I've already acked the patch :-)
I don't think you did,
Hi,
On Wednesday, March 18, 2015 10:47:44 AM Krzysztof Kozlowski wrote:
On śro, 2015-03-18 at 09:57 +0100, Krzysztof Kozlowski wrote:
On śro, 2015-03-18 at 03:05 +0900, Kukjin Kim wrote:
On 03/11/15 19:29, Krzysztof Kozlowski wrote:
On śro, 2015-03-11 at 11:20 +0100, Krzysztof
From: Seungwon Jeon tgih@samsung.com
HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards.
This also adds RCLK GPIO line, this gpio should be in pull-down
state.
This also enables HS400 on peach-pi and this updates the clock frequency
to 800MHz to be
Hi Sjoerd,
Hey Jingoo, Kukjijn, Lukasz,
Pinging on this one again, could you please review this patch so it
can be merged through the PWM tree?
As fair as I remember, I've already acked the patch :-)
On Thu, 2015-03-05 at 09:14 +0100, Sjoerd Simons wrote:
When disabling the samsung
On śro, 2015-03-18 at 09:57 +0100, Krzysztof Kozlowski wrote:
On śro, 2015-03-18 at 03:05 +0900, Kukjin Kim wrote:
On 03/11/15 19:29, Krzysztof Kozlowski wrote:
On śro, 2015-03-11 at 11:20 +0100, Krzysztof Kozlowski wrote:
On Exynos4412 boards (Trats2, Odroid U3) after enabling L2 cache
Hello Alim,
On Wed, Mar 18, 2015 at 4:08 AM, Alim Akhtar alim.akh...@samsung.com wrote:
From: Seungwon Jeon tgih@samsung.com
HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards.
This also adds RCLK GPIO line, this gpio should be in pull-down
Odroid X2/U3 sound support can now be specified in device tree using
the simple card binding, make SND_SOC_ODROIDX2 select SND_SIMPLE_CARD
to ensure there are always required drivers in place.
Reported-by: Tobias Jakobi liquid.a...@gmx.net
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Hi,
The following patchset adds coupled cpuidle support for Exynos3250
to an existing cpuidle-exynos driver. As a result it enables AFTR
mode to be used by default on Exynos3250 without the need to hot
unplug CPU1 first.
The patchset depends on:
- for-next branch (commit: 77105c882ba6) of
Hi,
On Wednesday, March 18, 2015 02:10:31 PM Krzysztof Kozlowski wrote:
2015-03-18 13:51 GMT+01:00 Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com:
CPU1 hotplug may hang when AFTR is used. Fix it by:
- setting AUTOWAKEUP_EN bit in ARM_COREx_CONFIGURATION register in
On Wed, Mar 18, 2015 at 11:52:19AM +0100, Sylwester Nawrocki wrote:
Odroid X2/U3 sound support can now be specified in device tree using
the simple card binding, make SND_SOC_ODROIDX2 select SND_SIMPLE_CARD
to ensure there are always required drivers in place.
No, this isn't an actual
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/firmware.c | 8 +++-
arch/arm/mach-exynos/pm.c | 12 +++-
arch/arm/mach-exynos/regs-pmu.h |
CPU1 hotplug may hang when AFTR is used. Fix it by:
- setting AUTOWAKEUP_EN bit in ARM_COREx_CONFIGURATION register in
exynos_cpu_power_up()
- not clearing reserved bits of ARM_COREx_CONFIGURATION register in
exynos_cpu_power_down()
- waiting while an undocumented register 0x0908 becomes
Register cpuidle platform device on Exynos3250 SoC allowing EXYNOS
cpuidle driver usage on this SoC.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/exynos.c
This code is needed for cpuidle (W-)AFTR mode support on Exynos3250.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/common.h | 6 ++
Add exynos_set_boot_addr() helper and covert existing code
(exynos_boot_secondary() and exynos_smp_prepare_cpus()) to
use it.
There should be no functional changes caused by this patch.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
The following patch adds coupled cpuidle support for Exynos3250 to
an existing cpuidle-exynos driver. As a result it enables AFTR mode
to be used by default on Exynos3250 without the need to hot unplug
CPU1 first.
The detailed changelog:
- use exynos_[get,set]_boot_addr() in cpuidle-exynos.c and
exynos_boot_secondary() can erroneously return 0 or -ENOSYS even
when waiting on pen_release being set to -1 timeouts. Fix it by
adjusting ret variable value to -ETIMEDOUT when necessary.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz
2015-03-18 13:51 GMT+01:00 Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com:
The patchset itself looks good... but it's missing commit message.
What benefits does the AFTR bring?
Best regards,
Krzysztof
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To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body
Hi,
This patch series adds support for AFTR idle mode on boards with
Exynos3250 SoC and allows EXYNOS cpuidle driver usage on these
boards.
It has been tested on Samsung Rinato board (Gear 2).
Depends on:
- for-next branch (commit: 77105c882ba6) of linux-samsung.git
kernel tree
Changes since
2015-03-18 13:51 GMT+01:00 Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com:
This code is needed for cpuidle (W-)AFTR mode support on Exynos3250.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park
Hello Tobias,
On 03/18/2015 02:00 PM, Tobias Jakobi wrote:
Hello Javier,
I noticed that this recent commit breaks rtc-s3c on my Odroid-X2
(Exynos4412). The exynos4 dtsi includes a rtc of type s3c6410. Hence all
board files based on exynos4, and using the rtc-s3c, are now required to
2015-03-18 13:51 GMT+01:00 Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com:
CPU1 hotplug may hang when AFTR is used. Fix it by:
- setting AUTOWAKEUP_EN bit in ARM_COREx_CONFIGURATION register in
exynos_cpu_power_up()
- not clearing reserved bits of ARM_COREx_CONFIGURATION register in
Hello Javier,
I noticed that this recent commit breaks rtc-s3c on my Odroid-X2
(Exynos4412). The exynos4 dtsi includes a rtc of type s3c6410. Hence all
board files based on exynos4, and using the rtc-s3c, are now required to
specific the rtc_src clock. I don't think that this is correct,
On śro, 2015-03-18 at 14:23 +0100, Bartlomiej Zolnierkiewicz wrote:
Hi,
On Wednesday, March 18, 2015 02:10:31 PM Krzysztof Kozlowski wrote:
2015-03-18 13:51 GMT+01:00 Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com:
+ while (!pmu_raw_readl(S5P_PMU_SPARE2))
+
There is a kernel message about secondary CPU bootup when
exynos_core_restart() is called through CPU hotplug code-path
(the only exynos_core_restart() user currently) so there is no
need for an extra info on Exynos3250 SoC about software reset.
This also prepares exynos_core_restart() to be
2015-03-18 14:09 GMT+01:00 Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com:
Add exynos_set_boot_addr() helper and covert existing code
(exynos_boot_secondary() and exynos_smp_prepare_cpus()) to
use it.
There should be no functional changes caused by this patch.
Cc: Daniel Lezcano
On Wednesday, March 18, 2015 02:33:54 PM Krzysztof Kozlowski wrote:
2015-03-18 13:51 GMT+01:00 Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com:
This code is needed for cpuidle (W-)AFTR mode support on Exynos3250.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej
On śro, 2015-03-18 at 16:18 +0100, Bartlomiej Zolnierkiewicz wrote:
On Wednesday, March 18, 2015 02:43:49 PM Krzysztof Kozlowski wrote:
2015-03-18 14:09 GMT+01:00 Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com:
Add get_cpu_boot_addr() firmware operation and then
On Wednesday, March 18, 2015 02:43:49 PM Krzysztof Kozlowski wrote:
2015-03-18 14:09 GMT+01:00 Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com:
Add get_cpu_boot_addr() firmware operation and then
exynos_get_boot_addr() helper.
This is a preparation for adding coupled cpuidle support
On Wednesday, March 18, 2015 02:32:25 PM Krzysztof Kozlowski wrote:
On śro, 2015-03-18 at 14:23 +0100, Bartlomiej Zolnierkiewicz wrote:
Hi,
On Wednesday, March 18, 2015 02:10:31 PM Krzysztof Kozlowski wrote:
2015-03-18 13:51 GMT+01:00 Bartlomiej Zolnierkiewicz
On Wednesday, March 18, 2015 02:38:26 PM Krzysztof Kozlowski wrote:
2015-03-18 13:51 GMT+01:00 Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com:
The patchset itself looks good... but it's missing commit message.
What benefits does the AFTR bring?
AFTR support brings reduced energy
Register cpuidle platform device on Exynos3250 SoC allowing EXYNOS
cpuidle driver usage on this SoC.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Acked-by: Kyungmin Park
CPU1 hotplug may hang when AFTR is used. Fix it by:
- setting AUTOWAKEUP_EN bit in ARM_COREx_CONFIGURATION register in
exynos_cpu_power_up()
- not clearing reserved bits of ARM_COREx_CONFIGURATION register in
exynos_cpu_power_down()
- waiting while an undocumented register 0x0908 becomes
This code is needed for cpuidle (W-)AFTR mode support on Exynos3250.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/common.h | 6 ++
AFTR mode support brings reduced energy consumption and is
a prerequisite for more advanced W-AFTR/LPA power saving modes.
AFTR mode has been already supported on other Exynos SoCs for
few years and this patch adds its support for Exynos3250 SoC.
The differences in Exynos3250 SoC AFTR mode
In big-endian CPU mode l2x0_saved_regs structure stores registers values in BE
format. In order to maintain BE CPU mode, these values and immediate constants
must be converted back to LE format before writing them to cache controller.
Signed-off-by: Dmitry Osipenko dig...@gmail.com
Acked-by:
Hi,
This patch series adds support for AFTR idle mode on boards with
Exynos3250 SoC and allows EXYNOS cpuidle driver usage on these
boards.
It has been tested on Samsung Rinato board (Gear 2).
Depends on:
- for-next branch (commit: 77105c882ba6) of linux-samsung.git
kernel tree
Changes since
On Wednesday, March 18, 2015 02:09:52 PM Bartlomiej Zolnierkiewicz wrote:
Hi,
The following patchset adds coupled cpuidle support for Exynos3250
to an existing cpuidle-exynos driver. As a result it enables AFTR
mode to be used by default on Exynos3250 without the need to hot
unplug CPU1
2015-02-24 16:42 GMT+01:00 Krzysztof Kozlowski k.kozlow...@samsung.com:
On wto, 2015-02-03 at 18:28 +0100, Krzysztof Kozlowski wrote:
Prevent possible NULL pointer dereference of pointer returned by
of_find_device_by_node(). Handle this by skipping such power domain.
Additionally fail the
Hi Chanwoo,
Hi Lukasz,
Genlty Ping.
I've got your patches at the back of my head :-)
I will try to review them today or tomorrow.
Best Regards,
Chanwoo Choi
On 03/10/2015 11:23 AM, Chanwoo Choi wrote:
This patch adds the support for Exynos5433's TMU (Thermal
Management Unit).
Hey Jingoo, Kukjijn, Lukasz,
Pinging on this one again, could you please review this patch so it can
be merged through the PWM tree?
On Thu, 2015-03-05 at 09:14 +0100, Sjoerd Simons wrote:
When disabling the samsung PWM the output state remains at the level it
was in the end of a pwm cycle.
Hi Bartlomiej,
I tested this patch on Exynos3250-based Gear2 board.
Thanks for your effor to solve this issue.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Best Regards,
Chanwoo Choi
On 03/19/2015 01:00 AM, Bartlomiej Zolnierkiewicz wrote:
CPU1 hotplug may hang when AFTR is used. Fix it by:
Hi Bartlomiej,
I tested this patch-set for AFTR mode.
When CPU1 is offline state, I checked that CPU0 enter the AFTR mode.
Tested-by: Chanwoo Choi cw00.c...@samsung.com
Best Regards,
Chanwoo Choi
On 03/19/2015 01:00 AM, Bartlomiej Zolnierkiewicz wrote:
Hi,
This patch series adds support
My apologies for the double-post; the previous patch lacked an Acked-by and
several important recipients. Keep me on the CC list as I'm not subscribed to
the linux-usb list.
The USB3503 driver exposes the refclk-frequency DT property to allow users to
specify the rate of the clock provided on the
This is necessary to set REF_SEL appropriately in uses where refclk is
always available.
Signed-off-by: Ben Gamari b...@smart-cactus.org
Acked-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/usb/misc/usb3503.c | 47 +++---
1 file changed, 24
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