From: Kyungmin Park
This patch adds L2 cache initialization code in cpu.c of ARCH_S5PV310.
It includes TAG and Data latency, Prefetch, and Power configurations.
Signed-off-by: Kyungmin Park
Signed-off-by: Changhwan Youn
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5pv310/cpu.c | 23 +++
From: Kyungmin Park
Basically, need L2 cache initialize function in ARCH_S5PV310. So it would
be better to move it into ARCH_S5PV310 common part. This patch removes L2
cache initialization code at the each board file.
Signed-off-by: Kyungmin Park
Signed-off-by: Changhwan Youn
Signed-off-by: Ku
From: Kyungmin Park
This patch adds L2X0 Prefetch and Power control register.
Signed-off-by: Kyungmin Park
Cc: Catalin Marinas
Signed-off-by: Kukjin Kim
---
arch/arm/include/asm/hardware/cache-l2x0.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include
This patch moves L2X0 cache init code from each machine to ARCH_S5PV310's cpu.c
for common usage and updates its feature such as L2X0 Prefetch and Power control
configuration.
Changes since v1 and v2:
- updated L2 cache init function's features.
[PATCH V3 1/3] ARM: Add L2X0 PREFETCH and POWER con
Hello, Jonghun.
Below is my opinion.
Have a good time :)
> -Original Message-
> From: linux-fbdev-ow...@vger.kernel.org [mailto:linux-fbdev-
> ow...@vger.kernel.org] On Behalf Of Jonghun Han
> Sent: Thursday, October 21, 2010 12:45 PM
> To: 'Marek Szyprowski'; 'Sangbeom Kim'; linux-arm-
>
From: Jonghun Han
Some platform data for S5PV310 FIMD0 are added.
LTE480WV lcd pannel used by SMDKV310 are added via platform-lcd interface.
Signed-off-by: Jonghun Han
Signed-off-by: Sangbeom Kim
---
Changes since v1:
- moved to change plat/fb.h from 4th patch as per Marek's suggestion
arch/
From: Jonghun Han
This patch adds platform device s5p_device_fimd0 for S5PV310 FIMD0.
S5PV310 has two FIMDs(FIMD0, FIMD1). FIMD1 will be added later.
Some definitions used to enable S5PV310 FIMD0 are added.
Signed-off-by: Jonghun Han
Signed-off-by: Sangbeom Kim
---
Changes since v1:
- moved to
On Thu, Oct 21, 2010 at 11:36 AM, Kukjin Kim wrote:
> Kyungmin Park wrote:
>>
>> On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim wrote:
>> > From: Seungwhan Youn
>> >
>> > This patch adds to enable/disable DMA operation clock on S3C-PL330
>> > DMA controller driver.
>>
>> The title and description s
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x-cr-puzzleid: {B7526269-A73C-412A-8DAE-B8EB603CF9D0}
Hi,
Marek Szyprowski wrote:
> -Original Message-
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Tuesday, October 19, 2010 4:22 PM
> To: 'Sangbeom Kim'; linux-arm-ker...@list
Jassi Brar wrote:
>
> On Thu, Oct 21, 2010 at 10:49 AM, Kyungmin Park wrote:
> >>> Can you make it REAL clock gating, enable clock only when using?
> >>
> >> Of course we can. But that will need some intrusive changes.
> >> Later, we'll implement that desirable feature.
> >> For now, many SoCs do
Kyungmin Park wrote:
>
> On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim wrote:
> > From: Seungwhan Youn
> >
> > This patch adds to enable/disable DMA operation clock on S3C-PL330
> > DMA controller driver.
>
> The title and description seems to clock gating but actual code is
> just enable at prob
On Thu, Oct 21, 2010 at 11:12 AM, Kyungmin Park wrote:
> BTW, what's the id of mdma and which clock at c210?
MDMA is not yet supported in Samsung mainline.
Any ID can be assigned as long as it doesn't conflict with other DMAs
and resources correctly attached to it.
--
To unsubscribe from this li
On Thu, Oct 21, 2010 at 10:54 AM, Jassi Brar wrote:
> On Thu, Oct 21, 2010 at 10:49 AM, Kyungmin Park wrote:
Can you make it REAL clock gating, enable clock only when using?
>>>
>>> Of course we can. But that will need some intrusive changes.
>>> Later, we'll implement that desirable feature
On Thu, Oct 21, 2010 at 10:49 AM, Kyungmin Park wrote:
>>> Can you make it REAL clock gating, enable clock only when using?
>>
>> Of course we can. But that will need some intrusive changes.
>> Later, we'll implement that desirable feature.
>> For now, many SoCs don't detect PL330 since the clocks
On Thu, Oct 21, 2010 at 10:45 AM, Jassi Brar wrote:
> On Thu, Oct 21, 2010 at 10:32 AM, Kyungmin Park wrote:
>> On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim wrote:
>>> From: Seungwhan Youn
>>>
>>> This patch adds to enable/disable DMA operation clock on S3C-PL330
>>> DMA controller driver.
>>
>>
On Thu, Oct 21, 2010 at 10:32 AM, Kyungmin Park wrote:
> On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim wrote:
>> From: Seungwhan Youn
>>
>> This patch adds to enable/disable DMA operation clock on S3C-PL330
>> DMA controller driver.
>
> The title and description seems to clock gating but actual co
On Thu, Oct 21, 2010 at 9:58 AM, Kukjin Kim wrote:
> From: Seungwhan Youn
>
> This patch adds to enable/disable DMA operation clock on S3C-PL330
> DMA controller driver.
The title and description seems to clock gating but actual code is
just enable at probe and disable at remove.
Can you make i
From: Seungwhan Youn
This patch adds to enable/disable DMA operation clock on S3C-PL330
DMA controller driver.
Signed-off-by: Seungwhan Youn
Acked-by: Jassi Brar
Signed-off-by: Kukjin Kim
---
arch/arm/plat-samsung/s3c-pl330.c | 34 +++---
1 files changed, 27 ins
From: Seungwhan Youn
This patch adds DMA operation clock which is disabled as default.
Signed-off-by: Seungwhan Youn
Acked-by: Jassi Brar
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5p6442/clock.c | 28 +++
arch/arm/mach-s5p6442/include/mach/regs-cloc
From: Seungwhan Youn
This patch adds DMA operation clock which is disabled as default.
Signed-off-by: Seungwhan Youn
Acked-by: Jassi Brar
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5pv210/clock.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/
From: Seungwhan Youn
This patch modify to DMA operation clock into disable list for default
clock setting.
Signed-off-by: Seungwhan Youn
Acked-by: Jassi Brar
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5p64x0/clock-s5p6440.c | 12 ++--
arch/arm/mach-s5p64x0/clock-s5p6450.c | 12
From: Seungwhan Youn
This patch is matched-up DMA platform device id to it's clock id.
Signed-off-by: Seungwhan Youn
Acked-by: Jassi Brar
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5p6442/dma.c |2 +-
arch/arm/mach-s5p64x0/dma.c |2 +-
arch/arm/mach-s5pc100/dma.c |4 ++--
arch/
This patch updates Peri-DMA (PL330) operation clock on S5P SoCs which
have PL330 DMAC. Basically, registered PDMA clocks as disabled clock
and enabled when called pl330-probe() in s3c-pl330.c.
[PATCH 1/5] ARM: S5P6442: Add DMA operation clock
[PATCH 2/5] ARM: S5PV210: Add DMA operation clock
[PATC
I commented as belows,
And you missed one important things 'cause there were my comments
in the very long email which is strongly fixed in the reset seq.
[]
> +#define READL(offset)readl(dev->regs_base + (offset))
> +#define WRITEL(data, offset) writel((data), dev->regs_base
>Hi, Kamil
>This is third feedback about watchdog timer.
>(s5p_mfc.c)
Hi, Peter
Thanks for pointing that out, enabling and disabling watchdog in
open/release is reasonable.
>[...]
>> +platform_set_drvdata(pdev, dev);
>> +dev->hw_lock = 0;
>> +dev->watchdog_workqueue = create_single
>Thank you for your reply about my comments.
>Refer to as below.
Hi,
>>
>> I don't know if this is necessary. MFC_NUM_CONTEXTS can be fixed at
>> the maximum number allowed by MFC hw: 16. I highly doubt someone will
>> open that many contexts. Increasing this number will not significantly
>
>Hi, Kamil
>This is second feedback about the HW op related code.
>(s5p_mfc_opr.c & s5p_mfc.c)
Hi, Peter
Thanks for the comments. I have replied to them below. I would be grateful
if you could cut out non relevant parts of the code in your replies. It was
difficult to find your comments in such
This patch changes the S3C24XX_VA_GPIO for to fix following BUG.
BUG: not creating mapping for 0x5600 at 0x0100 in user region
It is due to commit 8fecfe9d(ARM: SAMSUNG: Move the start address of
Samsung SoCs' VA space) which changes S3C_ADDR_BASE from 0xF400
to 0xFA00.
Reported-b
Sangbeom Kim wrote:
>
> From: Abhilash Kesavan
>
> Adds suspend-to-ram support for SMDK2416 based on existing 2412 PM code
>
> Signed-off-by: Abhilash Kesavan
> Signed-off-by: Sangbeom Kim
> ---
> Note: it depends on patches:
>
> ARM: S3C24XX: Fix gpiolib support for ports K..M
>
> .../mac
Yauhen Kharuzhy wrote:
>
> S3C2443 and S3C2416 has 12 GPIO banks (from A to M), increase
> ARCH_NR_GPIOS for this architectures.
>
> Also typo from previous commit has been fixed: CONFIG_CPU_S3C24XX
> instead CONFIG_CPU_244X.
>
> Signed-off-by: Yauhen Kharuzhy
> Tested-by: Vasily Khoruzhick
>
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