[PATCH 2/2] DMA: PL330: Removes useless function
From: Boojin Kim boojin@samsung.com
Cc: Jassi Brar jassisinghb...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Vinod Koul vinod.k...@intel.com
Signed-off-by: Boojin Kim boojin@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
drivers/dma/pl330.c | 47 ---
1 files changed, 0 insertions(+), 47 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 35f0904..b917477 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -1512,53 +1512,6 @@ static int pl330_chan_ctrl(void *ch_id, enum
pl330_chan_op op)
return ret;
}
-static int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
-{
- struct pl330_thread *thrd = ch_id;
- struct pl330_dmac *pl330;
- struct pl330_info *pi;
- void __iomem *regs;
- int active;
- u32 val;
-
- if (!pstatus || !thrd || thrd-free)
- return -EINVAL;
-
- pl330 = thrd-dmac;
- pi = pl330-pinfo;
- regs = pi-base;
-
- /* The client should remove the DMAC and add again */
- if (pl330-state == DYING)
- pstatus-dmac_halted = true;
- else
- pstatus-dmac_halted = false;
-
- val = readl(regs + FSC);
- if (val (1 thrd-id))
- pstatus-faulting = true;
- else
- pstatus-faulting = false;
-
- active = _thrd_active(thrd);
-
- if (!active) {
- /* Indicate that the thread is not running */
- pstatus-top_req = NULL;
- pstatus-wait_req = NULL;
- } else {
- active--;
- pstatus-top_req = thrd-req[active].r;
- pstatus-wait_req = !IS_FREE(thrd-req[1 - active])
- ? thrd-req[1 - active].r : NULL;
- }
-
- pstatus-src_addr = readl(regs + SA(thrd-id));
- pstatus-dst_addr = readl(regs + DA(thrd-id));
-
- return 0;
-}
-
/* Reserve an event */
static inline int _alloc_event(struct pl330_thread *thrd)
{
--
1.7.1
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[PATCH] ARM: EXYNOS: Support DMA for EXYNOS4X12 SoCs
From: Boojin Kim boojin@samsung.com
Signed-off-by: Boojin Kim boojin@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/mach-exynos/dma.c | 95 ++--
arch/arm/plat-samsung/include/plat/dma-pl330.h |8 ++
2 files changed, 95 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index e89329e..ce645ba 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -29,6 +29,7 @@
#include asm/irq.h
#include plat/devs.h
#include plat/irqs.h
+#include plat/cpu.h
#include mach/map.h
#include mach/irqs.h
@@ -36,7 +37,7 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
-u8 pdma0_peri[] = {
+u8 exynos4210_pdma0_peri[] = {
DMACH_PCM0_RX,
DMACH_PCM0_TX,
DMACH_PCM2_RX,
@@ -69,11 +70,43 @@ u8 pdma0_peri[] = {
DMACH_AC97_PCMOUT,
};
-struct dma_pl330_platdata exynos4_pdma0_pdata = {
- .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
- .peri_id = pdma0_peri,
+u8 exynos4212_pdma0_peri[] = {
+ DMACH_PCM0_RX,
+ DMACH_PCM0_TX,
+ DMACH_PCM2_RX,
+ DMACH_PCM2_TX,
+ DMACH_MIPI_HSI0,
+ DMACH_MIPI_HSI1,
+ DMACH_SPI0_RX,
+ DMACH_SPI0_TX,
+ DMACH_SPI2_RX,
+ DMACH_SPI2_TX,
+ DMACH_I2S0S_TX,
+ DMACH_I2S0_RX,
+ DMACH_I2S0_TX,
+ DMACH_I2S2_RX,
+ DMACH_I2S2_TX,
+ DMACH_UART0_RX,
+ DMACH_UART0_TX,
+ DMACH_UART2_RX,
+ DMACH_UART2_TX,
+ DMACH_UART4_RX,
+ DMACH_UART4_TX,
+ DMACH_SLIMBUS0_RX,
+ DMACH_SLIMBUS0_TX,
+ DMACH_SLIMBUS2_RX,
+ DMACH_SLIMBUS2_TX,
+ DMACH_SLIMBUS4_RX,
+ DMACH_SLIMBUS4_TX,
+ DMACH_AC97_MICIN,
+ DMACH_AC97_PCMIN,
+ DMACH_AC97_PCMOUT,
+ DMACH_MIPI_HSI4,
+ DMACH_MIPI_HSI5,
};
+struct dma_pl330_platdata exynos4_pdma0_pdata;
+
struct amba_device exynos4_device_pdma0 = {
.dev = {
.init_name = dma-pl330.0,
@@ -90,7 +123,7 @@ struct amba_device exynos4_device_pdma0 = {
.periphid = 0x00041330,
};
-u8 pdma1_peri[] = {
+u8 exynos4210_pdma1_peri[] = {
DMACH_PCM0_RX,
DMACH_PCM0_TX,
DMACH_PCM1_RX,
@@ -118,11 +151,41 @@ u8 pdma1_peri[] = {
DMACH_SLIMBUS5_TX,
};
-struct dma_pl330_platdata exynos4_pdma1_pdata = {
- .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
- .peri_id = pdma1_peri,
+u8 exynos4212_pdma1_peri[] = {
+ DMACH_PCM0_RX,
+ DMACH_PCM0_TX,
+ DMACH_PCM1_RX,
+ DMACH_PCM1_TX,
+ DMACH_MIPI_HSI2,
+ DMACH_MIPI_HSI3,
+ DMACH_SPI1_RX,
+ DMACH_SPI1_TX,
+ DMACH_I2S0S_TX,
+ DMACH_I2S0_RX,
+ DMACH_I2S0_TX,
+ DMACH_I2S1_RX,
+ DMACH_I2S1_TX,
+ DMACH_UART0_RX,
+ DMACH_UART0_TX,
+ DMACH_UART1_RX,
+ DMACH_UART1_TX,
+ DMACH_UART3_RX,
+ DMACH_UART3_TX,
+ DMACH_SLIMBUS1_RX,
+ DMACH_SLIMBUS1_TX,
+ DMACH_SLIMBUS3_RX,
+ DMACH_SLIMBUS3_TX,
+ DMACH_SLIMBUS5_RX,
+ DMACH_SLIMBUS5_TX,
+ DMACH_SLIMBUS0AUX_RX,
+ DMACH_SLIMBUS0AUX_TX,
+ DMACH_SPDIF,
+ DMACH_MIPI_HSI6,
+ DMACH_MIPI_HSI7,
};
+struct dma_pl330_platdata exynos4_pdma1_pdata;
+
struct amba_device exynos4_device_pdma1 = {
.dev = {
.init_name = dma-pl330.1,
@@ -176,6 +239,22 @@ static int __init exynos4_dma_init(void)
if (of_have_populated_dt())
return 0;
+ if (soc_is_exynos4210()) {
+ exynos4_pdma0_pdata.nr_valid_peri =
+ ARRAY_SIZE(exynos4210_pdma0_peri);
+ exynos4_pdma0_pdata.peri_id = exynos4210_pdma0_peri;
+ exynos4_pdma1_pdata.nr_valid_peri =
+ ARRAY_SIZE(exynos4210_pdma1_peri);
+ exynos4_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
+ } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
+ exynos4_pdma0_pdata.nr_valid_peri =
+ ARRAY_SIZE(exynos4212_pdma0_peri);
+ exynos4_pdma0_pdata.peri_id = exynos4212_pdma0_peri;
+ exynos4_pdma1_pdata.nr_valid_peri =
+ ARRAY_SIZE(exynos4212_pdma1_peri);
+ exynos4_pdma1_pdata.peri_id = exynos4212_pdma1_peri;
+ }
+
dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
amba_device_register(exynos4_device_pdma0, iomem_resource);
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h
b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index ecf23a8..0670f37 100644
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -82,6 +82,14 @@ enum dma_ch {
DMACH_SLIMBUS4_TX,
DMACH_SLIMBUS5_RX,
DMACH_SLIMBUS5_TX,
+ DMACH_MIPI_HSI0,
+ DMACH_MIPI_HSI1,
+ DMACH_MIPI_HSI2,
+ DMACH_MIPI_HSI3,
+
[PATCH 1/2] mfd: add irq domain support for max8997 interrupts
Add irq domain support for max8997 interrupts. All uses of irq_base in platform
data and max8997 driver private data are removed.
Cc: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/mach-exynos/mach-nuri.c|4
arch/arm/mach-exynos/mach-origen.c |1 -
drivers/mfd/max8997-irq.c | 33 +++--
drivers/mfd/max8997.c |1 -
include/linux/mfd/max8997-private.h |4 +++-
include/linux/mfd/max8997.h |1 -
6 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 236bbe1..ae333e5 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -1077,12 +1077,8 @@ static struct platform_device nuri_max8903_device = {
static void __init nuri_power_init(void)
{
int gpio;
- int irq_base = IRQ_GPIO_END + 1;
int ta_en = 0;
- nuri_max8997_pdata.irq_base = irq_base;
- irq_base += MAX8997_IRQ_NR;
-
gpio = EXYNOS4_GPX0(7);
gpio_request(gpio, AP_PMIC_IRQ);
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
diff --git a/arch/arm/mach-exynos/mach-origen.c
b/arch/arm/mach-exynos/mach-origen.c
index f56d027..588b0a8 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -421,7 +421,6 @@ struct max8997_platform_data __initdata
origen_max8997_pdata = {
.buck1_gpiodvs = false,
.buck2_gpiodvs = false,
.buck5_gpiodvs = false,
- .irq_base = IRQ_GPIO_END + 1,
.ignore_gpiodvs_side_effect = true,
.buck125_default_idx = 0x0,
diff --git a/drivers/mfd/max8997-irq.c b/drivers/mfd/max8997-irq.c
index 09274cf..eb9cad5 100644
--- a/drivers/mfd/max8997-irq.c
+++ b/drivers/mfd/max8997-irq.c
@@ -142,7 +142,8 @@ static void max8997_irq_sync_unlock(struct irq_data *data)
static const inline struct max8997_irq_data *
irq_to_max8997_irq(struct max8997_dev *max8997, int irq)
{
- return max8997_irqs[irq - max8997-irq_base];
+ struct irq_data *data = irq_get_irq_data(irq);
+ return max8997_irqs[data-hwirq];
}
static void max8997_irq_mask(struct irq_data *data)
@@ -179,10 +180,11 @@ static struct irq_chip max8997_irq_chip = {
static irqreturn_t max8997_irq_thread(int irq, void *data)
{
struct max8997_dev *max8997 = data;
+ struct irq_domain *domain = max8997-irq_domain;
u8 irq_reg[MAX8997_IRQ_GROUP_NR] = {};
u8 irq_src;
int ret;
- int i;
+ int i, cur_irq;
ret = max8997_read_reg(max8997-i2c, MAX8997_REG_INTSRC, irq_src);
if (ret 0) {
@@ -268,9 +270,9 @@ static irqreturn_t max8997_irq_thread(int irq, void *data)
irq_reg[i] = ~max8997-irq_masks_cur[i];
/* Report */
- for (i = 0; i MAX8997_IRQ_NR; i++) {
+ irq_domain_for_each_irq(domain, i, cur_irq) {
if (irq_reg[max8997_irqs[i].group] max8997_irqs[i].mask)
- handle_nested_irq(max8997-irq_base + i);
+ handle_nested_irq(cur_irq);
}
return IRQ_HANDLED;
@@ -278,13 +280,14 @@ static irqreturn_t max8997_irq_thread(int irq, void *data)
int max8997_irq_resume(struct max8997_dev *max8997)
{
- if (max8997-irq max8997-irq_base)
- max8997_irq_thread(max8997-irq_base, max8997);
+ if (max8997-irq max8997-irq_domain.irq_base)
+ max8997_irq_thread(max8997-irq_domain.irq_base, max8997);
return 0;
}
int max8997_irq_init(struct max8997_dev *max8997)
{
+ struct irq_domain *domain = max8997-irq_domain;
int i;
int cur_irq;
int ret;
@@ -292,12 +295,6 @@ int max8997_irq_init(struct max8997_dev *max8997)
if (!max8997-irq) {
dev_warn(max8997-dev, No interrupt specified.\n);
- max8997-irq_base = 0;
- return 0;
- }
-
- if (!max8997-irq_base) {
- dev_err(max8997-dev, No interrupt base specified.\n);
return 0;
}
@@ -327,9 +324,17 @@ int max8997_irq_init(struct max8997_dev *max8997)
true : false;
}
+ domain-irq_base = irq_alloc_descs(-1, 0, MAX8997_IRQ_NR, 0);
+ if (domain-irq_base 0) {
+ dev_err(max8997-dev, failed to alloc irq descs\n);
+ return 0;
+ }
+ domain-nr_irq = MAX8997_IRQ_NR;
+ domain-ops = irq_domain_simple_ops;
+ irq_domain_add(domain);
+
/* Register with genirq */
- for (i = 0; i MAX8997_IRQ_NR; i++) {
- cur_irq = i + max8997-irq_base;
+ irq_domain_for_each_irq(domain, i, cur_irq) {
irq_set_chip_data(cur_irq, max8997);
irq_set_chip_and_handler(cur_irq, max8997_irq_chip,
handle_edge_irq);
diff --git
[PATCH 2/2] regulator: add device tree support for max8997
Add device tree based discovery support for max8997.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Grant Likely grant.lik...@secretlab.ca
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
.../devicetree/bindings/regulator/max8997-pmic.txt | 122 +
drivers/mfd/max8997.c | 70 ++-
drivers/regulator/max8997.c| 137
3 files changed, 328 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/regulator/max8997-pmic.txt
diff --git a/Documentation/devicetree/bindings/regulator/max8997-pmic.txt
b/Documentation/devicetree/bindings/regulator/max8997-pmic.txt
new file mode 100644
index 000..1d5db76
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max8997-pmic.txt
@@ -0,0 +1,122 @@
+* Maxim MAX8997 Voltage and Current Regulator
+
+The Maxim MAX8997 is a multi-function device which includes volatage and
+current regulators, rtc, charger controller and other sub-blocks. It is
+interfaced to the host controller using a i2c interface. Each sub-block is
+addressed by the host system using different i2c slave address. This document
+describes the bindings for 'pmic' sub-block of max8997.
+
+Required properties:
+- compatible: Should be maxim,max8997-pmic.
+- reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
+
+Required properties, if interrupts are delivered to host system:
+- interrupt-parent: Specifies the phandle of the interrupt controller to which
+ the interrupts from max8997 are delivered to.
+- interrupts: Interrupt specifiers for two interrupt sources.
+ - First interrupt specifier is for 'irq1' interrupt.
+ - Second interrupt specifier is for 'alert' interrupt.
+
+Optional properties:
+- max8997,pmic-buck1-uses-gpio-dvs: 'buck1' can be controlled by gpio dvs.
+- max8997,pmic-buck2-uses-gpio-dvs: 'buck2' can be controlled by gpio dvs.
+- max8997,pmic-buck5-uses-gpio-dvs: 'buck5' can be controlled by gpio dvs.
+
+Additional properties required if either of the optional properties are used:
+- max8997,pmic-ignore-gpiodvs-side-effect: When GPIO-DVS mode is used for
+ multiple bucks, changing the voltage value of one of the bucks may affect
+ that of another buck, which is the side effect of the change (set_voltage).
+ Use this property to ignore such side effects and change the voltage.
+
+- max8997,pmic-buck125-default-dvs-idx: Default voltage setting selected from
+ the possible 8 options selectable by the dvs gpios. The value of this
+ property should be between 0 and 7. If not specified or if out of range, the
+ default value of this property is set to 0.
+
+- max8997,pmic-buck125-dvs-gpios: GPIO specifiers for three host gpio's used
+ for dvs. The format of the gpio specifier depends in the gpio controller.
+
+- max8997,pmic-buck1-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+ units for buck1 when changing voltage using gpio dvs.
+
+- max8997,pmic-buck2-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+ units for buck2 when changing voltage using gpio dvs.
+
+- max8997,pmic-buck5-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+ units for buck5 when changing voltage using gpio dvs.
+
+Regulators: The regulators of max8997 that have to be instantiated should be
+included in a sub-node named 'regulators'. Regulator nodes included in this
+sub-node should be of the format as below. Note: The 'n' in LDOn and BUCKn
+represents the LDO or BUCK number as per the datasheet of max8997.
+
+For LDO's:
+ LDOn {
+ standard regulator bindings here
+ };
+
+For BUCK's
+ BUCKn {
+ standard regulator bindings here
+ };
+
+The bindings inside the regulator nodes use the standard regulator bindings
+which are documented elsewhere.
+
+Example:
+
+ max8997_pmic@66 {
+ compatible = maxim,max8997-pmic;
+ interrupt-parent = wakeup_eint;
+ reg = 0x66;
+ interrupts = 4 0, 3 0;
+
+ max8997,pmic-buck1-uses-gpio-dvs;
+ max8997,pmic-buck2-uses-gpio-dvs;
+ max8997,pmic-buck5-uses-gpio-dvs;
+
+ max8997,pmic-ignore-gpiodvs-side-effect;
+ max8997,pmic-buck125-default-dvs-idx = 0;
+
+ max8997,pmic-buck125-dvs-gpios = gpx0 0 1 0 0, /* SET1 */
+gpx0 1 1 0 0, /* SET2 */
+gpx0 2 1 0 0; /* SET3 */
+
+ max8997,pmic-buck1-dvs-voltage = 135, 130,
+125, 120,
+115, 110,
+100, 95;
+
+ max8997,pmic-buck2-dvs-voltage
Re: [PATCH 3/3] ARM: S3C64XX: Implement basic power domain support
On Thursday, December 08, 2011, Mark Brown wrote: On Wed, Dec 07, 2011 at 10:44:02PM +0100, Rafael J. Wysocki wrote: On Friday, December 02, 2011, Mark Brown wrote: May as well, yes - I didn't actually measure how long it tends to take to do the spin but it's not going to hurt. Are you going to post an updated patch? I've resent it but my development laptop is currently not internet connected so I'm not sure when it'll actually go out. Hmm. I can't find it in my e-mail archives. Do you have any pointer to a web archive somewhere, where I can get the patch from? Rafael -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] ARM: S3C64XX: Implement basic power domain support
On Thursday, December 08, 2011, Rafael J. Wysocki wrote: On Thursday, December 08, 2011, Mark Brown wrote: On Wed, Dec 07, 2011 at 10:44:02PM +0100, Rafael J. Wysocki wrote: On Friday, December 02, 2011, Mark Brown wrote: May as well, yes - I didn't actually measure how long it tends to take to do the spin but it's not going to hurt. Are you going to post an updated patch? I've resent it but my development laptop is currently not internet connected so I'm not sure when it'll actually go out. Hmm. I can't find it in my e-mail archives. Do you have any pointer to a web archive somewhere, where I can get the patch from? Ah, I've just received it. Thanks, Rafael -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] ARM: S3C64XX: Implement basic power domain support
On Thursday, December 08, 2011, Mark Brown wrote:
The S3C64xx SoCs contain a set of gateable power domains which can be
enabled and disabled at runtime in order to save power. Use the generic
power domain code to implement support for these in software, enabling
runtime control of most domains:
- ETM (not supported in mainline).
- Domain G: 3D acceleration (no mainline support).
- Domain V: MFC (no mainline support).
- Domain I: JPEG and camera interface (no mainline support).
- Domain P: 2D acceleration, TV encoder and scaler (no mainline support)
- Domain S: Security (no mainline support).
- Domain F: LCD (driver already uses runtime PM), post processing and
rotation (no mainline support).
The IROM domain is marked as always enabled as we should arrange for it
to be enabled when we suspend which will need a bit more work.
Due to all the conditional device registration that the platform does
wrap s3c_pm_init() with s3c64xx_pm_init() which actually puts the device
into the power domain after the machines have registered, looking for
platform data to tell if the device was registered. Since currently only
Cragganmore actually sets up PM that is the only machine updated.
Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
Acked-by: Kukjin Kim kgene@samsung.com
Applied to linux-pm/linux-next.
Thanks,
Rafael
---
arch/arm/mach-s3c64xx/Kconfig |1 +
arch/arm/mach-s3c64xx/mach-crag6410.c |2 +-
arch/arm/mach-s3c64xx/pm.c | 176
++-
arch/arm/plat-samsung/include/plat/pm.h |6 +
4 files changed, 182 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 4d8c489..5c6c22e 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -8,6 +8,7 @@ config PLAT_S3C64XX
bool
depends on ARCH_S3C64XX
select SAMSUNG_WAKEMASK
+ select PM_GENERIC_DOMAINS
default y
help
Base platform code for any Samsung S3C64XX device
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c
b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 85b79ec..63c8751 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -731,7 +731,7 @@ static void __init crag6410_machine_init(void)
regulator_has_full_constraints();
- s3c_pm_init();
+ s3c64xx_pm_init();
}
MACHINE_START(WLF_CRAGG_6410, Wolfson Cragganmore 6410)
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index b375cd5..7d3e81b 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -17,10 +17,12 @@
#include linux/serial_core.h
#include linux/io.h
#include linux/gpio.h
+#include linux/pm_domain.h
#include mach/map.h
#include mach/irqs.h
+#include plat/devs.h
#include plat/pm.h
#include plat/wakeup-mask.h
@@ -31,6 +33,148 @@
#include mach/regs-gpio-memport.h
#include mach/regs-modem.h
+struct s3c64xx_pm_domain {
+ char *const name;
+ u32 ena;
+ u32 pwr_stat;
+ struct generic_pm_domain pd;
+};
+
+static int s3c64xx_pd_off(struct generic_pm_domain *domain)
+{
+ struct s3c64xx_pm_domain *pd;
+ u32 val;
+
+ pd = container_of(domain, struct s3c64xx_pm_domain, pd);
+
+ val = __raw_readl(S3C64XX_NORMAL_CFG);
+ val = ~(pd-ena);
+ __raw_writel(val, S3C64XX_NORMAL_CFG);
+
+ return 0;
+}
+
+static int s3c64xx_pd_on(struct generic_pm_domain *domain)
+{
+ struct s3c64xx_pm_domain *pd;
+ u32 val;
+ long retry = 100L;
+
+ pd = container_of(domain, struct s3c64xx_pm_domain, pd);
+
+ val = __raw_readl(S3C64XX_NORMAL_CFG);
+ val |= pd-ena;
+ __raw_writel(val, S3C64XX_NORMAL_CFG);
+
+ /* Not all domains provide power status readback */
+ if (pd-pwr_stat) {
+ do {
+ cpu_relax();
+ if (__raw_readl(S3C64XX_BLK_PWR_STAT) pd-pwr_stat)
+ break;
+ } while (retry--);
+
+ if (!retry) {
+ pr_err(Failed to start domain %s\n, pd-name);
+ return -EBUSY;
+ }
+ }
+
+ return 0;
+}
+
+static struct s3c64xx_pm_domain s3c64xx_pm_irom = {
+ .name = IROM,
+ .ena = S3C64XX_NORMALCFG_IROM_ON,
+ .pd = {
+ .power_off = s3c64xx_pd_off,
+ .power_on = s3c64xx_pd_on,
+ },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_etm = {
+ .name = ETM,
+ .ena = S3C64XX_NORMALCFG_DOMAIN_ETM_ON,
+ .pwr_stat = S3C64XX_BLKPWRSTAT_ETM,
+ .pd = {
+ .power_off = s3c64xx_pd_off,
+ .power_on = s3c64xx_pd_on,
+ },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_s = {
+ .name = S,
+ .ena = S3C64XX_NORMALCFG_DOMAIN_S_ON,
+ .pwr_stat =
RE: [PATCH v2] ARM: S3C64XX: Implement basic power domain support
-Original Message-
From: Rafael J. Wysocki [mailto:r...@sisk.pl]
Sent: Friday, December 09, 2011 7:55 AM
To: Mark Brown
Cc: Kukjin Kim; linux-arm-ker...@lists.infradead.org; linux-samsung-
s...@vger.kernel.org
Subject: Re: [PATCH v2] ARM: S3C64XX: Implement basic power domain support
On Thursday, December 08, 2011, Mark Brown wrote:
The S3C64xx SoCs contain a set of gateable power domains which can be
enabled and disabled at runtime in order to save power. Use the generic
power domain code to implement support for these in software, enabling
runtime control of most domains:
- ETM (not supported in mainline).
- Domain G: 3D acceleration (no mainline support).
- Domain V: MFC (no mainline support).
- Domain I: JPEG and camera interface (no mainline support).
- Domain P: 2D acceleration, TV encoder and scaler (no mainline
support)
- Domain S: Security (no mainline support).
- Domain F: LCD (driver already uses runtime PM), post processing and
rotation (no mainline support).
The IROM domain is marked as always enabled as we should arrange for it
to be enabled when we suspend which will need a bit more work.
Due to all the conditional device registration that the platform does
wrap s3c_pm_init() with s3c64xx_pm_init() which actually puts the device
into the power domain after the machines have registered, looking for
platform data to tell if the device was registered. Since currently only
Cragganmore actually sets up PM that is the only machine updated.
Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
Acked-by: Kukjin Kim kgene@samsung.com
Applied to linux-pm/linux-next.
Hi Rafael,
As I said, I need topic branch for merging into my tree to avoid conflicts,
but I couldn't find any branch for this.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
Thanks,
Rafael
---
arch/arm/mach-s3c64xx/Kconfig |1 +
arch/arm/mach-s3c64xx/mach-crag6410.c |2 +-
arch/arm/mach-s3c64xx/pm.c | 176
++-
arch/arm/plat-samsung/include/plat/pm.h |6 +
4 files changed, 182 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-
s3c64xx/Kconfig
index 4d8c489..5c6c22e 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -8,6 +8,7 @@ config PLAT_S3C64XX
bool
depends on ARCH_S3C64XX
select SAMSUNG_WAKEMASK
+ select PM_GENERIC_DOMAINS
default y
help
Base platform code for any Samsung S3C64XX device
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-
s3c64xx/mach-crag6410.c
index 85b79ec..63c8751 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -731,7 +731,7 @@ static void __init crag6410_machine_init(void)
regulator_has_full_constraints();
- s3c_pm_init();
+ s3c64xx_pm_init();
}
MACHINE_START(WLF_CRAGG_6410, Wolfson Cragganmore 6410)
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index b375cd5..7d3e81b 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -17,10 +17,12 @@
#include linux/serial_core.h
#include linux/io.h
#include linux/gpio.h
+#include linux/pm_domain.h
#include mach/map.h
#include mach/irqs.h
+#include plat/devs.h
#include plat/pm.h
#include plat/wakeup-mask.h
@@ -31,6 +33,148 @@
#include mach/regs-gpio-memport.h
#include mach/regs-modem.h
+struct s3c64xx_pm_domain {
+ char *const name;
+ u32 ena;
+ u32 pwr_stat;
+ struct generic_pm_domain pd;
+};
+
+static int s3c64xx_pd_off(struct generic_pm_domain *domain)
+{
+ struct s3c64xx_pm_domain *pd;
+ u32 val;
+
+ pd = container_of(domain, struct s3c64xx_pm_domain, pd);
+
+ val = __raw_readl(S3C64XX_NORMAL_CFG);
+ val = ~(pd-ena);
+ __raw_writel(val, S3C64XX_NORMAL_CFG);
+
+ return 0;
+}
+
+static int s3c64xx_pd_on(struct generic_pm_domain *domain)
+{
+ struct s3c64xx_pm_domain *pd;
+ u32 val;
+ long retry = 100L;
+
+ pd = container_of(domain, struct s3c64xx_pm_domain, pd);
+
+ val = __raw_readl(S3C64XX_NORMAL_CFG);
+ val |= pd-ena;
+ __raw_writel(val, S3C64XX_NORMAL_CFG);
+
+ /* Not all domains provide power status readback */
+ if (pd-pwr_stat) {
+ do {
+ cpu_relax();
+ if (__raw_readl(S3C64XX_BLK_PWR_STAT)
pd-pwr_stat)
+ break;
+ } while (retry--);
+
+ if (!retry) {
+ pr_err(Failed to start domain %s\n, pd-name);
+ return -EBUSY;
+ }
+ }
+
+ return 0;
+}
+
+static struct s3c64xx_pm_domain s3c64xx_pm_irom
Re: [PATCH 1/2] mfd: add irq domain support for max8997 interrupts
On Fri, Dec 9, 2011 at 1:27 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
Add irq domain support for max8997 interrupts. All uses of irq_base in
platform
data and max8997 driver private data are removed.
Cc: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Looks good to me.
Acked-by: MyungJoo Ham myungjoo@samsung.com
---
arch/arm/mach-exynos/mach-nuri.c | 4
arch/arm/mach-exynos/mach-origen.c | 1 -
drivers/mfd/max8997-irq.c | 33 +++--
drivers/mfd/max8997.c | 1 -
include/linux/mfd/max8997-private.h | 4 +++-
include/linux/mfd/max8997.h | 1 -
6 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-nuri.c
b/arch/arm/mach-exynos/mach-nuri.c
index 236bbe1..ae333e5 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -1077,12 +1077,8 @@ static struct platform_device nuri_max8903_device = {
static void __init nuri_power_init(void)
{
int gpio;
- int irq_base = IRQ_GPIO_END + 1;
int ta_en = 0;
- nuri_max8997_pdata.irq_base = irq_base;
- irq_base += MAX8997_IRQ_NR;
-
gpio = EXYNOS4_GPX0(7);
gpio_request(gpio, AP_PMIC_IRQ);
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
diff --git a/arch/arm/mach-exynos/mach-origen.c
b/arch/arm/mach-exynos/mach-origen.c
index f56d027..588b0a8 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -421,7 +421,6 @@ struct max8997_platform_data __initdata
origen_max8997_pdata = {
.buck1_gpiodvs = false,
.buck2_gpiodvs = false,
.buck5_gpiodvs = false,
- .irq_base = IRQ_GPIO_END + 1,
.ignore_gpiodvs_side_effect = true,
.buck125_default_idx = 0x0,
diff --git a/drivers/mfd/max8997-irq.c b/drivers/mfd/max8997-irq.c
index 09274cf..eb9cad5 100644
--- a/drivers/mfd/max8997-irq.c
+++ b/drivers/mfd/max8997-irq.c
@@ -142,7 +142,8 @@ static void max8997_irq_sync_unlock(struct irq_data *data)
static const inline struct max8997_irq_data *
irq_to_max8997_irq(struct max8997_dev *max8997, int irq)
{
- return max8997_irqs[irq - max8997-irq_base];
+ struct irq_data *data = irq_get_irq_data(irq);
+ return max8997_irqs[data-hwirq];
}
static void max8997_irq_mask(struct irq_data *data)
@@ -179,10 +180,11 @@ static struct irq_chip max8997_irq_chip = {
static irqreturn_t max8997_irq_thread(int irq, void *data)
{
struct max8997_dev *max8997 = data;
+ struct irq_domain *domain = max8997-irq_domain;
u8 irq_reg[MAX8997_IRQ_GROUP_NR] = {};
u8 irq_src;
int ret;
- int i;
+ int i, cur_irq;
ret = max8997_read_reg(max8997-i2c, MAX8997_REG_INTSRC, irq_src);
if (ret 0) {
@@ -268,9 +270,9 @@ static irqreturn_t max8997_irq_thread(int irq, void *data)
irq_reg[i] = ~max8997-irq_masks_cur[i];
/* Report */
- for (i = 0; i MAX8997_IRQ_NR; i++) {
+ irq_domain_for_each_irq(domain, i, cur_irq) {
if (irq_reg[max8997_irqs[i].group] max8997_irqs[i].mask)
- handle_nested_irq(max8997-irq_base + i);
+ handle_nested_irq(cur_irq);
}
return IRQ_HANDLED;
@@ -278,13 +280,14 @@ static irqreturn_t max8997_irq_thread(int irq, void
*data)
int max8997_irq_resume(struct max8997_dev *max8997)
{
- if (max8997-irq max8997-irq_base)
- max8997_irq_thread(max8997-irq_base, max8997);
+ if (max8997-irq max8997-irq_domain.irq_base)
+ max8997_irq_thread(max8997-irq_domain.irq_base, max8997);
return 0;
}
int max8997_irq_init(struct max8997_dev *max8997)
{
+ struct irq_domain *domain = max8997-irq_domain;
int i;
int cur_irq;
int ret;
@@ -292,12 +295,6 @@ int max8997_irq_init(struct max8997_dev *max8997)
if (!max8997-irq) {
dev_warn(max8997-dev, No interrupt specified.\n);
- max8997-irq_base = 0;
- return 0;
- }
-
- if (!max8997-irq_base) {
- dev_err(max8997-dev, No interrupt base specified.\n);
return 0;
}
@@ -327,9 +324,17 @@ int max8997_irq_init(struct max8997_dev *max8997)
true : false;
}
+ domain-irq_base = irq_alloc_descs(-1, 0, MAX8997_IRQ_NR, 0);
+ if (domain-irq_base 0) {
+ dev_err(max8997-dev, failed to alloc irq descs\n);
+ return 0;
+ }
+ domain-nr_irq = MAX8997_IRQ_NR;
+ domain-ops = irq_domain_simple_ops;
+ irq_domain_add(domain);
+
/* Register with genirq */
- for (i = 0; i MAX8997_IRQ_NR; i++) {
- cur_irq = i + max8997-irq_base;
+
Re: [PATCH 1/2] mfd: add irq domain support for max8997 interrupts
On Thu, Dec 08, 2011 at 09:57:38PM +0530, Thomas Abraham wrote: You should be sending this to Samuel for review as it's a MFD patch. Add irq domain support for max8997 interrupts. All uses of irq_base in platform data and max8997 driver private data are removed. Removing irq_base from platform data isn't going to be helpful for anyone using the driver on non-DT platforms as it's going to make it impossible to find the interrupts. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] regulator: add device tree support for max8997
Dear Mr. Park, On 9 December 2011 08:00, Kyungmin Park kyungmin.p...@samsung.com wrote: On 12/9/11, Thomas Abraham thomas.abra...@linaro.org wrote: Add device tree based discovery support for max8997. Cc: MyungJoo Ham myungjoo@samsung.com Cc: Rajendra Nayak rna...@ti.com Cc: Rob Herring rob.herr...@calxeda.com Cc: Grant Likely grant.lik...@secretlab.ca Signed-off-by: Thomas Abraham thomas.abra...@linaro.org [...] +#else +static int *max8997_i2c_parse_dt_pdata(struct device *dev + struct max8997_platform_data **pdata) It should be 'int' instead of 'int *' It's helpful to compile without CONFIG_OF. I apologize for that. I compiled for exynos-dt first and then compiled for origen board (which does not select CONFIG_OF). When compiling for non-dt origen, I missed to notice that CONFIG_OF selection was left over from the previous exynos-dt compile. I have checked again without CONFIG_OF and found this issue as well as two other errors/warnings. Thanks. This was very helpful. Regards, Thomas. [...] -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] mfd: add irq domain support for max8997 interrupts
Hi Mark, On 9 December 2011 10:11, Mark Brown broo...@opensource.wolfsonmicro.com wrote: On Thu, Dec 08, 2011 at 09:57:38PM +0530, Thomas Abraham wrote: You should be sending this to Samuel for review as it's a MFD patch. Ok. I will Cc Samuel for the v2 of this patchset. Add irq domain support for max8997 interrupts. All uses of irq_base in platform data and max8997 driver private data are removed. Removing irq_base from platform data isn't going to be helpful for anyone using the driver on non-DT platforms as it's going to make it impossible to find the interrupts. All the consumers of the max8997 interrupts are the drivers for the sub-blocks of max8997. These drivers have access to 'irq_domain' member of 'struct max8997_dev', From irq_domain, the sub-block driver can get the irq_base and add one of the 'enum max8997_irq' offset when registering for interrupt notifications. So irq_base from platform data and all uses of it was removed. All max8997 sub-block drivers should use the irq_base of the irq_domain. Thanks for your review. Regards, Thomas. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] regulator: add device tree support for max8997
On Thu, Dec 08, 2011 at 09:57:39PM +0530, Thomas Abraham wrote: +Required properties, if interrupts are delivered to host system: These are just optional properties, really. +- interrupt-parent: Specifies the phandle of the interrupt controller to which + the interrupts from max8997 are delivered to. +- interrupts: Interrupt specifiers for two interrupt sources. + - First interrupt specifier is for 'irq1' interrupt. + - Second interrupt specifier is for 'alert' interrupt. What if the two are connected to different interrupt controllers? +For LDO's: Extra '. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] mfd: add irq domain support for max8997 interrupts
On 9 December 2011 11:32, Mark Brown broo...@opensource.wolfsonmicro.com wrote: On Fri, Dec 09, 2011 at 10:55:10AM +0530, Thomas Abraham wrote: On 9 December 2011 10:11, Mark Brown Removing irq_base from platform data isn't going to be helpful for anyone using the driver on non-DT platforms as it's going to make it impossible to find the interrupts. All the consumers of the max8997 interrupts are the drivers for the sub-blocks of max8997. These drivers have access to 'irq_domain' member of 'struct max8997_dev', From irq_domain, the sub-block driver can get the irq_base and add one of the 'enum max8997_irq' offset when registering for interrupt notifications. There's no GPIOs with interrupt support (even if they're not implemented yet)? Ok. There does seem to be 12 gpios supported by max8997, but not used on the origen board. If these gpio's are connected to the host system, and host system sets up gpio interrupt notification for these gpio lines, the linux irq number for the gpio interrupt would belong to the irq domain of the host interrupt controller (gic irq domain in case of exynos). Consumers of this interrupt would use the gpio interrupt independent of the max8997 irq domain. So irq_base can be maintained private to the max8997 mfd driver and its sub-block drivers. Thanks, Thomas. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] mfd: add irq domain support for max8997 interrupts
On Fri, Dec 09, 2011 at 12:00:07PM +0530, Thomas Abraham wrote: If these gpio's are connected to the host system, and host system sets up gpio interrupt notification for these gpio lines, the linux irq number for the gpio interrupt would belong to the irq domain of the host interrupt controller (gic irq domain in case of exynos). Consumers of this interrupt would use the gpio interrupt independent of the max8997 irq domain. So irq_base can be maintained private to the max8997 mfd driver and its sub-block drivers. How would you provide this interrupt to the device using it in a non-DT systemm without passing the irq_base into the device as platform data? -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
