The i.MX6 Quad SoC will work without the l2x0 L2 cache controller
support built into the kernel, so this patch removes the dependency
on CACHE_L2X0 and selects MIGHT_HAVE_CACHE_L2X0 instead.
This makes the l2x0 support optional, so that it can be turned off
when desired for debugging purposes
This patch adds a check whether the host supports maximum current value
obtained from the device's extended csd register for a selected interface
voltage and frequency.
cc: Chris Ball c...@laptop.org
Signed-off-by: Girish K S girish.shivananja...@linaro.org
---
Changes in v1:
reduced the
On Wed, Dec 14, 2011 at 04:57:10AM +, Axel Lin wrote:
I got below build error on linux-next 20111213.
CC arch/arm/kernel/process.o
In file included from arch/arm/mach-s5p64x0/include/mach/system.h:16,
from arch/arm/kernel/process.c:64:
Hello,
On Sunday, December 11, 2011 11:46 PM Stephen Rothwell wrote:
On Fri, 09 Dec 2011 17:39:56 +0100 Marek Szyprowski
m.szyprow...@samsung.com wrote:
Introduce new alloc/free/mmap methods that take attributes argument.
alloc/free_coherent can be implemented on top of the new
Hi Dave,
Sorry for that I did not look into previous post to point it out.
On Wed, Dec 14, 2011 at 11:39:41AM +, Dave Martin wrote:
The i.MX6 Quad SoC will work without the l2x0 L2 cache controller
support built into the kernel, so this patch removes the dependency
on CACHE_L2X0 and
On Wed, Dec 14, 2011 at 07:37:32AM -0600, Rob Herring wrote:
On 12/14/2011 05:39 AM, Dave Martin wrote:
If running in the Normal World on a TrustZone-enabled SoC, Linux
does not have complete control over the L2 cache controller
configuration. The kernel cannot work reliably on such
On Wed, Dec 14, 2011 at 09:26:24PM +0800, Shawn Guo wrote:
Hi Dave,
Sorry for that I did not look into previous post to point it out.
On Wed, Dec 14, 2011 at 11:39:41AM +, Dave Martin wrote:
The i.MX6 Quad SoC will work without the l2x0 L2 cache controller
support built into the
On Wed, Dec 14, 2011 at 10:05:04PM +0800, Richard Zhao wrote:
On Wed, Dec 14, 2011 at 09:26:24PM +0800, Shawn Guo wrote:
Hi Dave,
Sorry for that I did not look into previous post to point it out.
On Wed, Dec 14, 2011 at 11:39:41AM +, Dave Martin wrote:
The i.MX6 Quad SoC will
Just a thought (not sure if it's explicitly specified in 4.5 spec or not):
Do we really need to perform bus test in HS200 mode? because in HS200, we
are anyways going to perform the tuning sequence (which achieves what bus
test command does).
Regards,
Subhash
-Original Message-
From:
* Dave Martin dave.mar...@linaro.org [111214 03:08]:
If running in the Normal World on a TrustZone-enabled SoC, Linux
does not have complete control over the L2 cache controller
configuration. The kernel cannot work reliably on such platforms
without the l2x0 cache support code built in.
On Wed, Dec 14, 2011 at 10:14:25AM -0800, Tony Lindgren wrote:
* Dave Martin dave.mar...@linaro.org [111214 03:08]:
If running in the Normal World on a TrustZone-enabled SoC, Linux
does not have complete control over the L2 cache controller
configuration. The kernel cannot work reliably on
* Dave Martin dave.mar...@linaro.org [111214 09:58]:
On Wed, Dec 14, 2011 at 10:14:25AM -0800, Tony Lindgren wrote:
* Dave Martin dave.mar...@linaro.org [111214 03:08]:
If running in the Normal World on a TrustZone-enabled SoC, Linux
does not have complete control over the L2 cache
On Wed, 14 Dec 2011, Russell King - ARM Linux wrote:
On Wed, Dec 14, 2011 at 12:32:44PM +, Will Deacon wrote:
On Wed, Dec 14, 2011 at 04:57:10AM +, Axel Lin wrote:
I got below build error on linux-next 20111213.
CC arch/arm/kernel/process.o
In file included from
On 12/14/2011 12:39 PM, Tony Lindgren wrote:
* Dave Martin dave.mar...@linaro.org [111214 09:58]:
On Wed, Dec 14, 2011 at 10:14:25AM -0800, Tony Lindgren wrote:
* Dave Martin dave.mar...@linaro.org [111214 03:08]:
If running in the Normal World on a TrustZone-enabled SoC, Linux
does not have
* Rob Herring robherri...@gmail.com [111214 12:30]:
On 12/14/2011 12:39 PM, Tony Lindgren wrote:
I think we should keep L2 configurable for omaps until we have some
way of getting the configuration dynamically or from device tree.
This already exists with l2x0_of_init. OMAP just
On Thu, Dec 15, 2011 at 01:30:13AM +0200, Denis Kuzmenko wrote:
On 12/14/2011 09:12 PM, Russell King - ARM Linux wrote:
On Wed, Dec 14, 2011 at 12:32:44PM +, Will Deacon wrote:
On Wed, Dec 14, 2011 at 04:57:10AM +, Axel Lin wrote:
So... unless things change, we can expect Gemini,
Hi Kukjin,
Axel and Will, thanks for pointing out.
Oops, I couldn't have much time to follow up :(
But let me look at that in this weekend and I know, it can be escaped before
merge window :)
I also found the same build errors by:
make s5pc100_defconfig
make s5pv210_defconfig
make
On Wed, Dec 14, 2011 at 03:01:19PM +, Dave Martin wrote:
On Wed, Dec 14, 2011 at 10:05:04PM +0800, Richard Zhao wrote:
On Wed, Dec 14, 2011 at 09:26:24PM +0800, Shawn Guo wrote:
Hi Dave,
Sorry for that I did not look into previous post to point it out.
On Wed, Dec 14, 2011
On Thu, Dec 15, 2011 at 09:02:20AM +0800, Richard Zhao wrote:
On Wed, Dec 14, 2011 at 03:01:19PM +, Dave Martin wrote:
On Wed, Dec 14, 2011 at 10:05:04PM +0800, Richard Zhao wrote:
On Wed, Dec 14, 2011 at 09:26:24PM +0800, Shawn Guo wrote:
Hi Dave,
Sorry for that I did not
On 14 December 2011 20:50, Subhash Jadavani subha...@codeaurora.org wrote:
Just a thought (not sure if it's explicitly specified in 4.5 spec or not):
Do we really need to perform bus test in HS200 mode? because in HS200, we
are anyways going to perform the tuning sequence (which achieves what
This patch adds a check whether the host supports maximum current value
obtained from the device's extended csd register for a selected interface
voltage and frequency.
cc: Chris Ball c...@laptop.org
Signed-off-by: Girish K S girish.shivananja...@linaro.org
---
Changes in v2:
deleted a
On Wed, Dec 14, 2011 at 07:12:05PM +, Russell King - ARM Linux wrote:
On Wed, Dec 14, 2011 at 12:32:44PM +, Will Deacon wrote:
ARM: restart: Temporary #error to persuade platform maintainers to take
the restart changes seriously
Force builds to fail to ensure that
This patch increases the number of bank for EXYNOS4 to support bigger than
2GB memory on it.
Signed-off-by: Boojin Kim boojin@samsung.com
---
arch/arm/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 928cbcc..5c90dee
PL330 r1p0 version fixed the lockup error being on r0p0.
This patch supports the DMA transmit without barrier operation
if the revision is the next of r0p0.
Signed-off-by: Boojin Kim boojin@samsung.com
---
arch/arm/include/asm/hardware/pl330.h |5 +
drivers/dma/pl330.c
Since it is not guaranteed that an iommu driver initializes in its
domain_init() function, it must be initialized with NULL to prevent
calling a function in an arbitrary location when iommu fault occurred.
Signed-off-by: KyongHo Cho pullip@samsung.com
---
drivers/iommu/iommu.c |1 +
1
On 15 December 2011 11:33, amit kachhap amit.kach...@linaro.org wrote:
On Thu, Dec 15, 2011 at 9:28 AM, Girish K S
girish.shivananja...@linaro.org wrote:
This patch adds a check whether the host supports maximum current value
obtained from the device's extended csd register for a selected
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