Hi Mr. Kim,
It's maybe missing for v3.3 merge at samsung soc.
Please give your opinion, how to handle it?
If you don't mind it, it can merge it by devfreq.
Thank you,
Kyungmin Park
On 12/1/11, MyungJoo Ham myungjoo@samsung.com wrote:
- Add DMC1
- Enlarge address space for DMC from 4k to
On 12/15/2011 11:18 PM, Javi Merino wrote:
On 11/12/11 19:27, Javi Merino wrote:
Add a req_running field to the pl330_thread to track which request (if
any) has been submitted to the DMA. This mechanism replaces the old
one in which we tried to guess the same by looking at the PC of the
DMA,
On Thu, Dec 15, 2011 at 03:53:50PM +, Dave Martin wrote:
Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs)
is bothersome to maintain and likely to lead to merge conflicts.
This patch moves the knowledge of which platforms have a L2x0 or
PL310 cache controller to the
On Thu, Dec 15, 2011 at 03:53:54PM +, Dave Martin wrote:
The i.MX6 Quad SoC will work without the l2x0 L2 cache controller
support built into the kernel, so this patch removes the dependency
on CACHE_L2X0.
This makes the l2x0 support optional, so that it can be turned off
when desired
On Thu, Dec 15, 2011 at 05:11:26PM +0100, Joerg Roedel wrote:
On Tue, Dec 13, 2011 at 04:14:20PM +0900, KyongHo Cho wrote:
Since it is not guaranteed that an iommu driver initializes in its
domain_init() function, it must be initialized with NULL to prevent
calling a function in an
