[PATCH 2/4] [SCSI] ufshcd: UFS UTP Transfer requests handling

2012-02-01 Thread Vinayak Holikatti 
From: Santosh Yaraganavi 

This patch adds support for Transfer request handling.

ufshcd includes following implementations:
 - SCSI queuecommand
 - Compose UPIU(UFS Protocol information unit)
 - Issue commands to UFS host controller
 - Handle completed commands

Signed-off-by: Santosh Yaraganavi 
Signed-off-by: Vinayak Holikatti 
Reviewed-by: Arnd Bergmann 
Reviewed-by: Saugata Das 
Reviewed-by: Vishak G 
Reviewed-by: Girish K S 
---
 drivers/scsi/ufs/ufshcd.c |  447 +
 1 files changed, 447 insertions(+), 0 deletions(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index c82eeea..23d758b 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -62,6 +62,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "ufs.h"
@@ -81,6 +82,7 @@ enum {
UFSHCD_MAX_CHANNEL  = 1,
UFSHCD_MAX_ID   = 1,
UFSHCD_MAX_LUNS = 8,
+   UFSHCD_CMD_PER_LUN  = 16,
UFSHCD_CAN_QUEUE= 32,
BYTES_128   = 128,
BYTES_1024  = 1024
@@ -146,6 +148,7 @@ struct uic_command {
  * @host: Scsi_Host instance of the driver
  * @pdev: PCI device handle
  * @lrb: local reference block
+ * @outstanding_reqs: Bits representing outstanding transfer requests
  * @capabilities: UFS Controller Capabilities
  * @nutrs: Transfer Request Queue depth supported by controller
  * @nutmrs: Task Management Queue depth supported by controller
@@ -184,6 +187,8 @@ struct ufs_hba {
 
struct ufshcd_lrb *lrb;
 
+   u32 outstanding_reqs;
+
u32 capabilities;
int nutrs;
int nutmrs;
@@ -204,12 +209,28 @@ struct ufs_hba {
  * @ucd_cmd_ptr: UCD address of the command
  * @ucd_rsp_ptr: Response UPIU address for this command
  * @ucd_prdt_ptr: PRDT address of the command
+ * @cmd: pointer to scsi command
+ * @sense_buffer: pointer sense buffer address of the scsi command
+ * @sense_bufflen: Length of the sense buffer
+ * @scsi_status: SCSI status of the command
+ * @command_type: SCSI, UFS, Query.
+ * @task_tag: Task tag of the command
+ * @lun: LUN of the command
  */
 struct ufshcd_lrb {
struct utp_transfer_req_desc *utr_descriptor_ptr;
struct utp_upiu_cmd *ucd_cmd_ptr;
struct utp_upiu_rsp *ucd_rsp_ptr;
struct ufshcd_sg_entry *ucd_prdt_ptr;
+
+   struct scsi_cmnd *cmd;
+   u8 *sense_buffer;
+   unsigned int sense_bufflen;
+   int scsi_status;
+
+   int command_type;
+   int task_tag;
+   int lun;
 };
 
 /**
@@ -236,6 +257,18 @@ static inline int ufshcd_is_device_present(u32 reg_hcs)
 }
 
 /**
+ * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
+ * @lrb: pointer to local command reference block
+ *
+ * This function is used to get the OCS field from UTRD
+ * Returns the OCS field in the UTRD
+ */
+static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
+{
+   return lrbp->utr_descriptor_ptr->header.dword_2 & MASK_OCS;
+}
+
+/**
  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
  * @reg: Register value of host controller status
  *
@@ -303,6 +336,36 @@ static inline void ufshcd_free_hba_memory(struct ufs_hba 
*hba)
 }
 
 /**
+ * ufshcd_is_valid_req_rsp - checks if controller TR response is valid
+ * @ucd_rsp_ptr: pointer to response UPIU
+ *
+ * This function checks the response UPIU for valid transaction type in
+ * response field
+ * Returns 0 on success, non-zero on failure
+ */
+static inline int
+ufshcd_is_valid_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
+{
+   return ((be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24) ==
+UPIU_TRANSACTION_RESPONSE) ? 0 :
+ (DID_ERROR << 16 |
+  COMMAND_COMPLETE << 8);
+}
+
+/**
+ * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
+ * @ucd_rsp_ptr: pointer to response UPIU
+ *
+ * This function gets the response status and scsi_status from response UPIU
+ * Returns the response result code.
+ */
+static inline int
+ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
+{
+   return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
+}
+
+/**
  * ufshcd_config_int_aggr - Configure interrupt aggregation values
  * currently there is no use case where we want to configure
  * interrupt aggregation dynamically. So to configure interrupt
@@ -342,6 +405,34 @@ static inline void ufshcd_hba_stop(struct ufs_hba *hba)
 }
 
 /**
+ * ufshcd_send_command - Send SCSI or device management commands
+ * @hba: per adapter instance
+ * @task_tag: Task tag of the command
+ */
+static inline
+void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
+{
+   hba->outstanding_reqs |= (1 << task_tag);
+   writel((1 << task_tag),
+  (UFSHCD_MMIO_BASE + REG_UTP_TRANSFER_REQ_DOOR_BELL));
+}
+
+/**
+ * ufshcd_copy_sense_data - Copy sense data in

[PATCH 4/4] [SCSI] ufshcd: SCSI error handling

2012-02-01 Thread Vinayak Holikatti 
From: Santosh Yaraganavi 

UFSHCD SCSI error handling includes following implementations,
 - Abort task
 - Device reset
 - Host reset

Signed-off-by: Santosh Yaraganavi 
Signed-off-by: Vinayak Holikatti 
Reviewed-by: Arnd Bergmann 
Reviewed-by: Saugata Das 
Reviewed-by: Vishak G 
Reviewed-by: Girish K S 
---
 drivers/scsi/ufs/ufshcd.c |  312 +
 1 files changed, 312 insertions(+), 0 deletions(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 1bfae84..7589dd1 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -76,6 +76,8 @@
 #define NULL 0
 #endif  /* NULL */
 
+#define UFSHCD_MAX_TM_SLOTS0xFF
+
 #define BYTES_TO_DWORDS(p) (p >> 2)
 #define UFSHCD_MMIO_BASE   (hba->mmio_base)
 
@@ -83,6 +85,7 @@ enum {
UFSHCD_MAX_CHANNEL  = 1,
UFSHCD_MAX_ID   = 1,
UFSHCD_MAX_LUNS = 8,
+   UFSHCD_MAX_TM_CMDS  = 8,
UFSHCD_CMD_PER_LUN  = 16,
UFSHCD_CAN_QUEUE= 32,
BYTES_128   = 128,
@@ -149,6 +152,7 @@ struct uic_command {
  * @host: Scsi_Host instance of the driver
  * @pdev: PCI device handle
  * @lrb: local reference block
+ * @outstanding_tasks: Bits representing outstanding task requests
  * @outstanding_reqs: Bits representing outstanding transfer requests
  * @capabilities: UFS Controller Capabilities
  * @nutrs: Transfer Request Queue depth supported by controller
@@ -192,6 +196,7 @@ struct ufs_hba {
 
struct ufshcd_lrb *lrb;
 
+   u32 outstanding_tasks;
u32 outstanding_reqs;
 
u32 capabilities;
@@ -200,6 +205,8 @@ struct ufs_hba {
u32 ufs_version;
 
struct uic_command active_uic_cmd;
+   wait_queue_head_t ufshcd_tm_wait_queue;
+   u8 tm_condition[UFSHCD_MAX_TM_CMDS];
 
u32 ufshcd_state;
u32 int_enable_mask;
@@ -278,6 +285,30 @@ static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb 
*lrbp)
 }
 
 /**
+ * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
+ * @task_req_descp: pointer to utp_task_req_desc structure
+ *
+ * This function is used to get the OCS field from UTMRD
+ * Returns the OCS field in the UTMRD
+ */
+static inline int
+ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
+{
+   return task_req_descp->header.dword_2 & MASK_OCS;
+}
+
+/**
+ * ufshcd_is_tmq_full - checks if the task management slots are full
+ * @outstanding_tasks: contains the task management doorbell value
+ *
+ * Returns 1 if a free slot available, 0 if task slots are full
+ */
+static inline int ufshcd_is_tmq_full(u32 outstanding_tasks)
+{
+   return (UFSHCD_MAX_TM_SLOTS == outstanding_tasks) ? 0 : 1;
+}
+
+/**
  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
  * @reg: Register value of host controller status
  *
@@ -1098,6 +1129,45 @@ static void ufshcd_slave_destroy(struct scsi_device 
*sdev)
 }
 
 /**
+ * ufshcd_task_req_compl - handle task management request completion
+ * @hba: per adapter instance
+ * @index: index of the completed request
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index)
+{
+   struct utp_upiu_task_rsp *task_rsp_upiup;
+   struct utp_task_req_desc *task_req_descp;
+   unsigned long flags;
+   int ocs_value;
+   int task_response = -1;
+
+   spin_lock_irqsave(hba->host->host_lock, flags);
+
+   /* clear completed tasks from outstanding_tasks */
+   hba->outstanding_tasks ^= index;
+
+   task_req_descp =
+   (struct utp_task_req_desc *)hba->utmrdl_virt_addr_aligned;
+   ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
+
+   if (OCS_SUCCESS == ocs_value) {
+
+   task_rsp_upiup = (struct utp_upiu_task_rsp *)
+task_req_descp[index].task_rsp_upiu;
+   task_response = be32_to_cpu(task_rsp_upiup->header.dword_1);
+   task_response = ((task_response & MASK_TASK_RESPONSE) >> 8);
+
+   /* clear task response */
+   memset(task_rsp_upiup, 0, sizeof(struct utp_upiu_task_rsp));
+   }
+   spin_unlock_irqrestore(hba->host->host_lock, flags);
+
+   return task_response;
+}
+
+/**
  * ufshcd_scsi_cmd_status - Update SCSI command result based on scsi status
  * @lrb: pointer to local reference block of completed command
  * @scsi_status: SCSI command status
@@ -1314,6 +1384,31 @@ fatal_eh:
 }
 
 /**
+ * ufshcd_tmc_handler - handle task management function completion
+ * @hba: per adapter instance
+ */
+static void ufshcd_tmc_handler(struct ufs_hba *hba)
+{
+   u32 completed_reqs;
+   u32 tm_doorbell;
+   int i;
+
+   tm_doorbell = readl(hba->mmio_base + REG_UTP_TASK_REQ_DOOR_BELL);
+   completed_reqs = tm_doorbell ^ hba->outstanding_tasks;
+   for (i = 0; i < hba->nutmrs; i++) {
+   if (completed_reqs & (1 << i)) {
+
+   /*
+

[PATCH 3/4] [SCSI] ufshcd: UFSHCI error handling

2012-02-01 Thread Vinayak Holikatti 
From: Santosh Yaraganavi 

UFSHCI error handling includes support for:
 - UFS host controller errors
 - System bus errors
 - Unipro errors

Signed-off-by: Santosh Yaraganavi 
Signed-off-by: Vinayak Holikatti 
Reviewed-by: Arnd Bergmann 
Reviewed-by: Saugata Das 
Reviewed-by: Vishak G 
Reviewed-by: Girish K S 
---
 drivers/scsi/ufs/ufshcd.c |  104 +
 1 files changed, 104 insertions(+), 0 deletions(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 23d758b..1bfae84 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -64,6 +64,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ufs.h"
 #include "ufshci.h"
@@ -153,9 +154,13 @@ struct uic_command {
  * @nutrs: Transfer Request Queue depth supported by controller
  * @nutmrs: Task Management Queue depth supported by controller
  * @active_uic_cmd: handle of active UIC command
+ * @ufshcd_tm_wait_queue: wait queue for task management
+ * @tm_condition: array of condition varibles for task management
  * @ufshcd_state: UFSHCD states
  * @int_enable_mask: Interrupt Mask Bits
  * @uic_workq: Work queue for UIC completion handling
+ * @feh_workq: Work queue for fatal controller error handling
+ * @errors: HBA errors
  */
 struct ufs_hba {
void __iomem *mmio_base;
@@ -201,6 +206,10 @@ struct ufs_hba {
 
/* Work Queues */
struct work_struct uic_workq;
+   struct work_struct feh_workq;
+
+   /* HBA Errors */
+   u32 errors;
 };
 
 /**
@@ -924,6 +933,9 @@ static int ufshcd_make_hba_operational(struct ufs_hba *hba)
/* Configure interrupt aggregation */
ufshcd_config_int_aggr(hba, INT_AGGR_CONFIG);
 
+   if (UFSHCD_STATE_RESET == hba->ufshcd_state)
+   scsi_unblock_requests(hba->host);
+
hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
scsi_scan_host(hba->host);
 
@@ -1009,6 +1021,53 @@ static int ufshcd_initialize_hba(struct ufs_hba *hba)
 }
 
 /**
+ * ufshcd_do_reset - reset the host controller
+ * @hba: per adapter instance
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+static int ufshcd_do_reset(struct ufs_hba *hba)
+{
+   struct ufshcd_lrb *lrbp;
+   unsigned long flags;
+   int tag;
+
+   /* block commands from midlayer */
+   scsi_block_requests(hba->host);
+
+   spin_lock_irqsave(hba->host->host_lock, flags);
+   hba->ufshcd_state = UFSHCD_STATE_RESET;
+
+   /* send controller to reset state */
+   writel(0, (UFSHCD_MMIO_BASE + REG_CONTROLLER_ENABLE));
+
+   /* abort outstanding commands */
+   for (tag = 0; tag < hba->host->can_queue; tag++) {
+   lrbp = &hba->lrb[tag];
+
+   /* if lrbp->cmd is not NULL, the command is outstanding */
+   if (lrbp->cmd) {
+   scsi_dma_unmap(lrbp->cmd);
+   lrbp->cmd->result = DID_RESET << 16;
+   lrbp->cmd->scsi_done(lrbp->cmd);
+   lrbp->cmd = NULL;
+   }
+   }
+
+   /* disable all the interrupts */
+   ufshcd_int_config(hba, UFSHCD_INT_DISABLE);
+   spin_unlock_irqrestore(hba->host->host_lock, flags);
+
+   /* start the initialization process */
+   if (ufshcd_initialize_hba(hba)) {
+   dev_err(&hba->pdev->dev,
+   "Reset: Controller initialization failed\n");
+   return -EINVAL;
+   }
+   return 0;
+}
+
+/**
  * ufshcd_slave_alloc - handle initial scsi devie configurations
  * @sdev: pointer to scsi device
  *
@@ -1215,12 +1274,56 @@ static void ufshcd_uic_cc_handler (struct work_struct 
*work)
 }
 
 /**
+ * ufshcd_fatal_err_handler - handle fatal errors
+ * @hba: per adapter instance
+ */
+static void ufshcd_fatal_err_handler(struct work_struct *work)
+{
+   struct ufs_hba *hba;
+   hba = container_of(work, struct ufs_hba, feh_workq);
+
+   /* check if reset is already in progress */
+   if (UFSHCD_STATE_RESET != hba->ufshcd_state)
+   ufshcd_do_reset(hba);
+}
+
+/**
+ * ufshcd_err_handler - Check for fatal errors
+ * @work: pointer to a work queue structure
+ */
+static void ufshcd_err_handler(struct ufs_hba *hba)
+{
+   u32 reg;
+
+   if (hba->errors & INT_FATAL_ERRORS)
+   goto fatal_eh;
+
+   if (hba->errors & UIC_ERROR) {
+
+   reg = readl(UFSHCD_MMIO_BASE +
+   REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
+   if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
+   goto fatal_eh;
+   }
+
+   return;
+
+fatal_eh:
+   hba->ufshcd_state = UFSHCD_STATE_ERROR;
+   schedule_work(&hba->feh_workq);
+}
+
+/**
  * ufshcd_sl_intr - Interrupt service routine
  * @hba: per adapter instance
  * @intr_status: contains interrupts generated by the controller
  */
 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
 {
+   hba->errors = UFSHCD_ERROR_MASK & intr_stat

[PATCH 1/4] [SCSI] ufshcd: UFS Host controller driver

2012-02-01 Thread Vinayak Holikatti 
From: Santosh Yaraganavi 

This patch adds support for Universal Flash Storage(UFS)
host controllers. The UFS host controller driver
includes host controller initialization method.

The Initialization process involves following steps:
 - Initiate UFS Host Controller initialization process by writing
   to Host controller enable register
 - Configure UFS Host controller registers with host memory space
   datastructure offsets.
 - Unipro link startup procedure
 - Check for connected device
 - Configure UFS host controller to process requests
 - Enable required interrupts
 - Configure interrupt aggregation

Signed-off-by: Santosh Yaraganavi 
Signed-off-by: Vinayak Holikatti 
Reviewed-by: Arnd Bergmann 
Reviewed-by: Saugata Das 
Reviewed-by: Vishak G 
Reviewed-by: Girish K S 
---
 drivers/scsi/Kconfig  |1 +
 drivers/scsi/Makefile |1 +
 drivers/scsi/ufs/Kconfig  |   49 ++
 drivers/scsi/ufs/Makefile |2 +
 drivers/scsi/ufs/ufs.h|  203 +
 drivers/scsi/ufs/ufshcd.c | 1091 +
 drivers/scsi/ufs/ufshci.h |  360 +++
 7 files changed, 1707 insertions(+), 0 deletions(-)
 create mode 100644 drivers/scsi/ufs/Kconfig
 create mode 100644 drivers/scsi/ufs/Makefile
 create mode 100644 drivers/scsi/ufs/ufs.h
 create mode 100644 drivers/scsi/ufs/ufshcd.c
 create mode 100644 drivers/scsi/ufs/ufshci.h

diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 16570aa..477a91a 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -619,6 +619,7 @@ config SCSI_ARCMSR
 
 source "drivers/scsi/megaraid/Kconfig.megaraid"
 source "drivers/scsi/mpt2sas/Kconfig"
+source "drivers/scsi/ufs/Kconfig"
 
 config SCSI_HPTIOP
tristate "HighPoint RocketRAID 3xxx/4xxx Controller support"
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 2b88749..c832974 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -108,6 +108,7 @@ obj-$(CONFIG_MEGARAID_LEGACY)   += megaraid.o
 obj-$(CONFIG_MEGARAID_NEWGEN)  += megaraid/
 obj-$(CONFIG_MEGARAID_SAS) += megaraid/
 obj-$(CONFIG_SCSI_MPT2SAS) += mpt2sas/
+obj-$(CONFIG_SCSI_UFSHCD)  += ufs/
 obj-$(CONFIG_SCSI_ACARD)   += atp870u.o
 obj-$(CONFIG_SCSI_SUNESP)  += esp_scsi.o   sun_esp.o
 obj-$(CONFIG_SCSI_GDTH)+= gdth.o
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
new file mode 100644
index 000..8f27f9d
--- /dev/null
+++ b/drivers/scsi/ufs/Kconfig
@@ -0,0 +1,49 @@
+#
+# Kernel configuration file for the UFS Host Controller
+#
+# This code is based on drivers/scsi/ufs/Kconfig
+# Copyright (C) 2011  Samsung Samsung India Software Operations
+#
+# Santosh Yaraganavi 
+# Vinayak Holikatti 
+
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# NO WARRANTY
+# THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
+# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
+# LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
+# MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
+# solely responsible for determining the appropriateness of using and
+# distributing the Program and assumes all risks associated with its
+# exercise of rights under this Agreement, including but not limited to
+# the risks and costs of program errors, damage to or loss of data,
+# programs or equipment, and unavailability or interruption of operations.
+
+# DISCLAIMER OF LIABILITY
+# NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+# USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
+# HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
+
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
+# USA.
+
+config SCSI_UFSHCD
+   tristate "Universal Flash Storage host controller driver"
+   depends on PCI && SCSI
+   ---help---
+   This is a generic driver which supports PCIe UFS Host controllers.
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
new file mode 100644
index 000..adf7895
--- /dev/null
+++ b/drivers/sc

[PATCH 0/4] [SCSI] ufshcd: UFS Host Controller Driver

2012-02-01 Thread Vinayak Holikatti 
From: Santosh Yaraganavi 

UFS is designed to be the most advanced specification for
both embedded and removable flash memory-based storage in mobile devices
such as smart phones and tablet computers.  The UFS standard represents
an evolutionary progression of JEDEC standards in this field, and has been
specifically tailored for mobile applications and computing systems requiring
high performance and low power consumption.  The initial data throughput for
UFS will be ~300 megabytes per second (MB/s), and the standard also supports
command queuing features to raise random read/write speeds.

To achieve the highest performance and most power efficient data
transport, UFS uses the leading industry interface standards to form its
Interconnect Layer: MIPI® Alliance’s M-PHY and UniProSM  specifications.
UniPro is a comprehensive specification meant to act as a universal
chip-to-chip protocol, providing a common tunnel for other protocols.
The M-PHY interface is designed as the primary physical interface (PHY layer)
for the UniPro specification, and is a high speed serial interface targeting
up to 2.9 gigabits per second (Gbps) per lane with up-scalability to 5.8Gbps
per lane.

MIPI’s M-PHY and UniPro specifications are optimized for mobile applications,
and are designed from the ground up for efficient power management in mobile
devices, including enabling efficient transitions between the active and power
save modes. Combined with a low active power level and a near-zero idle power
level, UFS offers the promise for significant reductions in device power
consumption.

The UFS standard adopts the well-known SCSI Architecture Model and command
protocols supporting multiple commands with command queuing features and
enabling a multi-thread programming paradigm. This differs from conventional
flash-based memory cards and embedded flash solutions which process one
command at a time, limiting random read/write access performance.
In addition, a forthcoming complementary UFS Host Controller Interface (HCI)
specification will allow system designers greater flexibility by simplifying
the involvement of the host processor in the operation of the flash storage
subsystem. The UFS HCI specification and the adoption of SCSI will provide
a well-known software programming model and enable wider market adoption.

This patchset contains PCIe based UFS host controller driver which complies
to UFSHCI 1.0 and 1.1. The driver is based on Linux SCSI framework.
The driver is tested with UFS Host controller(FPGA) and UFS device(FPGA).

This patch set is successfully applied on kernel version 3.3-rc2.

Santosh Yaraganavi (4):
  [SCSI] ufshcd: UFS Host controller driver
  [SCSI] ufshcd: UFS UTP Transfer requests handling
  [SCSI] ufshcd: UFSHCI error handling
  [SCSI] ufshcd: SCSI error handling

 drivers/scsi/Kconfig  |1 +
 drivers/scsi/Makefile |1 +
 drivers/scsi/ufs/Kconfig  |   49 ++
 drivers/scsi/ufs/Makefile |2 +
 drivers/scsi/ufs/ufs.h|  203 +
 drivers/scsi/ufs/ufshcd.c | 1954 +
 drivers/scsi/ufs/ufshci.h |  360 +
 7 files changed, 2570 insertions(+), 0 deletions(-)
 create mode 100644 drivers/scsi/ufs/Kconfig
 create mode 100644 drivers/scsi/ufs/Makefile
 create mode 100644 drivers/scsi/ufs/ufs.h
 create mode 100644 drivers/scsi/ufs/ufshcd.c
 create mode 100644 drivers/scsi/ufs/ufshci.h

-- 
1.7.5.4

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Re: [PATCH] gpio: samsung: adapt to changes in gpio specifier translator function declaration

2012-02-01 Thread Grant Likely 
On Wed, Feb 01, 2012 at 06:32:32PM +0530, Thomas Abraham wrote:
> Commit 15c9a0acc3f7 (of: create of_phandle_args to simplify return of phandle
> parsing data) modifies the parameter list of of_xlate function pointer 
> declaration
> in gpio_chip. Adapt the gpio specifier translate function for this change.
> 
> Reported-by: Tushar Behera 
> Signed-off-by: Thomas Abraham 

Applied, thanks.

g.

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Re: [PATCH v2 1/2] PM / Domains: Add OF support

2012-02-01 Thread Rafael J. Wysocki 
On Tuesday, January 31, 2012, Kukjin Kim wrote:
> Rafael J. Wysocki wrote:
> > 
> > On Tuesday, January 17, 2012, Kukjin Kim wrote:
> > > Rafael J. Wysocki wrote:
> > > >
> > > > On Saturday, January 07, 2012, Thomas Abraham wrote:
> > > > > A device node pointer is added to generic pm domain structure to
> > > > associate
> > > > > the domain with a node in the device tree. The platform code parses 
> > > > > the
> > > > > device tree to find available nodes representing the generic power
> > > > domain,
> > > > > instantiates the available domains and initializes them by calling
> > > > > pm_genpd_init().
> > > > >
> > > > > Nodes representing the devices include a phandle of the power domain 
> > > > > to
> > > > > which it belongs. As these devices get instantiated, the driver code
> > > > > checkes for availability of a power domain phandle, converts the 
> > > > > phandle
> > > > > to a device node and uses the new pm_genpd_of_add_device() api to
> > > > > associate the device with a power domain.
> > > > >
> > > > > pm_genpd_of_add_device() runs through its list of registered power
> > > > domains
> > > > > and matches the OF node of the domain with the one specified as the
> > > > > parameter. If a match is found, the device is associated with the
> > > > matched
> > > > > domain.
> > > > >
> > > > > Cc: Rafael J. Wysocki 
> > > > > Cc: Rob Herring 
> > > > > Cc: Grant Likely 
> > > > > Signed-off-by: Thomas Abraham 
> > > >
> > > > I can take this patch for 3.4, but your [2/2] depends on it, so I'm not
> > > > sure how to handle that.  If you want me to take the other patch too,
> > > > it'll need ACKs from the Exynos maintaniers.
> > > >
> > > Hi Rafael,
> > >
> > > Basically, looks ok to me.
> > >
> > > But it would be good if [v3 2/2] patch of this series (this patch) could 
> > > be
> > > applied in samsung tree to avoid conflicts as it modifies many files. I
> > > don't want to make a trouble when sending my tree to upstream. Of course, 
> > > as
> > > you said, this have a dependency with [v2 1/2]. So if you're ok, let me
> > > create topic branch will have both(1/2 and 2/2) to merge in your tree.
> > >
> > > How do you think?
> > 
> > That would work for me too.
> > 
> Hi Rafael,
> 
> I created topic branch for you with your ack.
> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
> v3.4-for-rafael
> 
> Please merge that in your tree and if any problems, please kindly let me know.

Merged into linux-pm/pm-domains and into linux-pm/linux-next and pushed back.

Thanks,
Rafael
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Re: [PATCH] gpio: samsung: adapt to changes in gpio specifier translator function declaration

2012-02-01 Thread Karol Lewandowski 

On 01.02.2012 14:02, Thomas Abraham wrote:

Commit 15c9a0acc3f7 (of: create of_phandle_args to simplify return of phandle
parsing data) modifies the parameter list of of_xlate function pointer 
declaration
in gpio_chip. Adapt the gpio specifier translate function for this change.

Reported-by: Tushar Behera
Signed-off-by: Thomas Abraham


Tested-by: Karol Lewandowski 

Fixes following Oops in i2c-s3c24xx.

Thanks


<1>Unable to handle kernel NULL pointer dereference at virtual address 


<1>pgd = c0004000
<1>[] *pgd=
<0>Internal error: Oops: 5 [#1] PREEMPT SMP
Modules linked in:
CPU: 0Tainted: GW (3.3.0-rc1+ #20)
PC is at exynos4_gpio_xlate+0x18/0xe8
LR is at of_get_named_gpio_flags+0xd0/0x190
pc : []lr : []psr: 6013
sp : e9047d88  ip : e9047da8  fp : e9047da4
r10:   r9 :   r8 : c05ecf4c
r7 : c0864ca8  r6 :   r5 : e9047db0  r4 : c025dd48
r3 : 0004  r2 :   r1 : e9047db0  r0 : c05ecf4c
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c53c7d  Table: 4000404a  DAC: 0015
<0>Process swapper/0 (pid: 1, stack limit = 0xe90462f0)
<0>Stack: (0xe9047d88 to 0xe9048000)
...
[] (exynos4_gpio_xlate+0x18/0xe8) from [] 
(of_get_named_gpio_flags+0xd0/0x190)
[] (of_get_named_gpio_flags+0xd0/0x190) from [] 
(s3c24xx_i2c_init+0x264/0x430)
[] (s3c24xx_i2c_init+0x264/0x430) from [] 
(s3c24xx_i2c_probe+0x1c8/0x4ac)
[] (s3c24xx_i2c_probe+0x1c8/0x4ac) from [] 
(platform_drv_probe+0x28/0x2c)


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Re: [PATCH v3 6/6] mmc: sdhci-s3c: Add device tree support

2012-02-01 Thread Karol Lewandowski 

On 31.01.2012 18:56, Thomas Abraham wrote:

Add device tree based discovery support for Samsung's sdhci controller


Works fine on "nuri hardware" using exynos4-dt (with custom dts).

Thanks
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Re: [PATCH] mmc: core: Fix PowerOff Notify suspend/resume

2012-02-01 Thread Saugata Das 
On 31 January 2012 15:44, Girish K S  wrote:
> Modified the mmc_poweroff to resume before sending the
> poweroff notification command. In sleep mode only AWAKE
> and RESET commands are allowed, so before sending the
> poweroff notification command resume from sleep mode and
> then send the notification command.
>
> POwerOff Notify is tested on a Synopsis Designware Host
> Controller(eMMC 4.5). The suspend to RAM and resume works fine.
>
> This patch is successfully applied on the Chris's mmc-next
> branch
>
> cc: Chris Ball 
> Signed-off-by: Girish K S 
> Tested-by: Girish K S 
> ---
>  drivers/mmc/core/core.c  |   28 
>  drivers/mmc/core/mmc.c   |   17 -
>  include/linux/mmc/card.h |    4 
>  3 files changed, 36 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
> index bec0bf2..14ec575 100644
> --- a/drivers/mmc/core/core.c
> +++ b/drivers/mmc/core/core.c
> @@ -1239,7 +1239,8 @@ static void mmc_poweroff_notify(struct mmc_host *host)
>        int err = 0;
>
>        card = host->card;
> -
> +       mmc_claim_host(host);
> +
>        /*
>         * Send power notify command only if card
>         * is mmc and notify state is powered ON
> @@ -1269,6 +1270,7 @@ static void mmc_poweroff_notify(struct mmc_host *host)
>                /* Set the card state to no notification after the poweroff */
>                card->poweroff_notify_state = MMC_NO_POWER_NOTIFICATION;
>        }
> +       mmc_release_host(host);
>  }
>
>  /*
> @@ -1327,12 +1329,28 @@ static void mmc_power_up(struct mmc_host *host)
>
>  void mmc_power_off(struct mmc_host *host)
>  {
> +       int err = 0;
>        mmc_host_clk_hold(host);
>
>        host->ios.clock = 0;
>        host->ios.vdd = 0;
>
> -       mmc_poweroff_notify(host);
> +       /*
> +        * For eMMC 4.5 device send AWAKE command before
> +        * POWER_OFF_NOTIFY command, because in sleep state
> +        * eMMC 4.5 devices respond to only RESET and AWAKE cmd
> +        */
> +       if (host->card && mmc_card_is_sleep(host->card) &&
> +           host->bus_ops->resume) {
> +               err = host->bus_ops->resume(host);
> +
> +               if (!err)
> +                       mmc_poweroff_notify(host);
> +               else
> +                       pr_warning("%s: error %d during resume "
> +                                  "(continue with poweroff sequence)\n",
> +                                  mmc_hostname(host), err);
> +       }
>
>        /*
>         * Reset ocr mask to be the highest possible voltage supported for
> @@ -2386,12 +2404,6 @@ int mmc_suspend_host(struct mmc_host *host)
>                 */
>                if (mmc_try_claim_host(host)) {
>                        if (host->bus_ops->suspend) {
> -                               /*
> -                                * For eMMC 4.5 device send notify command
> -                                * before sleep, because in sleep state eMMC 
> 4.5
> -                                * devices respond to only RESET and AWAKE cmd
> -                                */
> -                               mmc_poweroff_notify(host);
>                                err = host->bus_ops->suspend(host);
>                        }
>                        mmc_do_release_host(host);
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 2bc586b..c3f09a2 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1330,11 +1330,13 @@ static int mmc_suspend(struct mmc_host *host)
>        BUG_ON(!host->card);
>
>        mmc_claim_host(host);
> -       if (mmc_card_can_sleep(host))
> +       if (mmc_card_can_sleep(host)) {
>                err = mmc_card_sleep(host);
> -       else if (!mmc_host_is_spi(host))
> +               if (!err)
> +                       mmc_card_set_sleep(host->card);
> +       } else if (!mmc_host_is_spi(host))
>                mmc_deselect_cards(host);
> -       host->card->state &= ~MMC_STATE_HIGHSPEED;
> +       host->card->state &= ~(MMC_STATE_HIGHSPEED | MMC_STATE_HIGHSPEED_200);
>        mmc_release_host(host);
>
>        return err;
> @@ -1354,7 +1356,11 @@ static int mmc_resume(struct mmc_host *host)
>        BUG_ON(!host->card);
>
>        mmc_claim_host(host);
> -       err = mmc_init_card(host, host->ocr, host->card);
> +       if (mmc_card_is_sleep(host->card)) {
> +               err = mmc_card_awake(host);
> +               mmc_card_clr_sleep(host->card);
> +       } else
> +               err = mmc_init_card(host, host->ocr, host->card);
>        mmc_release_host(host);
>
>        return err;
> @@ -1364,7 +1370,8 @@ static int mmc_power_restore(struct mmc_host *host)
>  {
>        int ret;
>
> -       host->card->state &= ~MMC_STATE_HIGHSPEED;
> +       host->card->state &= ~(MMC_STATE_HIGHSPEED | MMC_STATE_HIGHSPEED_200);
> +       mmc_card_clr_sleep(host->card);
>        mmc_claim_host(host);
>        ret = mmc_init_card(host, host->ocr, host->card);
>

Re: [PATCH 3/3] S3C2443: add power domain for usb phy

2012-02-01 Thread Heiko Stübner 
Hi Kgene,

Am Dienstag 24 Januar 2012, 14:01:33 schrieb Kukjin Kim:
> Because as I said, I'm doing merge s3c24xx directories and it's almost done.
any news of this or can I help in some way?

I'm asking because I would like to put stuff on top of your merge (for example 
support for spi-s3c64xx for the S3C2416) for 3.4 .


Thanks
Heiko
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[PATCH] gpio: samsung: adapt to changes in gpio specifier translator function declaration

2012-02-01 Thread Thomas Abraham 
Commit 15c9a0acc3f7 (of: create of_phandle_args to simplify return of phandle
parsing data) modifies the parameter list of of_xlate function pointer 
declaration
in gpio_chip. Adapt the gpio specifier translate function for this change.

Reported-by: Tushar Behera 
Signed-off-by: Thomas Abraham 
---
 drivers/gpio/gpio-samsung.c |   23 +--
 1 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index a766177..0a79a11 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -2387,27 +2387,30 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = {
 };
 
 #if defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF)
-static int exynos4_gpio_xlate(struct gpio_chip *gc, struct device_node *np,
- const void *gpio_spec, u32 *flags)
+static int exynos4_gpio_xlate(struct gpio_chip *gc,
+   const struct of_phandle_args *gpiospec, u32 *flags)
 {
-   const __be32 *gpio = gpio_spec;
-   const u32 n = be32_to_cpup(gpio);
-   unsigned int pin = gc->base + be32_to_cpu(gpio[0]);
+   unsigned int pin;
 
if (WARN_ON(gc->of_gpio_n_cells < 4))
return -EINVAL;
 
-   if (n > gc->ngpio)
+   if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells))
return -EINVAL;
 
-   if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(be32_to_cpu(gpio[1]
+   if (gpiospec->args[0] > gc->ngpio)
+   return -EINVAL;
+
+   pin = gc->base + gpiospec->args[0];
+
+   if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(gpiospec->args[1])))
pr_warn("gpio_xlate: failed to set pin function\n");
-   if (s3c_gpio_setpull(pin, be32_to_cpu(gpio[2])))
+   if (s3c_gpio_setpull(pin, gpiospec->args[2]))
pr_warn("gpio_xlate: failed to set pin pull up/down\n");
-   if (s5p_gpio_set_drvstr(pin, be32_to_cpu(gpio[3])))
+   if (s5p_gpio_set_drvstr(pin, gpiospec->args[3]))
pr_warn("gpio_xlate: failed to set pin drive strength\n");
 
-   return n;
+   return gpiospec->args[0];
 }
 
 static const struct of_device_id exynos4_gpio_dt_match[] __initdata = {
-- 
1.6.6.rc2

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Re: [PATCH V5 1/5] ARM: exynos: Add support AFTR mode on EXYNOS4210

2012-02-01 Thread Tushar Behera 
Hi Amit,

On 01/05/2012 09:55 AM, Amit Daniel Kachhap wrote:
> This patch adds support AFTR(ARM OFF TOP RUNNING) mode in
> cpuidle driver. L2 cache keeps their data in this mode.
> This patch ports the code to the latest interfaces to
> save/restore CPU state inclusive of CPU PM notifiers, l2
> resume and cpu_suspend/resume.
> 
> Signed-off-by: Jaecheol Lee 
> Signed-off-by: Lorenzo Pieralisi 
> Signed-off-by: Amit Daniel Kachhap 
> ---
>  arch/arm/mach-exynos/cpuidle.c  |  149 
> ++-
>  arch/arm/mach-exynos/include/mach/pmu.h |2 +
>  2 files changed, 148 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c

-- snip --

> +static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv,
> + int index)
> +{

-- snip --

> +
> + scu_enable(S5P_VA_SCU);

#ifdef CONFIG_SMP
scu_enable(S5P_VA_SCU);
#endif

This is required when compiling without SMP support.


-- 
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[PATCHv3 3/3] ARM: Exynos: Register JPEG on nuri

2012-02-01 Thread Andrzej Pietrasiewicz 
ARM: Exynos: Register JPEG on nuri

Signed-off-by: Andrzej Pietrasiewicz 
Signed-off-by: Kyungmin Park 
---
 arch/arm/mach-exynos/Kconfig |1 +
 arch/arm/mach-exynos/mach-nuri.c |2 ++
 2 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 042803a..d8ab22f 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -271,6 +271,7 @@ config MACH_NURI
select S3C_DEV_I2C3
select S3C_DEV_I2C5
select S5P_DEV_CSIS0
+   select S5P_DEV_JPEG
select S5P_DEV_FIMC0
select S5P_DEV_FIMC1
select S5P_DEV_FIMC2
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 165c876..adeb166 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -1260,6 +1260,7 @@ static struct platform_device *nuri_devices[] __initdata 
= {
&i2c9_gpio,
&s3c_device_adc,
&s5p_device_g2d,
+   &s5p_device_jpeg,
&s3c_device_rtc,
&s5p_device_mfc,
&s5p_device_mfc_l,
@@ -1319,6 +1320,7 @@ static void __init nuri_machine_init(void)
s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
 
+   s5p_device_jpeg.dev.parent =  &exynos4_device_pd[PD_CAM].dev;
s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
-- 
1.7.0.4

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[PATCHv3 2/3] ARM: Exynos: Register JPEG on universal_c210

2012-02-01 Thread Andrzej Pietrasiewicz 
ARM: Exynos: Register JPEG on universal_c210

Signed-off-by: Andrzej Pietrasiewicz 
Signed-off-by: Kyungmin Park 
---
 arch/arm/mach-exynos/Kconfig   |1 +
 arch/arm/mach-exynos/mach-universal_c210.c |2 ++
 2 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index bd4600e..042803a 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -232,6 +232,7 @@ config MACH_UNIVERSAL_C210
select S5P_DEV_FIMC3
select S5P_DEV_G2D
select S5P_DEV_CSIS0
+   select S5P_DEV_JPEG
select S5P_DEV_FIMD0
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC2
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c 
b/arch/arm/mach-exynos/mach-universal_c210.c
index dd75101..4c6dd86 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -980,6 +980,7 @@ static struct platform_device *universal_devices[] 
__initdata = {
&universal_gpio_keys,
&s5p_device_onenand,
&s5p_device_fimd0,
+   &s5p_device_jpeg,
&s5p_device_mfc,
&s5p_device_mfc_l,
&s5p_device_mfc_r,
@@ -1045,6 +1046,7 @@ static void __init universal_machine_init(void)
s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
 
+   s5p_device_jpeg.dev.parent =  &exynos4_device_pd[PD_CAM].dev;
s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
-- 
1.7.0.4

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[PATCHv3 1/3] ARM: Exynos: JPEG board definition

2012-02-01 Thread Andrzej Pietrasiewicz 
ARM: Exynos: JPEG board definition

Signed-off-by: Andrzej Pietrasiewicz 
Signed-off-by: Kyungmin Park 
---
 arch/arm/mach-exynos/clock.c  |5 +
 arch/arm/mach-exynos/include/mach/map.h   |3 +++
 arch/arm/plat-s5p/Kconfig |5 +
 arch/arm/plat-samsung/devs.c  |   18 ++
 arch/arm/plat-samsung/include/plat/devs.h |1 +
 5 files changed, 32 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 5a8c42e..e5d446a 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -470,6 +470,11 @@ static struct clk init_clocks_off[] = {
.enable = exynos4_clk_ip_cam_ctrl,
.ctrlbit= (1 << 5),
}, {
+   .name   = "jpeg",
+   .id = 0,
+   .enable = exynos4_clk_ip_cam_ctrl,
+   .ctrlbit= (1 << 6),
+   }, {
.name   = "fimc",
.devname= "exynos4-fimc.0",
.enable = exynos4_clk_ip_cam_ctrl,
diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index 7df9e74..5a9e656 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -31,6 +31,8 @@
 #define EXYNOS4_PA_FIMC2   0x1182
 #define EXYNOS4_PA_FIMC3   0x1183
 
+#define EXYNOS4_PA_JPEG0x1184
+
 #define EXYNOS4_PA_G2D 0x1280
 
 #define EXYNOS4_PA_I2S00x0383
@@ -164,6 +166,7 @@
 #define S5P_PA_FIMC1   EXYNOS4_PA_FIMC1
 #define S5P_PA_FIMC2   EXYNOS4_PA_FIMC2
 #define S5P_PA_FIMC3   EXYNOS4_PA_FIMC3
+#define S5P_PA_JPEGEXYNOS4_PA_JPEG
 #define S5P_PA_G2D EXYNOS4_PA_G2D
 #define S5P_PA_FIMD0   EXYNOS4_PA_FIMD0
 #define S5P_PA_HDMIEXYNOS4_PA_HDMI
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index e7fec78..7a30869 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -80,6 +80,11 @@ config S5P_DEV_FIMC3
help
  Compile in platform device definitions for FIMC controller 3
 
+config S5P_DEV_JPEG
+   bool
+   help
+ Compile in platform device definitions for JPEG codec
+
 config S5P_DEV_G2D
bool
help
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 145580a..1121372 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -295,6 +295,24 @@ struct platform_device s5p_device_g2d = {
 };
 #endif /* CONFIG_S5P_DEV_G2D */
 
+#ifdef CONFIG_S5P_DEV_JPEG
+static struct resource s5p_jpeg_resource[] = {
+   [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
+   [1] = DEFINE_RES_IRQ(IRQ_JPEG),
+};
+
+struct platform_device s5p_device_jpeg = {
+   .name   = "s5p-jpeg",
+   .id = 0,
+   .num_resources  = ARRAY_SIZE(s5p_jpeg_resource),
+   .resource   = s5p_jpeg_resource,
+   .dev= {
+   .dma_mask   = &samsung_device_dma_mask,
+   .coherent_dma_mask  = DMA_BIT_MASK(32),
+   },
+};
+#endif /*  CONFIG_S5P_DEV_JPEG */
+
 /* FIMD0 */
 
 #ifdef CONFIG_S5P_DEV_FIMD0
diff --git a/arch/arm/plat-samsung/include/plat/devs.h 
b/arch/arm/plat-samsung/include/plat/devs.h
index bb45848..5e7972d 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -79,6 +79,7 @@ extern struct platform_device s5p_device_fimc1;
 extern struct platform_device s5p_device_fimc2;
 extern struct platform_device s5p_device_fimc3;
 extern struct platform_device s5p_device_fimc_md;
+extern struct platform_device s5p_device_jpeg;
 extern struct platform_device s5p_device_g2d;
 extern struct platform_device s5p_device_fimd0;
 extern struct platform_device s5p_device_hdmi;
-- 
1.7.0.4

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[PATCHv3 0/3] ARM: Exynos: JPEG board definition and device register

2012-02-01 Thread Andrzej Pietrasiewicz 
Dear All,

This patch series adds board definition code and device registration code
for JPEG IP found in Exynos4 SoC on universal_c210 and nuri boards.

It includes changes after Tushar's review - thanks, Tushar.

Andrzej Pietrasiewicz (3):
  ARM: Exynos: JPEG board definition
  ARM: Exynos: Register JPEG on universal_c210
  ARM: Exynos: Register JPEG on nuri

 arch/arm/mach-exynos/Kconfig   |2 ++
 arch/arm/mach-exynos/clock.c   |5 +
 arch/arm/mach-exynos/include/mach/map.h|3 +++
 arch/arm/mach-exynos/mach-nuri.c   |2 ++
 arch/arm/mach-exynos/mach-universal_c210.c |2 ++
 arch/arm/plat-s5p/Kconfig  |5 +
 arch/arm/plat-samsung/devs.c   |   18 ++
 arch/arm/plat-samsung/include/plat/devs.h  |1 +
 8 files changed, 38 insertions(+), 0 deletions(-)

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Re: [PATCH] [CPUFREQ] EXYNOS: Initialize locking_frequency with initial frequency

2012-02-01 Thread Tushar Behera 
Ping

On 01/25/2012 10:15 AM, Tushar Behera wrote:
> As per definition, locking_frequency is the initial frequency which is
> set by boot-loader. Hence the value is updated with the initial value
> during boot time init call.
> 
> This code was present in exynos210-cpufreq.c before this consolidation
> patch.
> - a125a17fa61a ([CPUFREQ] EXYNOS: Make EXYNOS common cpufreq driver).
> 
> Signed-off-by: Tushar Behera 
> Signed-off-by: Inderpal Singh 
> ---
> The patch is based on v3.3-rc1.
> 
>  drivers/cpufreq/exynos-cpufreq.c |2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/cpufreq/exynos-cpufreq.c 
> b/drivers/cpufreq/exynos-cpufreq.c
> index 5467879..7cfb516 100644
> --- a/drivers/cpufreq/exynos-cpufreq.c
> +++ b/drivers/cpufreq/exynos-cpufreq.c
> @@ -210,6 +210,8 @@ static int exynos_cpufreq_cpu_init(struct cpufreq_policy 
> *policy)
>  
>   cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
>  
> + locking_frequency = exynos_getspeed(0);
> +
>   /* set the transition latency value */
>   policy->cpuinfo.transition_latency = 10;
>  


-- 
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RE: [PATCH v2] ARM: Exynos: JPEG board definition and device register

2012-02-01 Thread Andrzej Pietrasiewicz 
Hello Tushar,

On Wednesday, February 01, 2012 10:16 AM Tushar Behera wrote:

> 
> On 01/31/2012 03:50 PM, Andrzej Pietrasiewicz wrote:
> > Add JPEG board definition and device register
> >
> > Signed-off-by: Andrzej Pietrasiewicz 
> > Signed-off-by: Kyungmin Park 
> > ---
> > Dear All,
> >
> > This patch adds board definition code and device registration code
> > for JPEG IP found in Exynos4 SoC.
> >
> > It is exactly the same as the previous patch but with better coding
> style
> > compliance.
> >
> >  arch/arm/mach-exynos/Kconfig   |2 ++
> >  arch/arm/mach-exynos/clock.c   |5 +
> >  arch/arm/mach-exynos/include/mach/map.h|3 +++
> >  arch/arm/mach-exynos/mach-nuri.c   |2 ++
> >  arch/arm/mach-exynos/mach-universal_c210.c |2 ++
> >  arch/arm/plat-s5p/Kconfig  |5 +
> >  arch/arm/plat-samsung/devs.c   |   26
> ++
> >  arch/arm/plat-samsung/include/plat/devs.h  |1 +
> >  8 files changed, 46 insertions(+), 0 deletions(-)
> >
> [snip]
> >
> > +#ifdef CONFIG_S5P_DEV_JPEG
> > +static struct resource s5p_jpeg_resource[] = {
> > +   [0] = {
> > +   .start  = S5P_PA_JPEG,
> > +   .end= S5P_PA_JPEG + SZ_4K - 1,
> > +   .flags  = IORESOURCE_MEM,
> > +   },
> > +   [1] = {
> > +   .start  = IRQ_JPEG,
> > +   .end= IRQ_JPEG,
> > +   .flags  = IORESOURCE_IRQ,
> > +   },
> > +};
> 
> Should be using DEFINE_RES_MEM and DEFINE_RES_IRQ.
>
Thank you for pointing this out. I will fix it.
 
> Also, wouldn't be a good idea to split this patch into 2 different
> patches for platform-specific and board-specific changes?
> 
I think I will split it into 3 patches: platform-specific and
2 board-specific (universal, nuri).

Andrzej


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Re: [PATCH 5/9] ARM: EXYNOS: add board file for SMDK5250

2012-02-01 Thread Will Deacon 
On Wed, Feb 01, 2012 at 08:50:23AM +, Olof Johansson wrote:
> On Tue, Jan 31, 2012 at 8:20 PM, Kyungmin Park  wrote:
> > As I remember only DT based board file is acceptable for mainline?
> 
> For a new SoC family like 5250 it would be much preferred to only add
> device-tree enabled boards.

As I mentioned in an earlier thread, it would also solve the problem of
enumerating the CPU topology on A15 (without resorting to flaky hacks in
core code).

Will
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Re: [PATCH v2] ARM: Exynos: JPEG board definition and device register

2012-02-01 Thread Tushar Behera 
On 01/31/2012 03:50 PM, Andrzej Pietrasiewicz wrote:
> Add JPEG board definition and device register
> 
> Signed-off-by: Andrzej Pietrasiewicz 
> Signed-off-by: Kyungmin Park 
> ---
> Dear All,
> 
> This patch adds board definition code and device registration code
> for JPEG IP found in Exynos4 SoC.
> 
> It is exactly the same as the previous patch but with better coding style
> compliance.
> 
>  arch/arm/mach-exynos/Kconfig   |2 ++
>  arch/arm/mach-exynos/clock.c   |5 +
>  arch/arm/mach-exynos/include/mach/map.h|3 +++
>  arch/arm/mach-exynos/mach-nuri.c   |2 ++
>  arch/arm/mach-exynos/mach-universal_c210.c |2 ++
>  arch/arm/plat-s5p/Kconfig  |5 +
>  arch/arm/plat-samsung/devs.c   |   26 ++
>  arch/arm/plat-samsung/include/plat/devs.h  |1 +
>  8 files changed, 46 insertions(+), 0 deletions(-)
> 
[snip]
>  
> +#ifdef CONFIG_S5P_DEV_JPEG
> +static struct resource s5p_jpeg_resource[] = {
> + [0] = {
> + .start  = S5P_PA_JPEG,
> + .end= S5P_PA_JPEG + SZ_4K - 1,
> + .flags  = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start  = IRQ_JPEG,
> + .end= IRQ_JPEG,
> + .flags  = IORESOURCE_IRQ,
> + },
> +};

Should be using DEFINE_RES_MEM and DEFINE_RES_IRQ.

Also, wouldn't be a good idea to split this patch into 2 different
patches for platform-specific and board-specific changes?

-- 
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Re: [PATCH 3/9] ARM: EXYNOS: add initial setup-i2c0 for EXYNOS5

2012-02-01 Thread Olof Johansson 
Hi,

On Tue, Jan 31, 2012 at 7:39 AM, Kukjin Kim  wrote:
> Signed-off-by: Kukjin Kim 

A brief patch description, please.

> diff --git a/arch/arm/mach-exynos/setup-i2c0.c 
> b/arch/arm/mach-exynos/setup-i2c0.c
> index d395bd1..3244f3e 100644
> --- a/arch/arm/mach-exynos/setup-i2c0.c
> +++ b/arch/arm/mach-exynos/setup-i2c0.c
> @@ -1,7 +1,7 @@
>  /*
> - * linux/arch/arm/mach-exynos4/setup-i2c0.c
> + * linux/arch/arm/mach-exynos/setup-i2c0.c

The file name fills very little purpose in files like these. Consider
removing them at some point.

> @@ -18,9 +18,14 @@ struct platform_device; /* don't need the contents */
>  #include 
>  #include 
>  #include 
> +#include 
>
>  void s3c_i2c0_cfg_gpio(struct platform_device *dev)
>  {
> -       s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
> -                             S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
> +       if (soc_is_exynos5250())
> +               ;
> +               /* will be implemented with gpio function */
> +       else
> +               s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
> +                                     S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
>  }

The above is pretty awkward. It's cleaner to return and avoid the else
side of the statement (move the comment accordingly, of course).


-Olof
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Re: [PATCH 5/9] ARM: EXYNOS: add board file for SMDK5250

2012-02-01 Thread Olof Johansson 
Hi,

On Tue, Jan 31, 2012 at 8:20 PM, Kyungmin Park  wrote:
> As I remember only DT based board file is acceptable for mainline?

For a new SoC family like 5250 it would be much preferred to only add
device-tree enabled boards.


-Olof
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