Re: Device node for a controller with two interrupt parents

2012-03-24 Thread Grant Likely
On Fri, 23 Mar 2012 16:18:09 +0530, Thomas Abraham  
wrote:
> Hi Grant,
> 
> On 21 March 2012 20:43, Grant Likely  wrote:
> > Okay, so you're saying there are three important aspects to this
> > device:
> > 1) it terminates interrupts from other devices (therefore needs an
> >   interrupt controller driver)
> > 2) it passes some interrupts through untouched (interrupt controller
> >   driver doesn't need to touch them; it directly raises an irq on the
> >   gic or combiner)
> > 3) It is able generate interrupt signals on it's own (independent of
> >   any attached devices)
> >
> > Do I understand correctly?
> 
> #1 is applicable but not #2 and #3 (if I have interpreted the above
> correctly). The wakeup interrupt controller looks for an edge or level
> on pins (which are connected to external devices) and generates a
> interrupt (to gic or combiner) when the set condition on that pin is
> found (edge or level).
> 
> >
> > Your patch above solves the problem for #2 above, but it breaks #1
> > because interrupts from external devices can no longer be terminated
> > on the wakeup controller node (they'll always get passed through).
> 
> Ok.
> 
> >
> > --- Possible solution 1 ---
> > If other devices *don't* use the wakeup node as their interrupt
> > parent, then you should be able to simply drop the
> > interrupt-controller property and make the other devices directly
> > reference the gic and combiner.
> 
> Other devices use wakeup node as interrupt controller. The wakeup
> interrupt controller supports masking, unmasking and prioritization of
> the wakeup interrupts. The interrupt-controller property can be
> dropped but then of_irq_init() function cannot be used.
> 
> >
> > --- Possible solution 2 ---
> > Split the interrupt map into a separate node:
> >
> >
> >        wakeup_eint: interrupt-controller@1100 {
> >                compatible = "samsung,exynos4210-wakeup-eint";
> >                reg = <0x1100 0x1000>;
> >                interrupt-controller;
> >                #interrupt-cells = <1>;
> >                interrupt-parent = <&wakeup_map>;
> >                interrupts = <0 1 2 3 f 5 6 7 8 9 10 11 12 13 14 15 
> > 16>;
> >
> >                wakeup_map: interrupt-map {
> >                        #interrupt-cells = <1>;
> >                        #address-cells = <0>;
> >                        interrupt-map = <0 &gic 0 16 0>,
> >                                        <1 &gic 0 17 0>,
> >                                        <2 &gic 0 18 0>,
> >                                        <3 &gic 0 19 0>,
> >                                        <4 &gic 0 20 0>,
> >                                        <5 &gic 0 21 0>,
> >                                        <6 &gic 0 22 0>,
> >                                        <7 &gic 0 23 0>,
> >                                        <8 &gic 0 24 0>,
> >                                        <9 &gic 0 25 0>,
> >                                        <10 &gic 0 26 0>,
> >                                        <11 &gic 0 27 0>,
> >                                        <12 &gic 0 28 0>,
> >                                        <13 &gic 0 29 0>,
> >                                        <14 &gic 0 30 0>,
> >                                        <15 &gic 0 31 0>,
> >                                        <16 &combiner 2 
> > 4>;
> >                };
> >        };
> 
> I have tested with this and it works but of_irq_init() function cannot
> be used because 'wakeup_map' is set as interrupt parent and
> 'wakeup_map' is not a interrupt-controller. So of_irq_init() does not
> invoke the initialization function for the wakeup node. If the machine
> init code explicitly looks for this node and calls the corresponding
> initialization function, it works fine.

That's a bug in of_irq_init() then.  It should be fixed.

> 
> >
> > --- possible solution 3 ---
> > 'interrupts' just isn't sufficient for some devices; add a binding for
> > a 'interrupts-multiparent' that can be used instead of 'interrupts'
> > and uses the format   [  [...]].
> 
> This would be the ideal case. In addition to this, the
> interrupt-parent property handling should be modified to support
> multiple parent phandles like <&parent1 [&parent2] [&parent3] >.
> This will be useful to extend the capability of of_irq_init() to
> handle interrupt-controller node with multiple interrupt parents.
> 
> >
> > I'm not opposed to this solution since it is a more natural binding
> > for multiparented interrupt controllers, but I won't commit to it
> > without

[PATCH v3 4/4] ARM: Samsung: Rework platform data of s3c-fb driver

2012-03-24 Thread Thomas Abraham
For all the Samsung SoC based boards which have the platform data for
s3c-fb driver, the 'default_win' element in the platform data is removed
and the lcd panel video timing values are moved out of individual window
configuration data.

Cc: Jingoo Han 
Cc: Kyungmin Park 
Cc: JeongHyeon Kim 
Cc: Kukjin Kim 
Cc: Heiko Stuebner 
Cc: Ben Dooks 
Cc: Kwangwoo Lee 
Cc: Mark Brown 
Cc: Peter Korsgaard 
Cc: Darius Augulis 
Cc: Maurus Cuelenaere 
Signed-off-by: Thomas Abraham 
---
 arch/arm/mach-exynos/mach-nuri.c   |   26 --
 arch/arm/mach-exynos/mach-origen.c |   24 +++-
 arch/arm/mach-exynos/mach-smdkv310.c   |   28 --
 arch/arm/mach-exynos/mach-universal_c210.c |   26 --
 arch/arm/mach-s3c24xx/mach-smdk2416.c  |   27 --
 arch/arm/mach-s3c64xx/mach-anw6410.c   |   25 +++--
 arch/arm/mach-s3c64xx/mach-crag6410.c  |   25 +++--
 arch/arm/mach-s3c64xx/mach-hmt.c   |   24 +++-
 arch/arm/mach-s3c64xx/mach-mini6410.c  |   54 ---
 arch/arm/mach-s3c64xx/mach-real6410.c  |   52 +++---
 arch/arm/mach-s3c64xx/mach-smartq5.c   |   26 --
 arch/arm/mach-s3c64xx/mach-smartq7.c   |   26 --
 arch/arm/mach-s3c64xx/mach-smdk6410.c  |   25 +++--
 arch/arm/mach-s5p64x0/mach-smdk6440.c  |   24 +++-
 arch/arm/mach-s5p64x0/mach-smdk6450.c  |   24 +++-
 arch/arm/mach-s5pc100/mach-smdkc100.c  |   27 --
 arch/arm/mach-s5pv210/mach-aquila.c|   36 --
 arch/arm/mach-s5pv210/mach-goni.c  |   26 --
 arch/arm/mach-s5pv210/mach-smdkv210.c  |   24 +++-
 19 files changed, 311 insertions(+), 238 deletions(-)

diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 7ac81ce..a7e6731 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -212,25 +212,29 @@ static struct platform_device nuri_gpio_keys = {
 
 /* Frame Buffer */
 static struct s3c_fb_pd_win nuri_fb_win0 = {
-   .win_mode = {
-   .left_margin= 64,
-   .right_margin   = 16,
-   .upper_margin   = 64,
-   .lower_margin   = 1,
-   .hsync_len  = 48,
-   .vsync_len  = 3,
-   .xres   = 1024,
-   .yres   = 600,
-   .refresh= 60,
-   },
.max_bpp= 24,
.default_bpp= 16,
+   .xres   = 1024,
+   .yres   = 600,
.virtual_x  = 1024,
.virtual_y  = 2 * 600,
 };
 
+static struct fb_videomode nuri_lcd_timing = {
+   .left_margin= 64,
+   .right_margin   = 16,
+   .upper_margin   = 64,
+   .lower_margin   = 1,
+   .hsync_len  = 48,
+   .vsync_len  = 3,
+   .xres   = 1024,
+   .yres   = 600,
+   .refresh= 60,
+};
+
 static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
.win[0] = &nuri_fb_win0,
+   .vtiming= &nuri_lcd_timing,
.vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  VIDCON0_CLKSEL_LCD,
.vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
diff --git a/arch/arm/mach-exynos/mach-origen.c 
b/arch/arm/mach-exynos/mach-origen.c
index 25c9b46..de71237 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -583,22 +583,26 @@ static struct platform_device origen_lcd_hv070wsa = {
 };
 
 static struct s3c_fb_pd_win origen_fb_win0 = {
-   .win_mode = {
-   .left_margin= 64,
-   .right_margin   = 16,
-   .upper_margin   = 64,
-   .lower_margin   = 16,
-   .hsync_len  = 48,
-   .vsync_len  = 3,
-   .xres   = 1024,
-   .yres   = 600,
-   },
+   .xres   = 1024,
+   .yres   = 600,
.max_bpp= 32,
.default_bpp= 24,
 };
 
+static struct fb_videomode origen_lcd_timing = {
+   .left_margin= 64,
+   .right_margin   = 16,
+   .upper_margin   = 64,
+   .lower_margin   = 16,
+   .hsync_len  = 48,
+   .vsync_len  = 3,
+   .xres   = 1024,
+   .yres   = 600,
+};
+
 static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
.win[0] = &origen_fb_win0,
+   .vtiming= &origen_lcd_timing,
.vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
VIDCON1_INV_VCLK,
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c 
b/arch/arm/mach-exynos/mach-smdkv310.c
index f08529f..6c00fa6 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-ex

[PATCH v3 3/4] ARM: s3c64xx: Decouple lcd type from display controller window data

2012-03-24 Thread Thomas Abraham
The display controller window data should contain window configuration data
for only one type of lcd panel. So, for real6410 and mini6410 boards, split
the existing display controller window data, which contains window
configuration data for two different types of lcd panels, into two seperate
instances and register one of them depending on the type of the lcd panel
detected at runtime.

This is a prerequisite change for a subsequent commit that reorders the
platform data of display controller by moving video interface timing out
of window setup data.

Cc: Darius Augulis 
Cc: Jingoo Han 
Signed-off-by: Thomas Abraham 
---
 arch/arm/mach-s3c64xx/mach-mini6410.c |   82 +---
 arch/arm/mach-s3c64xx/mach-real6410.c |   82 +---
 2 files changed, 88 insertions(+), 76 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c 
b/arch/arm/mach-s3c64xx/mach-mini6410.c
index c34c2ab..34f5195 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -151,41 +151,49 @@ static struct s3c2410_platform_nand mini6410_nand_info = {
.sets   = mini6410_nand_sets,
 };
 
-static struct s3c_fb_pd_win mini6410_fb_win[] = {
-   {
-   .win_mode   = { /* 4.3" 480x272 */
-   .left_margin= 3,
-   .right_margin   = 2,
-   .upper_margin   = 1,
-   .lower_margin   = 1,
-   .hsync_len  = 40,
-   .vsync_len  = 1,
-   .xres   = 480,
-   .yres   = 272,
-   },
-   .max_bpp= 32,
-   .default_bpp= 16,
-   }, {
-   .win_mode   = { /* 7.0" 800x480 */
-   .left_margin= 8,
-   .right_margin   = 13,
-   .upper_margin   = 7,
-   .lower_margin   = 5,
-   .hsync_len  = 3,
-   .vsync_len  = 1,
-   .xres   = 800,
-   .yres   = 480,
-   },
-   .max_bpp= 32,
-   .default_bpp= 16,
+static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
+   .win_mode   = { /* 4.3" 480x272 */
+   .left_margin= 3,
+   .right_margin   = 2,
+   .upper_margin   = 1,
+   .lower_margin   = 1,
+   .hsync_len  = 40,
+   .vsync_len  = 1,
+   .xres   = 480,
+   .yres   = 272,
},
+   .max_bpp= 32,
+   .default_bpp= 16,
 };
 
-static struct s3c_fb_platdata mini6410_lcd_pdata __initdata = {
-   .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
-   .win[0] = &mini6410_fb_win[0],
-   .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
-   .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {
+   .win_mode   = { /* 7.0" 800x480 */
+   .left_margin= 8,
+   .right_margin   = 13,
+   .upper_margin   = 7,
+   .lower_margin   = 5,
+   .hsync_len  = 3,
+   .vsync_len  = 1,
+   .xres   = 800,
+   .yres   = 480,
+   },
+   .max_bpp= 32,
+   .default_bpp= 16,
+};
+
+static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {
+   {
+   .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
+   .win[0] = &mini6410_lcd_type0_fb_win,
+   .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+   .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+   }, {
+   .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
+   .win[0] = &mini6410_lcd_type1_fb_win,
+   .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+   .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+   },
+   { },
 };
 
 static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
@@ -283,7 +291,7 @@ static void mini6410_parse_features(
"screen type already set\n", f);
} else {
int li = f - '0';
-   if (li >= ARRAY_SIZE(mini6410_fb_win))
+   if (li >= ARRAY_SIZE(mini6410_lcd_pdata))
printk(KERN_INFO "MINI6410: '%c' out "
"of range LCD mode\n", f);
else {
@@ -307,14 +315,12 @@ static void __init mini6410_machine_init(void)
/* Parse the feature string */
mini6410_parse_features(&featu

[PATCH v3 2/4] video: s3c-fb: remove 'default_win' element from platform data

2012-03-24 Thread Thomas Abraham
The decision to enable or disable the data output to the lcd panel from
the controller need not be based on the value of 'default_win' element
in the platform data. Instead, the data output to the panel is enabled
if any of the windows are active, else data output is disabled.

Cc: Ben Dooks 
Signed-off-by: Jingoo Han 
Signed-off-by: Thomas Abraham 
---
 arch/arm/plat-samsung/include/plat/fb.h |2 --
 drivers/video/s3c-fb.c  |   25 +
 2 files changed, 5 insertions(+), 22 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/fb.h 
b/arch/arm/plat-samsung/include/plat/fb.h
index 39d6bd7..536002f 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -62,8 +62,6 @@ struct s3c_fb_platdata {
struct s3c_fb_pd_win*win[S3C_FB_MAX_WIN];
struct fb_videomode *vtiming;
 
-   u32  default_win;
-
u32  vidcon0;
u32  vidcon1;
 };
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index c94f40d..18c84b8 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -531,7 +531,7 @@ static int s3c_fb_set_par(struct fb_info *info)
/* disable the window whilst we update it */
writel(0, regs + WINCON(win_no));
 
-   if (win_no == sfb->pdata->default_win)
+   if (!sfb->output_on)
s3c_fb_enable(sfb, 1);
 
/* write the buffer address */
@@ -799,6 +799,7 @@ static int s3c_fb_blank(int blank_mode, struct fb_info 
*info)
struct s3c_fb *sfb = win->parent;
unsigned int index = win->index;
u32 wincon;
+   u32 output_on = sfb->output_on;
 
dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
 
@@ -837,34 +838,18 @@ static int s3c_fb_blank(int blank_mode, struct fb_info 
*info)
 
shadow_protect_win(win, 1);
writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
-   shadow_protect_win(win, 0);
 
/* Check the enabled state to see if we need to be running the
 * main LCD interface, as if there are no active windows then
 * it is highly likely that we also do not need to output
 * anything.
 */
-
-   /* We could do something like the following code, but the current
-* system of using framebuffer events means that we cannot make
-* the distinction between just window 0 being inactive and all
-* the windows being down.
-*
-* s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
-   */
-
-   /* we're stuck with this until we can do something about overriding
-* the power control using the blanking event for a single fb.
-*/
-   if (index == sfb->pdata->default_win) {
-   shadow_protect_win(win, 1);
-   s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
-   shadow_protect_win(win, 0);
-   }
+   s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
+   shadow_protect_win(win, 0);
 
pm_runtime_put_sync(sfb->dev);
 
-   return 0;
+   return output_on == sfb->output_on;
 }
 
 /**
-- 
1.6.6.rc2

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[PATCH v3 1/4] video: s3c-fb: move video interface timing out of window setup data

2012-03-24 Thread Thomas Abraham
The video interface timing is independent of the window setup data.
The resolution of the window can be smaller than that of the lcd
panel to which the video data is output.

So move the video timing data from the per-window setup data to the
platform specific section in the platform data. This also removes
the restriction that atleast one window should have the same
resolution as that of the panel attached.

Cc: Ben Dooks 
Signed-off-by: Thomas Abraham 
Acked-by: Jingoo Han 
---
 arch/arm/plat-samsung/include/plat/fb.h |9 ++-
 drivers/video/s3c-fb.c  |  112 +--
 2 files changed, 67 insertions(+), 54 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/fb.h 
b/arch/arm/plat-samsung/include/plat/fb.h
index 0fedf47..39d6bd7 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -24,15 +24,16 @@
 
 /**
  * struct s3c_fb_pd_win - per window setup data
- * @win_mode: The display parameters to initialise (not for window 0)
+ * @xres : The window X size.
+ * @yres : The window Y size.
  * @virtual_x: The virtual X size.
  * @virtual_y: The virtual Y size.
  */
 struct s3c_fb_pd_win {
-   struct fb_videomode win_mode;
-
unsigned short  default_bpp;
unsigned short  max_bpp;
+   unsigned short  xres;
+   unsigned short  yres;
unsigned short  virtual_x;
unsigned short  virtual_y;
 };
@@ -45,6 +46,7 @@ struct s3c_fb_pd_win {
  * @default_win: default window layer number to be used for UI layer.
  * @vidcon0: The base vidcon0 values to control the panel data format.
  * @vidcon1: The base vidcon1 values to control the panel data output.
+ * @vtiming: Video timing when connected to a RGB type panel.
  * @win: The setup data for each hardware window, or NULL for unused.
  * @display_mode: The LCD output display mode.
  *
@@ -58,6 +60,7 @@ struct s3c_fb_platdata {
void(*setup_gpio)(void);
 
struct s3c_fb_pd_win*win[S3C_FB_MAX_WIN];
+   struct fb_videomode *vtiming;
 
u32  default_win;
 
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index f310516..c94f40d 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -495,7 +495,6 @@ static int s3c_fb_set_par(struct fb_info *info)
u32 alpha = 0;
u32 data;
u32 pagewidth;
-   int clkdiv;
 
dev_dbg(sfb->dev, "setting framebuffer parameters\n");
 
@@ -532,48 +531,9 @@ static int s3c_fb_set_par(struct fb_info *info)
/* disable the window whilst we update it */
writel(0, regs + WINCON(win_no));
 
-   /* use platform specified window as the basis for the lcd timings */
-
-   if (win_no == sfb->pdata->default_win) {
-   clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
-
-   data = sfb->pdata->vidcon0;
-   data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
-
-   if (clkdiv > 1)
-   data |= VIDCON0_CLKVAL_F(clkdiv-1) | VIDCON0_CLKDIR;
-   else
-   data &= ~VIDCON0_CLKDIR;/* 1:1 clock */
-
-   /* write the timing data to the panel */
-
-   if (sfb->variant.is_2443)
-   data |= (1 << 5);
-
-   writel(data, regs + VIDCON0);
-
+   if (win_no == sfb->pdata->default_win)
s3c_fb_enable(sfb, 1);
 
-   data = VIDTCON0_VBPD(var->upper_margin - 1) |
-  VIDTCON0_VFPD(var->lower_margin - 1) |
-  VIDTCON0_VSPW(var->vsync_len - 1);
-
-   writel(data, regs + sfb->variant.vidtcon);
-
-   data = VIDTCON1_HBPD(var->left_margin - 1) |
-  VIDTCON1_HFPD(var->right_margin - 1) |
-  VIDTCON1_HSPW(var->hsync_len - 1);
-
-   /* VIDTCON1 */
-   writel(data, regs + sfb->variant.vidtcon + 4);
-
-   data = VIDTCON2_LINEVAL(var->yres - 1) |
-  VIDTCON2_HOZVAL(var->xres - 1) |
-  VIDTCON2_LINEVAL_E(var->yres - 1) |
-  VIDTCON2_HOZVAL_E(var->xres - 1);
-   writel(data, regs + sfb->variant.vidtcon + 8);
-   }
-
/* write the buffer address */
 
/* start and end registers stride is 8 */
@@ -1144,11 +1104,11 @@ static int __devinit s3c_fb_alloc_memory(struct s3c_fb 
*sfb,
 
dev_dbg(sfb->dev, "allocating memory for display\n");
 
-   real_size = windata->win_mode.xres * windata->win_mode.yres;
+   real_size = windata->xres * windata->yres;
virt_size = windata->virtual_x * windata->virtual_y;
 
dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
-   real_size, windata->win_mode.xres, windata->win_mode.yres,
+   real_size, windata->xres, windata->yres,
virt_size, windata->virt

[PATCH v3 0/4] video: s3c-fb: Rearrange the elements in platform data

2012-03-24 Thread Thomas Abraham
Changes since v2:
- Patch 3/4 is a new patch in this series. The real6410 and mini6410 boards
  use the display controllers window configuration data to represent video
  timing of two different lcd panels. Since the window configuration data
  should be not be used to specify timing of two different panels, this has
  been reworked in such a way that two instance of display controller's
  platform data is setup for the two supported lcd panels. Depending on the
  lcd panel specified using boot parameters, the corresponding platform data
  is registered. This maintains backward compatibility with existing
  functionality of supporting multiple lcd panels at runtime.

Changes since v1:
- Includes all changes suggested by Jingoo Han.
- Reworked s3c-fb platform data in all Samsung SoC based board files.

This patchset rearranges the elements in the platform data of the s3c-fb
driver with the intent of adding device tree support to the driver in
subsequent patches.

The first patch moves the video timing information from the individual window
setup data into the platform specific configuration section in the platform
data. The video timing is independent of the window setup. The resolution of
the window could be smaller than that of the lcd panel attached. So the video
timing data is removed from window configuration data.

The second patch removes the need for the 'default_win' element in the
platform data. This element was used to decide whether the video data
output from the controller should be enabled or disabled when the window
specified by 'default_win' is enabled or disabled. With the first patch
removing the need for atleast one window to be of the same resolution as
that of the lcd panel, it is now possible to decide when to enable/disable
the video data output based on the state of each window. If any of the
window is active, the lcd data output is enabled. Otherwise, the lcd data
output is disabled. Hence, the 'default_win' parameter from the platform
data can be removed, which anyways cannot be specified when using
device tree.

The third patch reworks the display controller's platform data that was
used to supply video timing information for two different panels on the
mini6410 and real6410 boards. That was not the correct usage of the window
data and hence reworks the runtime handling of two different lcd panels.

For all the Samsung SoC based boards, the forth patch reworks the platform
data of the display controller based on the changes introduced in the first
two patches.

This patch series is based on
http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
[for-next]

with all patches merged from
https://github.com/schandinat/linux-2.6.git [fbdev-next]

and tested one Exynos4210 based Origen board (only compile tested for
other boards)

Thomas Abraham (4):
  video: s3c-fb: move video interface timing out of window setup data
  video: s3c-fb: remove 'default_win' element from platform data
  ARM: s3c64xx: Decouple lcd type from display controller window data
  ARM: Samsung: Rework platform data of s3c-fb driver

 arch/arm/mach-exynos/mach-nuri.c   |   26 +++---
 arch/arm/mach-exynos/mach-origen.c |   24 +++--
 arch/arm/mach-exynos/mach-smdkv310.c   |   28 ---
 arch/arm/mach-exynos/mach-universal_c210.c |   26 +++---
 arch/arm/mach-s3c24xx/mach-smdk2416.c  |   27 +++---
 arch/arm/mach-s3c64xx/mach-anw6410.c   |   25 +++---
 arch/arm/mach-s3c64xx/mach-crag6410.c  |   25 +++---
 arch/arm/mach-s3c64xx/mach-hmt.c   |   24 +++--
 arch/arm/mach-s3c64xx/mach-mini6410.c  |   92 +++
 arch/arm/mach-s3c64xx/mach-real6410.c  |   90 +++
 arch/arm/mach-s3c64xx/mach-smartq5.c   |   26 +++---
 arch/arm/mach-s3c64xx/mach-smartq7.c   |   26 +++---
 arch/arm/mach-s3c64xx/mach-smdk6410.c  |   25 +++---
 arch/arm/mach-s5p64x0/mach-smdk6440.c  |   24 +++--
 arch/arm/mach-s5p64x0/mach-smdk6450.c  |   24 +++--
 arch/arm/mach-s5pc100/mach-smdkc100.c  |   27 +++---
 arch/arm/mach-s5pv210/mach-aquila.c|   36 
 arch/arm/mach-s5pv210/mach-goni.c  |   26 +++---
 arch/arm/mach-s5pv210/mach-smdkv210.c  |   24 +++--
 arch/arm/plat-samsung/include/plat/fb.h|   11 ++-
 drivers/video/s3c-fb.c |  135 +--
 21 files changed, 426 insertions(+), 345 deletions(-)

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[PATCH v4 2/2] regulator: add device tree support for max8997

2012-03-24 Thread Thomas Abraham
Add device tree based discovery support for max8997.

Cc: MyungJoo Ham 
Cc: Rajendra Nayak 
Cc: Rob Herring 
Cc: Grant Likely 
Signed-off-by: Thomas Abraham 
---
 .../devicetree/bindings/regulator/max8997-pmic.txt |  133 ++
 drivers/mfd/max8997.c  |   73 ++-
 drivers/regulator/max8997.c|  143 +++-
 include/linux/mfd/max8997-private.h|1 +
 include/linux/mfd/max8997.h|1 +
 5 files changed, 347 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/regulator/max8997-pmic.txt

diff --git a/Documentation/devicetree/bindings/regulator/max8997-pmic.txt 
b/Documentation/devicetree/bindings/regulator/max8997-pmic.txt
new file mode 100644
index 000..90a730b
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max8997-pmic.txt
@@ -0,0 +1,133 @@
+* Maxim MAX8997 Voltage and Current Regulator
+
+The Maxim MAX8997 is a multi-function device which includes volatage and
+current regulators, rtc, charger controller and other sub-blocks. It is
+interfaced to the host controller using a i2c interface. Each sub-block is
+addressed by the host system using different i2c slave address. This document
+describes the bindings for 'pmic' sub-block of max8997.
+
+Required properties:
+- compatible: Should be "maxim,max8997-pmic".
+- reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
+
+- max8997,pmic-buck1-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+  units for buck1 when changing voltage using gpio dvs. Refer to [1] below
+  for additional information.
+
+- max8997,pmic-buck2-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+  units for buck2 when changing voltage using gpio dvs. Refer to [1] below
+  for additional information.
+
+- max8997,pmic-buck5-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
+  units for buck5 when changing voltage using gpio dvs. Refer to [1] below
+  for additional information.
+
+[1] If none of the 'max8997,pmic-buck[1/2/5]-uses-gpio-dvs' optional
+property is specified, the 'max8997,pmic-buck[1/2/5]-dvs-voltage'
+property should specify atleast one voltage level (which would be a
+safe operating voltage).
+
+If either of the 'max8997,pmic-buck[1/2/5]-uses-gpio-dvs' optional
+property is specified, then all the eigth voltage values for the
+'max8997,pmic-buck[1/2/5]-dvs-voltage' should be specified.
+
+Optional properties:
+- interrupt-parent: Specifies the phandle of the interrupt controller to which
+  the interrupts from max8997 are delivered to.
+- interrupts: Interrupt specifiers for two interrupt sources.
+  - First interrupt specifier is for 'irq1' interrupt.
+  - Second interrupt specifier is for 'alert' interrupt.
+- max8997,pmic-buck1-uses-gpio-dvs: 'buck1' can be controlled by gpio dvs.
+- max8997,pmic-buck2-uses-gpio-dvs: 'buck2' can be controlled by gpio dvs.
+- max8997,pmic-buck5-uses-gpio-dvs: 'buck5' can be controlled by gpio dvs.
+
+Additional properties required if either of the optional properties are used:
+- max8997,pmic-ignore-gpiodvs-side-effect: When GPIO-DVS mode is used for
+  multiple bucks, changing the voltage value of one of the bucks may affect
+  that of another buck, which is the side effect of the change (set_voltage).
+  Use this property to ignore such side effects and change the voltage.
+
+- max8997,pmic-buck125-default-dvs-idx: Default voltage setting selected from
+  the possible 8 options selectable by the dvs gpios. The value of this
+  property should be between 0 and 7. If not specified or if out of range, the
+  default value of this property is set to 0.
+
+- max8997,pmic-buck125-dvs-gpios: GPIO specifiers for three host gpio's used
+  for dvs. The format of the gpio specifier depends in the gpio controller.
+
+
+Regulators: The regulators of max8997 that have to be instantiated should be
+included in a sub-node named 'regulators'. Regulator nodes included in this
+sub-node should be of the format as below. Note: The 'n' in LDOn and BUCKn
+represents the LDO or BUCK number as per the datasheet of max8997.
+
+For LDO's:
+   LDOn {
+   standard regulator bindings here
+   };
+
+For BUCK's:
+   BUCKn {
+   standard regulator bindings here
+   };
+
+The bindings inside the regulator nodes use the standard regulator bindings
+which are documented elsewhere.
+
+Example:
+
+   max8997_pmic@66 {
+   compatible = "maxim,max8997-pmic";
+   interrupt-parent = <&wakeup_eint>;
+   reg = <0x66>;
+   interrupts = <4 0>, <3 0>;
+
+   max8997,pmic-buck1-uses-gpio-dvs;
+   max8997,pmic-buck2-uses-gpio-dvs;
+   max8997,pmic-buck5-uses-gpio-dvs;
+
+   max8997,pmic-ignore-gpiodvs-side-effect;
+   max8997,pmic-buck1

[PATCH v4 1/2] mfd: add irq domain support for max8997 interrupts

2012-03-24 Thread Thomas Abraham
Add irq domain support for max8997 interrupts. The reverse mapping method
used is linear mapping since the sub-drivers of max8997 such as regulator
and charger drivers can use the max8997 irq_domain to get the linux irq
number for max8997 interrupts. All uses of irq_base in platform data and
max8997 driver private data are removed.

Cc: MyungJoo Ham 
Signed-off-by: Thomas Abraham 
Acked-by: Grant Likely 
---
 arch/arm/mach-exynos/mach-nuri.c|4 --
 arch/arm/mach-exynos/mach-origen.c  |1 -
 drivers/mfd/max8997-irq.c   |   61 --
 drivers/mfd/max8997.c   |1 -
 include/linux/mfd/max8997-private.h |4 ++-
 include/linux/mfd/max8997.h |1 -
 6 files changed, 39 insertions(+), 33 deletions(-)

diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 7ac81ce..b21d85d 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -1077,12 +1077,8 @@ static struct platform_device nuri_max8903_device = {
 static void __init nuri_power_init(void)
 {
int gpio;
-   int irq_base = IRQ_GPIO_END + 1;
int ta_en = 0;
 
-   nuri_max8997_pdata.irq_base = irq_base;
-   irq_base += MAX8997_IRQ_NR;
-
gpio = EXYNOS4_GPX0(7);
gpio_request(gpio, "AP_PMIC_IRQ");
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
diff --git a/arch/arm/mach-exynos/mach-origen.c 
b/arch/arm/mach-exynos/mach-origen.c
index 827cb99..d3b2e9d 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -424,7 +424,6 @@ static struct max8997_platform_data __initdata 
origen_max8997_pdata = {
.buck1_gpiodvs  = false,
.buck2_gpiodvs  = false,
.buck5_gpiodvs  = false,
-   .irq_base   = IRQ_GPIO_END + 1,
 
.ignore_gpiodvs_side_effect = true,
.buck125_default_idx = 0x0,
diff --git a/drivers/mfd/max8997-irq.c b/drivers/mfd/max8997-irq.c
index 09274cf..00390a1 100644
--- a/drivers/mfd/max8997-irq.c
+++ b/drivers/mfd/max8997-irq.c
@@ -142,7 +142,8 @@ static void max8997_irq_sync_unlock(struct irq_data *data)
 static const inline struct max8997_irq_data *
 irq_to_max8997_irq(struct max8997_dev *max8997, int irq)
 {
-   return &max8997_irqs[irq - max8997->irq_base];
+   struct irq_data *data = irq_get_irq_data(irq);
+   return &max8997_irqs[data->hwirq];
 }
 
 static void max8997_irq_mask(struct irq_data *data)
@@ -182,7 +183,7 @@ static irqreturn_t max8997_irq_thread(int irq, void *data)
u8 irq_reg[MAX8997_IRQ_GROUP_NR] = {};
u8 irq_src;
int ret;
-   int i;
+   int i, cur_irq;
 
ret = max8997_read_reg(max8997->i2c, MAX8997_REG_INTSRC, &irq_src);
if (ret < 0) {
@@ -269,8 +270,11 @@ static irqreturn_t max8997_irq_thread(int irq, void *data)
 
/* Report */
for (i = 0; i < MAX8997_IRQ_NR; i++) {
-   if (irq_reg[max8997_irqs[i].group] & max8997_irqs[i].mask)
-   handle_nested_irq(max8997->irq_base + i);
+   if (irq_reg[max8997_irqs[i].group] & max8997_irqs[i].mask) {
+   cur_irq = irq_find_mapping(max8997->irq_domain, i);
+   if (cur_irq)
+   handle_nested_irq(cur_irq);
+   }
}
 
return IRQ_HANDLED;
@@ -278,26 +282,40 @@ static irqreturn_t max8997_irq_thread(int irq, void *data)
 
 int max8997_irq_resume(struct max8997_dev *max8997)
 {
-   if (max8997->irq && max8997->irq_base)
-   max8997_irq_thread(max8997->irq_base, max8997);
+   if (max8997->irq && max8997->irq_domain)
+   max8997_irq_thread(0, max8997);
+   return 0;
+}
+
+static int max8997_irq_domain_map(struct irq_domain *d, unsigned int irq,
+   irq_hw_number_t hw)
+{
+   struct max8997_dev *max8997 = d->host_data;
+
+   irq_set_chip_data(irq, max8997);
+   irq_set_chip_and_handler(irq, &max8997_irq_chip, handle_edge_irq);
+   irq_set_nested_thread(irq, 1);
+#ifdef CONFIG_ARM
+   set_irq_flags(irq, IRQF_VALID);
+#else
+   irq_set_noprobe(irq);
+#endif
return 0;
 }
 
+static struct irq_domain_ops max8997_irq_domain_ops = {
+   .map = max8997_irq_domain_map,
+};
+
 int max8997_irq_init(struct max8997_dev *max8997)
 {
+   struct irq_domain *domain;
int i;
-   int cur_irq;
int ret;
u8 val;
 
if (!max8997->irq) {
dev_warn(max8997->dev, "No interrupt specified.\n");
-   max8997->irq_base = 0;
-   return 0;
-   }
-
-   if (!max8997->irq_base) {
-   dev_err(max8997->dev, "No interrupt base specified.\n");
return 0;
}
 
@@ -327,18 +345,11 @@ int max8997_irq_init(struct max8997_dev *max8997)
true : false;
}
 
-   /* Register with genirq */
-   for (i = 0; i < MAX8997_IRQ_NR; 

[PATCH v4 0/2] regulator: add irq domain and device tree support for MAX8997

2012-03-24 Thread Thomas Abraham
Changes since v3:
- Fixed all comments from Grant Likely.
  - In patch 1/2, since linear mapping is used, the handle_nested_irq() is
called only for allocated irq's.
  - In patch 2/2, the incorrect assignment of platform data pointer to
dev->platform_data is reworked and fixed.

Changes since v2:
- Atleast one voltage level has to be specfied for Buck 1/2/5 even if GPIO
  DVS option is not used (suggested by MyungJoo Ham).
- Reworked the irq_domain support based the v5 of irq_domain generalization
  patches.

MAX8997 is a multi-function device which includes support for regulators, rtc,
battery charger and other sub-blocks. This patchset adds device tree support
for the pmic (regulators) sub-block.

The first patch adds irq domain support for the interrupts supported by max8997
mainly for removing the need to pass a irq_base from the platform code. The
irq_base could not anyway be passed in case of device tree based instantiation.
The reverse mapping method used is linear since the sub-drivers of max8997 has
access to the max8997 irq_domain from which the linux irq number can be
obtained.

The second patch adds device tree support for max8997. This patch modifies both
mfd and regulator portions of the max8997 code.

This patchset is based on the following tree.
http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
[for-next]

with all patches merged from
http://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git [for-next]
http://git.secretlab.ca/git/linux-2.6.git [irqdomain/next]

and depends on the following patchset.
[PATCH v4 0/4] ARM: Exynos4: Add irq domain and device tree support for wakeup 
interrupts.

This patchset has been tested on Origen board.

Thomas Abraham (2):
  mfd: add irq domain support for max8997 interrupts
  regulator: add device tree support for max8997

 .../devicetree/bindings/regulator/max8997-pmic.txt |  133 ++
 arch/arm/mach-exynos/mach-nuri.c   |4 -
 arch/arm/mach-exynos/mach-origen.c |1 -
 drivers/mfd/max8997-irq.c  |   61 +
 drivers/mfd/max8997.c  |   74 ++-
 drivers/regulator/max8997.c|  143 +++-
 include/linux/mfd/max8997-private.h|5 +-
 include/linux/mfd/max8997.h|2 +-
 8 files changed, 386 insertions(+), 37 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/regulator/max8997-pmic.txt

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[PATCH v4 4/4] ARM: Exynos: Add device tree support for gpio wakeup interrupt controller

2012-03-24 Thread Thomas Abraham
Add device tree support for gpio wakeup source interrupt controller for
Exynos platforms.

Cc: Rob Herring 
Cc: Grant Likely 
Signed-off-by: Thomas Abraham 
---
 .../bindings/arm/samsung/wakeup-eint.txt   |  152 
 arch/arm/mach-exynos/common.c  |   55 ++--
 2 files changed, 195 insertions(+), 12 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt

diff --git a/Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt 
b/Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt
new file mode 100644
index 000..04bbf25
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt
@@ -0,0 +1,152 @@
+* Samsung GPIO Wakeup Interrupt Controller
+
+This document is split into following sections.
+
+[1] Samsung Exynos4 GPIO Wakeup Interrupt Source Controller
+[2] Samsung Exynos5 GPIO Wakeup Interrupt Source Controller
+
+
+[1] Samsung Exynos4 GPIO Wakeup Interrupt Source Controller
+
+Samsung Exynos4 processor supports 32 external wakeup interrupt sources. First
+16 of these interrupts are directly connected to GIC and the rest 16 of the
+interrupts are grouped together to deliver a single interrupt to GIC.
+
+Required properties:
+
+- compatible: should be "samsung,exynos4210-wakeup-eint".
+
+- reg: physical base address of the controller and length of memory
+  mapped region.
+
+- interrupt-controller: Identifies the node as an interrupt controller.
+
+- interrupt-cells: Specifies the number of cells required to specify the
+  interrupt source number. The value of should be <2>. The first cell
+  represents the wakeup interrupt source number and the second cell
+  should be zero (currently unused).
+
+- interrupts: List of interrupts generated by the gpio wakeup interrupt
+  controller which are connected to a parent interrupt controller. The
+  format of the interrupt specifier depends on the interrupt parent
+  controller.
+
+Optional properties:
+
+- interrupt-parent: phandle of the parent interrupt controller, required
+  if not inheriting the interrupt parent from the parent node.
+
+Example:
+
+   The following example is from the Exynos4210 dtsi file.
+
+   wakeup_eint: interrupt-controller-wakeup-eint {
+   compatible = "samsung,exynos4210-wakeup-eint";
+   reg = <0x1100 0x1000>;
+   #interrupt-cells = <2>;
+   interrupt-controller;
+   interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
+   <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
+   <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
+   <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
+   <0 32 0>;
+   };
+
+
+[2] Samsung Exynos5 GPIO Wakeup Interrupt Source Controller
+
+Samsung Exynos5 processor supports 32 external wakeup interrupt sources. First
+16 of these interrupts are directly connected to GIC and the rest 16 of the
+interrupts are grouped together to deliver a single interrupt to interrupt
+combiner controller.
+
+Since the wakeup interrupts has two interrupt parents, a interrupt nexus
+child node is used that includes a interrupt-map used to translate wakeup
+interrupt specifiers into gic and combiner domain interrupts.
+
+Required properties:
+
+- compatible: should be "samsung,exynos5210-wakeup-eint".
+
+- reg: physical base address of the controller and length of memory
+  mapped region.
+
+- interrupt-controller: Identifies the node as an interrupt controller.
+
+- interrupt-cells: Specifies the number of cells required to specify the
+  interrupt source number. The value of should be <2>. The first cell
+  represents the wakeup interrupt source number and the second cell
+  should be zero (currently unused).
+
+- interrupts: List of interrupts generated by the gpio wakeup interrupt
+  controller. Since both gic and combiner controllers are interrupt
+  parents, a interrupt nexus child node is used to translate the interrupt
+  specifiers into respective gic and combiner interrupt domains (see 
below).
+  The interrupt specifier should be two cells - the first cell should be 
the
+  interrupt number originating from the wakeup controller and the second
+  cell should be zero (unused).
+
+- interrupt-parent: The phandle of the interrupt nexus child node.
+
+- interrupt-nexus child node: This node is used to translate the interrupt
+  specifiers of the wakeup interrupt controller node to the respecitive
+  gic or combiner interrupt domain. The interrupt nexus node should include
+  the following properties.
+
+  - interrupt-cells: Specifies the number of cells required to specify the
+interrupt source number. The value of should be <2>. The first cell
+represents the wakeup interrupt source numbe

[PATCH v4 3/4] ARM: Exynos: Remove arch_initcall for wakeup interrupt initialization

2012-03-24 Thread Thomas Abraham
The of_irq_init function would be setup to invoke the exynos4_init_irq_eint
function when booting using device tree. The arch_initcall for
exynos4_init_irq_eint would duplicate its invocation in that case. Hence,
arch_initcall for exynos4_init_irq_eint is removed and this function is invoked
from the exynos4_init_irq for non-dt case.

Moreover, with single kernel image build, the exynos4_init_irq_eint has no 
checks
to ensure that it is running on a exynos4 platform. So it would be appropriate
to invoke it from exynos4_init_irq.

Signed-off-by: Thomas Abraham 
Acked-by: Rob Herring 
---
 arch/arm/mach-exynos/common.c |4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index b69f36a..7aa1919 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -64,6 +64,7 @@ static void exynos4_init_clocks(int xtal);
 static void exynos5_init_clocks(int xtal);
 static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 static int exynos_init(void);
+static int exynos_init_irq_eint(void);
 
 static struct cpu_table cpu_ids[] __initdata = {
{
@@ -608,6 +609,7 @@ void __init exynos4_init_irq(void)
 * uses GIC instead of VIC.
 */
s5p_init_irq(NULL, 0);
+   exynos_init_irq_eint();
 }
 
 void __init exynos5_init_irq(void)
@@ -620,6 +622,7 @@ void __init exynos5_init_irq(void)
 * uses GIC instead of VIC.
 */
s5p_init_irq(NULL, 0);
+   exynos_init_irq_eint();
 }
 
 struct bus_type exynos4_subsys = {
@@ -1048,4 +1051,3 @@ static int __init exynos_init_irq_eint(void)
 
return 0;
 }
-arch_initcall(exynos_init_irq_eint);
-- 
1.6.6.rc2

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[PATCH v4 2/4] ARM: Exynos: Add irq_domain support for gpio wakeup interrupts

2012-03-24 Thread Thomas Abraham
Add a irq_domain for all the 32 gpio external wakeup interrupt sources.
Since there are users of fixed linux irq numbers of the external wakeup
interrupts, the legacy mapping is used for the irq domain. The fixups
required to use irq domain based interrupt mapping is also included.

Cc: Grant Likely 
Signed-off-by: Thomas Abraham 
Acked-by: Rob Herring 
---
 arch/arm/mach-exynos/common.c |   67 +
 arch/arm/mach-exynos/include/mach/regs-gpio.h |4 +-
 2 files changed, 48 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 3768efa..b69f36a 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -759,6 +759,9 @@ static DEFINE_SPINLOCK(eint_lock);
 
 static unsigned int eint0_15_data[16];
 
+#define EXYNOS_EINT_NR 32
+static struct irq_domain *irq_domain;
+
 static inline int exynos4_irq_to_gpio(unsigned int irq)
 {
if (irq < IRQ_EINT(0))
@@ -849,9 +852,9 @@ static inline void exynos_irq_eint_mask(struct irq_data 
*data)
u32 mask;
 
spin_lock(&eint_lock);
-   mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq));
-   mask |= EINT_OFFSET_BIT(data->irq);
-   __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq));
+   mask = __raw_readl(EINT_MASK(exynos_eint_base, data->hwirq));
+   mask |= EINT_OFFSET_BIT(data->hwirq);
+   __raw_writel(mask, EINT_MASK(exynos_eint_base, data->hwirq));
spin_unlock(&eint_lock);
 }
 
@@ -860,16 +863,16 @@ static void exynos_irq_eint_unmask(struct irq_data *data)
u32 mask;
 
spin_lock(&eint_lock);
-   mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq));
-   mask &= ~(EINT_OFFSET_BIT(data->irq));
-   __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq));
+   mask = __raw_readl(EINT_MASK(exynos_eint_base, data->hwirq));
+   mask &= ~(EINT_OFFSET_BIT(data->hwirq));
+   __raw_writel(mask, EINT_MASK(exynos_eint_base, data->hwirq));
spin_unlock(&eint_lock);
 }
 
 static inline void exynos_irq_eint_ack(struct irq_data *data)
 {
-   __raw_writel(EINT_OFFSET_BIT(data->irq),
-EINT_PEND(exynos_eint_base, data->irq));
+   __raw_writel(EINT_OFFSET_BIT(data->hwirq),
+EINT_PEND(exynos_eint_base, data->hwirq));
 }
 
 static void exynos_irq_eint_maskack(struct irq_data *data)
@@ -880,7 +883,7 @@ static void exynos_irq_eint_maskack(struct irq_data *data)
 
 static int exynos_irq_eint_set_type(struct irq_data *data, unsigned int type)
 {
-   int offs = EINT_OFFSET(data->irq);
+   int offs = data->hwirq;
int shift;
u32 ctrl, mask;
u32 newvalue = 0;
@@ -915,10 +918,10 @@ static int exynos_irq_eint_set_type(struct irq_data 
*data, unsigned int type)
mask = 0x7 << shift;
 
spin_lock(&eint_lock);
-   ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->irq));
+   ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->hwirq));
ctrl &= ~mask;
ctrl |= newvalue << shift;
-   __raw_writel(ctrl, EINT_CON(exynos_eint_base, data->irq));
+   __raw_writel(ctrl, EINT_CON(exynos_eint_base, data->hwirq));
spin_unlock(&eint_lock);
 
if (soc_is_exynos5250())
@@ -962,7 +965,7 @@ static inline void exynos_irq_demux_eint(unsigned int start)
 
while (status) {
irq = fls(status) - 1;
-   generic_handle_irq(irq + start);
+   generic_handle_irq(irq_find_mapping(irq_domain, irq + start));
status &= ~(1 << irq);
}
 }
@@ -971,8 +974,8 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, 
struct irq_desc *desc)
 {
struct irq_chip *chip = irq_get_chip(irq);
chained_irq_enter(chip, desc);
-   exynos_irq_demux_eint(IRQ_EINT(16));
-   exynos_irq_demux_eint(IRQ_EINT(24));
+   exynos_irq_demux_eint(16);
+   exynos_irq_demux_eint(24);
chained_irq_exit(chip, desc);
 }
 
@@ -980,6 +983,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct 
irq_desc *desc)
 {
u32 *irq_data = irq_get_handler_data(irq);
struct irq_chip *chip = irq_get_chip(irq);
+   int eint_irq;
 
chained_irq_enter(chip, desc);
chip->irq_mask(&desc->irq_data);
@@ -987,15 +991,28 @@ static void exynos_irq_eint0_15(unsigned int irq, struct 
irq_desc *desc)
if (chip->irq_ack)
chip->irq_ack(&desc->irq_data);
 
-   generic_handle_irq(*irq_data);
+   eint_irq = irq_find_mapping(irq_domain, *irq_data);
+   generic_handle_irq(eint_irq);
 
chip->irq_unmask(&desc->irq_data);
chained_irq_exit(chip, desc);
 }
 
+static int exynos_eint_irq_domain_map(struct irq_domain *d, unsigned int irq,
+   irq_hw_number_t hw)
+{
+   irq_set_chip_and_handler(irq, &exynos_irq_eint, handle_level_irq);
+   set_irq_flags(irq, IRQF_VALID);
+   return 0;
+}
+
+sta

[PATCH v4 1/4] ARM: Exynos: Simplify the wakeup interrupt setup code

2012-03-24 Thread Thomas Abraham
Simplify the wakeup interrupt setup code in order to add irq domain
and device tree support.

Cc: Kukjin Kim 
Signed-off-by: Thomas Abraham 
---
 arch/arm/mach-exynos/common.c |   32 +++-
 1 files changed, 11 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 36b5837..3768efa 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -995,16 +995,14 @@ static void exynos_irq_eint0_15(unsigned int irq, struct 
irq_desc *desc)
 
 static int __init exynos_init_irq_eint(void)
 {
-   int irq;
+   int irq, *src_int;
+   unsigned int paddr;
 
-   if (soc_is_exynos5250())
-   exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);
-   else
-   exynos_eint_base = ioremap(EXYNOS4_PA_GPIO2, SZ_4K);
-
-   if (exynos_eint_base == NULL) {
+   paddr = soc_is_exynos5250() ? EXYNOS5_PA_GPIO1 : EXYNOS4_PA_GPIO2;
+   exynos_eint_base = ioremap(paddr, SZ_4K);
+   if (!exynos_eint_base) {
pr_err("unable to ioremap for EINT base address\n");
-   return -ENOMEM;
+   return -ENXIO;
}
 
for (irq = 0 ; irq <= 31 ; irq++) {
@@ -1015,20 +1013,12 @@ static int __init exynos_init_irq_eint(void)
 
irq_set_chained_handler(EXYNOS_IRQ_EINT16_31, 
exynos_irq_demux_eint16_31);
 
-   for (irq = 0 ; irq <= 15 ; irq++) {
+   for (irq = 0 ; irq <= 15; irq++) {
eint0_15_data[irq] = IRQ_EINT(irq);
-
-   if (soc_is_exynos5250()) {
-   irq_set_handler_data(exynos5_eint0_15_src_int[irq],
-&eint0_15_data[irq]);
-   irq_set_chained_handler(exynos5_eint0_15_src_int[irq],
-   exynos_irq_eint0_15);
-   } else {
-   irq_set_handler_data(exynos4_eint0_15_src_int[irq],
-&eint0_15_data[irq]);
-   irq_set_chained_handler(exynos4_eint0_15_src_int[irq],
-   exynos_irq_eint0_15);
-   }
+   src_int = soc_is_exynos5250() ? exynos5_eint0_15_src_int :
+   exynos4_eint0_15_src_int;
+   irq_set_handler_data(src_int[irq], &eint0_15_data[irq]);
+   irq_set_chained_handler(src_int[irq], exynos_irq_eint0_15);
}
 
return 0;
-- 
1.6.6.rc2

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[PATCH v4 0/4] ARM: Exynos4: Add irq domain and device tree support for wakeup interrupts

2012-03-24 Thread Thomas Abraham
Changes since v3:
- Rebased the patches to the latest kgene/for-next branch which now includes
  Exynos5 support as well. In this process, there are some significant changes,
  when compared to v3 version of this patchset, related to device tree support
  in patch 4/4 and code simplification in patch 1/4. Since v3 of this series
  was acked by Rob Herring, I have added the his Ack for patches 2/4 and
  3/4 but not in patches 1/4 and 4/4 (due to the new set of changes).

- Patch 4/4 includes modifications which are required to support Exynos5
  wakeup interrupt controller that has two interrupt parents (gic and
  interrupt combiner).

Changes since v2:
- Reworked irq domain support based on v5 of the irq_domain generalization
  patches.

Changes since v1: (only patch 4/4 has changes)
- Fixes based on Rob's comments:
  a. Fixed the function prototype of exynos4_init_irq_eint(void)
  b. Included interrupt-parent as an optional property for wakeup interrupt
  controller node.

Samsung Exynos4 includes 32 external wakeup interrupt sources. The first 16
of these interrupts are connected to GIC SPI[31:16]. The last 16 of these
interrupts are grouped together into one interrupt and connected to GIC
SPI[32].

Samsung Exynos5 also includes 32 external wakeup interrupt sources. The first
16 of these interrupts are connected to interrupt combiner controller. The
last 16 of these interrupts are grouped together into one interrupt and
connected to GIC SPI[32].

This patchset adds irq domain and device tree support for these interrupts.
Since there are users of fixed linux irq numbers of the external wakeup
interrupts, the legacy mapping is used for the irq domain.

This patchset is based on
http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
[for-next]

with all patches merged from
http://git.secretlab.ca/git/linux-2.6.git [irqdomain/next]

This patchset should be applied after applying the following patch.
[PATCH v5] ARM: Exynos: Add irq domain and device tree support for interrupt 
combiner

Thomas Abraham (4):
  ARM: Exynos: Simplify the wakeup interrupt setup code
  ARM: Exynos: Add irq_domain support for gpio wakeup interrupts
  ARM: Exynos: Remove arch_initcall for wakeup interrupt initialization
  ARM: Exynos: Add device tree support for gpio wakeup interrupt controller

 .../bindings/arm/samsung/wakeup-eint.txt   |  152 
 arch/arm/mach-exynos/common.c  |  138 --
 arch/arm/mach-exynos/include/mach/regs-gpio.h  |4 +-
 3 files changed, 247 insertions(+), 47 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt

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[PATCH v5 2/2] ARM: Exynos: Add device tree support for interrupt combiner

2012-03-24 Thread Thomas Abraham
Add device tree based instantiation of the interrupt combiner controller.

Signed-off-by: Thomas Abraham 
Acked-by: Rob Herring 
Acked-by: Grant Likely 
---
 .../bindings/arm/samsung/interrupt-combiner.txt|   52 +
 arch/arm/mach-exynos/common.c  |   61 ++--
 2 files changed, 108 insertions(+), 5 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt

diff --git 
a/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt 
b/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt
new file mode 100644
index 000..f2f2171
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt
@@ -0,0 +1,52 @@
+* Samsung Exynos Interrupt Combiner Controller
+
+Samsung's Exynos architecture includes a interrupt combiner controller which
+can combine interrupt sources as a group and provide a single interrupt request
+for the group. The interrupt request from each group are connected to a parent
+interrupt controller, such as GIC in case of Exynos4210.
+
+The interrupt combiner controller consists of multiple combiners. Upto eight
+interrupt sources can be connected to a combiner. The combiner outputs one
+combined interrupt for its eight interrupt sources. The combined interrupt
+is usually connected to a parent interrupt controller.
+
+A single node in the device tree is used to describe the interrupt combiner
+controller module (which includes multiple combiners). A combiner in the
+interrupt controller module shares config/control registers with other
+combiners. For example, a 32-bit interrupt enable/disable config register
+can accommodate upto 4 interrupt combiners (with each combiner supporting
+upto 8 interrupt sources).
+
+Required properties:
+- compatible: should be "samsung,exynos4210-combiner".
+- interrupt-controller: Identifies the node as an interrupt controller.
+- #interrupt-cells: should be <2>. The meaning of the cells are
+   * First Cell: Combiner Group Number.
+   * Second Cell: Interrupt number within the group.
+- reg: Base address and size of interrupt combiner registers.
+- interrupts: The list of interrupts generated by the combiners which are then
+connected to a parent interrupt controller. The format of the interrupt
+specifier depends in the interrupt parent controller.
+
+Optional properties:
+- samsung,combiner-nr: The number of interrupt combiners supported. If this
+  property is not specified, the default number of combiners is assumed
+  to be 16.
+- interrupt-parent: pHandle of the parent interrupt controller, if not
+  inherited from the parent node.
+
+
+Example:
+
+   The following is a an example from the Exynos4210 SoC dtsi file.
+
+   combiner:interrupt-controller@1044 {
+   compatible = "samsung,exynos4210-combiner";
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   reg = <0x1044 0x1000>;
+   interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
+<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
+   };
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 7518945..36b5837 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -486,6 +487,30 @@ static void __init combiner_init_one(unsigned int 
combiner_nr,
 base + COMBINER_ENABLE_CLEAR);
 }
 
+#ifdef CONFIG_OF
+static int combiner_irq_domain_xlate(struct irq_domain *d,
+   struct device_node *controller, const u32 *intspec,
+   unsigned int intsize, unsigned long *out_hwirq,
+   unsigned int *out_type)
+{
+   if (d->of_node != controller)
+   return -EINVAL;
+   if (intsize < 2)
+   return -EINVAL;
+   *out_hwirq = intspec[0] * MAX_IRQ_IN_COMBINER + intspec[1];
+   *out_type = 0;
+   return 0;
+}
+#else
+static int combiner_irq_domain_xlate(struct irq_domain *d,
+   struct device_node *controller, const u32 *intspec,
+   unsigned int intsize, unsigned long *out_hwirq,
+   unsigned int *out_type)
+{
+   return -EINVAL;
+}
+#endif
+
 static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
 {
@@ -496,16 +521,26 @@ static int combiner_irq_domain_map(struct irq_domain *d, 
unsigned int irq,
 }
 
 static struct irq_domain_ops combiner_irq_domain_ops = {
+   .xlate = combiner_irq_domain_xlate,
.map = combiner_irq_domain_map,
 };
 
 void __init combiner_init(void __iomem *combiner_base, struct device_node *np)
 {
-   int i, irq_base;
+   int i, irq, irq_base;
   

[PATCH v5 1/2] ARM: Exynos: Add irq_domain support for interrupt combiner

2012-03-24 Thread Thomas Abraham
Add irq_domain support for hardware interrupts of the interrupt combiner.
The hardware interrupts of all the instances of the combiner are grouped
in a single irq_domain.

Cc: Grant Likely 
Signed-off-by: Thomas Abraham 
Acked-by: Rob Herring 
---
 arch/arm/mach-exynos/common.c |   87 +++-
 1 files changed, 50 insertions(+), 37 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 85ed8b5..7518945 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -19,6 +19,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
@@ -394,6 +396,7 @@ struct combiner_chip_data {
void __iomem *base;
 };
 
+static struct irq_domain *combiner_irq_domain;
 static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
 
 static inline void __iomem *combiner_base(struct irq_data *data)
@@ -406,14 +409,14 @@ static inline void __iomem *combiner_base(struct irq_data 
*data)
 
 static void combiner_mask_irq(struct irq_data *data)
 {
-   u32 mask = 1 << (data->irq % 32);
+   u32 mask = 1 << (data->hwirq % 32);
 
__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
 }
 
 static void combiner_unmask_irq(struct irq_data *data)
 {
-   u32 mask = 1 << (data->irq % 32);
+   u32 mask = 1 << (data->hwirq % 32);
 
__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
 }
@@ -469,36 +472,59 @@ static void __init combiner_cascade_irq(unsigned int 
combiner_nr, unsigned int i
irq_set_chained_handler(irq, combiner_handle_cascade_irq);
 }
 
-static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
- unsigned int irq_start)
+static void __init combiner_init_one(unsigned int combiner_nr,
+   void __iomem *base)
 {
-   unsigned int i;
-   unsigned int max_nr;
-
-   if (soc_is_exynos5250())
-   max_nr = EXYNOS5_MAX_COMBINER_NR;
-   else
-   max_nr = EXYNOS4_MAX_COMBINER_NR;
-
-   if (combiner_nr >= max_nr)
-   BUG();
-
combiner_data[combiner_nr].base = base;
-   combiner_data[combiner_nr].irq_offset = irq_start;
+   combiner_data[combiner_nr].irq_offset = irq_find_mapping(
+   combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER);
combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
 
/* Disable all interrupts */
 
__raw_writel(combiner_data[combiner_nr].irq_mask,
 base + COMBINER_ENABLE_CLEAR);
+}
+
+static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq,
+   irq_hw_number_t hw)
+{
+   irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq);
+   irq_set_chip_data(irq, &combiner_data[hw >> 3]);
+   set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+   return 0;
+}
+
+static struct irq_domain_ops combiner_irq_domain_ops = {
+   .map = combiner_irq_domain_map,
+};
 
-   /* Setup the Linux IRQ subsystem */
+void __init combiner_init(void __iomem *combiner_base, struct device_node *np)
+{
+   int i, irq_base;
+   unsigned int max_nr, nr_irq;
+
+   max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR :
+   EXYNOS4_MAX_COMBINER_NR;
+   nr_irq = max_nr * MAX_IRQ_IN_COMBINER;
+
+   irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0);
+   if (IS_ERR_VALUE(irq_base)) {
+   irq_base = COMBINER_IRQ(0, 0);
+   pr_warning("%s: irq desc alloc failed. Continuing with %d as "
+   "linux irq base\n", __func__, irq_base);
+   }
+
+   combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0,
+   &combiner_irq_domain_ops, &combiner_data);
+   if (WARN_ON(!combiner_irq_domain)) {
+   pr_warning("%s: irq domain init failed\n", __func__);
+   return;
+   }
 
-   for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
-   + MAX_IRQ_IN_COMBINER; i++) {
-   irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
-   irq_set_chip_data(i, &combiner_data[combiner_nr]);
-   set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+   for (i = 0; i < max_nr; i++) {
+   combiner_init_one(i, combiner_base + (i >> 2) * 0x10);
+   combiner_cascade_irq(i, IRQ_SPI(i));
}
 }
 
@@ -511,7 +537,6 @@ static const struct of_device_id exynos4_dt_irq_match[] = {
 
 void __init exynos4_init_irq(void)
 {
-   int irq;
unsigned int gic_bank_offset;
 
gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
@@ -523,12 +548,7 @@ void __init exynos4_init_irq(void)
of_irq_init(exynos4_dt_irq_match);
 #endif
 
-   for (irq = 0; irq < EXYNOS4_M

[PATCH v5 0/2] ARM: Exynos: Add irq_domain and device tree support for combiner

2012-03-24 Thread Thomas Abraham
Changes since v4:
- In patch 2/2, removed the #ifdef CONFIF_OF around irq_of_parse_and_map() as
  suggested by Grant Likely. Hence this patch series depends on the patch
  with subject "of/irq: add empty irq_of_parse_and_map() for non-dt builds".

- Rebased to the latest kgene/for-next branch which now includes support for
  Exynos5. Since this patchset modifies portions of code that are common for
  both Exynos4 and Exynos5, there are minor modifications in this patch series
  to accommodate Exynos5 dt support as well.

- v4 of this patchset was acked by Grant Likely and Rob Herring. This patch
  series (v5) has minor modifications over v4 to include Exynos5 support. Since
  those modifications are minor (not related to irq_domain or dt functionality),
  I am retaining the Ack from Grant and Rob for this series.

Changes since v3:
- In dt case, the use of fixed gic linux irq number to map the combiner
  interrupt output is removed. This is replaced with the interrupt number
  obtained from the gic irq domain. (Thanks to Rob Herring and Grant
  Likely for this suggestion).
- Split the patch into two parts - irq_domain and device tree support
  addition.

Changes since v2:
- Rebased to Grant's irqdomain/next branch.

Changes since v1:
- Includes all changes suggested by Rob Herring.
- Tested with SPARSE_IRQ enabled.

This patchset adds irq_domain and device tree support for the Exynos Interrupt
Combiner controller.

The first patch adds a common irq domain for the interrupts managed by the
interrupt combiners. All the instances of irq combiner reference the common irq
domain for translating hardware interrupts to linux irq number.

The second patch adds a interrupt specifier translator to support device tree
based instantiation. It can translate interrupt specifiers for device nodes
which use combiner as their interrupt parent.

This patchset is based on
http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
[for-next]

with all patches merged from
http://git.secretlab.ca/git/linux-2.6.git [irqdomain/next]

Thomas Abraham (2):
  ARM: Exynos: Add irq_domain support for interrupt combiner
  ARM: Exynos: Add device tree support for interrupt combiner

 .../bindings/arm/samsung/interrupt-combiner.txt|   52 
 arch/arm/mach-exynos/common.c  |  138 ++-
 2 files changed, 153 insertions(+), 37 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt


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