Hi,
On 5/2/12, Thomas Abraham thomas.abra...@linaro.org wrote:
Add device tree based discovery support.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
.../devicetree/bindings/mmc/synposis-dw-mshc.txt | 85 +
drivers/mmc/host/dw_mmc-pltfm.c| 24
Hi,
On 5/2/12, Thomas Abraham thomas.abra...@linaro.org wrote:
The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase shift timing
and CIU internal divider. In addition to that, the option to skip the
command hold stage is
Hi Thomas,
I suggest to split the patches into mmc part and samsung specific
part. As you know previous time there's mismatch between mmc and
samsung. So split the patches and send it separately to avoid merge
conflict and mismatch.
I think regardless mmc changes, it can be merged into samsung
On 05/02/2012 04:01 PM, Kyungmin Park wrote:
Hi,
On 5/2/12, Thomas Abraham thomas.abra...@linaro.org wrote:
The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase shift timing
and CIU internal divider. In addition to
On Tue, May 1, 2012 at 10:57 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
The variable 'dw_mci_card_workqueue' is a global variable shared between
multiple instances of the dw_mmc host controller. Due to this, data
corruption has been noticed when multiple instances of dw_mmc controllers
On Wed, May 2, 2012 at 6:07 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
If the write protect pad of the controller is not connected to the write
protect pin of the slot, the driver should be notified of this condition
so that incorrect check for write protection by reading the WRTORT
On Tue, May 01, 2012 at 10:07:40PM -0700, Thomas Abraham wrote:
Some platforms allow for clock gating and control of bus interface unit clock
and card interface unit clock. Add support for clock lookup of optional biu
and ciu clocks for clock gating and clock speed determination.
As we're
Hi
On 2 May 2012 06:07, Thomas Abraham thomas.abra...@linaro.org wrote:
Some platforms allow for clock gating and control of bus interface unit clock
and card interface unit clock. Add support for clock lookup of optional biu
and ciu clocks for clock gating and clock speed determination.
Hi,
[adding devicetree-discuss]
On Mon, Apr 30, 2012 at 12:14 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
And interrupt combiner, external interrupt wakeup interrupt controller
and smsc9215 lan controller nodes.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
Hi,
On Tue, May 1, 2012 at 10:07 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
Add device tree based discovery support.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
.../devicetree/bindings/mmc/synposis-dw-mshc.txt | 85 +
drivers/mmc/host/dw_mmc-pltfm.c
Hi,
On Tue, May 1, 2012 at 10:07 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase shift timing
and CIU internal divider. In addition to that, the option to skip the
Hi,
On Mon, Apr 30, 2012 at 12:14 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
Updated EXYNOS5 device tree source files to reflect changes in rev1
of EXYNOS5 SoC. This includes new additions to the EXYNOS5 dtsi and
SMDK5250 dts files and few minor fixes.
Signed-off-by: Thomas Abraham
Hi Kukjin,
Can you please review these patches and let me know your comments.
On 11/04/2012, Sachin Kamat sachin.ka...@linaro.org wrote:
ping...
On 27/03/2012, Sachin Kamat sachin.ka...@linaro.org wrote:
This patch series adds DRM core device and FIMD DRM platform device
support
to Origen
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