RE: [PATCH 1/3] ARM: EXYNOS: Add audio platform device in SMDKV310 board

[Sangbeom Kim]

Hi!
On Tuesday, Jul 05, 2012 at 09:01:56, Sachin Kamat wrote:
 After using snd_soc_register_card() in smdk_wm8994.c, the sound
 card is registered as a platform driver and it needs related platform
 device entry in machine file.

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org 
Acked-by: Sangbeom Kim sbki...@samsung.com
 
Thanks,
Sangbeom.


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RE: [PATCH 2/3] ARM: S5PV210: Add audio platform device in Aquila board

[Sangbeom Kim]

Hi!
On Thu, Jul 05, 2012 at 09:01:57, Sachin Kamat wrote:
 After using snd_soc_register_card() in smdk_wm8994.c, the sound
 card is registered as a platform driver and it needs related platform
 device entry in machine file.

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Acked-by: Sangbeom Kim sbki...@samsung.com

Thanks,
Sangbeom.


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RE: [PATCH 3/3] ARM: S5PV210: Add audio platform device in Goni board

[Sangbeom Kim]

On Thu, Jul 05, 2012 at 09:01:58, Sachin Kamat wrote:
 After using snd_soc_register_card() in smdk_wm8994.c, the sound
 card is registered as a platform driver and it needs related platform
 device entry in machine file.

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Acked-by: Sangbeom Kim sbki...@samsung.com

Thanks,
Sangbeom.


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Re: [PATCH v5 0/6] spi: s3c64xx: add support for device tree

[Thomas Abraham]

On 11 July 2012 23:30, Thomas Abraham thomas.abra...@linaro.org wrote:
 On 11 July 2012 23:19, Mark Brown broo...@opensource.wolfsonmicro.com wrote:
 On Wed, Jul 11, 2012 at 09:10:59PM +0530, Thomas Abraham wrote:
 Changes since v4:
 - Includes the missing gpio request for slave select line gpio as suggested
   by Mark Brown.

 These looked OK (and have had quite a bit of review already so we're
 probably at the stage where incremental fixes are better anyway) so I
 tried to apply them but git am was really unhappy.  I tried applying on

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc.git spi-next

 and -next.  Can you check what's going on here please?

 These patches were based on Samsung maintainer's for-next branch with
 Grant's spi/next branch merged. I will check with your spi-next
 branch. Thanks.

The 6th patch in this series has a dependency on Samsung maintainers
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RE: [PATCH 1/1] ARM: EXYNOS: Fix compilation warning in setup-usb-phy.c file

[Kukjin Kim]

Sachin Kamat wrote:
 
 Fixes the following warning:
 arch/arm/mach-exynos/setup-usb-phy.c: In function
 ‘exynos4210_usb_phy_clkset’:
 arch/arm/mach-exynos/setup-usb-phy.c:83:2:
 warning: ‘phyclk’ may be used uninitialized in this function [-
 Wuninitialized]
 
 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 ---
  arch/arm/mach-exynos/setup-usb-phy.c |8 
  1 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-
 exynos/setup-usb-phy.c
 index d26deb7..1eaa0b0 100644
 --- a/arch/arm/mach-exynos/setup-usb-phy.c
 +++ b/arch/arm/mach-exynos/setup-usb-phy.c
 @@ -31,7 +31,6 @@ static void exynos4210_usb_phy_clkset(struct
 platform_device *pdev)
   struct clk *xusbxti_clk;
   u32 phyclk;
 
 -
   xusbxti_clk = clk_get(pdev-dev, xusbxti);
   if (xusbxti_clk  !IS_ERR(xusbxti_clk)) {
   if (soc_is_exynos4210()) {
 @@ -50,6 +49,8 @@ static void exynos4210_usb_phy_clkset(struct
 platform_device *pdev)
   phyclk |= EXYNOS4210_CLKSEL_48M;
   break;
   }
 + clk_put(xusbxti_clk);
 + writel(phyclk, EXYNOS4_PHYCLK);
   } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
   /* set clock frequency for PLL */
   phyclk = readl(EXYNOS4_PHYCLK) 
 ~EXYNOS4X12_CLKSEL_MASK;
 @@ -76,11 +77,10 @@ static void exynos4210_usb_phy_clkset(struct
 platform_device *pdev)
   phyclk |= EXYNOS4X12_CLKSEL_24M;
   break;
   }
 + clk_put(xusbxti_clk);
 + writel(phyclk, EXYNOS4_PHYCLK);
   }
 - clk_put(xusbxti_clk);
   }
 -
 - writel(phyclk, EXYNOS4_PHYCLK);
  }
 
  static int exynos4210_usb_phy0_init(struct platform_device *pdev)
 --
 1.7.4.1

Well, I think, following is enough?

And if you're ok on this, I will squash into your original one which is still 
in my tree.

diff --git a/arch/arm/mach-exynos/setup-usb-phy.c 
b/arch/arm/mach-exynos/setup-usb-phy.c
index d26deb7..3f82414 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -31,7 +31,6 @@ static void exynos4210_usb_phy_clkset(struct platform_device 
*pdev)
struct clk *xusbxti_clk;
u32 phyclk;
 
-
xusbxti_clk = clk_get(pdev-dev, xusbxti);
if (xusbxti_clk  !IS_ERR(xusbxti_clk)) {
if (soc_is_exynos4210()) {
@@ -78,9 +77,8 @@ static void exynos4210_usb_phy_clkset(struct platform_device 
*pdev)
}
}
clk_put(xusbxti_clk);
+   writel(phyclk, EXYNOS4_PHYCLK);
}
-
-   writel(phyclk, EXYNOS4_PHYCLK);
 }
 
 static int exynos4210_usb_phy0_init(struct platform_device *pdev)

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.


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RE: [PATCH] ARM: S3C64XX: Don't specify an irq_base for WM1192-EV1 board

[Kukjin Kim]

Mark Brown wrote:
 
 None of the GPIO IRQs are connected so there is no reason to specify a
 base.
 
 Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
 ---
  arch/arm/mach-s3c64xx/mach-smdk6410.c |1 -
  1 file changed, 1 deletion(-)
 
 diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-
 s3c64xx/mach-smdk6410.c
 index df3103d..0fe4f15 100644
 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
 +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
 @@ -566,7 +566,6 @@ static struct wm831x_status_pdata wm1192_led8_pdata =
 {
 
  static struct wm831x_pdata smdk6410_wm1192_pdata = {
   .pre_init = wm1192_pre_init,
 - .irq_base = IRQ_BOARD_START,
 
   .backlight = wm1192_backlight_pdata,
   .dcdc = {
 --
 1.7.10

Applied, thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH] ARM: EXYNOS: Make combiner_init function static

[Kukjin Kim]

Sachin Kamat wrote:
 
 Fixes the following warning:
 arch/arm/mach-exynos/common.c:543:13:
 warning: symbol 'combiner_init' was not declared. Should it be static?
 
 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 ---
  arch/arm/mach-exynos/common.c |3 ++-
  1 files changed, 2 insertions(+), 1 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
 index 0ec1a91..66d71ba 100644
 --- a/arch/arm/mach-exynos/common.c
 +++ b/arch/arm/mach-exynos/common.c
 @@ -540,7 +540,8 @@ static struct irq_domain_ops combiner_irq_domain_ops =
 {
   .map= combiner_irq_domain_map,
  };
 
 -void __init combiner_init(void __iomem *combiner_base, struct device_node
 *np)
 +static void __init combiner_init(void __iomem *combiner_base,
 + struct device_node *np)
  {
   int i, irq, irq_base;
   unsigned int max_nr, nr_irq;
 --
 1.7.4.1

OK, applied.
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH] ARM: Exynos: Add device tree node for Exynos4 interrupt combiner controller

[Kukjin Kim]

Thomas Abraham wrote:
 
 Add node for Exynos4 interrupt combiner controller.
 
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
 ---
  arch/arm/boot/dts/exynos4210.dtsi |   11 +++
  1 files changed, 11 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos4210.dtsi
 b/arch/arm/boot/dts/exynos4210.dtsi
 index a1dd2ee..0e4f659 100644
 --- a/arch/arm/boot/dts/exynos4210.dtsi
 +++ b/arch/arm/boot/dts/exynos4210.dtsi
 @@ -33,6 +33,17 @@
   reg = 0x1049 0x1000, 0x1048 0x100;
   };
 
 + combiner:interrupt-controller@1044 {
 + compatible = samsung,exynos4210-combiner;
 + interrupt-controller;
 + #interrupt-cells = 2;

How about changing above ordering like interrupt gic controller?

+   #interrupt-cells = 2;
+   interrupt-controller;

And, don't we need combiner-nr?
+   samsung,combiner-nr = 16;

 + reg = 0x1044 0x1000;
 + interrupts = 0 0 0, 0 1 0, 0 2 0, 0 3 0,
 +  0 4 0, 0 5 0, 0 6 0, 0 7 0,
 +  0 8 0, 0 9 0, 0 10 0, 0 11 0,
 +  0 12 0, 0 13 0, 0 14 0, 0 15 0;
 + };
 +
   watchdog@1006 {
   compatible = samsung,s3c2410-wdt;
   reg = 0x1006 0x100;
 --
 1.6.6.rc2

Others, looks good to me.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH 1/1] ARM: EXYNOS: Add missing static storage class specifier in pmu.c file

[Kukjin Kim]

Sachin Kamat wrote:
 
 arch/arm/mach-exynos/pmu.c:318:14: warning:
 symbol 'exynos5_list_both_cnt_feed' was not declared. Should it be static?
 arch/arm/mach-exynos/pmu.c:332:14: warning:
 symbol 'exynos5_list_diable_wfi_wfe' was not declared. Should it be
static?
 
 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 ---
  arch/arm/mach-exynos/pmu.c |4 ++--
  1 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
 index bb4c522..3a48c85 100644
 --- a/arch/arm/mach-exynos/pmu.c
 +++ b/arch/arm/mach-exynos/pmu.c
 @@ -315,7 +315,7 @@ static struct exynos_pmu_conf exynos5250_pmu_config[]
 = {
   { PMU_TABLE_END,},
  };
 
 -void __iomem *exynos5_list_both_cnt_feed[] = {
 +static void __iomem *exynos5_list_both_cnt_feed[] = {
   EXYNOS5_ARM_CORE0_OPTION,
   EXYNOS5_ARM_CORE1_OPTION,
   EXYNOS5_ARM_COMMON_OPTION,
 @@ -329,7 +329,7 @@ void __iomem *exynos5_list_both_cnt_feed[] = {
   EXYNOS5_TOP_PWR_SYSMEM_OPTION,
  };
 
 -void __iomem *exynos5_list_diable_wfi_wfe[] = {
 +static void __iomem *exynos5_list_diable_wfi_wfe[] = {
   EXYNOS5_ARM_CORE1_OPTION,
   EXYNOS5_FSYS_ARM_OPTION,
   EXYNOS5_ISP_ARM_OPTION,
 --
 1.7.4.1

OK, applied.
Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH 0/2] Exynos4: power domain fixes for v3.5-rc

[Kukjin Kim]

Marek Szyprowski wrote:
 
 Hello,
 
 This is a resend of my power domain fixes for Samsung Exynos platform.
 They fix issues introduced by switching to gen_pd based driver in commit
 91cfbd4ee0 ('ARM: EXYNOS: Hook up power domains to generic power domain
 infrastructure') and restore runtime pm functionality for multimedia
 drivers (s5p-fimc, s5p-mfc, s5p-tv, exynos-drm). Tested on Universal
 C210 and NURI boards, but the issues were also reported for Origen
 boards and others. If possible, please consider these patches as fixes
 (runtime pm is broken without them) and merge to v3.5-rc line.
 
 Best regards
 Marek Szyprowski
 Samsung Poland RD Center
 
 
 Patch summary:
 
 Marek Szyprowski (2):
   ARM: Exynos4: read initial state of power domain from hw registers
   ARM: Exynos4: pm_domains: register devices in 'need_restore' state
 
  arch/arm/mach-exynos/pm_domains.c |   13 +
  1 files changed, 9 insertions(+), 4 deletions(-)
 
 --
 1.7.1.569.g6f426

OK, applied this series in my -fixes.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH v5 0/6] spi: s3c64xx: add support for device tree

[Kukjin Kim]

Thomas Abraham wrote:
 
 On 11 July 2012 23:19, Mark Brown broo...@opensource.wolfsonmicro.com
 wrote:
  On Wed, Jul 11, 2012 at 09:10:59PM +0530, Thomas Abraham wrote:
  Changes since v4:
  - Includes the missing gpio request for slave select line gpio as
 suggested
by Mark Brown.
 
  These looked OK (and have had quite a bit of review already so we're
  probably at the stage where incremental fixes are better anyway) so I
  tried to apply them but git am was really unhappy.  I tried applying on
 
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc.git spi-
 next
 
  and -next.  Can you check what's going on here please?
 
Firstly, this patches look ok to me.

And Mark, this touches various samsung stuff in arch/arm/ so if you're ok,
I'd like to pick this up in samsung tree. We don't want to see conflicts...

 These patches were based on Samsung maintainer's for-next branch with
 Grant's spi/next branch merged. I will check with your spi-next
 branch. Thanks.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH 0/3] Add audio platform device to S5PV210 and Exynos4 boards

[Kukjin Kim]

Sachin Kamat wrote:
 
 The following patch added snd_soc_register_card() functionality
 instead of creating a soc-audio platform device in smdk_wm8994.c file.
 
 http://www.spinics.net/lists/linux-samsung-soc/msg11232.html
 
 After using snd_soc_register_card(), the sound card is registered as a
 platform driver and it needs related platform device entry in machine
file.
 
 Thus this patch series is dependent on the above patch.
 This series is based on Kukjin Kim's for-next branch.
 
 Sachin Kamat (3):
   ARM: EXYNOS: Add audio platform device in SMDKV310 board
   ARM: S5PV210: Add audio platform device in Aquila board
   ARM: S5PV210: Add audio platform device in Goni board
 
  arch/arm/mach-exynos/mach-smdkv310.c |7 +++
  arch/arm/mach-s5pv210/mach-aquila.c  |7 +++
  arch/arm/mach-s5pv210/mach-goni.c|7 +++
  3 files changed, 21 insertions(+), 0 deletions(-)
 
 --
 1.7.4.1

Looks ok, applied with Sangbeom's ack.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH] ARM: SAMSUNG: Update default rate for xusbxti clock

[Kukjin Kim]

Tushar Behera wrote:
 
 The rate of xusbxti clock is set in individual machine files. The default
 value should be defined at the clock definition and individual machine
 files
 should modify it if required.
 
 Division by zero in kernel.
 [c0011849] (unwind_backtrace+0x1/0x9c) from [c022c663]
(Ldiv0+0x9/0x12)
 [c022c663] (Ldiv0+0x9/0x12) from [c001a3c3]
 (s3c_setrate_clksrc+0x33/0x78)
 [c001a3c3] (s3c_setrate_clksrc+0x33/0x78) from [c0019e67]
 (clk_set_rate+0x2f/0x78)
 
 Signed-off-by: Tushar Behera tushar.beh...@linaro.org
 ---
 
 Patch is rebased on v3.5-rc3.
 
  arch/arm/plat-samsung/s5p-clock.c |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/plat-samsung/s5p-clock.c b/arch/arm/plat-
 samsung/s5p-clock.c
 index 031a618..48a1599 100644
 --- a/arch/arm/plat-samsung/s5p-clock.c
 +++ b/arch/arm/plat-samsung/s5p-clock.c
 @@ -37,6 +37,7 @@ struct clk clk_ext_xtal_mux = {
  struct clk clk_xusbxti = {
   .name   = xusbxti,
   .id = -1,
 + .rate   = 2400,
  };
 
  struct clk s5p_clk_27m = {
 --
 1.7.4.1

Looks OK, applied.

And I think we can add following with this.

From: Kukjin Kim kgene@samsung.com
Subject: [PATCH] ARM: SAMSUNG: no need to set the value for clk_xusbxti when
it is 24Mhz

Since clk_xusbxti.rate is 24Mhz as a default,
so we don't need to set that when it is 24Mhz.

Signed-off-by: Kukjin Kim kgene@samsung.com
---

diff --git a/arch/arm/mach-exynos/mach-nuri.c
b/arch/arm/mach-exynos/mach-nuri.c
index f3b328d..f98a83a 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -1341,9 +1341,8 @@ static struct platform_device *nuri_devices[]
__initdata = {
 
 static void __init nuri_map_io(void)
 {
-   clk_xusbxti.rate = 2400;
exynos_init_io(NULL, 0);
-   s3c24xx_init_clocks(2400);
+   s3c24xx_init_clocks(clk_xusbxti.rate);
s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
 }
 
diff --git a/arch/arm/mach-exynos/mach-origen.c
b/arch/arm/mach-exynos/mach-origen.c
index 580cc77..5f3daa2 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -716,7 +716,7 @@ static void s5p_tv_setup(void)
 static void __init origen_map_io(void)
 {
exynos_init_io(NULL, 0);
-   s3c24xx_init_clocks(2400);
+   s3c24xx_init_clocks(clk_xusbxti.rate);
s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
 }
 
@@ -749,7 +749,6 @@ static void __init origen_machine_init(void)
origen_ehci_init();
origen_ohci_init();
s3c_hsotg_set_platdata(origen_hsotg_pdata);
-   clk_xusbxti.rate = 2400;
 
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c
b/arch/arm/mach-exynos/mach-smdk4x12.c
index e134c95..b3753a8 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -258,8 +258,6 @@ static struct platform_device *smdk4x12_devices[]
__initdata = {
 
 static void __init smdk4x12_map_io(void)
 {
-   clk_xusbxti.rate = 2400;
-
exynos_init_io(NULL, 0);
s3c24xx_init_clocks(clk_xusbxti.rate);
s3c24xx_init_uarts(smdk4x12_uartcfgs,
ARRAY_SIZE(smdk4x12_uartcfgs));
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c
b/arch/arm/mach-exynos/mach-smdkv310.c
index 9b7c878..4feed55 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -365,7 +365,7 @@ static void s5p_tv_setup(void)
 static void __init smdkv310_map_io(void)
 {
exynos_init_io(NULL, 0);
-   s3c24xx_init_clocks(2400);
+   s3c24xx_init_clocks(clk_xusbxti.rate);
s3c24xx_init_uarts(smdkv310_uartcfgs,
ARRAY_SIZE(smdkv310_uartcfgs));
 }
 
@@ -402,7 +402,6 @@ static void __init smdkv310_machine_init(void)
smdkv310_ehci_init();
smdkv310_ohci_init();
s3c_hsotg_set_platdata(smdkv310_hsotg_pdata);
-   clk_xusbxti.rate = 2400;
 
platform_add_devices(smdkv310_devices,
ARRAY_SIZE(smdkv310_devices));
 }
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c
b/arch/arm/mach-exynos/mach-universal_c210.c
index 68719f5..4d1f40d 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -1099,9 +1099,8 @@ static struct platform_device *universal_devices[]
__initdata = {
 
 static void __init universal_map_io(void)
 {
-   clk_xusbxti.rate = 2400;
exynos_init_io(NULL, 0);
-   s3c24xx_init_clocks(2400);
+   s3c24xx_init_clocks(clk_xusbxti.rate);
s3c24xx_init_uarts(universal_uartcfgs,
ARRAY_SIZE(universal_uartcfgs));
s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 }
diff --git a/arch/arm/mach-s5pv210/mach-goni.c
b/arch/arm/mach-s5pv210/mach-goni.c
index b2cae13..822a559 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -908,7 +908,7 @@ static void __init goni_sound_init(void)
 

RE: [PATCH] ARM: SAMSUNG: Introduce Kconfig variable for Samsung custom clk API

[Kukjin Kim]

Heiko Stübner wrote:
 
 Am Mittwoch, 4. Juli 2012, 18:07:24 schrieb Mark Brown:
  Make it easier to switch to the common clock API by making the existing
  clock API implementation depend on a Kconfig symbol which is enabled
 when
  the common clock API is disabled. This means that we can have some SoCs
  using the common clock API and some using the existing API rather than
  needing a flag day to convert the entire family of devices over.
 nice idea.
 
Yes, I think so.

  Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
 Acked-by: Heiko Stuebner he...@sntech.de
 
Applied.

And, I think, need to sort out the SAMSUNG_CLKSRC next time :)

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.


 
  ---
   arch/arm/plat-samsung/Kconfig  |4 
   arch/arm/plat-samsung/Makefile |4 ++--
   2 files changed, 6 insertions(+), 2 deletions(-)
 
  diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-
 samsung/Kconfig
  index ffc84ac..7aca31c 100644
  --- a/arch/arm/plat-samsung/Kconfig
  +++ b/arch/arm/plat-samsung/Kconfig
  @@ -78,6 +78,10 @@ config S5P_HRT
 
   # clock options
 
  +config SAMSUNG_CLOCK
  +   bool
  +   default y if !COMMON_CLK
  +
   config SAMSUNG_CLKSRC
  bool
  help
  diff --git a/arch/arm/plat-samsung/Makefile
  b/arch/arm/plat-samsung/Makefile index 856f4ee..9e40e8d 100644
  --- a/arch/arm/plat-samsung/Makefile
  +++ b/arch/arm/plat-samsung/Makefile
  @@ -15,8 +15,8 @@ obj-y += init.o cpu.o
   obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET)   += time.o
   obj-$(CONFIG_S5P_HRT)  += s5p-time.o
 
  -obj-y  += clock.o
  -obj-y  += pwm-clock.o
  +obj-$(CONFIG_SAMSUNG_CLOCK)+= clock.o
  +obj-$(CONFIG_SAMSUNG_CLOCK)+= pwm-clock.o
 
   obj-$(CONFIG_SAMSUNG_CLKSRC)   += clock-clksrc.o
   obj-$(CONFIG_S5P_CLOCK)+= s5p-clock.o

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[PATCH 0/2] ARM: exynos: Enable TMU support in exynos platforms

[Amit Daniel Kachhap]

These TMU enablement patches are needed for exynos4 and exynos5 TMU
driver patches sent earlier. The link for those are 
http://www.spinics.net/lists/lm-sensors/msg35858.html.

Also patch 1 depends on combiner dt node patch sent by Thomas Abraham.
(http://www.spinics.net/lists/arm-kernel/msg184129.html)

This patchset is based Samsung Maintainer's tree,
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git for-next

Amit Daniel Kachhap (2):
  ARM: exynos4: Add devicetree node for TMU driver
  ARM: exynos5: Add devicetree node for TMU driver

 arch/arm/boot/dts/exynos4210.dtsi|7 +++
 arch/arm/boot/dts/exynos5250.dtsi|6 ++
 arch/arm/mach-exynos/clock-exynos4.c |5 +
 arch/arm/mach-exynos/clock-exynos5.c |5 +
 arch/arm/mach-exynos/include/mach/irqs.h |3 +++
 arch/arm/mach-exynos/include/mach/map.h  |3 +++
 arch/arm/mach-exynos/mach-exynos4-dt.c   |2 ++
 arch/arm/mach-exynos/mach-exynos5-dt.c   |2 ++
 8 files changed, 33 insertions(+), 0 deletions(-)

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[PATCH 1/2] ARM: exynos4: Add devicetree node for TMU driver

[Amit Daniel Kachhap]

This patch adds necessary source definations needed for TMU driver and
adds devicetree for exynos4.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/boot/dts/exynos4210.dtsi|7 +++
 arch/arm/mach-exynos/clock-exynos4.c |5 +
 arch/arm/mach-exynos/include/mach/irqs.h |3 +++
 arch/arm/mach-exynos/include/mach/map.h  |2 ++
 arch/arm/mach-exynos/mach-exynos4-dt.c   |2 ++
 5 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index 0e4f659..7230f59 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -158,6 +158,13 @@
interrupts = 0 65 0;
};
 
+   tmu@100C {
+   compatible = samsung,exynos4-tmu;
+   interrupt-parent = combiner;
+   reg = 0x100C 0x100;
+   interrupts = 2 4;
+   };
+
amba {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/arm/mach-exynos/clock-exynos4.c 
b/arch/arm/mach-exynos/clock-exynos4.c
index bcb7db4..1dc8606 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -564,6 +564,11 @@ static struct clk exynos4_init_clocks_off[] = {
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit= (1  15),
}, {
+   .name   = tmu_apbif,
+   .enable = exynos4_clk_ip_perir_ctrl,
+   .ctrlbit= (1  17),
+   }, {
+
.name   = keypad,
.enable = exynos4_clk_ip_perir_ctrl,
.ctrlbit= (1  16),
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h 
b/arch/arm/mach-exynos/include/mach/irqs.h
index 7a4b478..f4d7bba 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -136,6 +136,9 @@
 #define EXYNOS4_IRQ_TSIIRQ_SPI(115)
 #define EXYNOS4_IRQ_SATA   IRQ_SPI(116)
 
+#define EXYNOS4_IRQ_TMU_TRIG0  COMBINER_IRQ(2, 4)
+#define EXYNOS4_IRQ_TMU_TRIG1  COMBINER_IRQ(3, 4)
+
 #define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
 #define EXYNOS4_IRQ_SYSMMU_SSS_0   COMBINER_IRQ(4, 1)
 #define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index ca4aa89..c23d1c2 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -88,6 +88,8 @@
 #define EXYNOS4_PA_TWD 0x10500600
 #define EXYNOS4_PA_L2CC0x10502000
 
+#define EXYNOS4_PA_TMU 0x100C
+
 #define EXYNOS4_PA_MDMA0   0x1081
 #define EXYNOS4_PA_MDMA1   0x1284
 #define EXYNOS4_PA_PDMA0   0x1268
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c 
b/arch/arm/mach-exynos/mach-exynos4-dt.c
index e7e9743..1e751f0 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -57,6 +57,8 @@ static const struct of_dev_auxdata 
exynos4210_auxdata_lookup[] __initconst = {
s3c2440-i2c.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_PDMA0, dma-pl330.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS4_PA_PDMA1, dma-pl330.1, NULL),
+   OF_DEV_AUXDATA(samsung,exynos4-tmu, EXYNOS4_PA_TMU,
+   exynos-tmu, NULL),
{},
 };
 
-- 
1.7.1

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[PATCH 2/2] ARM: exynos5: Add devicetree node for TMU driver

[Amit Daniel Kachhap]

This patch adds necessary source definations needed for TMU driver and
adds devicetree for exynos5.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/boot/dts/exynos5250.dtsi   |6 ++
 arch/arm/mach-exynos/clock-exynos5.c|5 +
 arch/arm/mach-exynos/include/mach/map.h |1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c  |2 ++
 4 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 4272b29..9a9df51 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -58,6 +58,12 @@
interrupts = 0 43 0, 0 44 0;
};
 
+   tmu@1006 {
+   compatible = samsung,exynos5-tmu;
+   reg = 0x1006 0x100;
+   interrupts = 0 65 0;
+   };
+
serial@12C0 {
compatible = samsung,exynos4210-uart;
reg = 0x12C0 0x100;
diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
b/arch/arm/mach-exynos/clock-exynos5.c
index fefa336..30798da 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -554,6 +554,11 @@ static struct clk exynos5_init_clocks_off[] = {
.enable = exynos5_clk_ip_peric_ctrl,
.ctrlbit= (1  24),
}, {
+   .name   = tmu_apbif,
+   .parent = exynos5_clk_aclk_66.clk,
+   .enable = exynos5_clk_ip_peris_ctrl,
+   .ctrlbit= (1  21),
+   }, {
.name   = rtc,
.parent = exynos5_clk_aclk_66.clk,
.enable = exynos5_clk_ip_peris_ctrl,
diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index c23d1c2..4a94752 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -89,6 +89,7 @@
 #define EXYNOS4_PA_L2CC0x10502000
 
 #define EXYNOS4_PA_TMU 0x100C
+#define EXYNOS5_PA_TMU 0x1006
 
 #define EXYNOS4_PA_MDMA0   0x1081
 #define EXYNOS4_PA_MDMA1   0x1284
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 7b1e11a..55f0ad8 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -50,6 +50,8 @@ static const struct of_dev_auxdata 
exynos5250_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA0, dma-pl330.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA1, dma-pl330.1, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_MDMA1, dma-pl330.2, NULL),
+   OF_DEV_AUXDATA(samsung,exynos5-tmu, EXYNOS5_PA_TMU,
+   exynos-tmu, NULL),
{},
 };
 
-- 
1.7.1

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RE: [PATCH 00/10] ARM: S3C24XX gpio cleanups and fixes

[Kukjin Kim]

Sylwester Nawrocki wrote:
 
 This changset attempts to remove the users of an obsolete GPIO API in
 Samsung S3C24XX platform and instead use the gpiolib API. It should
 allow to drop some s3c24xx SoC specific headers as a next step and
 simplify drivers/gpio/gpio-samsung.c driver a little. With the
 introduction of the pinctrl GPIO driver we're going to have three
 distinct GPIO APIs. Let's avoid this and drop the s3c24xx_gpio_*
 functions, which have been scheduled for removal since about v2.6.35.
 
 Additionally this changeset includes two minor fixes, for AC97 clock
 and CAMIF interrupts.
 
 
 Sylwester Nawrocki (10):
   ARM: S3C24XX: Free the backlight gpio requested in Mini2440 board code
   ARM: S3C24XX: Convert SMDK board file to the gpiolib API
   ARM: S3C24XX: Convert QT2410 board file to the gpiolib API
   ARM: S3C24XX: Convert the PM code to gpiolib API
   ARM: S3C24XX: Convert the touchscreen setup code to common GPIO API
   ARM: S3C24XX: Remove unused GPA, GPE, GPH bank GPIO aliases
   ARM: S3C24XX: Remove unused GPIO definitions for port J
   ARM: S3C24XX: Remove unused GPIO definitions for Openmoko GTA02 board
   ARM: S3C24XX: Correct AC97 clock control bit for S3C2440
   ARM: S3C24XX: Correct CAMIF interrupt definitions
 
  arch/arm/mach-s3c24xx/clock-s3c2440.c   |2 +-
  arch/arm/mach-s3c24xx/common-smdk.c |   20 ---
  arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h   |   21 ---
  arch/arm/mach-s3c24xx/include/mach/gta02.h  |   69

 --
  arch/arm/mach-s3c24xx/include/mach/regs-gpio.h  |   17 +-
  arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h |   70
---
 
  arch/arm/mach-s3c24xx/mach-gta02.c  |1 -
  arch/arm/mach-s3c24xx/mach-mini2440.c   |4 +-
  arch/arm/mach-s3c24xx/mach-qt2410.c |6 +-
  arch/arm/mach-s3c24xx/mach-rx1950.c |1 -
  arch/arm/mach-s3c24xx/pm-s3c2410.c  |   12 +++-
  arch/arm/mach-s3c24xx/pm-s3c2412.c  |1 -
  arch/arm/mach-s3c24xx/s3c2412.c |1 -
  arch/arm/mach-s3c24xx/s3c244x.c |1 -
  arch/arm/mach-s3c24xx/setup-ts.c|6 +--
  arch/arm/plat-samsung/devs.c|3 +-
  16 files changed, 43 insertions(+), 192 deletions(-)
  delete mode 100644 arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h
 
 --
 1.7.4.1

Basically, looks ok to me :)

I need to check in detail then will apply this series with some guys' ack.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [PATCH 1/1] ARM: EXYNOS: Fix compilation warning in setup-usb-phy.c file

[Sachin Kamat]

On 12/07/2012, Kukjin Kim kgene@samsung.com wrote:
 Sachin Kamat wrote:

 Fixes the following warning:
 arch/arm/mach-exynos/setup-usb-phy.c: In function
 ‘exynos4210_usb_phy_clkset’:
 arch/arm/mach-exynos/setup-usb-phy.c:83:2:
 warning: ‘phyclk’ may be used uninitialized in this function [-
 Wuninitialized]

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 ---
  arch/arm/mach-exynos/setup-usb-phy.c |8 
  1 files changed, 4 insertions(+), 4 deletions(-)

 diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-
 exynos/setup-usb-phy.c
 index d26deb7..1eaa0b0 100644
 --- a/arch/arm/mach-exynos/setup-usb-phy.c
 +++ b/arch/arm/mach-exynos/setup-usb-phy.c
 @@ -31,7 +31,6 @@ static void exynos4210_usb_phy_clkset(struct
 platform_device *pdev)
  struct clk *xusbxti_clk;
  u32 phyclk;

 -
  xusbxti_clk = clk_get(pdev-dev, xusbxti);
  if (xusbxti_clk  !IS_ERR(xusbxti_clk)) {
  if (soc_is_exynos4210()) {
 @@ -50,6 +49,8 @@ static void exynos4210_usb_phy_clkset(struct
 platform_device *pdev)
  phyclk |= EXYNOS4210_CLKSEL_48M;
  break;
  }
 +clk_put(xusbxti_clk);
 +writel(phyclk, EXYNOS4_PHYCLK);
  } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
  /* set clock frequency for PLL */
  phyclk = readl(EXYNOS4_PHYCLK) 
 ~EXYNOS4X12_CLKSEL_MASK;
 @@ -76,11 +77,10 @@ static void exynos4210_usb_phy_clkset(struct
 platform_device *pdev)
  phyclk |= EXYNOS4X12_CLKSEL_24M;
  break;
  }
 +clk_put(xusbxti_clk);
 +writel(phyclk, EXYNOS4_PHYCLK);
  }
 -clk_put(xusbxti_clk);
  }
 -
 -writel(phyclk, EXYNOS4_PHYCLK);
  }

  static int exynos4210_usb_phy0_init(struct platform_device *pdev)
 --
 1.7.4.1

 Well, I think, following is enough?
No. That will still give the same warning if none of the cases are true.


 And if you're ok on this, I will squash into your original one which is
 still in my tree.

OK.


 diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
 b/arch/arm/mach-exynos/setup-usb-phy.c
 index d26deb7..3f82414 100644
 --- a/arch/arm/mach-exynos/setup-usb-phy.c
 +++ b/arch/arm/mach-exynos/setup-usb-phy.c
 @@ -31,7 +31,6 @@ static void exynos4210_usb_phy_clkset(struct
 platform_device *pdev)
   struct clk *xusbxti_clk;
   u32 phyclk;

 -
   xusbxti_clk = clk_get(pdev-dev, xusbxti);
   if (xusbxti_clk  !IS_ERR(xusbxti_clk)) {
   if (soc_is_exynos4210()) {
 @@ -78,9 +77,8 @@ static void exynos4210_usb_phy_clkset(struct
 platform_device *pdev)
   }
   }
   clk_put(xusbxti_clk);
 + writel(phyclk, EXYNOS4_PHYCLK);
   }
 -
 - writel(phyclk, EXYNOS4_PHYCLK);
  }

  static int exynos4210_usb_phy0_init(struct platform_device *pdev)

 Thanks.

 Best regards,
 Kgene.
 --
 Kukjin Kim kgene@samsung.com, Senior Engineer,
 SW Solution Development Team, Samsung Electronics Co., Ltd.


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-- 
With warm regards,
Sachin
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RE: [PATCH 1/1] ARM: EXYNOS: Fix compilation warning in setup-usb-phy.c file

[Kukjin Kim]

 -Original Message-
 From: Sachin Kamat [mailto:sachin.ka...@linaro.org]
 Sent: Thursday, July 12, 2012 6:22 PM
 To: Kukjin Kim
 Cc: linux-samsung-soc@vger.kernel.org; a...@arndb.de; patc...@linaro.org
 Subject: Re: [PATCH 1/1] ARM: EXYNOS: Fix compilation warning in setup-
 usb-phy.c file
 
 On 12/07/2012, Kukjin Kim kgene@samsung.com wrote:
  Sachin Kamat wrote:
 
  Fixes the following warning:
  arch/arm/mach-exynos/setup-usb-phy.c: In function
  'exynos4210_usb_phy_clkset':
  arch/arm/mach-exynos/setup-usb-phy.c:83:2:
  warning: 'phyclk' may be used uninitialized in this function [-
  Wuninitialized]
 
  Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
  ---
   arch/arm/mach-exynos/setup-usb-phy.c |8 
   1 files changed, 4 insertions(+), 4 deletions(-)
 
  diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-
  exynos/setup-usb-phy.c
  index d26deb7..1eaa0b0 100644
  --- a/arch/arm/mach-exynos/setup-usb-phy.c
  +++ b/arch/arm/mach-exynos/setup-usb-phy.c
  @@ -31,7 +31,6 @@ static void exynos4210_usb_phy_clkset(struct
  platform_device *pdev)
 struct clk *xusbxti_clk;
 u32 phyclk;
 
  -
 xusbxti_clk = clk_get(pdev-dev, xusbxti);
 if (xusbxti_clk  !IS_ERR(xusbxti_clk)) {
 if (soc_is_exynos4210()) {
  @@ -50,6 +49,8 @@ static void exynos4210_usb_phy_clkset(struct
  platform_device *pdev)
 phyclk |= EXYNOS4210_CLKSEL_48M;
 break;
 }
  +  clk_put(xusbxti_clk);
  +  writel(phyclk, EXYNOS4_PHYCLK);
 } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
 /* set clock frequency for PLL */
 phyclk = readl(EXYNOS4_PHYCLK) 
  ~EXYNOS4X12_CLKSEL_MASK;
  @@ -76,11 +77,10 @@ static void exynos4210_usb_phy_clkset(struct
  platform_device *pdev)
 phyclk |= EXYNOS4X12_CLKSEL_24M;
 break;
 }
  +  clk_put(xusbxti_clk);
  +  writel(phyclk, EXYNOS4_PHYCLK);
 }
  -  clk_put(xusbxti_clk);
 }
  -
  -  writel(phyclk, EXYNOS4_PHYCLK);
   }
 
   static int exynos4210_usb_phy0_init(struct platform_device *pdev)
  --
  1.7.4.1
 
  Well, I think, following is enough?
 No. That will still give the same warning if none of the cases are true.
 
Oops, yeah I missed :(

Yeah, the writing should being inside of 'if' and 'else if' which phyclk is
read.

OK.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

 
  And if you're ok on this, I will squash into your original one which is
  still in my tree.
 
 OK.
 
 
  diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
  b/arch/arm/mach-exynos/setup-usb-phy.c
  index d26deb7..3f82414 100644
  --- a/arch/arm/mach-exynos/setup-usb-phy.c
  +++ b/arch/arm/mach-exynos/setup-usb-phy.c
  @@ -31,7 +31,6 @@ static void exynos4210_usb_phy_clkset(struct
  platform_device *pdev)
  struct clk *xusbxti_clk;
  u32 phyclk;
 
  -
  xusbxti_clk = clk_get(pdev-dev, xusbxti);
  if (xusbxti_clk  !IS_ERR(xusbxti_clk)) {
  if (soc_is_exynos4210()) {
  @@ -78,9 +77,8 @@ static void exynos4210_usb_phy_clkset(struct
  platform_device *pdev)
  }
  }
  clk_put(xusbxti_clk);
  +   writel(phyclk, EXYNOS4_PHYCLK);
  }
  -
  -   writel(phyclk, EXYNOS4_PHYCLK);
   }
 
   static int exynos4210_usb_phy0_init(struct platform_device *pdev)
 
  Thanks.
 
  Best regards,
  Kgene.
  --
  Kukjin Kim kgene@samsung.com, Senior Engineer,
  SW Solution Development Team, Samsung Electronics Co., Ltd.
 
 
  --
  To unsubscribe from this list: send the line unsubscribe linux-samsung-
 soc
  in
  the body of a message to majord...@vger.kernel.org
  More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
 
 
 --
 With warm regards,
 Sachin

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[PATCH v3 0/6] mmc: dw_mmc: add support for device tree based instantiation

[Thomas Abraham]

This patch series adds device tree support for Synopsis Designware Mobile
Storage Host Controller.

The first patch converts the copy of controller device instance into a
reference. This is need to allow device resource management api to correctly
manage the resources allocated by the driver. The second patch fixes the
incorrect abort of the probe in case a slot initialization fails. This is
fixed by allowing as many slots to be initialized successfully and failing
only if there are no slots that were initialized.

The third patch adds clock lookup in the driver and this is optional. Platforms
that do not need any clock gating and control for the dw_mmc controllers will
not be affected with this change. The fourth patch adds a quirk to notify the
controller about the absence of the write protect line.

The fifth patch adds device tree based discovery support for the dw_mmc driver.
The sixth patch add Samsung Exynos5250 specific extentions to the driver.

This patchset is based on Samsung kernel tree's for-next branch with the
mmc tree's mmc-next branch merged.

Thomas Abraham (6):
  mmc: dw_mmc: convert copy of struct device in struct dw_mci to a reference
  mmc: dw_mmc: allow probe to succeed even if one slot is initialized
  mmc: dw_mmc: lookup for optional biu and ciu clocks
  mmc: dw_mmc: add quirk to indicate missing write protect line
  mmc: dw_mmc: add device tree support
  mmc: dw_mmc: add samsung exynos5250 specific extentions

 .../devicetree/bindings/mmc/synposis-dw-mshc.txt   |  144 
 drivers/mmc/host/dw_mmc-pci.c  |2 +-
 drivers/mmc/host/dw_mmc-pltfm.c|   41 +++-
 drivers/mmc/host/dw_mmc.c  |  364 +---
 drivers/mmc/host/dw_mmc.h  |   23 ++
 include/linux/mmc/dw_mmc.h |   17 +-
 6 files changed, 538 insertions(+), 53 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt

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[PATCH v3 1/6] mmc: dw_mmc: convert copy of struct device in struct dw_mci to a reference

[Thomas Abraham]

The 'struct dw_mci' maintains a copy of the pdev-dev instance instead of
maintaining a reference to that 'struct device' instance. Any resource
allocated using the device resource management kernel API with the instance
of 'struct device' in 'struct dw_mci' is then incorrect. Fix this by
converting the copy of 'struct device' in 'struct dw_mci' to a reference.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 drivers/mmc/host/dw_mmc-pci.c   |2 +-
 drivers/mmc/host/dw_mmc-pltfm.c |2 +-
 drivers/mmc/host/dw_mmc.c   |   56 +++---
 include/linux/mmc/dw_mmc.h  |2 +-
 4 files changed, 31 insertions(+), 31 deletions(-)

diff --git a/drivers/mmc/host/dw_mmc-pci.c b/drivers/mmc/host/dw_mmc-pci.c
index dc0d25a..592545a 100644
--- a/drivers/mmc/host/dw_mmc-pci.c
+++ b/drivers/mmc/host/dw_mmc-pci.c
@@ -59,7 +59,7 @@ static int __devinit dw_mci_pci_probe(struct pci_dev *pdev,
 
host-irq = pdev-irq;
host-irq_flags = IRQF_SHARED;
-   host-dev = pdev-dev;
+   host-dev = pdev-dev;
host-pdata = pci_board_data;
 
host-regs = pci_iomap(pdev, PCI_BAR_NO, COMPLETE_BAR);
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index 92ec3eb..9a63299 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -43,7 +43,7 @@ static int dw_mci_pltfm_probe(struct platform_device *pdev)
goto err_free;
}
 
-   host-dev = pdev-dev;
+   host-dev = pdev-dev;
host-irq_flags = 0;
host-pdata = pdev-dev.platform_data;
ret = -ENOMEM;
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 72dc3cd..948a7ac 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -266,7 +266,7 @@ static void dw_mci_start_command(struct dw_mci *host,
 struct mmc_command *cmd, u32 cmd_flags)
 {
host-cmd = cmd;
-   dev_vdbg(host-dev,
+   dev_vdbg(host-dev,
 start command: ARGR=0x%08x CMDR=0x%08x\n,
 cmd-arg, cmd_flags);
 
@@ -308,7 +308,7 @@ static void dw_mci_dma_cleanup(struct dw_mci *host)
 
if (data)
if (!data-host_cookie)
-   dma_unmap_sg(host-dev,
+   dma_unmap_sg(host-dev,
 data-sg,
 data-sg_len,
 dw_mci_get_dma_dir(data));
@@ -334,7 +334,7 @@ static void dw_mci_idmac_complete_dma(struct dw_mci *host)
 {
struct mmc_data *data = host-data;
 
-   dev_vdbg(host-dev, DMA complete\n);
+   dev_vdbg(host-dev, DMA complete\n);
 
host-dma_ops-cleanup(host);
 
@@ -414,13 +414,13 @@ static int dw_mci_idmac_init(struct dw_mci *host)
dma_support = (mci_readl(host, HCON)  16)  0x3;
 
if (!dma_support || dma_support  2) {
-   dev_err(host-dev,
+   dev_err(host-dev,
Host Controller does not support IDMA Tx.\n);
host-dma_ops = NULL;
return -ENODEV;
}
 
-   dev_info(host-dev, Using internal DMA controller.\n);
+   dev_info(host-dev, Using internal DMA controller.\n);
 
/* Forward link the descriptor list */
for (i = 0, p = host-sg_cpu; i  host-ring_size - 1; i++, p++)
@@ -476,7 +476,7 @@ static int dw_mci_pre_dma_transfer(struct dw_mci *host,
return -EINVAL;
}
 
-   sg_len = dma_map_sg(host-dev,
+   sg_len = dma_map_sg(host-dev,
data-sg,
data-sg_len,
dw_mci_get_dma_dir(data));
@@ -519,7 +519,7 @@ static void dw_mci_post_req(struct mmc_host *mmc,
return;
 
if (data-host_cookie)
-   dma_unmap_sg(slot-host-dev,
+   dma_unmap_sg(slot-host-dev,
 data-sg,
 data-sg_len,
 dw_mci_get_dma_dir(data));
@@ -545,7 +545,7 @@ static int dw_mci_submit_data_dma(struct dw_mci *host, 
struct mmc_data *data)
 
host-using_dma = 1;
 
-   dev_vdbg(host-dev,
+   dev_vdbg(host-dev,
 sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n,
 (unsigned long)host-sg_cpu, (unsigned long)host-sg_dma,
 sg_len);
@@ -904,12 +904,12 @@ static void dw_mci_request_end(struct dw_mci *host, 
struct mmc_request *mrq)
slot = list_entry(host-queue.next,
  struct dw_mci_slot, queue_node);
list_del(slot-queue_node);
-   dev_vdbg(host-dev, list not empty: %s is next\n,
+   dev_vdbg(host-dev, list not empty: %s is next\n,
 mmc_hostname(slot-mmc));
host-state = STATE_SENDING_CMD;
dw_mci_start_request(host, slot);
} else {
-   

[PATCH v3 4/6] mmc: dw_mmc: add quirk to indicate missing write protect line

[Thomas Abraham]

If the write protect pad of the controller is not connected to the write
protect pin of the slot, the driver should be notified of this condition
so that incorrect check for write protection by reading the WRTORT
register can avoided. The get_ro platform callback can be used for in
such cases, but with device tree support enabled, such platform callbacks
cannot be supported.

Add a new quirk for notifying the driver about the missing write protect
line so the driver can assume that the card write protection is disabled.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Will Newton will.new...@imgtec.com
---
 drivers/mmc/host/dw_mmc.c  |4 +++-
 include/linux/mmc/dw_mmc.h |3 ++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 679473c..075f89d 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -827,7 +827,9 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
struct dw_mci_board *brd = slot-host-pdata;
 
/* Use platform get_ro function, else try on board write protect */
-   if (brd-get_ro)
+   if (brd-quirks  DW_MCI_QUIRK_NO_WRITE_PROTECT)
+   read_only = 0;
+   else if (brd-get_ro)
read_only = brd-get_ro(slot-id);
else
read_only =
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 787ad56..b72e4aa 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -205,7 +205,8 @@ struct dw_mci_dma_ops {
 #define DW_MCI_QUIRK_HIGHSPEED BIT(2)
 /* Unreliable card detection */
 #define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
-
+/* Write Protect detection not available */
+#define DW_MCI_QUIRK_NO_WRITE_PROTECT  BIT(4)
 
 struct dma_pdata;
 
-- 
1.6.6.rc2

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[PATCH v3 6/6] mmc: dw_mmc: add samsung exynos5250 specific extentions

[Thomas Abraham]

The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase shift timing
and CIU internal divider. In addition to that, the option to skip the
command hold stage is also introduced. Add support for these Exynos5250
specfic extenstions.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 .../devicetree/bindings/mmc/synposis-dw-mshc.txt   |   38 ++-
 drivers/mmc/host/dw_mmc-pltfm.c|   15 +++
 drivers/mmc/host/dw_mmc.c  |   40 +++-
 drivers/mmc/host/dw_mmc.h  |   14 +++
 include/linux/mmc/dw_mmc.h |6 +++
 5 files changed, 110 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
index 3acd6c9..69d78c1 100644
--- a/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
@@ -7,6 +7,8 @@ Required Properties:
 
 * compatible: should be one of the following
- snps,dw-mshc: for controllers compliant with synopsis dw-mshc.
+   - samsung,exynos5250-dw-mshc: for controllers with Samsung
+ Exynos5250 specific extentions.
 
 * reg: physical base address of the dw-mshc controller and size of its memory
   region.
@@ -74,13 +76,45 @@ Aliases:
   the following format 'mshc{n}' where n is a unique number for the alias.
 
 
+Samsung Exynos4/5 specific properties:
+
+Some of the variants of Exynos4 (such as Exynos4412) and Exynos5 SoC's
+includes few extensions to the Synopsis Designware Mobile Storage Host
+Controller. The following properties are used to describe those extensions.
+
+* samsung,dw-mshc-sdr-timing: Specifies the value of CUI clock divider, CIU
+  clock phase shift value in transmit mode and CIU clock phase shift value in
+  receive mode for single data rate mode operation. Refer notes of the valid
+  values below.
+
+* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock divider, CIU
+  clock phase shift value in transmit mode and CIU clock phase shift value in
+  receive mode for double data rate mode operation. Refer notes of the valid
+  values below. The order of the cells should be
+
+- First Cell:  CIU clock divider value (applicable only for Exynos5
+   SoC's, should be zero for Exynos4 SoC's)
+- Second Cell: CIU clock phase shift value for tx mode.
+- Third Cell:  CIU clock phase shift value for rx mode.
+
+  Valid values for SDR and DDR CIU clock timing for Exynos5250:
+
+- valid values for CIU clock divider, tx phase shift and rx phase shift
+  is 0 to 7.
+
+- When CIU clock divider value is set to 3, all possible 8 phase shift
+  values can be used.
+
+- If CIU clock divider value is 0 (that is divide by 1), both tx and rx
+  phase shift clocks should be 0.
+
 Example:
 
   The MSHC controller node can be split into two portions, SoC specific and
   board specific portions as listed below.
 
dwmmc0@1220 {
-   compatible = snps,dw-mshc;
+   compatible = samsung,exynos5250-dw-mshc;
reg = 0x1220 0x1000;
interrupts = 0 75 0;
#address-cells = 1;
@@ -94,6 +128,8 @@ Example:
no-write-protect;
fifo-depth = 0x80;
card-detect-delay = 200;
+   samsung,dw-mshc-sdr-timing = 2 3 3;
+   samsung,dw-mshc-ddr-timing = 1 2 3;
 
slot@0 {
reg = 0;
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index 8d24f6d..900f412 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -27,9 +27,24 @@ static struct dw_mci_drv_data synopsis_drv_data = {
.ctrl_type  = DW_MCI_TYPE_SYNOPSIS,
 };
 
+static unsigned long exynos5250_dwmmc_caps[4] = {
+   MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR |
+   MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23,
+   MMC_CAP_CMD23,
+   MMC_CAP_CMD23,
+   MMC_CAP_CMD23,
+};
+
+static struct dw_mci_drv_data exynos5250_drv_data = {
+   .ctrl_type  = DW_MCI_TYPE_EXYNOS5250,
+   .caps   = exynos5250_dwmmc_caps,
+};
+
 static const struct of_device_id dw_mci_pltfm_match[] = {
{ .compatible = snps,dw-mshc,
.data = (void *)synopsis_drv_data, },
+   { .compatible = samsung,exynos5250-dw-mshc,
+   .data = (void *)exynos5250_drv_data, },
{},
 };
 MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 3bc276d..bbf1209 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -236,6 +236,7 @@ static void dw_mci_set_timeout(struct dw_mci *host)
 

[PATCH v3 5/6] mmc: dw_mmc: add device tree support

[Thomas Abraham]

Add device tree based discovery support.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 .../devicetree/bindings/mmc/synposis-dw-mshc.txt   |  108 +++
 drivers/mmc/host/dw_mmc-pltfm.c|   24 +++
 drivers/mmc/host/dw_mmc.c  |  201 +++-
 drivers/mmc/host/dw_mmc.h  |9 +
 include/linux/mmc/dw_mmc.h |2 +
 5 files changed, 338 insertions(+), 6 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt

diff --git a/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt 
b/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
new file mode 100644
index 000..3acd6c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/synposis-dw-mshc.txt
@@ -0,0 +1,108 @@
+* Synopsis Designware Mobile Storage Host Controller
+
+The Synopsis designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards.
+
+Required Properties:
+
+* compatible: should be one of the following
+   - snps,dw-mshc: for controllers compliant with synopsis dw-mshc.
+
+* reg: physical base address of the dw-mshc controller and size of its memory
+  region.
+
+* interrupts: interrupt specifier for the controller. The format and value of
+  the interrupt specifier depends on the interrupt parent for the controller.
+
+* #address-cells: should be 1.
+
+* #size-cells: should be 0.
+
+# Slots: The slot specific information are contained within child-nodes with
+  each child-node representing a supported slot. There should be atleast one
+  child node representing a card slot. The name of the child node representing
+  the slot is recommended to be slot@n where n is the unique number of the slot
+  connnected to the controller. The following are optional properties which
+  can be included in the slot child node.
+
+   * reg: specifies the physical slot number. The valid values of this
+ property is 0 to (num-slots -1), where num-slots is the value
+ specified by the num-slots property.
+
+   * bus-width: specifies the width of the data bus connected from the
+ controller to the card slot. The value should be 1, 4 or 8. In case
+ this property is not specified, a default value of 1 is assumed for
+ this property.
+
+   * cd-gpios: specifies the card detect gpio line. The format of the
+ gpio specifier depends on the gpio controller.
+
+   * wp-gpios: specifies the write protect gpio line. The format of the
+ gpio specifier depends on the gpio controller.
+
+   * gpios: specifies a list of gpios used for command, clock and data
+ bus. The first gpio is the command line and the second gpio is the
+ clock line. The rest of the gpios (depending on the bus-width
+ property) are the data lines in no particular order. The format of
+ the gpio specifier depends on the gpio controller.
+
+Optional properties:
+
+* num-slots: specifies the number of slots supported by the controller.
+  The number of physical slots actually used could be equal or less than the
+  value specified by num-slots. If this property is not specified, the value
+  of num-slot property is assumed to be 1.
+
+* fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
+  specified, the default value of the fifo size is determined from the
+  controller registers.
+
+* card-detect-delay: Delay in milli-seconds before detecting card after card
+  insert event. The default value is 0.
+
+* supports-highspeed: Enables support for high speed cards (upto 50MHz)
+
+* card-detection-broken: The card detection functionality is not available on
+  any of the slots.
+
+* no-write-protect: The write protect pad of the controller is not connected
+  to the write protect pin on the slot.
+
+Aliases:
+
+- All the MSHC controller nodes should be represented in the aliases node using
+  the following format 'mshc{n}' where n is a unique number for the alias.
+
+
+Example:
+
+  The MSHC controller node can be split into two portions, SoC specific and
+  board specific portions as listed below.
+
+   dwmmc0@1220 {
+   compatible = snps,dw-mshc;
+   reg = 0x1220 0x1000;
+   interrupts = 0 75 0;
+   #address-cells = 1;
+   #size-cells = 0;
+   };
+
+   dwmmc0@1220 {
+   num-slots = 1;
+   supports-highspeed;
+   card-detection-broken;
+   no-write-protect;
+   fifo-depth = 0x80;
+   card-detect-delay = 200;
+
+   slot@0 {
+   reg = 0;
+   bus-width = 8;
+   cd-gpios = gpc0 2 2 3 3;
+   gpios = gpc0 0 2 0 3, gpc0 1 2 0 3,
+   gpc1 0 2 3 3, gpc1 1 2 3 3,
+

[PATCH v3 3/6] mmc: dw_mmc: lookup for optional biu and ciu clocks

[Thomas Abraham]

Some platforms allow for clock gating and control of bus interface unit clock
and card interface unit clock. Add support for clock lookup of optional biu
and ciu clocks for clock gating and clock speed determination.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 drivers/mmc/host/dw_mmc.c  |   42 +++---
 include/linux/mmc/dw_mmc.h |4 
 2 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index cd58063..679473c 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -1953,18 +1953,38 @@ int dw_mci_probe(struct dw_mci *host)
return -ENODEV;
}
 
-   if (!host-pdata-bus_hz) {
+   host-biu_clk = clk_get(host-dev, biu);
+   if (IS_ERR(host-biu_clk))
+   dev_dbg(host-dev, biu clock not available\n);
+   else
+   clk_prepare_enable(host-biu_clk);
+
+   host-ciu_clk = clk_get(host-dev, ciu);
+   if (IS_ERR(host-ciu_clk))
+   dev_dbg(host-dev, ciu clock not available\n);
+   else
+   clk_prepare_enable(host-ciu_clk);
+
+   if (IS_ERR(host-ciu_clk))
+   host-bus_hz = host-pdata-bus_hz;
+   else
+   host-bus_hz = clk_get_rate(host-ciu_clk);
+
+   if (!host-bus_hz) {
dev_err(host-dev,
Platform data must supply bus speed\n);
-   return -ENODEV;
+   ret = -ENODEV;
+   goto err_clk;
}
 
-   host-bus_hz = host-pdata-bus_hz;
host-quirks = host-pdata-quirks;
 
spin_lock_init(host-lock);
INIT_LIST_HEAD(host-queue);
 
+   host-dma_ops = host-pdata-dma_ops;
+   dw_mci_init_dma(host);
+
/*
 * Get the host data width - this assumes that HCON has been set with
 * the correct values.
@@ -2109,6 +2129,16 @@ err_dmaunmap:
regulator_disable(host-vmmc);
regulator_put(host-vmmc);
}
+
+err_clk:
+   if (!IS_ERR(host-ciu_clk)) {
+   clk_disable_unprepare(host-ciu_clk);
+   clk_put(host-ciu_clk);
+   }
+   if (!IS_ERR(host-biu_clk)) {
+   clk_disable_unprepare(host-biu_clk);
+   clk_put(host-biu_clk);
+   }
return ret;
 }
 EXPORT_SYMBOL(dw_mci_probe);
@@ -2142,6 +2172,12 @@ void dw_mci_remove(struct dw_mci *host)
regulator_put(host-vmmc);
}
 
+   if (!IS_ERR(host-ciu_clk))
+   clk_disable_unprepare(host-ciu_clk);
+   if (!IS_ERR(host-biu_clk))
+   clk_disable_unprepare(host-biu_clk);
+   clk_put(host-ciu_clk);
+   clk_put(host-biu_clk);
 }
 EXPORT_SYMBOL(dw_mci_remove);
 
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index a37a573..787ad56 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -78,6 +78,8 @@ struct mmc_data;
  * @data_offset: Set the offset of DATA register according to VERID.
  * @dev: Device associated with the MMC controller.
  * @pdata: Platform data associated with the MMC controller.
+ * @biu_clk: Pointer to bus interface unit clock instance.
+ * @ciu_clk: Pointer to card interface unit clock instance.
  * @slot: Slots sharing this MMC controller.
  * @fifo_depth: depth of FIFO.
  * @data_shift: log2 of FIFO item size.
@@ -158,6 +160,8 @@ struct dw_mci {
u16 data_offset;
struct device   *dev;
struct dw_mci_board *pdata;
+   struct clk  *biu_clk;
+   struct clk  *ciu_clk;
struct dw_mci_slot  *slot[MAX_MCI_SLOTS];
 
/* FIFO push and pull */
-- 
1.6.6.rc2

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[PATCH v3 2/6] mmc: dw_mmc: allow probe to succeed even if one slot is initialized

[Thomas Abraham]

Instead of aborting the probe in case a slot initialization fails, allow
initialization of as many slots as possible. If there are atleast one
instance of slot that is successfully initialized, allow the driver probe
to succeed.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 drivers/mmc/host/dw_mmc.c |   23 +--
 1 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 948a7ac..cd58063 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -1939,6 +1939,7 @@ int dw_mci_probe(struct dw_mci *host)
 {
int width, i, ret = 0;
u32 fifo_size;
+   int init_slots = 0;
 
if (!host-pdata || !host-pdata-init) {
dev_err(host-dev,
@@ -2047,10 +2048,18 @@ int dw_mci_probe(struct dw_mci *host)
/* We need at least one slot to succeed */
for (i = 0; i  host-num_slots; i++) {
ret = dw_mci_init_slot(host, i);
-   if (ret) {
-   ret = -ENODEV;
-   goto err_init_slot;
-   }
+   if (ret)
+   dev_dbg(host-dev, slot %d init failed\n, i);
+   else
+   init_slots++;
+   }
+
+   if (init_slots) {
+   dev_info(host-dev, %d slots initialized\n, init_slots);
+   } else {
+   dev_dbg(host-dev, attempted to initialize %d slots, 
+   but failed on all\n, host-num_slots);
+   goto err_init_slot;
}
 
/*
@@ -2085,12 +2094,6 @@ int dw_mci_probe(struct dw_mci *host)
return 0;
 
 err_init_slot:
-   /* De-init any initialized slots */
-   while (i  0) {
-   if (host-slot[i])
-   dw_mci_cleanup_slot(host-slot[i], i);
-   i--;
-   }
free_irq(host-irq, host);
 
 err_workqueue:
-- 
1.6.6.rc2

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ARM: Exynos5: Enable support for DW-MMC controllers

[Thomas Abraham]

This patch set enables device tree based support for the four dw-mmc controllers
on Samsung's Exynos5250 SoC.

Thomas Abraham (3):
  ARM: Samsung: Add support for MSHC controller clocks
  ARM: Exynos5: Add AUXDATA support for MSHC controllers
  ARM: dts: Add nodes for dw_mmc controllers for Samsung Exynos5250 platforms

 arch/arm/boot/dts/exynos5250-smdk5250.dts |   58 +
 arch/arm/boot/dts/exynos5250.dtsi |   32 
 arch/arm/mach-exynos/clock-exynos5.c  |   45 --
 arch/arm/mach-exynos/include/mach/map.h   |1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c|8 
 5 files changed, 115 insertions(+), 29 deletions(-)

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[PATCH v2 1/3] ARM: Samsung: Add support for MSHC controller clocks

[Thomas Abraham]

Add clock instances for bus interface unit clock and card interface unit
clock of the all four MSHC controller instances.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 arch/arm/mach-exynos/clock-exynos5.c |   45 --
 1 files changed, 16 insertions(+), 29 deletions(-)

diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
b/arch/arm/mach-exynos/clock-exynos5.c
index fefa336..02038d8 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -564,35 +564,30 @@ static struct clk exynos5_init_clocks_off[] = {
.enable = exynos5_clk_ip_peris_ctrl,
.ctrlbit= (1  19),
}, {
-   .name   = hsmmc,
-   .devname= exynos4-sdhci.0,
+   .name   = biu,
+   .devname= dw_mmc.0,
.parent = exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit= (1  12),
}, {
-   .name   = hsmmc,
-   .devname= exynos4-sdhci.1,
+   .name   = biu,
+   .devname= dw_mmc.1,
.parent = exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit= (1  13),
}, {
-   .name   = hsmmc,
-   .devname= exynos4-sdhci.2,
+   .name   = biu,
+   .devname= dw_mmc.2,
.parent = exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit= (1  14),
}, {
-   .name   = hsmmc,
-   .devname= exynos4-sdhci.3,
+   .name   = biu,
+   .devname= dw_mmc.3,
.parent = exynos5_clk_aclk_200.clk,
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit= (1  15),
}, {
-   .name   = dwmci,
-   .parent = exynos5_clk_aclk_200.clk,
-   .enable = exynos5_clk_ip_fsys_ctrl,
-   .ctrlbit= (1  16),
-   }, {
.name   = sata,
.devname= ahci,
.enable = exynos5_clk_ip_fsys_ctrl,
@@ -992,8 +987,8 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = {
 
 static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
.clk= {
-   .name   = sclk_mmc,
-   .devname= exynos4-sdhci.0,
+   .name   = ciu,
+   .devname= dw_mmc.0,
.parent = exynos5_clk_dout_mmc0.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit= (1  0),
@@ -1003,8 +998,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
 
 static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
.clk= {
-   .name   = sclk_mmc,
-   .devname= exynos4-sdhci.1,
+   .name   = ciu,
+   .devname= dw_mmc.1,
.parent = exynos5_clk_dout_mmc1.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit= (1  4),
@@ -1014,8 +1009,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
 
 static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
.clk= {
-   .name   = sclk_mmc,
-   .devname= exynos4-sdhci.2,
+   .name   = ciu,
+   .devname= dw_mmc.2,
.parent = exynos5_clk_dout_mmc2.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit= (1  8),
@@ -1025,8 +1020,8 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
 
 static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
.clk= {
-   .name   = sclk_mmc,
-   .devname= exynos4-sdhci.3,
+   .name   = ciu,
+   .devname= dw_mmc.3,
.parent = exynos5_clk_dout_mmc3.clk,
.enable = exynos5_clksrc_mask_fsys_ctrl,
.ctrlbit= (1  12),
@@ -1037,14 +1032,6 @@ static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
 static struct clksrc_clk exynos5_clksrcs[] = {
{
.clk= {
-   .name   = sclk_dwmci,
-   .parent = exynos5_clk_dout_mmc4.clk,
-   .enable = exynos5_clksrc_mask_fsys_ctrl,
-   .ctrlbit= (1  16),
-   },
-   .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 

[PATCH v2 2/3] ARM: Exynos5: Add AUXDATA support for MSHC controllers

[Thomas Abraham]

Add entries if MSHC controllers in AUXDATA table for correct device name
initialization.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 arch/arm/mach-exynos/include/mach/map.h |1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c  |8 
 2 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index ca4aa89..9be4165 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -170,6 +170,7 @@
 
 #define EXYNOS4_PA_HSMMC(x)(0x1251 + ((x) * 0x1))
 #define EXYNOS4_PA_DWMCI   0x1255
+#define EXYNOS5_PA_DWMCI(x)(0x1220 + ((x) * 0x1))
 
 #define EXYNOS4_PA_HSOTG   0x1248
 #define EXYNOS4_PA_USB_HSPHY   0x125B
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 7b1e11a..d4f8309 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -47,6 +47,14 @@ static const struct of_dev_auxdata 
exynos5250_auxdata_lookup[] __initconst = {
s3c2440-i2c.0, NULL),
OF_DEV_AUXDATA(samsung,s3c2440-i2c, EXYNOS5_PA_IIC(1),
s3c2440-i2c.1, NULL),
+   OF_DEV_AUXDATA(samsung,exynos5250-dw-mshc, EXYNOS5_PA_DWMCI(0),
+   dw_mmc.0, NULL),
+   OF_DEV_AUXDATA(samsung,exynos5250-dw-mshc, EXYNOS5_PA_DWMCI(1),
+   dw_mmc.1, NULL),
+   OF_DEV_AUXDATA(samsung,exynos5250-dw-mshc, EXYNOS5_PA_DWMCI(2),
+   dw_mmc.2, NULL),
+   OF_DEV_AUXDATA(samsung,exynos5250-dw-mshc, EXYNOS5_PA_DWMCI(3),
+   dw_mmc.3, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA0, dma-pl330.0, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_PDMA1, dma-pl330.1, NULL),
OF_DEV_AUXDATA(arm,pl330, EXYNOS5_PA_MDMA1, dma-pl330.2, NULL),
-- 
1.6.6.rc2

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[PATCH v2 3/3] ARM: dts: Add nodes for dw_mmc controllers for Samsung Exynos5250 platforms

[Thomas Abraham]

Add device nodes for the four instances of dw_mmc controllers in Exynos5250
and enable instance 0 and 2 for the smdk5250 board.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 arch/arm/boot/dts/exynos5250-smdk5250.dts |   58 +
 arch/arm/boot/dts/exynos5250.dtsi |   32 
 2 files changed, 90 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 49945cc..8e54e41 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -16,6 +16,13 @@
model = SAMSUNG SMDK5250 board based on EXYNOS5250;
compatible = samsung,smdk5250, samsung,exynos5250;
 
+   aliases {
+   mshc0 = mshc_0;
+   mshc1 = mshc_1;
+   mshc2 = mshc_2;
+   mshc3 = mshc_3;
+   };
+
memory {
reg = 0x4000 0x8000;
};
@@ -71,4 +78,55 @@
i2c@12CD {
status = disabled;
};
+
+   mshc_0: dwmmc0@1220 {
+   num-slots = 1;
+   supports-highspeed;
+   card-detection-broken;
+   no-write-protect;
+   fifo-depth = 0x80;
+   card-detect-delay = 200;
+   samsung,dw-mshc-sdr-timing = 2 3 3;
+   samsung,dw-mshc-ddr-timing = 1 2 3;
+
+   slot@0 {
+   reg = 0;
+   bus-width = 8;
+   cd-gpios = gpc0 2 2 3 3;
+   gpios = gpc0 0 2 0 3, gpc0 1 2 0 3,
+   gpc1 0 2 3 3, gpc1 1 2 3 3,
+   gpc1 2 2 3 3, gpc1 3 2 3 3,
+   gpc0 3 2 3 3, gpc0 4 2 3 3,
+   gpc0 5 2 3 3, gpc0 6 2 3 3;
+   };
+   };
+
+   mshc_1: dwmmc1@1221 {
+   status = disabled;
+   };
+
+   mshc_2: dwmmc2@1222 {
+   num-slots = 1;
+   supports-highspeed;
+   no-write-protect;
+   fifo-depth = 0x80;
+   card-detect-delay = 200;
+   samsung,dw-mshc-sdr-timing = 2 3 3;
+   samsung,dw-mshc-ddr-timing = 1 2 3;
+
+   slot@0 {
+   reg = 0;
+   bus-width = 4;
+   cd-gpios = gpc3 2 2 3 3;
+   gpios = gpc3 0 2 0 3, gpc3 1 2 0 3,
+   gpc3 3 2 3 3, gpc3 4 2 3 3,
+   gpc3 5 2 3 3, gpc3 6 2 3 3,
+   gpc4 3 3 3 3, gpc4 3 3 3 3,
+   gpc4 5 3 3 3, gpc4 6 3 3 3;
+   };
+   };
+
+   mshc_3: dwmmc3@1223 {
+   status = disabled;
+   };
 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 4272b29..b6ae657 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -146,6 +146,38 @@
#size-cells = 0;
};
 
+   dwmmc0@1220 {
+   compatible = samsung,exynos5250-dw-mshc;
+   reg = 0x1220 0x1000;
+   interrupts = 0 75 0;
+   #address-cells = 1;
+   #size-cells = 0;
+   };
+
+   dwmmc1@1221 {
+   compatible = samsung,exynos5250-dw-mshc;
+   reg = 0x1221 0x1000;
+   interrupts = 0 76 0;
+   #address-cells = 1;
+   #size-cells = 0;
+   };
+
+   dwmmc2@1222 {
+   compatible = samsung,exynos5250-dw-mshc;
+   reg = 0x1222 0x1000;
+   interrupts = 0 77 0;
+   #address-cells = 1;
+   #size-cells = 0;
+   };
+
+   dwmmc3@1223 {
+   compatible = samsung,exynos5250-dw-mshc;
+   reg = 0x1223 0x1000;
+   interrupts = 0 78 0;
+   #address-cells = 1;
+   #size-cells = 0;
+   };
+
amba {
#address-cells = 1;
#size-cells = 1;
-- 
1.6.6.rc2

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Re: [PATCH v5 0/6] spi: s3c64xx: add support for device tree

[Mark Brown]

On Thu, Jul 12, 2012 at 06:11:05PM +0900, Kukjin Kim wrote:

 And Mark, this touches various samsung stuff in arch/arm/ so if you're ok,
 I'd like to pick this up in samsung tree. We don't want to see conflicts...

Well, simple conflicts aren't that big a deal...  However, Thomas
mentioned that in order to test this he merged the SPI tree into your
tree so perhaps there is also a dependency on the SPI tree?  If that was
just for good practice testing then I agree that the best thing is to
merge via your tree, otherwise we might need to think harder.


signature.asc
Description: Digital signature

Re: [PATCH] ARM: samsung: adc: fix race in s3c_adc_start

[Ben Dooks]

On Wed, Jul 11, 2012 at 07:12:11PM -0700, Todd Poynor wrote:
 Checking for adc-ts_pend already claimed should be done with the
 lock held.
 
 Change-Id: Ic9f15e26bd19934ab8c2885ce5df265933ac304a
 Signed-off-by: Todd Poynor toddpoy...@google.com
Acked-by: Ben Dooks ben-li...@fluff.org


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[RESEND PATCH v4 0/5] thermal: Add kernel thermal support for exynos platform

[Amit Daniel Kachhap]

Hi Len,

This series is a repost of the thermal support for exynos platform.
These set of patches were already accepted for 3.5 merge.
(https://lkml.org/lkml/2012/6/2/7) but somehow could not go through so,
I am resending them again with rebasing against 3.5-rc6. Please apply them
for 3.6 merge.

Thanks,
Amit Daniel


Amit Daniel Kachhap (5):
  thermal: add generic cpufreq cooling implementation
  hwmon: exynos4: move thermal sensor driver to driver/thermal
directory
  thermal: exynos5: add exynos5 thermal sensor driver support
  thermal: exynos: register the tmu sensor with the kernel thermal
layer
  ARM: exynos: add thermal sensor driver platform data support

 Documentation/hwmon/exynos4_tmu  |   81 ---
 Documentation/thermal/cpu-cooling-api.txt|   60 ++
 Documentation/thermal/exynos_thermal |   52 ++
 drivers/hwmon/Kconfig|   10 -
 drivers/hwmon/Makefile   |1 -
 drivers/hwmon/exynos4_tmu.c  |  514 --
 drivers/thermal/Kconfig  |   20 +
 drivers/thermal/Makefile |4 +-
 drivers/thermal/cpu_cooling.c|  483 +
 drivers/thermal/exynos_thermal.c |  956 ++
 include/linux/cpu_cooling.h  |   99 +++
 include/linux/platform_data/exynos4_tmu.h|   83 ---
 include/linux/platform_data/exynos_thermal.h |  100 +++
 13 files changed, 1773 insertions(+), 690 deletions(-)
 delete mode 100644 Documentation/hwmon/exynos4_tmu
 create mode 100644 Documentation/thermal/cpu-cooling-api.txt
 create mode 100644 Documentation/thermal/exynos_thermal
 delete mode 100644 drivers/hwmon/exynos4_tmu.c
 create mode 100644 drivers/thermal/cpu_cooling.c
 create mode 100644 drivers/thermal/exynos_thermal.c
 create mode 100644 include/linux/cpu_cooling.h
 delete mode 100644 include/linux/platform_data/exynos4_tmu.h
 create mode 100644 include/linux/platform_data/exynos_thermal.h

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[RESEND PATCH v4 1/5] thermal: add generic cpufreq cooling implementation

[Amit Daniel Kachhap]

This patchset introduces a new generic cooling device based on cpufreq
that can be used on non-ACPI platforms.  As a proof of concept, we have
drivers for the following platforms using this mechanism now:

 * Samsung Exynos (Exynos4 and Exynos5) in the current patchset.
 * TI OMAP (git://git.linaro.org/people/amitdanielk/linux.git omap4460_thermal)
 * Freescale i.MX (git://git.linaro.org/people/amitdanielk/linux.git 
imx6q_thermal)

There is a small change in cpufreq cooling registration APIs, so a minor
change is needed for OMAP and Freescale platforms.

Brief Description:

1) The generic cooling devices code is placed inside driver/thermal/*
   as placing inside acpi folder will need un-necessary enabling of acpi
   code.  This codes is architecture independent.

2) This patchset adds generic cpu cooling low level implementation
   through frequency clipping.  In future, other cpu related cooling
   devices may be added here.  An ACPI version of this already exists
   (drivers/acpi/processor_thermal.c) .  But this will be useful for
   platforms like ARM using the generic thermal interface along with the
   generic cpu cooling devices.  The cooling device registration API's
   return cooling device pointers which can be easily binded with the
   thermal zone trip points.  The important APIs exposed are,

   a) struct thermal_cooling_device *cpufreq_cooling_register(
struct freq_clip_table *tab_ptr, unsigned int tab_size)
   b) void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev)

3) Samsung exynos platform thermal implementation is done using the
   generic cpu cooling APIs and the new trip type.  The temperature sensor
   driver present in the hwmon folder(registered as hwmon driver) is moved
   to thermal folder and registered as a thermal driver.

A simple data/control flow diagrams is shown below,

Core Linux thermal -  Exynos thermal interface - Temperature Sensor
  | |
 \|/|
  Cpufreq cooling device ---

TODO:
*Will send the DT enablement patches later after the driver is merged.

This patch:

Add support for generic cpu thermal cooling low level implementations
using frequency scaling up/down based on the registration parameters.
Different cpu related cooling devices can be registered by the user and
the binding of these cooling devices to the corresponding trip points can
be easily done as the registration APIs return the cooling device pointer.
The user of these APIs are responsible for passing clipping frequency .
The drivers can also register to recieve notification about any cooling
action called.

[a...@linux-foundation.org: fix comment layout]
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
Cc: Donggeun Kim dg77@samsung.com
Cc: Guenter Roeck guenter.ro...@ericsson.com
Cc: SangWook Ju sw...@samsung.com
Cc: Durgadoss durgados...@intel.com
Cc: Len Brown l...@kernel.org
Cc: Jean Delvare kh...@linux-fr.org
Signed-off-by: Andrew Morton a...@linux-foundation.org
---
 Documentation/thermal/cpu-cooling-api.txt |   60 
 drivers/thermal/Kconfig   |   11 +
 drivers/thermal/Makefile  |3 +-
 drivers/thermal/cpu_cooling.c |  483 +
 include/linux/cpu_cooling.h   |   99 ++
 5 files changed, 655 insertions(+), 1 deletions(-)
 create mode 100644 Documentation/thermal/cpu-cooling-api.txt
 create mode 100644 drivers/thermal/cpu_cooling.c
 create mode 100644 include/linux/cpu_cooling.h

diff --git a/Documentation/thermal/cpu-cooling-api.txt 
b/Documentation/thermal/cpu-cooling-api.txt
new file mode 100644
index 000..557adb8
--- /dev/null
+++ b/Documentation/thermal/cpu-cooling-api.txt
@@ -0,0 +1,60 @@
+CPU cooling APIs How To
+===
+
+Written by Amit Daniel Kachhap amit.kach...@linaro.org
+
+Updated: 12 May 2012
+
+Copyright (c)  2012 Samsung Electronics Co., Ltd(http://www.samsung.com)
+
+0. Introduction
+
+The generic cpu cooling(freq clipping, cpuhotplug etc) provides
+registration/unregistration APIs to the caller. The binding of the cooling
+devices to the trip point is left for the user. The registration APIs returns
+the cooling device pointer.
+
+1. cpu cooling APIs
+
+1.1 cpufreq registration/unregistration APIs
+1.1.1 struct thermal_cooling_device *cpufreq_cooling_register(
+   struct freq_clip_table *tab_ptr, unsigned int tab_size)
+
+This interface function registers the cpufreq cooling device with the name
+thermal-cpufreq-%x. This api can support multiple instances of cpufreq
+cooling devices.
+
+tab_ptr: The table containing the maximum value of frequency to be clipped
+for each cooling state.
+   .freq_clip_max: Value of frequency to be clipped for each allowed
+cpus.
+   .temp_level: Temperature level at which the frequency clamping will
+   happen.
+   .mask_val: cpumask of the allowed 

[RESEND PATCH v4 2/5] hwmon: exynos4: move thermal sensor driver to driver/thermal directory

[Amit Daniel Kachhap]

This movement is needed because the hwmon entries and corresponding sysfs
interface is a duplicate of utilities already provided by
driver/thermal/thermal_sys.c.  The goal is to place it in thermal folder
and add necessary functions to use the in-kernel thermal interfaces.

Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
Signed-off-by: Donggeun Kim dg77@samsung.com
Acked-by: Guenter Roeck guenter.ro...@ericsson.com
Cc: SangWook Ju sw...@samsung.com
Cc: Durgadoss durgados...@intel.com
Cc: Len Brown l...@kernel.org
Cc: Jean Delvare kh...@linux-fr.org
Signed-off-by: Andrew Morton a...@linux-foundation.org
---
 Documentation/hwmon/exynos4_tmu  |   81 
 Documentation/thermal/exynos_thermal |   52 +++
 drivers/hwmon/Kconfig|   10 -
 drivers/hwmon/Makefile   |1 -
 drivers/hwmon/exynos4_tmu.c  |  514 --
 drivers/thermal/Kconfig  |9 +
 drivers/thermal/Makefile |1 +
 drivers/thermal/exynos_thermal.c |  409 
 include/linux/platform_data/exynos4_tmu.h|   83 
 include/linux/platform_data/exynos_thermal.h |   83 
 10 files changed, 554 insertions(+), 689 deletions(-)
 delete mode 100644 Documentation/hwmon/exynos4_tmu
 create mode 100644 Documentation/thermal/exynos_thermal
 delete mode 100644 drivers/hwmon/exynos4_tmu.c
 create mode 100644 drivers/thermal/exynos_thermal.c
 delete mode 100644 include/linux/platform_data/exynos4_tmu.h
 create mode 100644 include/linux/platform_data/exynos_thermal.h

diff --git a/Documentation/hwmon/exynos4_tmu b/Documentation/hwmon/exynos4_tmu
deleted file mode 100644
index c3c6b41..000
--- a/Documentation/hwmon/exynos4_tmu
+++ /dev/null
@@ -1,81 +0,0 @@
-Kernel driver exynos4_tmu
-=
-
-Supported chips:
-* ARM SAMSUNG EXYNOS4 series of SoC
-  Prefix: 'exynos4-tmu'
-  Datasheet: Not publicly available
-
-Authors: Donggeun Kim dg77@samsung.com
-
-Description

-
-This driver allows to read temperature inside SAMSUNG EXYNOS4 series of SoC.
-
-The chip only exposes the measured 8-bit temperature code value
-through a register.
-Temperature can be taken from the temperature code.
-There are three equations converting from temperature to temperature code.
-
-The three equations are:
-  1. Two point trimming
-   Tc = (T - 25) * (TI2 - TI1) / (85 - 25) + TI1
-
-  2. One point trimming
-   Tc = T + TI1 - 25
-
-  3. No trimming
-   Tc = T + 50
-
-  Tc: Temperature code, T: Temperature,
-  TI1: Trimming info for 25 degree Celsius (stored at TRIMINFO register)
-   Temperature code measured at 25 degree Celsius which is unchanged
-  TI2: Trimming info for 85 degree Celsius (stored at TRIMINFO register)
-   Temperature code measured at 85 degree Celsius which is unchanged
-
-TMU(Thermal Management Unit) in EXYNOS4 generates interrupt
-when temperature exceeds pre-defined levels.
-The maximum number of configurable threshold is four.
-The threshold levels are defined as follows:
-  Level_0: current temperature  trigger_level_0 + threshold
-  Level_1: current temperature  trigger_level_1 + threshold
-  Level_2: current temperature  trigger_level_2 + threshold
-  Level_3: current temperature  trigger_level_3 + threshold
-
-  The threshold and each trigger_level are set
-  through the corresponding registers.
-
-When an interrupt occurs, this driver notify user space of
-one of four threshold levels for the interrupt
-through kobject_uevent_env and sysfs_notify functions.
-Although an interrupt condition for level_0 can be set,
-it is not notified to user space through sysfs_notify function.
-
-Sysfs Interface

-name   name of the temperature sensor
-   RO
-
-temp1_inputtemperature
-   RO
-
-temp1_max  temperature for level_1 interrupt
-   RO
-
-temp1_crit temperature for level_2 interrupt
-   RO
-
-temp1_emergencytemperature for level_3 interrupt
-   RO
-
-temp1_max_alarmalarm for level_1 interrupt
-   RO
-
-temp1_crit_alarm
-   alarm for level_2 interrupt
-   RO
-
-temp1_emergency_alarm
-   alarm for level_3 interrupt
-   RO
diff --git a/Documentation/thermal/exynos_thermal 
b/Documentation/thermal/exynos_thermal
new file mode 100644
index 000..2b46f67
--- /dev/null
+++ b/Documentation/thermal/exynos_thermal
@@ -0,0 +1,52 @@
+Kernel driver exynos4_tmu
+=
+
+Supported chips:
+* ARM SAMSUNG EXYNOS4 series of SoC
+  Prefix: 'exynos4-tmu'
+  Datasheet: Not publicly available
+
+Authors: Donggeun Kim dg77@samsung.com
+
+Description
+---
+
+This driver allows to read temperature inside SAMSUNG EXYNOS4 series of SoC.
+
+The chip only exposes the measured 8-bit temperature code value
+through a register.
+Temperature can be taken from the 

[RESEND PATCH v4 3/5] thermal: exynos5: add exynos5 thermal sensor driver support

[Amit Daniel Kachhap]

Insert exynos5 TMU sensor changes into the thermal driver.  Some exynos4
changes are made generic for exynos series.

[a...@linux-foundation.org: fix comment layout]
Signed-off-by: SangWook Ju sw...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
Cc: Donggeun Kim dg77@samsung.com
Acked-by: Guenter Roeck guenter.ro...@ericsson.com
Cc: Durgadoss durgados...@intel.com
Cc: Len Brown l...@kernel.org
Cc: Jean Delvare kh...@linux-fr.org
Signed-off-by: Andrew Morton a...@linux-foundation.org
---
 drivers/thermal/Kconfig  |6 +-
 drivers/thermal/exynos_thermal.c |  318 +-
 include/linux/platform_data/exynos_thermal.h |   19 ++-
 3 files changed, 226 insertions(+), 117 deletions(-)

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index b0806cf..04c6796 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -39,10 +39,10 @@ config SPEAR_THERMAL
  thermal framework
 
 config EXYNOS_THERMAL
-   tristate Temperature sensor on Samsung EXYNOS4
-   depends on ARCH_EXYNOS4  THERMAL
+   tristate Temperature sensor on Samsung EXYNOS
+   depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5)  THERMAL
help
  If you say yes here you get support for TMU (Thermal Managment
- Unit) on SAMSUNG EXYNOS4 series of SoC.
+ Unit) on SAMSUNG EXYNOS series of SoC.
  This driver can also be built as a module. If so, the module
  will be called exynos4-tmu
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index bda02fe..388a09e 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -33,13 +33,29 @@
 #include linux/kobject.h
 #include linux/io.h
 #include linux/mutex.h
-
+#include linux/err.h
 #include linux/platform_data/exynos_thermal.h
-
-#define EXYNOS4_TMU_REG_TRIMINFO   0x0
-#define EXYNOS4_TMU_REG_CONTROL0x20
-#define EXYNOS4_TMU_REG_STATUS 0x28
-#define EXYNOS4_TMU_REG_CURRENT_TEMP   0x40
+#include linux/of.h
+
+#include plat/cpu.h
+
+/* Exynos generic registers */
+#define EXYNOS_TMU_REG_TRIMINFO0x0
+#define EXYNOS_TMU_REG_CONTROL 0x20
+#define EXYNOS_TMU_REG_STATUS  0x28
+#define EXYNOS_TMU_REG_CURRENT_TEMP0x40
+#define EXYNOS_TMU_REG_INTEN   0x70
+#define EXYNOS_TMU_REG_INTSTAT 0x74
+#define EXYNOS_TMU_REG_INTCLEAR0x78
+
+#define EXYNOS_TMU_TRIM_TEMP_MASK  0xff
+#define EXYNOS_TMU_GAIN_SHIFT  8
+#define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
+#define EXYNOS_TMU_CORE_ON 3
+#define EXYNOS_TMU_CORE_OFF2
+#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
+
+/* Exynos4 specific registers */
 #define EXYNOS4_TMU_REG_THRESHOLD_TEMP 0x44
 #define EXYNOS4_TMU_REG_TRIG_LEVEL00x50
 #define EXYNOS4_TMU_REG_TRIG_LEVEL10x54
@@ -49,28 +65,52 @@
 #define EXYNOS4_TMU_REG_PAST_TEMP1 0x64
 #define EXYNOS4_TMU_REG_PAST_TEMP2 0x68
 #define EXYNOS4_TMU_REG_PAST_TEMP3 0x6C
-#define EXYNOS4_TMU_REG_INTEN  0x70
-#define EXYNOS4_TMU_REG_INTSTAT0x74
-#define EXYNOS4_TMU_REG_INTCLEAR   0x78
 
-#define EXYNOS4_TMU_GAIN_SHIFT 8
-#define EXYNOS4_TMU_REF_VOLTAGE_SHIFT  24
-
-#define EXYNOS4_TMU_TRIM_TEMP_MASK 0xff
-#define EXYNOS4_TMU_CORE_ON3
-#define EXYNOS4_TMU_CORE_OFF   2
-#define EXYNOS4_TMU_DEF_CODE_TO_TEMP_OFFSET50
 #define EXYNOS4_TMU_TRIG_LEVEL0_MASK   0x1
 #define EXYNOS4_TMU_TRIG_LEVEL1_MASK   0x10
 #define EXYNOS4_TMU_TRIG_LEVEL2_MASK   0x100
 #define EXYNOS4_TMU_TRIG_LEVEL3_MASK   0x1000
 #define EXYNOS4_TMU_INTCLEAR_VAL   0x
 
-struct exynos4_tmu_data {
-   struct exynos4_tmu_platform_data *pdata;
+/* Exynos5 specific registers */
+#define EXYNOS5_TMU_TRIMINFO_CON   0x14
+#define EXYNOS5_THD_TEMP_RISE  0x50
+#define EXYNOS5_THD_TEMP_FALL  0x54
+#define EXYNOS5_EMUL_CON   0x80
+
+#define EXYNOS5_TRIMINFO_RELOAD0x1
+#define EXYNOS5_TMU_CLEAR_RISE_INT 0x111
+#define EXYNOS5_TMU_CLEAR_FALL_INT (0x111  16)
+#define EXYNOS5_MUX_ADDR_VALUE 6
+#define EXYNOS5_MUX_ADDR_SHIFT 20
+#define EXYNOS5_TMU_TRIP_MODE_SHIFT13
+
+#define EFUSE_MIN_VALUE 40
+#define EFUSE_MAX_VALUE 100
+
+/* In-kernel thermal framework related macros  definations */
+#define SENSOR_NAME_LEN16
+#define MAX_TRIP_COUNT 8
+#define MAX_COOLING_DEVICE 4
+
+#define ACTIVE_INTERVAL 500
+#define IDLE_INTERVAL 1
+
+/* CPU Zone information */
+#define PANIC_ZONE  4
+#define WARN_ZONE   3
+#define MONITOR_ZONE2
+#define SAFE_ZONE   1
+
+#define GET_ZONE(trip) (trip + 2)
+#define GET_TRIP(zone) (zone - 2)
+
+struct exynos_tmu_data {
+   struct exynos_tmu_platform_data *pdata;
struct resource *mem;
void __iomem *base;
int irq;
+   enum soc_type soc;
struct work_struct irq_work;
struct mutex lock;
struct 

[RESEND PATCH v4 4/5] thermal: exynos: register the tmu sensor with the kernel thermal layer

[Amit Daniel Kachhap]

This code added creates a link between temperature sensors, linux thermal
framework and cooling devices for samsung exynos platform.  This layer
monitors the temperature from the sensor and informs the generic thermal
layer to take the necessary cooling action.

[a...@linux-foundation.org: fix comment layout]
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
Cc: Donggeun Kim dg77@samsung.com
Acked-by: Guenter Roeck guenter.ro...@ericsson.com
Cc: SangWook Ju sw...@samsung.com
Cc: Durgadoss durgados...@intel.com
Cc: Len Brown l...@kernel.org
Cc: Jean Delvare kh...@linux-fr.org
Signed-off-by: Andrew Morton a...@linux-foundation.org
---
 drivers/thermal/exynos_thermal.c |  344 +-
 include/linux/platform_data/exynos_thermal.h |6 +
 2 files changed, 348 insertions(+), 2 deletions(-)

diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index 388a09e..52255fb 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -35,6 +35,9 @@
 #include linux/mutex.h
 #include linux/err.h
 #include linux/platform_data/exynos_thermal.h
+#include linux/thermal.h
+#include linux/cpufreq.h
+#include linux/cpu_cooling.h
 #include linux/of.h
 
 #include plat/cpu.h
@@ -95,6 +98,7 @@
 
 #define ACTIVE_INTERVAL 500
 #define IDLE_INTERVAL 1
+#define MCELSIUS   1000
 
 /* CPU Zone information */
 #define PANIC_ZONE  4
@@ -105,6 +109,8 @@
 #define GET_ZONE(trip) (trip + 2)
 #define GET_TRIP(zone) (zone - 2)
 
+#define EXYNOS_ZONE_COUNT  3
+
 struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
@@ -117,6 +123,309 @@ struct exynos_tmu_data {
u8 temp_error1, temp_error2;
 };
 
+struct thermal_trip_point_conf {
+   int trip_val[MAX_TRIP_COUNT];
+   int trip_count;
+};
+
+struct thermal_cooling_conf {
+   struct freq_clip_table freq_data[MAX_TRIP_COUNT];
+   int freq_clip_count;
+};
+
+struct thermal_sensor_conf {
+   char name[SENSOR_NAME_LEN];
+   int (*read_temperature)(void *data);
+   struct thermal_trip_point_conf trip_data;
+   struct thermal_cooling_conf cooling_data;
+   void *private_data;
+};
+
+struct exynos_thermal_zone {
+   enum thermal_device_mode mode;
+   struct thermal_zone_device *therm_dev;
+   struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
+   unsigned int cool_dev_size;
+   struct platform_device *exynos4_dev;
+   struct thermal_sensor_conf *sensor_conf;
+};
+
+static struct exynos_thermal_zone *th_zone;
+static void exynos_unregister_thermal(void);
+static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf);
+
+/* Get mode callback functions for thermal zone */
+static int exynos_get_mode(struct thermal_zone_device *thermal,
+   enum thermal_device_mode *mode)
+{
+   if (th_zone)
+   *mode = th_zone-mode;
+   return 0;
+}
+
+/* Set mode callback functions for thermal zone */
+static int exynos_set_mode(struct thermal_zone_device *thermal,
+   enum thermal_device_mode mode)
+{
+   if (!th_zone-therm_dev) {
+   pr_notice(thermal zone not registered\n);
+   return 0;
+   }
+
+   mutex_lock(th_zone-therm_dev-lock);
+
+   if (mode == THERMAL_DEVICE_ENABLED)
+   th_zone-therm_dev-polling_delay = IDLE_INTERVAL;
+   else
+   th_zone-therm_dev-polling_delay = 0;
+
+   mutex_unlock(th_zone-therm_dev-lock);
+
+   th_zone-mode = mode;
+   thermal_zone_device_update(th_zone-therm_dev);
+   pr_info(thermal polling set for duration=%d msec\n,
+   th_zone-therm_dev-polling_delay);
+   return 0;
+}
+
+/*
+ * This function may be called from interrupt based temperature sensor
+ * when threshold is changed.
+ */
+static void exynos_report_trigger(void)
+{
+   unsigned int i;
+   char data[10];
+   char *envp[] = { data, NULL };
+
+   if (!th_zone || !th_zone-therm_dev)
+   return;
+
+   thermal_zone_device_update(th_zone-therm_dev);
+
+   mutex_lock(th_zone-therm_dev-lock);
+   /* Find the level for which trip happened */
+   for (i = 0; i  th_zone-sensor_conf-trip_data.trip_count; i++) {
+   if (th_zone-therm_dev-last_temperature 
+   th_zone-sensor_conf-trip_data.trip_val[i] * MCELSIUS)
+   break;
+   }
+
+   if (th_zone-mode == THERMAL_DEVICE_ENABLED) {
+   if (i  0)
+   th_zone-therm_dev-polling_delay = ACTIVE_INTERVAL;
+   else
+   th_zone-therm_dev-polling_delay = IDLE_INTERVAL;
+   }
+
+   snprintf(data, sizeof(data), %u, i);
+   kobject_uevent_env(th_zone-therm_dev-device.kobj, KOBJ_CHANGE, envp);
+   mutex_unlock(th_zone-therm_dev-lock);
+}
+
+/* Get trip type callback functions for thermal zone */

[RESEND PATCH v4 5/5] ARM: exynos: add thermal sensor driver platform data support

[Amit Daniel Kachhap]

Add necessary default platform data support needed for TMU driver.  This
dt/non-dt values are tested for origen exynos4210 and smdk exynos5250
platforms.

Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
Cc: Donggeun Kim dg77@samsung.com
Acked-by: Guenter Roeck guenter.ro...@ericsson.com
Cc: SangWook Ju sw...@samsung.com
Cc: Durgadoss durgados...@intel.com
Cc: Len Brown l...@kernel.org
Cc: Jean Delvare kh...@linux-fr.org
Signed-off-by: Andrew Morton a...@linux-foundation.org
---
 drivers/thermal/exynos_thermal.c |  111 +-
 1 files changed, 110 insertions(+), 1 deletions(-)

diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index 52255fb..b561295 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -662,14 +662,121 @@ static irqreturn_t exynos_tmu_irq(int irq, void *id)
 static struct thermal_sensor_conf exynos_sensor_conf = {
.name   = exynos-therm,
.read_temperature   = (int (*)(void *))exynos_tmu_read,
+};
+
+#if defined(CONFIG_CPU_EXYNOS4210)
+static struct exynos_tmu_platform_data const exynos4_default_tmu_data = {
+   .threshold = 80,
+   .trigger_levels[0] = 5,
+   .trigger_levels[1] = 20,
+   .trigger_levels[2] = 30,
+   .trigger_level0_en = 1,
+   .trigger_level1_en = 1,
+   .trigger_level2_en = 1,
+   .trigger_level3_en = 0,
+   .gain = 15,
+   .reference_voltage = 7,
+   .cal_type = TYPE_ONE_POINT_TRIMMING,
+   .freq_tab[0] = {
+   .freq_clip_max = 800 * 1000,
+   .temp_level = 85,
+   },
+   .freq_tab[1] = {
+   .freq_clip_max = 200 * 1000,
+   .temp_level = 100,
+   },
+   .freq_tab_count = 2,
+   .type = SOC_ARCH_EXYNOS4,
+};
+#define EXYNOS4_TMU_DRV_DATA (exynos4_default_tmu_data)
+#else
+#define EXYNOS4_TMU_DRV_DATA (NULL)
+#endif
+
+#if defined(CONFIG_SOC_EXYNOS5250)
+static struct exynos_tmu_platform_data const exynos5_default_tmu_data = {
+   .trigger_levels[0] = 85,
+   .trigger_levels[1] = 103,
+   .trigger_levels[2] = 110,
+   .trigger_level0_en = 1,
+   .trigger_level1_en = 1,
+   .trigger_level2_en = 1,
+   .trigger_level3_en = 0,
+   .gain = 8,
+   .reference_voltage = 16,
+   .noise_cancel_mode = 4,
+   .cal_type = TYPE_ONE_POINT_TRIMMING,
+   .efuse_value = 55,
+   .freq_tab[0] = {
+   .freq_clip_max = 800 * 1000,
+   .temp_level = 85,
+   },
+   .freq_tab[1] = {
+   .freq_clip_max = 200 * 1000,
+   .temp_level = 103,
+   },
+   .freq_tab_count = 2,
+   .type = SOC_ARCH_EXYNOS5,
+};
+#define EXYNOS5_TMU_DRV_DATA (exynos5_default_tmu_data)
+#else
+#define EXYNOS5_TMU_DRV_DATA (NULL)
+#endif
+
+#ifdef CONFIG_OF
+static const struct of_device_id exynos_tmu_match[] = {
+   {
+   .compatible = samsung,exynos4-tmu,
+   .data = (void *)EXYNOS4_TMU_DRV_DATA,
+   },
+   {
+   .compatible = samsung,exynos5-tmu,
+   .data = (void *)EXYNOS5_TMU_DRV_DATA,
+   },
+   {},
+};
+MODULE_DEVICE_TABLE(of, exynos_tmu_match);
+#else
+#define  exynos_tmu_match NULL
+#endif
+
+static struct platform_device_id exynos_tmu_driver_ids[] = {
+   {
+   .name   = exynos4-tmu,
+   .driver_data= (kernel_ulong_t)EXYNOS4_TMU_DRV_DATA,
+   },
+   {
+   .name   = exynos5-tmu,
+   .driver_data= (kernel_ulong_t)EXYNOS5_TMU_DRV_DATA,
+   },
+   { },
+};
+MODULE_DEVICE_TABLE(platform, exynos4_tmu_driver_ids);
+
+static inline struct  exynos_tmu_platform_data *exynos_get_driver_data(
+   struct platform_device *pdev)
+{
+#ifdef CONFIG_OF
+   if (pdev-dev.of_node) {
+   const struct of_device_id *match;
+   match = of_match_node(exynos_tmu_match, pdev-dev.of_node);
+   if (!match)
+   return NULL;
+   return (struct exynos_tmu_platform_data *) match-data;
+   }
+#endif
+   return (struct exynos_tmu_platform_data *)
+   platform_get_device_id(pdev)-driver_data;
 }
-;
 static int __devinit exynos_tmu_probe(struct platform_device *pdev)
 {
struct exynos_tmu_data *data;
struct exynos_tmu_platform_data *pdata = pdev-dev.platform_data;
int ret, i;
 
+   if (!pdata)
+   pdata = exynos_get_driver_data(pdev);
+
if (!pdata) {
dev_err(pdev-dev, No platform init data supplied.\n);
return -ENODEV;
@@ -832,11 +939,13 @@ static struct platform_driver exynos_tmu_driver = {
.driver = {
.name   = exynos-tmu,
.owner  = THIS_MODULE,
+   .of_match_table = exynos_tmu_match,
},
.probe = exynos_tmu_probe,
.remove = 

Re: [PATCH v5 0/6] spi: s3c64xx: add support for device tree

[Thomas Abraham]

On 12 July 2012 18:32, Mark Brown broo...@opensource.wolfsonmicro.com wrote:
 On Thu, Jul 12, 2012 at 06:11:05PM +0900, Kukjin Kim wrote:

 And Mark, this touches various samsung stuff in arch/arm/ so if you're ok,
 I'd like to pick this up in samsung tree. We don't want to see conflicts...

 Well, simple conflicts aren't that big a deal...  However, Thomas
 mentioned that in order to test this he merged the SPI tree into your
 tree so perhaps there is also a dependency on the SPI tree?  If that was
 just for good practice testing then I agree that the best thing is to
 merge via your tree, otherwise we might need to think harder.

There were no dependency on Grant's spi/next branch. It was merged
just to ensure that nothing is broken.
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Re: [PATCH 1/2] ASoC: Convert S3C24XX I2S driver to gpiolib API

[Sylwester Nawrocki]

Hello,

On 06/30/2012 02:37 PM, Sylwester Nawrocki wrote:
 The s3c2410_gpio* calls are obsolete and have been scheduled for
 removal since several kernel releases. Remove them and use common
 gpiolib API.
 This patch is a prerequisite for removal of the S3C24XX SoC specific
 arch/arm/plat-samsung/include/gpio-fns.h header.
 
 Cc: Ben Dooksben-li...@fluff.org
 Signed-off-by: Sylwester Nawrockisylvester.nawro...@gmail.com
 ---
   sound/soc/samsung/s3c24xx-i2s.c |   10 +++---
   1 files changed, 3 insertions(+), 7 deletions(-)
 
 diff --git a/sound/soc/samsung/s3c24xx-i2s.c b/sound/soc/samsung/s3c24xx-i2s.c
 index c4aa4d4..0aae3a3 100644
 --- a/sound/soc/samsung/s3c24xx-i2s.c
 +++ b/sound/soc/samsung/s3c24xx-i2s.c
 @@ -23,7 +23,6 @@
   #includesound/soc.h
   #includesound/pcm_params.h
 
 -#includemach/regs-gpio.h
   #includemach/dma.h
   #includeplat/regs-iis.h
 
 @@ -391,12 +390,9 @@ static int s3c24xx_i2s_probe(struct snd_soc_dai *dai)
   }
   clk_enable(s3c24xx_i2s.iis_clk);
 
 - /* Configure the I2S pins in correct mode */
 - s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK);
 - s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_I2SSCLK);
 - s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_CDCLK);
 - s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI);
 - s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO);
 + /* Configure the I2S pins (GPE0...GPE4) in correct mode */
 + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
 +   S3C_GPIO_PULL_NONE);
 
   writel(S3C2410_IISCON_IISEN, s3c24xx_i2s.regs + S3C2410_IISCON);
 
 --

These are the only two patches (out of 15) that are now needed to remove
some obsolete s3c2410_gpio_* API. 1/2 was tested on Micro2440 board
and 2/2 is an identical change which wasn't tested on a real H/W since 
I don't have any s3c2412 based board. I'm a bit lost through which tree
should these be merged. Could someone please pick these patches up ?

--

Thanks,
Sylwester
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Re: [linux-pm] [RESEND PATCH v4 1/5] thermal: add generic cpufreq cooling implementation

[Valentin, Eduardo]

Amit,

On Thu, Jul 12, 2012 at 4:41 PM, Amit Daniel Kachhap
amit.kach...@linaro.org wrote:
 This patchset introduces a new generic cooling device based on cpufreq
 that can be used on non-ACPI platforms.  As a proof of concept, we have
 drivers for the following platforms using this mechanism now:

  * Samsung Exynos (Exynos4 and Exynos5) in the current patchset.
  * TI OMAP (git://git.linaro.org/people/amitdanielk/linux.git 
 omap4460_thermal)

FYI, I have rewriten the OMAP BG driver and currently trying to push
it to staging area. It should now support more omap versions. I will
readapt the cpu cooling based on this patch.

I am keeping the reworked driver here:
g...@gitorious.org:thermal-framework/thermal-framework.git
thermal_work/omap/bandgap_staging

  * Freescale i.MX (git://git.linaro.org/people/amitdanielk/linux.git 
 imx6q_thermal)

 There is a small change in cpufreq cooling registration APIs, so a minor
 change is needed for OMAP and Freescale platforms.

 Brief Description:

 1) The generic cooling devices code is placed inside driver/thermal/*
as placing inside acpi folder will need un-necessary enabling of acpi
code.  This codes is architecture independent.

 2) This patchset adds generic cpu cooling low level implementation
through frequency clipping.  In future, other cpu related cooling
devices may be added here.  An ACPI version of this already exists
(drivers/acpi/processor_thermal.c) .  But this will be useful for
platforms like ARM using the generic thermal interface along with the
generic cpu cooling devices.  The cooling device registration API's
return cooling device pointers which can be easily binded with the
thermal zone trip points.  The important APIs exposed are,

a) struct thermal_cooling_device *cpufreq_cooling_register(
 struct freq_clip_table *tab_ptr, unsigned int tab_size)
b) void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev)

 3) Samsung exynos platform thermal implementation is done using the
generic cpu cooling APIs and the new trip type.  The temperature sensor
driver present in the hwmon folder(registered as hwmon driver) is moved
to thermal folder and registered as a thermal driver.

 A simple data/control flow diagrams is shown below,

 Core Linux thermal -  Exynos thermal interface - Temperature Sensor
   | |
  \|/|
   Cpufreq cooling device ---

 TODO:
 *Will send the DT enablement patches later after the driver is merged.

 This patch:

 Add support for generic cpu thermal cooling low level implementations
 using frequency scaling up/down based on the registration parameters.
 Different cpu related cooling devices can be registered by the user and
 the binding of these cooling devices to the corresponding trip points can
 be easily done as the registration APIs return the cooling device pointer.
 The user of these APIs are responsible for passing clipping frequency .
 The drivers can also register to recieve notification about any cooling
 action called.

 [a...@linux-foundation.org: fix comment layout]
 Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
 Cc: Donggeun Kim dg77@samsung.com
 Cc: Guenter Roeck guenter.ro...@ericsson.com
 Cc: SangWook Ju sw...@samsung.com
 Cc: Durgadoss durgados...@intel.com
 Cc: Len Brown l...@kernel.org
 Cc: Jean Delvare kh...@linux-fr.org
 Signed-off-by: Andrew Morton a...@linux-foundation.org
 ---
  Documentation/thermal/cpu-cooling-api.txt |   60 
  drivers/thermal/Kconfig   |   11 +
  drivers/thermal/Makefile  |3 +-
  drivers/thermal/cpu_cooling.c |  483 
 +
  include/linux/cpu_cooling.h   |   99 ++
  5 files changed, 655 insertions(+), 1 deletions(-)
  create mode 100644 Documentation/thermal/cpu-cooling-api.txt
  create mode 100644 drivers/thermal/cpu_cooling.c
  create mode 100644 include/linux/cpu_cooling.h

 diff --git a/Documentation/thermal/cpu-cooling-api.txt 
 b/Documentation/thermal/cpu-cooling-api.txt
 new file mode 100644
 index 000..557adb8
 --- /dev/null
 +++ b/Documentation/thermal/cpu-cooling-api.txt
 @@ -0,0 +1,60 @@
 +CPU cooling APIs How To
 +===
 +
 +Written by Amit Daniel Kachhap amit.kach...@linaro.org
 +
 +Updated: 12 May 2012
 +
 +Copyright (c)  2012 Samsung Electronics Co., Ltd(http://www.samsung.com)
 +
 +0. Introduction
 +
 +The generic cpu cooling(freq clipping, cpuhotplug etc) provides
 +registration/unregistration APIs to the caller. The binding of the cooling
 +devices to the trip point is left for the user. The registration APIs returns
 +the cooling device pointer.
 +
 +1. cpu cooling APIs
 +
 +1.1 cpufreq registration/unregistration APIs
 +1.1.1 struct thermal_cooling_device *cpufreq_cooling_register(
 +   struct freq_clip_table *tab_ptr, unsigned int tab_size)
 +
 +This 

Re: [PATCH v5 0/6] spi: s3c64xx: add support for device tree

[Mark Brown]

On Thu, Jul 12, 2012 at 07:13:37PM +0530, Thomas Abraham wrote:
 On 12 July 2012 18:32, Mark Brown broo...@opensource.wolfsonmicro.com wrote:

  Well, simple conflicts aren't that big a deal...  However, Thomas
  mentioned that in order to test this he merged the SPI tree into your
  tree so perhaps there is also a dependency on the SPI tree?  If that was
  just for good practice testing then I agree that the best thing is to
  merge via your tree, otherwise we might need to think harder.

 There were no dependency on Grant's spi/next branch. It was merged
 just to ensure that nothing is broken.

OK, great - then the Samsung tree it is.


signature.asc
Description: Digital signature

Re: [PATCH 1/2] ASoC: Convert S3C24XX I2S driver to gpiolib API

[Mark Brown]

On Thu, Jul 12, 2012 at 03:56:36PM +0200, Sylwester Nawrocki wrote:

 These are the only two patches (out of 15) that are now needed to remove
 some obsolete s3c2410_gpio_* API. 1/2 was tested on Micro2440 board
 and 2/2 is an identical change which wasn't tested on a real H/W since 
 I don't have any s3c2412 based board. I'm a bit lost through which tree
 should these be merged. Could someone please pick these patches up ?

If you send them to the relevant maintainers that'd probably help...


signature.asc
Description: Digital signature

Re: [PATCH 1/2] ASoC: Convert S3C24XX I2S driver to gpiolib API

[Sylwester Nawrocki]

On 07/12/2012 06:19 PM, Mark Brown wrote:

On Thu, Jul 12, 2012 at 03:56:36PM +0200, Sylwester Nawrocki wrote:


These are the only two patches (out of 15) that are now needed to remove
some obsolete s3c2410_gpio_* API. 1/2 was tested on Micro2440 board
and 2/2 is an identical change which wasn't tested on a real H/W since
I don't have any s3c2412 based board. I'm a bit lost through which tree
should these be merged. Could someone please pick these patches up ?


If you send them to the relevant maintainers that'd probably help...


Thanks, would that be Takashi Iwai and Jaroslav Kysela then ? I just
want to get it right this time...
Or perhaps could you take care of them ?
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Re: [RESEND PATCH v4 1/5] thermal: add generic cpufreq cooling implementation

[Andrew Morton]

On Thu, 12 Jul 2012 19:11:04 +0530
Amit Daniel Kachhap amit.kach...@linaro.org wrote:

 [a...@linux-foundation.org: fix comment layout]
 Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
 Cc: Donggeun Kim dg77@samsung.com
 Cc: Guenter Roeck guenter.ro...@ericsson.com
 Cc: SangWook Ju sw...@samsung.com
 Cc: Durgadoss durgados...@intel.com
 Cc: Len Brown l...@kernel.org
 Cc: Jean Delvare kh...@linux-fr.org
 Signed-off-by: Andrew Morton a...@linux-foundation.org

Something strange appears to have happened here?  At a guess it seems
that the patches were in my tree, I sent them to someone (Len?), then
they were merged into linux-next by someone and then they fell
out of linux-next again?

If so, they will hopefully come back soon.  If not, something failed
fairly seriously.


I took a look at re-merging these patches into my tree, but there are
significant conflicts with other work which has gone into linux-next.

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Re: [PATCH] ARM: samsung: adc: fix race in s3c_adc_start

[Kukjin Kim]

On 07/12/12 21:31, Ben Dooks wrote:

On Wed, Jul 11, 2012 at 07:12:11PM -0700, Todd Poynor wrote:

Checking for adc-ts_pend already claimed should be done with the
lock held.

Change-Id: Ic9f15e26bd19934ab8c2885ce5df265933ac304a
Signed-off-by: Todd Poynortoddpoy...@google.com

Acked-by: Ben Dooksben-li...@fluff.org


Ben, thanks for your ack, will apply.

BTW, Todd, do you want to keep the 'Change-Id' in mainline?
If you don't mind, I'd like to remove it...

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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Re: [PATCH v5 0/6] spi: s3c64xx: add support for device tree

[Kukjin Kim]

On 07/13/12 01:16, Mark Brown wrote:

On Thu, Jul 12, 2012 at 07:13:37PM +0530, Thomas Abraham wrote:

On 12 July 2012 18:32, Mark Brownbroo...@opensource.wolfsonmicro.com  wrote:



Well, simple conflicts aren't that big a deal...  However, Thomas
mentioned that in order to test this he merged the SPI tree into your
tree so perhaps there is also a dependency on the SPI tree?  If that was
just for good practice testing then I agree that the best thing is to
merge via your tree, otherwise we might need to think harder.



There were no dependency on Grant's spi/next branch. It was merged
just to ensure that nothing is broken.


OK, great - then the Samsung tree it is.


Thanks, will apply.

Mark, if you want to add your ack or review on them, let me know.

Thanks.

Best regards,
Kgene.
--
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SW Solution Development Team, Samsung Electronics Co., Ltd.
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Re: [PATCH] ARM: samsung: adc: fix race in s3c_adc_start

[Todd Poynor]

On Fri, Jul 13, 2012 at 07:41:11AM +0900, Kukjin Kim wrote:
 BTW, Todd, do you want to keep the 'Change-Id' in mainline?
 If you don't mind, I'd like to remove it...

Oops, I forgot to take it out, please do remove it, thanks.


Todd
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Re: [PATCH v5 6/6] spi: s3c64xx: add device tree support

[Thomas Abraham]

On 13 July 2012 04:08, Kukjin Kim kgene@samsung.com wrote:
 Thomas, the DMACH_DT_PROP is available only on pl330 now. So seems occur
 following build error with s3c6400_defconfig.

 drivers/spi/spi-s3c64xx.c: In function 's3c64xx_spi_get_dmares':
 drivers/spi/spi-s3c64xx.c:1098: error: 'DMACH_DT_PROP' undeclared (first use
 in this function)
 drivers/spi/spi-s3c64xx.c:1098: error: (Each undeclared identifier is
 reported only once
 drivers/spi/spi-s3c64xx.c:1098: error: for each function it appears in.)
 make[3]: *** [drivers/spi/spi-s3c64xx.o] Error 1
 make[2]: *** [drivers/spi] Error 2


Dear Mr. Kim,

Thanks for considering these patches to be merged via your tree. For
the build break you mentioned above, there was a patch submitted some
time back to handle this. The link to that patch is:
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-June/102627.html.
Could you please apply this patch also to your tree.

Thanks,
Thomas.
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Re: [PATCH] ARM: Exynos: Add device tree node for Exynos4 interrupt combiner controller

[Thomas Abraham]

On 12 July 2012 14:40, Kukjin Kim kgene@samsung.com wrote:
 Thomas Abraham wrote:

 Add node for Exynos4 interrupt combiner controller.

 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
 ---
  arch/arm/boot/dts/exynos4210.dtsi |   11 +++
  1 files changed, 11 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos4210.dtsi
 b/arch/arm/boot/dts/exynos4210.dtsi
 index a1dd2ee..0e4f659 100644
 --- a/arch/arm/boot/dts/exynos4210.dtsi
 +++ b/arch/arm/boot/dts/exynos4210.dtsi
 @@ -33,6 +33,17 @@
   reg = 0x1049 0x1000, 0x1048 0x100;
   };

 + combiner:interrupt-controller@1044 {
 + compatible = samsung,exynos4210-combiner;
 + interrupt-controller;
 + #interrupt-cells = 2;

 How about changing above ordering like interrupt gic controller?

Ok.


 +   #interrupt-cells = 2;
 +   interrupt-controller;

 And, don't we need combiner-nr?
 +   samsung,combiner-nr = 16;

'samsung,combiner-nr' is an optional property. If it is not specfied,
the default value is set as 16. So it is not required for Exynos4
combiner node.

I will resubmit this patch with your suggested change.

Thanks,
Thomas.
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[PATCH v2] ARM: Exynos: Add device tree node for Exynos4 interrupt combiner controller

[Thomas Abraham]

Add node for Exynos4 interrupt combiner controller.

Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 arch/arm/boot/dts/exynos4210.dtsi |   11 +++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index a1dd2ee..0e4f659 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -33,6 +33,17 @@
reg = 0x1049 0x1000, 0x1048 0x100;
};
 
+   combiner:interrupt-controller@1044 {
+   compatible = samsung,exynos4210-combiner;
+   #interrupt-cells = 2;
+   interrupt-controller;
+   reg = 0x1044 0x1000;
+   interrupts = 0 0 0, 0 1 0, 0 2 0, 0 3 0,
+0 4 0, 0 5 0, 0 6 0, 0 7 0,
+0 8 0, 0 9 0, 0 10 0, 0 11 0,
+0 12 0, 0 13 0, 0 14 0, 0 15 0;
+   };
+
watchdog@1006 {
compatible = samsung,s3c2410-wdt;
reg = 0x1006 0x100;
-- 
1.6.6.rc2

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