Re: [PATCH 1/3] mmc: sdhci-s3c: Enable only required bus clock

2012-09-19 Thread Chris Ball
Hi,

On Fri, Sep 14 2012, Chander Kashyap wrote:
 In case of multiple bus clock sources, all the clock sources were
 getting enabled. As only one clock source is needed at the time hence
 enable only the required bus clock.

 This patch does as follows:
 1.In sdhci_s3c_probe enable only required bus clock source.

 2.Handle the disabling of old bus clock and enables the
   best clock selected in sdhci_s3c_set_clock().

 Signed-off-by: Chander Kashyap chander.kash...@linaro.org

Thanks, pushed to mmc-next for 3.7.

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Re: [PATCH 2/3] mmc: sdhci-s3c: Fix crash on module insertion for second time

2012-09-19 Thread Chris Ball
Hi,

On Fri, Sep 14 2012, Chander Kashyap wrote:
 If sdhci-s3c driver is built as module, it gives following error if inserted
 again after removing. This was happening as pm_runtime_use_autosuspend() is
 called in sdhci_s3c_probe() function but in sdhci_s3c_remove() its 
 complementry
 pm_runtime_dont_use_autosuspend() is not called.

 BUG: spinlock bad magic on CPU#1, insmod/955
  lock: 0xee771368, .magic: , .owner: insmod/955, .owner_cpu: 1
 [c00147e0] (unwind_backtrace+0x0/0xf8) from [c0136b40] 
 (do_raw_spin_unlock+0xa4/0xe4)
 [c0136b40] (do_raw_spin_unlock+0xa4/0xe4) from [c01be508] 
 (_raw_spin_unlock_irqrestore+0xc/0x38)
 [c01be508] (_raw_spin_unlock_irqrestore+0xc/0x38) from [c01a9334] 
 (sdhci_runtime_suspend_host+0x54/0x80)
 [c01a9334] (sdhci_runtime_suspend_host+0x54/0x80) from [bf0060a8] 
 (sdhci_s3c_runtime_suspend+0x14/0x38 [sdhci_s3c])
 [bf0060a8] (sdhci_s3c_runtime_suspend+0x14/0x38 [sdhci_s3c]) from 
 [c016cb00] (pm_generic_runtime_suspend+0x2c/0x40)
 [c016cb00] (pm_generic_runtime_suspend+0x2c/0x40) from [c0170090] 
 (__rpm_callback+0x70/0x98)
 [c0170090] (__rpm_callback+0x70/0x98) from [c01703f0] 
 (rpm_suspend+0xf0/0x534)
 [c01703f0] (rpm_suspend+0xf0/0x534) from [c0171670] 
 (__pm_runtime_suspend+0x5c/0x74)
 [c0171670] (__pm_runtime_suspend+0x5c/0x74) from [c016d018] 
 (pm_generic_runtime_idle+0x44/0x4c)
 [c016d018] (pm_generic_runtime_idle+0x44/0x4c) from [c0170090] 
 (__rpm_callback+0x70/0x98)
 [c0170090] (__rpm_callback+0x70/0x98) from [c0170984] 
 (rpm_idle+0xdc/0x18c)
 [c0170984] (rpm_idle+0xdc/0x18c) from [c0171608] 
 (pm_runtime_set_autosuspend_delay+0x30/0x3c)
 [c0171608] (pm_runtime_set_autosuspend_delay+0x30/0x3c) from [bf0069c4] 
 (sdhci_s3c_probe+0x35c/0x52c [sdhci_s3c])
 [bf0069c4] (sdhci_s3c_probe+0x35c/0x52c [sdhci_s3c]) from [c016a014] 
 (platform_drv_probe+0x18/0x1c)

 Signed-off-by: Chander Kashyap chander.kash...@linaro.org
 ---
  drivers/mmc/host/sdhci-s3c.c |1 +
  1 file changed, 1 insertion(+)

 diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
 index 0cbb4c2..3f4518d 100644
 --- a/drivers/mmc/host/sdhci-s3c.c
 +++ b/drivers/mmc/host/sdhci-s3c.c
 @@ -658,6 +658,7 @@ static int __devexit sdhci_s3c_remove(struct 
 platform_device *pdev)
  
   sdhci_remove_host(host, 1);
  
 + pm_runtime_dont_use_autosuspend(pdev-dev);
   pm_runtime_disable(pdev-dev);
  
   clk_disable(sc-clk_bus[sc-cur_clk]);

Thanks, pushed to mmc-next for 3.7.

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Re: [PATCH 3/3] mmc: sdhci-s3c: Add clk_(enable/disable) in runtime suspend/resume

2012-09-19 Thread Chris Ball
Hi Jaehoon, Girish,

On Fri, Sep 14 2012, Chander Kashyap wrote:
 Perform clock disable/enable in runtime suspend/resume.

 Signed-off-by: Chander Kashyap chander.kash...@linaro.org
 ---
  drivers/mmc/host/sdhci-s3c.c |   25 +++--
  1 file changed, 23 insertions(+), 2 deletions(-)

 diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
 index 3f4518d..d51 100644
 --- a/drivers/mmc/host/sdhci-s3c.c
 +++ b/drivers/mmc/host/sdhci-s3c.c
 @@ -513,7 +513,9 @@ static int __devinit sdhci_s3c_probe(struct 
 platform_device *pdev)
   goto err_no_busclks;
   }
  
 +#ifndef CONFIG_PM_RUNTIME
   clk_enable(sc-clk_bus[sc-cur_clk]);
 +#endif
  
   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
   host-ioaddr = devm_request_and_ioremap(pdev-dev, res);
 @@ -620,10 +622,13 @@ static int __devinit sdhci_s3c_probe(struct 
 platform_device *pdev)
   gpio_is_valid(pdata-ext_cd_gpio))
   sdhci_s3c_setup_card_detect_gpio(sc);
  
 + clk_disable(sc-clk_io);
   return 0;
  
   err_req_regs:
 +#ifndef CONFIG_PM_RUNTIME
   clk_disable(sc-clk_bus[sc-cur_clk]);
 +#endif
   for (ptr = 0; ptr  MAX_BUS_CLK; ptr++) {
   if (sc-clk_bus[ptr]) {
   clk_put(sc-clk_bus[ptr]);
 @@ -656,12 +661,15 @@ static int __devexit sdhci_s3c_remove(struct 
 platform_device *pdev)
   if (gpio_is_valid(sc-ext_cd_gpio))
   gpio_free(sc-ext_cd_gpio);
  
 + clk_enable(sc-clk_io);
   sdhci_remove_host(host, 1);
  
   pm_runtime_dont_use_autosuspend(pdev-dev);
   pm_runtime_disable(pdev-dev);
  
 +#ifndef CONFIG_PM_RUNTIME
   clk_disable(sc-clk_bus[sc-cur_clk]);
 +#endif
   for (ptr = 0; ptr  3; ptr++) {
   if (sc-clk_bus[ptr]) {
   clk_put(sc-clk_bus[ptr]);
 @@ -696,15 +704,28 @@ static int sdhci_s3c_resume(struct device *dev)
  static int sdhci_s3c_runtime_suspend(struct device *dev)
  {
   struct sdhci_host *host = dev_get_drvdata(dev);
 + struct sdhci_s3c *ourhost = to_s3c(host);
 + struct clk *busclk = ourhost-clk_io;
 + int ret;
 +
 + ret = sdhci_runtime_suspend_host(host);
  
 - return sdhci_runtime_suspend_host(host);
 + clk_disable(ourhost-clk_bus[ourhost-cur_clk]);
 + clk_disable(busclk);
 + return ret;
  }
  
  static int sdhci_s3c_runtime_resume(struct device *dev)
  {
   struct sdhci_host *host = dev_get_drvdata(dev);
 + struct sdhci_s3c *ourhost = to_s3c(host);
 + struct clk *busclk = ourhost-clk_io;
 + int ret;
  
 - return sdhci_runtime_resume_host(host);
 + clk_enable(busclk);
 + clk_enable(ourhost-clk_bus[ourhost-cur_clk]);
 + ret = sdhci_runtime_resume_host(host);
 + return ret;
  }
  #endif

Could I get an ACK on this patch from one of you, please?

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Re: [PATCH v6 0/9] mmc: dw_mmc: add support for device tree based instantiation

2012-09-19 Thread Chris Ball
Hi Thomas,

On Wed, Sep 19 2012, Thomas Abraham wrote:
 Hi Jaehoon, Seungwon,

 All the changes you have suggested for this patch series has been
 completed. If you could ack this series, it would be great.

 Thanks,
 Thomas.

 Hi Chris,

 I have addressed all the comments received for the v5 of the dw-mmc
 device tree support patch series. Will Newton has acked this patch
 series. Can this series be merged for v3.7 ?

Yes, looks good; pushed to mmc-next for 3.7.  Jaehoon and Seungwon,
if you reply soon with your ACK then I'll add it to this patchset.

Thanks,

- Chris.
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Re: [PATCH v6 0/9] mmc: dw_mmc: add support for device tree based instantiation

2012-09-19 Thread Thomas Abraham
On 19 September 2012 12:35, Chris Ball c...@laptop.org wrote:
 Hi Thomas,

 On Wed, Sep 19 2012, Thomas Abraham wrote:
 Hi Jaehoon, Seungwon,

 All the changes you have suggested for this patch series has been
 completed. If you could ack this series, it would be great.

 Thanks,
 Thomas.

 Hi Chris,

 I have addressed all the comments received for the v5 of the dw-mmc
 device tree support patch series. Will Newton has acked this patch
 series. Can this series be merged for v3.7 ?

 Yes, looks good; pushed to mmc-next for 3.7.  Jaehoon and Seungwon,
 if you reply soon with your ACK then I'll add it to this patchset.

Thanks Chris.

Regards,
Thomas.
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Re: [PATCH 3/3] mmc: sdhci-s3c: Add clk_(enable/disable) in runtime suspend/resume

2012-09-19 Thread Chris Ball
Hi,

On Wed, Sep 19 2012, Jaehoon Chung wrote:
 Looks good to me.

 Acked-by: Jaehoon Chung jh80.ch...@samsung.com

Thanks, pushed to mmc-next for 3.7.  (The patch didn't merge cleanly
so I applied it by hand; let me know if anything looks wrong.)

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Re: [PATCH] video: drm: Add match table for drm platform device

2012-09-19 Thread Paul Menzel
Dear Leela,


thank you for your patch.


Am Mittwoch, den 19.09.2012, 00:05 +0530 schrieb Leela Krishna Amudala:
 This patch adds match table for drm platform device.

Please drop that line as it is the same as in the subject line.

It would be better,

1. if you explain for what this will be used,
2. if this can be tested somehow,
3. if this fixes a bug,
4. why CONFIG_OF is needed.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  drivers/gpu/drm/exynos/exynos_drm_drv.c |9 +
  1 files changed, 9 insertions(+), 0 deletions(-)
 
 diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
 b/drivers/gpu/drm/exynos/exynos_drm_drv.c
 index d070719..18abdcc 100644
 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
 +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
 @@ -294,12 +294,21 @@ static int exynos_drm_platform_remove(struct 
 platform_device *pdev)
   return 0;
  }
  
 +#ifdef CONFIG_OF
 +static const struct of_device_id drm_device_dt_match[] = {
 + { .compatible = samsung,exynos-drm-device},
 + {},
 +};
 +MODULE_DEVICE_TABLE(of, drm_device_dt_match);
 +#endif
 +
  static struct platform_driver exynos_drm_platform_driver = {
   .probe  = exynos_drm_platform_probe,
   .remove = __devexit_p(exynos_drm_platform_remove),
   .driver = {
   .owner  = THIS_MODULE,
   .name   = exynos-drm,
 + .of_match_table = of_match_ptr(drm_device_dt_match),
   },
  };


Thanks,

Paul


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Re: [PATCH v3] ARM: EXYNOS: Add MFC device tree support

2012-09-19 Thread Karol Lewandowski
On 09/14/2012 05:38 PM, Arun Kumar K wrote:

 This patch adds device tree entry for MFC v6 in the Exynos5
 SoC. Makes the required changes in the clock files and adds
 MFC to the DT device list.


Hi!

Thanks for working on this patch. Please allow me to add few
comments.


 diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
 b/arch/arm/boot/dts/exynos5250.dtsi
 index b55794b..5df2f99 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -62,6 +62,12 @@
   interrupts = 0 42 0;
   };
  
 + mfc {


Nitpick - shouldn't node names be generic?  MFC is strictly
samsung specific, something like codec/video-codec would make
more sense (IMVHO). I would prefer to see address too (e.g.
codec@0x1100).

However, I do see that rtc below doesn't specify address in node too,
so maybe I'm missing something here.


  
 +struct mfc_dt_meminfo {
 + unsigned long loff;
 + unsigned long lsize;
 + unsigned long roff;
 + unsigned long rsize;


  char *compatible;

 +};
 +
 +int fdt_find_mfc_mem(unsigned long node, const char *uname, int depth,
 + void *data)
 +{
 + __be32 *prop;
 + unsigned long len;
 + struct mfc_dt_meminfo *mfc_mem = data;
 +
 + if (!of_flat_dt_is_compatible(node, samsung,mfc-v6))
 + return 0;


  if (!of_flat_dt_is_compatible(node, mfc_mem-compatible))
return 0;

 +
 + prop = of_get_flat_dt_prop(node, samsung,mfc-l, len);
 + if (!prop)
 + return 0;
 + mfc_mem-loff = of_read_ulong(prop, len/4);
 +
 + prop = of_get_flat_dt_prop(node, samsung,mfc-l-size, len);
 + if (!prop)
 + return 0;
 + mfc_mem-lsize = of_read_ulong(prop, len/4);
 +
 + prop = of_get_flat_dt_prop(node, samsung,mfc-r, len);
 + if (!prop)
 + return 0;
 + mfc_mem-roff = of_read_ulong(prop, len/4);
 +
 + prop = of_get_flat_dt_prop(node, samsung,mfc-r-size, len);
 + if (!prop)
 + return 0;
 + mfc_mem-rsize = of_read_ulong(prop, len/4);
 +
 + return 1;
 +}


Above function could be reused for mfc-v5 (exynos4-dt.c) if compatible
string weren't hardcoded. Thus, please consider changing that and
moving this function to some common(.c?) file - you can see one possible
solution inline.

 +
 +static void __init exynos5_reserve(void)
 +{
 + struct mfc_dt_meminfo mfc_mem;


mfc_mem.compatible = samsung,mfc-v6;

 +
 + /* Reserve memory for MFC only if it's available */
 + if (of_scan_flat_dt(fdt_find_mfc_mem, mfc_mem))
 + s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
 + mfc_mem.lsize);
 +}
 +
  DT_MACHINE_START(EXYNOS5_DT, SAMSUNG EXYNOS5 (Flattened Device Tree))
   /* Maintainer: Kukjin Kim kgene@samsung.com */
   .init_irq   = exynos5_init_irq,
 @@ -94,4 +148,5 @@ DT_MACHINE_START(EXYNOS5_DT, SAMSUNG EXYNOS5 (Flattened 
 Device Tree))
   .timer  = exynos4_timer,
   .dt_compat  = exynos5250_dt_compat,
   .restart= exynos5_restart,
 + .reserve= exynos5_reserve,
  MACHINE_END


Regards,
-- 
Karol Lewandowski | Samsung Poland RD Center | Linux/Platform
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Re: [PATCH 4/5] ARM: EXYNOS: Add support for Exynos secure firmware

2012-09-19 Thread Tomasz Figa
Hi Olof,

On Saturday 15 of September 2012 17:44:55 Olof Johansson wrote:
 On Thu, Sep 13, 2012 at 10:13:37AM +0200, Tomasz Figa wrote:
  +static void __iomem *exynos_cpu_boot_reg(int cpu)
  +{
  +   return S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
  +}
 
 This communication area in sysram should probably be seen as a part of
 the firmware interface. It should thus be defined as part of the binding
 instead, i.e.  through a reg property or similar there. That also would
 make it easy to convert to using ioremap() instead of iodesc tables,
 which always a nice thing.

The problem with SYSRAM_NS is that it might be also used in other code, not 
related to firmware only. I don't know exactly all the use cases for it.

Is it really a big problem or we could let it be for now, merge the patches 
for firmware and then convert SYSRAM_NS to dynamic mapping when its 
situation clarifies?

Best regards,
-- 
Tomasz Figa
Samsung Poland RD Center

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Re: [PATCH v2 1/5] mmc: host: sdhci-s3c: Add broken-voltage DT property for broken voltage quirk

2012-09-19 Thread Tomasz Figa
Hi Chris,

On Wednesday 19 of September 2012 01:42:01 Chris Ball wrote:
 On Tue, Sep 04 2012, Tomasz Figa wrote:
  Some boards use fixed voltage regulator for vmmc supply (e.g. for eMMC
  memories). MMC_CAP2_BROKEN_VOLTAGE must be enabled for them to operate
  correctly.

 Is there a reason we can't make this a property on the regulator instead?

Is there a reason we can't make this a property of the mmc subsystem? ;)

Now, seriously, could you elaborate on this a bit more? Do you mean that a 
regulator should provide a dummy set voltage operation that would accept 
any voltage?

Best regards,
-- 
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Samsung Poland RD Center

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Re: [PATCH v2 1/5] mmc: host: sdhci-s3c: Add broken-voltage DT property for broken voltage quirk

2012-09-19 Thread Chris Ball
Hi Tomasz,

On Wed, Sep 19 2012, Tomasz Figa wrote:
 Hi Chris,

 On Wednesday 19 of September 2012 01:42:01 Chris Ball wrote:
 On Tue, Sep 04 2012, Tomasz Figa wrote:
  Some boards use fixed voltage regulator for vmmc supply (e.g. for eMMC
  memories). MMC_CAP2_BROKEN_VOLTAGE must be enabled for them to operate
  correctly.

 Is there a reason we can't make this a property on the regulator instead?

 Is there a reason we can't make this a property of the mmc subsystem? ;)

 Now, seriously, could you elaborate on this a bit more? Do you mean that a 
 regulator should provide a dummy set voltage operation that would accept 
 any voltage?

Sorry for the terseness.

It seems like we're encoding exactly the same information twice in two
different subsystems -- I don't see the point, so I'd like to think
about how we could do better.

For example, if we're only concerned about fixed regulators, could we
just detect a fixed regulator in the driver and avoid the failing call
to regulator_set_voltage() directly, without needing to go via this
capability?  Seems like the capability doesn't tell us anything we
couldn't already have known.

Thanks,

- Chris.
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Re: [PATCH v2 1/5] mmc: host: sdhci-s3c: Add broken-voltage DT property for broken voltage quirk

2012-09-19 Thread Chris Ball
Hi,

On Wed, Sep 19 2012, Tomasz Figa wrote:
 We could just check if the regulator provides the capability to change the 
 voltage.

 I don't see any direct way of querying the regulator for provided 
 capabilities (correct me if I'm just blind), but calling 
 regulator_count_voltages() on the regulator and checking if the returned 
 value is 1 should be enough to assume that the regulator is fixed.

Sounds good, I agree.  Are you able to test that the obvious patch below
works on your fixed-regulator board?

Jaehoon and Adrian, can you think of any reason why we shouldn't replace
MMC_CAP2_BROKEN_VOLTAGE with the regulator_count_voltages() call below?
Thanks.


diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 044cd01..a3cc740 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1132,7 +1132,7 @@ int mmc_regulator_set_ocr(struct mmc_host *mmc,
 */
voltage = regulator_get_voltage(supply);
 
-   if (mmc-caps2  MMC_CAP2_BROKEN_VOLTAGE)
+   if (regulator_count_voltages(supply) == 1)
min_uV = max_uV = voltage;
 
if (voltage  0)

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[GIT PULL 2/7] Samsung gpio for v3.7

2012-09-19 Thread Kukjin Kim
Hi Arnd, Olof

This is for supporting DT gpio for Samsung S3C24XX.

Since there are many changes for gpio-samsung in my tree, this has been
included in my tree with Linus' agreement.

If any problems, please kindly let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

The following changes since commit 4cbe5a555fa58a79b6ecbb6c531b8bab0650778d:

  Linux 3.6-rc4 (2012-09-01 10:39:58 -0700)

are available in the git repository at:
  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
next/gpio-samsung

Heiko Stuebner (1):
  gpio: samsung: add devicetree init for s3c24xx arches

 .../devicetree/bindings/gpio/gpio-samsung.txt  |   43 +
 drivers/gpio/gpio-samsung.c|   63

 2 files changed, 106 insertions(+), 0 deletions(-)

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[GIT PULL 3/7] Samsung pinctrl for v3.7

2012-09-19 Thread Kukjin Kim
Hi Arnd, Olof

This branch is for supporting pinctrl for Samsung EXYNOS. Now this can
support EXYNOS4210 and other EXYNOS SoCs such as EXYNOS4X12 will be
supported next time.

If any problems, please kindly let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

The following changes since commit 4cbe5a555fa58a79b6ecbb6c531b8bab0650778d:

  Linux 3.6-rc4 (2012-09-01 10:39:58 -0700)

are available in the git repository at:
  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
next/pinctrl-samsung

Thomas Abraham (6):
  pinctrl: add samsung pinctrl and gpiolib driver
  pinctrl: add exynos4210 specific extensions for samsung pinctrl driver
  gpio: exynos4: skip gpiolib registration if pinctrl driver is used
  ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used
  ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC
  ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree
enabled platform

 .../bindings/pinctrl/samsung-pinctrl.txt   |  196 +
 arch/arm/boot/dts/exynos4210-pinctrl.dtsi  |  457 ++
 arch/arm/boot/dts/exynos4210.dtsi  |   37 +
 arch/arm/mach-exynos/Kconfig   |2 +
 arch/arm/mach-exynos/common.c  |   26 +
 drivers/gpio/gpio-samsung.c|   21 +
 drivers/pinctrl/Kconfig|9 +
 drivers/pinctrl/Makefile   |2 +
 drivers/pinctrl/pinctrl-exynos.c   |  560 
 drivers/pinctrl/pinctrl-exynos.h   |  217 +
 drivers/pinctrl/pinctrl-samsung.c  |  888

 drivers/pinctrl/pinctrl-samsung.h  |  239 ++
 12 files changed, 2654 insertions(+), 0 deletions(-)
 create mode 100644
Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl.dtsi
 create mode 100644 drivers/pinctrl/pinctrl-exynos.c
 create mode 100644 drivers/pinctrl/pinctrl-exynos.h
 create mode 100644 drivers/pinctrl/pinctrl-samsung.c
 create mode 100644 drivers/pinctrl/pinctrl-samsung.h

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[GIT PULL 6/7] Samsung cleanup fimd header for v3.7

2012-09-19 Thread Kukjin Kim
Hi Arnd, Olof.

This is for moving header file is related to fimd from platform to
include/video.

Since this touches many Samsung stuff, it is included in samsung tree and I
requested to pull into Florian's tree and he already agreed. So its name is
'v3.7-for-florian'.

If any problems, please kindly let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

The following changes since commit 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee:

  Linux 3.6-rc1 (2012-08-02 16:38:10 -0700)

are available in the git repository at:
  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
v3.7-for-florian

Leela Krishna Amudala (2):
  include/video: move fimd register headers from platform to
include/video
  include/video: Add register offsets for FIMD version 8

 arch/arm/mach-exynos/mach-nuri.c   |2 +-
 arch/arm/mach-exynos/mach-origen.c |2 +-
 arch/arm/mach-exynos/mach-smdk4x12.c   |2 +-
 arch/arm/mach-exynos/mach-smdkv310.c   |2 +-
 arch/arm/mach-exynos/mach-universal_c210.c |2 +-
 arch/arm/mach-exynos/setup-fimd0.c |2 +-
 arch/arm/mach-s3c24xx/mach-smdk2416.c  |2 +-
 arch/arm/mach-s3c64xx/mach-anw6410.c   |2 +-
 arch/arm/mach-s3c64xx/mach-crag6410.c  |2 +-
 arch/arm/mach-s3c64xx/mach-hmt.c   |2 +-
 arch/arm/mach-s3c64xx/mach-mini6410.c  |2 +-
 arch/arm/mach-s3c64xx/mach-ncp.c   |2 +-
 arch/arm/mach-s3c64xx/mach-real6410.c  |2 +-
 arch/arm/mach-s3c64xx/mach-smartq5.c   |2 +-
 arch/arm/mach-s3c64xx/mach-smartq7.c   |2 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c  |2 +-
 arch/arm/mach-s5p64x0/mach-smdk6440.c  |2 +-
 arch/arm/mach-s5p64x0/mach-smdk6450.c  |2 +-
 arch/arm/mach-s5pc100/mach-smdkc100.c  |2 +-
 arch/arm/mach-s5pv210/mach-aquila.c|2 +-
 arch/arm/mach-s5pv210/mach-goni.c  |2 +-
 arch/arm/mach-s5pv210/mach-smdkv210.c  |2 +-
 arch/arm/plat-samsung/include/plat/regs-fb-v4.h|  159

 drivers/gpu/drm/exynos/exynos_drm_fimd.c   |2 +-
 drivers/video/s3c-fb.c |2 +-
 .../plat/regs-fb.h = include/video/samsung_fimd.h |  152
+--
 26 files changed, 165 insertions(+), 194 deletions(-)
 delete mode 100644 arch/arm/plat-samsung/include/plat/regs-fb-v4.h
 rename arch/arm/plat-samsung/include/plat/regs-fb.h =
include/video/samsung_fimd.h (73%)

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[GIT PULL 7/7] Samsung for v3.7

2012-09-19 Thread Kukjin Kim
Hi Arnd, Olof

This is for updating s3c6400_defconfig to build every s3c64xx stuff.

This helps to know at least building error before merging them.

Note that I'm still sorting out some Samsung stuff for v3.7 and it will be
sent to you soon.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

The following changes since commit 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee:

  Linux 3.6-rc1 (2012-08-02 16:38:10 -0700)

are available in the git repository at:
  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
next/defconfig-samsung

Kukjin Kim (1):
  ARM: s3c6400_defconfig: enable more boards in defconfig

 arch/arm/configs/s3c6400_defconfig |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

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RE: [PATCH V5] ARM: EXYNOS5: Add bus clock for FIMD

2012-09-19 Thread Kukjin Kim
Leela Krishna Amudala wrote:
 
 This patch adds the bus clock for FIMD and changes the device name for lcd
 clock
 
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/mach-exynos/clock-exynos5.c |   32
++
 --
  1 files changed, 22 insertions(+), 10 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-
 exynos/clock-exynos5.c
 index 774533c..404c53d 100644
 --- a/arch/arm/mach-exynos/clock-exynos5.c
 +++ b/arch/arm/mach-exynos/clock-exynos5.c
 @@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = {
   .ctrlbit= (1  4),
  };
 
 +static struct clk exynos5_clk_fimd1 = {
 + .name   = fimd,
 + .devname= exynos5-fb.1,
 + .enable = exynos5_clk_ip_disp1_ctrl,
 + .ctrlbit= (1  0),
 +};
 +
  struct clk *exynos5_clkset_group_list[] = {
   [0] = clk_ext_xtal_mux,
   [1] = NULL,
 @@ -1120,6 +1127,18 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
   .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
  };
 
 +struct clksrc_clk exynos5_clk_sclk_fimd1 = {
 + .clk= {
 + .name   = sclk_fimd,
 + .devname= exynos5-fb.1,
 + .enable = exynos5_clksrc_mask_disp1_0_ctrl,
 + .ctrlbit= (1  0),
 + },
 + .sources = exynos5_clkset_group,
 + .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },
 + .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
 +};
 +
  static struct clksrc_clk exynos5_clksrcs[] = {
   {
   .clk= {
 @@ -1131,16 +1150,6 @@ static struct clksrc_clk exynos5_clksrcs[] = {
   .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size
 = 8 },
   }, {
   .clk= {
 - .name   = sclk_fimd,
 - .devname= s3cfb.1,
 - .enable = exynos5_clksrc_mask_disp1_0_ctrl,
 - .ctrlbit= (1  0),
 - },
 - .sources = exynos5_clkset_group,
 - .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift =
 0, .size = 4 },
 - .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift =
 0, .size = 4 },
 - }, {
 - .clk= {
   .name   = aclk_266_gscl,
   },
   .sources = clk_src_gscl_266,
 @@ -1240,12 +1249,14 @@ static struct clksrc_clk *exynos5_sysclks[] = {
   exynos5_clk_mdout_spi0,
   exynos5_clk_mdout_spi1,
   exynos5_clk_mdout_spi2,
 + exynos5_clk_sclk_fimd1,
  };
 
  static struct clk *exynos5_clk_cdev[] = {
   exynos5_clk_pdma0,
   exynos5_clk_pdma1,
   exynos5_clk_mdma1,
 + exynos5_clk_fimd1,
  };
 
  static struct clksrc_clk *exynos5_clksrc_cdev[] = {
 @@ -1274,6 +1285,7 @@ static struct clk_lookup exynos5_clk_lookup[] = {
   CLKDEV_INIT(dma-pl330.0, apb_pclk, exynos5_clk_pdma0),
   CLKDEV_INIT(dma-pl330.1, apb_pclk, exynos5_clk_pdma1),
   CLKDEV_INIT(dma-pl330.2, apb_pclk, exynos5_clk_mdma1),
 + CLKDEV_INIT(exynos5-fb.1, lcd, exynos5_clk_fimd1),
  };
 
  static unsigned long exynos5_epll_get_rate(struct clk *clk)
 --
 1.7.0.4

Looks OK to me, will apply with Jingoo's ack(Or review?).

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH 2/2] ARM: SAMSUNG: Add check for NULL in clock interface

2012-09-19 Thread Kukjin Kim
Thomas Abraham wrote:
 
 On 6 September 2012 19:55, Chander Kashyap chander.kash...@linaro.org
 wrote:
  The clock instance parameter in Samsung clock interface is not being
 checked
  for NULL pointers. Add checks for NULL pointers.
 
  Signed-off-by: Chander Kashyap chander.kash...@linaro.org
  ---
   arch/arm/plat-samsung/clock.c |8 
   1 file changed, 4 insertions(+), 4 deletions(-)
 
  diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-
 samsung/clock.c
  index 65c5eca..7938fbc 100644
  --- a/arch/arm/plat-samsung/clock.c
  +++ b/arch/arm/plat-samsung/clock.c
  @@ -119,7 +119,7 @@ void clk_disable(struct clk *clk)
 
   unsigned long clk_get_rate(struct clk *clk)
   {
  -   if (IS_ERR(clk))
  +   if (IS_ERR_OR_NULL(clk))
  return 0;
 
  if (clk-rate != 0)
  @@ -136,7 +136,7 @@ unsigned long clk_get_rate(struct clk *clk)
 
   long clk_round_rate(struct clk *clk, unsigned long rate)
   {
  -   if (!IS_ERR(clk)  clk-ops  clk-ops-round_rate)
  +   if (!IS_ERR_OR_NULL(clk)  clk-ops  clk-ops-round_rate)
  return (clk-ops-round_rate)(clk, rate);
 
  return rate;
  @@ -146,7 +146,7 @@ int clk_set_rate(struct clk *clk, unsigned long
rate)
   {
  int ret;
 
  -   if (IS_ERR(clk))
  +   if (IS_ERR_OR_NULL(clk))
  return -EINVAL;
 
  /* We do not default just do a clk-rate = rate as
  @@ -175,7 +175,7 @@ int clk_set_parent(struct clk *clk, struct clk
 *parent)
   {
  int ret = 0;
 
  -   if (IS_ERR(clk))
  +   if (IS_ERR_OR_NULL(clk) || IS_ERR_OR_NULL(parent))
  return -EINVAL;
 
  spin_lock(clocks_lock);
  --
  1.7.9.5
 
 Acked-by: Thomas Abraham thomas.abra...@linaro.org

Looks OK, will apply.

Thanks.

Best regards,
Kgene.
--
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH 1/2] ARM: Exynos4: Put PCM, Slimbus, Spdif clocks to off state

2012-09-19 Thread Kukjin Kim
Thomas Abraham wrote:
 
 On 6 September 2012 19:46, Chander Kashyap chander.kash...@linaro.org
 wrote:
  The clocks for PCM, Slimbus, Spdif added to off list in order
  to turn them off at boot time.
 
  Signed-off-by: Chander Kashyap chander.kash...@linaro.org
  ---
   arch/arm/mach-exynos/clock-exynos4.c |   19 +++
   1 file changed, 19 insertions(+)
 
  diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-
 exynos/clock-exynos4.c
  index 7cc5491..6a45c9a 100644
  --- a/arch/arm/mach-exynos/clock-exynos4.c
  +++ b/arch/arm/mach-exynos/clock-exynos4.c
  @@ -627,6 +627,25 @@ static struct clk exynos4_init_clocks_off[] = {
  .enable = exynos4_clk_ip_peril_ctrl,
  .ctrlbit= (1  21),
  }, {
  +   .name   = pcm,
  +   .devname= samsung-pcm.1,
  +   .enable = exynos4_clk_ip_peril_ctrl,
  +   .ctrlbit= (1  22),
  +   }, {
  +   .name   = pcm,
  +   .devname= samsung-pcm.2,
  +   .enable = exynos4_clk_ip_peril_ctrl,
  +   .ctrlbit= (1  23),
  +   }, {
  +   .name   = slimbus,
  +   .enable = exynos4_clk_ip_peril_ctrl,
  +   .ctrlbit= (1  25),
  +   }, {
  +   .name   = spdif,
  +   .devname= samsung-spdif,
  +   .enable = exynos4_clk_ip_peril_ctrl,
  +   .ctrlbit= (1  26),
  +   }, {
  .name   = ac97,
  .devname= samsung-ac97,
  .enable = exynos4_clk_ip_peril_ctrl,
  --
  1.7.9.5
 
 Acked-by: Thomas Abraham thomas.abra...@linaro.org

Sangbeom, could you please check this one more?

Thanks.

Best regards,
Kgene.
--
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH v3] ARM: S3C24XX: Add WIZnet W5300E01-ARM board support

2012-09-19 Thread Kukjin Kim
Taehun Kim wrote:
 
 - The gpio routines are changed to use the gpio_request() functions from
   comments of Vasily and Sylwester.
 - The mistake of adding a character by my email client automatically is
 fixed.
 
 Please review this patch and apply it if do not have any problems.
 

Taehun,

Above area is for adding comments like 'This patch adds WIZnet W5300E01 board' 
because it will be remained in its git log and nobody want to see your old 
request in there. If any comments which are not related to changes just put it 
after '---' around your sign. It doesn't hurt your patch.

And you need to update this against on for-next of my tree because some S3C2410 
gpio APIs have been gone.(See the Sylwester's comments) Please re-send this.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.


 Signed-off-by: Taehun Kim kth3...@gmail.com
 ---
  arch/arm/mach-s3c24xx/Kconfig |5 +
  arch/arm/mach-s3c24xx/Makefile|1 +
  arch/arm/mach-s3c24xx/mach-w5300e01.c |  193
 +
  3 files changed, 199 insertions(+)
  create mode 100644 arch/arm/mach-s3c24xx/mach-w5300e01.c
  
[snip]

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RE: [PATCH 1/2] ARM: Exynos4: Put PCM, Slimbus, Spdif clocks to off state

2012-09-19 Thread Sangbeom Kim
Hi!
On Thursday, Sep 20, 2012 at 08:24 AM, Kukjin Kim wrote:

   The clocks for PCM, Slimbus, Spdif added to off list in order
   to turn them off at boot time.
  
   Signed-off-by: Chander Kashyap chander.kash...@linaro.org
  Acked-by: Thomas Abraham thomas.abra...@linaro.org

Acked-by: Sangbeom Kim sbki...@samsung.com

Thanks,
Sangbeom.

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RE: [PATCH 1/2] ARM: Exynos4: Put PCM, Slimbus, Spdif clocks to off state

2012-09-19 Thread Kukjin Kim
Sangbeom Kim wrote:
 
 Hi!
 On Thursday, Sep 20, 2012 at 08:24 AM, Kukjin Kim wrote:
 
The clocks for PCM, Slimbus, Spdif added to off list in order
to turn them off at boot time.
   
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
   Acked-by: Thomas Abraham thomas.abra...@linaro.org
 
 Acked-by: Sangbeom Kim sbki...@samsung.com
 
Thanks, will apply.

Best regards,
Kgene.
--
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH] ARM: EXYNOS: no duplicate mask/unmask in eint0_15

2012-09-19 Thread Kukjin Kim
Doug Anderson wrote:
 
 On Thu, Sep 6, 2012 at 8:21 AM, Daniel Kurtz djku...@chromium.org wrote:
  chained_irq_enter/exit() already maskack/unmask the chained interrupt.
  There is no need to also explicitly do it in the handler.
 
  Signed-off-by: Daniel Kurtz djku...@chromium.org
  ---
   arch/arm/mach-exynos/common.c |7 ---
   1 files changed, 0 insertions(+), 7 deletions(-)
 
  diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-
 exynos/common.c
  index 4eb39cd..0a85aec 100644
  --- a/arch/arm/mach-exynos/common.c
  +++ b/arch/arm/mach-exynos/common.c
  @@ -965,14 +965,7 @@ static void exynos_irq_eint0_15(unsigned int irq,
 struct irq_desc *desc)
  struct irq_chip *chip = irq_get_chip(irq);
 
  chained_irq_enter(chip, desc);
  -   chip-irq_mask(desc-irq_data);
  -
  -   if (chip-irq_ack)
  -   chip-irq_ack(desc-irq_data);
  -
  generic_handle_irq(*irq_data);
  -
  -   chip-irq_unmask(desc-irq_data);
  chained_irq_exit(chip, desc);
   }
 
  --
  1.7.7.3
 
 
 Acked-by: Doug Anderson diand...@chromium.org

Yes, will apply.
Thanks.

Best regards,
Kgene.
--
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SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [PATCH V4] ARM: EXYNOS5: Add bus clock and set parent clock for FIMD

2012-09-19 Thread Jingoo Han
On Monday, September 17, 2012 7:37 PM Kukjin Kim wrote
 
 Jingoo Han wrote:
 
  On Monday, September 17, 2012 11:43 PM Leela Krishna Amudala wrote
  
   This patch adds the bus clock for FIMD and changes the device name for
  lcd clock
   also sets mout_mpll_user as parent clock to fimd
  
   Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 
  Acked-by: Jingoo Han jg1@samsung.com
 
 In this case, since Leela addressed comments from you, seems it should be
 'Reviewed-by'?
 

According to 'Documentation/SubmittingPatches',

402 Acked-by: is often used by the maintainer of the affected code when that
403 maintainer neither contributed to nor forwarded the patch.

I just use 'Acked-by' as Samsung Framebuffer maintainer, because
this patch affects Samsung Framebuffer driver directly.

Good luck.



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Re: [PATCH V5] ARM: EXYNOS5: Add bus clock for FIMD

2012-09-19 Thread Jingoo Han
On Tuesday, September 18, 2012 11:25 PM Leela Krishna Amudala wrote
 
 This patch adds the bus clock for FIMD and changes the device name for lcd 
 clock
 
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com

Reviewed-by: Jingoo Han jg1@samsung.com


 ---
  arch/arm/mach-exynos/clock-exynos5.c |   32 ++--
  1 files changed, 22 insertions(+), 10 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/clock-exynos5.c 
 b/arch/arm/mach-exynos/clock-exynos5.c
 index 774533c..404c53d 100644
 --- a/arch/arm/mach-exynos/clock-exynos5.c
 +++ b/arch/arm/mach-exynos/clock-exynos5.c
 @@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = {
   .ctrlbit= (1  4),
  };
 
 +static struct clk exynos5_clk_fimd1 = {
 + .name   = fimd,
 + .devname= exynos5-fb.1,
 + .enable = exynos5_clk_ip_disp1_ctrl,
 + .ctrlbit= (1  0),
 +};
 +
  struct clk *exynos5_clkset_group_list[] = {
   [0] = clk_ext_xtal_mux,
   [1] = NULL,
 @@ -1120,6 +1127,18 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
   .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
  };
 
 +struct clksrc_clk exynos5_clk_sclk_fimd1 = {
 + .clk= {
 + .name   = sclk_fimd,
 + .devname= exynos5-fb.1,
 + .enable = exynos5_clksrc_mask_disp1_0_ctrl,
 + .ctrlbit= (1  0),
 + },
 + .sources = exynos5_clkset_group,
 + .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },
 + .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
 +};
 +
  static struct clksrc_clk exynos5_clksrcs[] = {
   {
   .clk= {
 @@ -1131,16 +1150,6 @@ static struct clksrc_clk exynos5_clksrcs[] = {
   .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 
 },
   }, {
   .clk= {
 - .name   = sclk_fimd,
 - .devname= s3cfb.1,
 - .enable = exynos5_clksrc_mask_disp1_0_ctrl,
 - .ctrlbit= (1  0),
 - },
 - .sources = exynos5_clkset_group,
 - .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 
 4 },
 - .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 
 4 },
 - }, {
 - .clk= {
   .name   = aclk_266_gscl,
   },
   .sources = clk_src_gscl_266,
 @@ -1240,12 +1249,14 @@ static struct clksrc_clk *exynos5_sysclks[] = {
   exynos5_clk_mdout_spi0,
   exynos5_clk_mdout_spi1,
   exynos5_clk_mdout_spi2,
 + exynos5_clk_sclk_fimd1,
  };
 
  static struct clk *exynos5_clk_cdev[] = {
   exynos5_clk_pdma0,
   exynos5_clk_pdma1,
   exynos5_clk_mdma1,
 + exynos5_clk_fimd1,
  };
 
  static struct clksrc_clk *exynos5_clksrc_cdev[] = {
 @@ -1274,6 +1285,7 @@ static struct clk_lookup exynos5_clk_lookup[] = {
   CLKDEV_INIT(dma-pl330.0, apb_pclk, exynos5_clk_pdma0),
   CLKDEV_INIT(dma-pl330.1, apb_pclk, exynos5_clk_pdma1),
   CLKDEV_INIT(dma-pl330.2, apb_pclk, exynos5_clk_mdma1),
 + CLKDEV_INIT(exynos5-fb.1, lcd, exynos5_clk_fimd1),
  };
 
  static unsigned long exynos5_epll_get_rate(struct clk *clk)
 --
 1.7.0.4

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Re: [PATCH v6 6/9] mmc: dw_mmc: add device tree support

2012-09-19 Thread Thomas Abraham
On 19 September 2012 19:09, Seungwon Jeon tgih@samsung.com wrote:
 On Tuesday, September 18, 2012, Thomas Abraham thomas.abra...@linaro.org 
 wrote:
 +#ifdef CONFIG_OF
 +/* given a slot id, find out the device node representing that slot */
 +static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 
 slot)
 +{
 + struct device_node *np;
 + const __be32 *addr;
 + int len;
 +
 + if (!dev || !dev-of_node)
 + return NULL;
 +
 + for_each_child_of_node(dev-of_node, np) {
 + addr = of_get_property(np, reg, len);
 + if (!addr || (len  sizeof(int)))
 + continue;
 + if (be32_to_cpup(addr) == slot)
 + return np;
 + }
 + return NULL;
 +}
 +
 +/* find out bus-width for a given slot */
 +static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
 +{
 + struct device_node *np = dw_mci_of_find_slot_node(dev, slot);
 + u32 bus_wd = 1;
 +
 + if (!np)
 + return 1;
 +
 + if (of_property_read_u32(np, bus-width, bus_wd))
 + dev_err(dev, bus-width property not found, assuming width
 + as 1\n);
 + return bus_wd;
 +}
 +#else /* CONFIG_OF */
 +static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
 +{
 + return 1;
 +}
 +static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 
 slot)
 +{
 + return NULL;
 +}
 +#endif /* CONFIG_OF */
 +
  static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
  {
   struct mmc_host *mmc;
   struct dw_mci_slot *slot;
 + u8 bus_width;

   mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host-dev);
   if (!mmc)
 @@ -1782,6 +1830,7 @@ static int dw_mci_init_slot(struct dw_mci *host, 
 unsigned int id)
   slot-id = id;
   slot-mmc = mmc;
   slot-host = host;
 + host-slot[id] = slot;

   mmc-ops = dw_mci_ops;
   mmc-f_min = DIV_ROUND_UP(host-bus_hz, 510);
 @@ -1806,8 +1855,18 @@ static int dw_mci_init_slot(struct dw_mci *host, 
 unsigned int id)
   mmc-caps2 = host-pdata-caps2;

   if (host-pdata-get_bus_wd)
 - if (host-pdata-get_bus_wd(slot-id) = 4)
 - mmc-caps |= MMC_CAP_4_BIT_DATA;
 + bus_width = host-pdata-get_bus_wd(slot-id);
 + else if (host-dev-of_node)
 + bus_width = dw_mci_of_get_bus_wd(host-dev, slot-id);
 + else
 + bus_width = 1;
 +
 + switch (bus_width) {
 + case 8:
 + mmc-caps |= MMC_CAP_8_BIT_DATA;
 + case 4:
 + mmc-caps |= MMC_CAP_4_BIT_DATA;
 + }

   if (host-pdata-quirks  DW_MCI_QUIRK_HIGHSPEED)
   mmc-caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
 @@ -1852,7 +1911,6 @@ static int dw_mci_init_slot(struct dw_mci *host, 
 unsigned int id)
   else
   clear_bit(DW_MMC_CARD_PRESENT, slot-flags);

 - host-slot[id] = slot;
   mmc_add_host(mmc);

  #if defined(CONFIG_DEBUG_FS)
 @@ -1944,16 +2002,74 @@ static bool mci_wait_reset(struct device *dev, 
 struct dw_mci *host)
   return false;
  }

 The following CONFIG_OF block can be put together in upper CONFIG_OF .

The placement of device tree related code is considering the logical
structure and flow of the code. So maybe we can just retain the below
code here for now.


 +#ifdef CONFIG_OF
 +static struct dw_mci_of_quirks {
 + char *quirk;
 + int id;
 +} of_quirks[] = {
 + {
 + .quirk  = supports-highspeed,
 + .id = DW_MCI_QUIRK_HIGHSPEED,
 + }, {
 + .quirk  = broken-cd,
 + .id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
 + },
 +};
 +
 +static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
 +{
 + struct dw_mci_board *pdata;
 + struct device *dev = host-dev;
 + struct device_node *np = dev-of_node;
 + int idx;
 +
 + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 + if (!pdata) {
 + dev_err(dev, could not allocate memory for pdata\n);
 + return ERR_PTR(-ENOMEM);
 + }
 +
 + /* find out number of slots supported */
 + if (of_property_read_u32(dev-of_node, num-slots,
 + pdata-num_slots)) {
 + dev_info(dev, num-slots property not found, 
 + assuming 1 slot is available\n);
 + pdata-num_slots = 1;
 + }
 +
 + /* get quirks */
 + for (idx = 0; idx  ARRAY_SIZE(of_quirks); idx++)
 + if (of_get_property(np, of_quirks[idx].quirk, NULL))
 + pdata-quirks |= of_quirks[idx].id;
 +
 + if (of_property_read_u32(np, fifo-depth, pdata-fifo_depth))
 + dev_info(dev, fifo-depth property not found, using 
 + value of FIFOTH register as default\n);
 +
 + of_property_read_u32(np, card-detect-delay, pdata-detect_delay_ms);
 +
 + return pdata;
 +}
 +
 +#else /* CONFIG_OF */
 +static 

Re: [PATCH v6 8/9] mmc: dw_mmc: add support for implementation specific callbacks

2012-09-19 Thread Thomas Abraham
On 19 September 2012 19:10, Seungwon Jeon tgih@samsung.com wrote:
 On Tuesday, September 18, 2012, Thomas Abraham thomas.abra...@linaro.org 
 wrote:
 -int dw_mci_pltfm_register(struct platform_device *pdev)
 +int dw_mci_pltfm_register(struct platform_device *pdev,
 + struct dw_mci_drv_data *drv_data)
  {
   struct dw_mci *host;
   struct resource *regs;
 @@ -41,6 +42,7 @@ int dw_mci_pltfm_register(struct platform_device *pdev)
   if (host-irq  0)
   return host-irq;

 + host-drv_data = drv_data;
   host-dev = pdev-dev;
   host-irq_flags = 0;
   host-pdata = pdev-dev.platform_data;
 @@ -48,6 +50,12 @@ int dw_mci_pltfm_register(struct platform_device *pdev)
   if (!host-regs)
   return -ENOMEM;

 + if (host-drv_data-init) {
 In non-Exynos platform, host-drv_data has NULL.

Yes, sorry, I missed that.

Chris, should I fix this and send the updated patch or shall I send a
separate fix patch.

Thanks,
Thomas.

[...]
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Re: [PATCH v6 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc

2012-09-19 Thread Thomas Abraham
On 19 September 2012 19:12, Seungwon Jeon tgih@samsung.com wrote:
 On Tuesday, September 18, 2012, Thomas Abraham thomas.abra...@linaro.org 
 wrote:
 +int dw_mci_exynos_probe(struct platform_device *pdev)
 +{
 + struct dw_mci_drv_data *drv_data;
 + const struct of_device_id *match;
 +
 + match = of_match_node(dw_mci_exynos_match, pdev-dev.of_node);
 + drv_data = match-data;
 In non-dt case, match has NULL.
 Needed to check pdev-dev.of_node

Since all current users in mainline of this driver on Exynos platforms
are device tree based, and since Exynos4 and Exynos5 have device tree
support, I have mainly been adding device tree support here. Only for
non-exynos portions of the code, I have ensured that both dt and
legacy modes are supported.

Thanks,
Thomas.

[...]
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Re: [PATCH v6 0/9] mmc: dw_mmc: add support for device tree based instantiation

2012-09-19 Thread Thomas Abraham
On 19 September 2012 19:09, Seungwon Jeon tgih@samsung.com wrote:
 Hi Thomas,

 On Wed, Sep 19 2012, Thomas Abraham wrote:
  Hi Jaehoon, Seungwon,
 
  All the changes you have suggested for this patch series has been
  completed. If you could ack this series, it would be great.
 
  Thanks,
  Thomas.
 
  Hi Chris,
 
  I have addressed all the comments received for the v5 of the dw-mmc
  device tree support patch series. Will Newton has acked this patch
  series. Can this series be merged for v3.7 ?

 Yes, looks good; pushed to mmc-next for 3.7.  Jaehoon and Seungwon,
 if you reply soon with your ACK then I'll add it to this patchset.


 Also, looks good to me.
 But please check several patches before merging.
 Sorry for late review.

Thank you Seungwon for your review.

Regards,
Thomas.
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Re: [PATCH] ARM: dts: use uart2 for console on smdkv310 and smdk5250

2012-09-19 Thread Thomas Abraham
On 20 September 2012 04:48, Kukjin Kim kg...@kernel.org wrote:
 Thomas Abraham wrote:

 On 17 September 2012 17:16, Kukjin Kim kgene@samsung.com wrote:
 
  Cc: Thomas Abraham thomas.abra...@linaro.org
  Signed-off-by: Kukjin Kim kgene@samsung.com
  ---
   arch/arm/boot/dts/exynos4210-smdkv310.dts |2 +-
   arch/arm/boot/dts/exynos5250-smdk5250.dts |2 +-
   2 files changed, 2 insertions(+), 2 deletions(-)
 
  diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts
 b/arch/arm/boot/dts/exynos4210-smdkv310.dts
  index 1beccc8..cb01e3d 100644
  --- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
  +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
  @@ -26,7 +26,7 @@
  };
 
  chosen {
  -   bootargs = root=/dev/ram0 rw ramdisk=8192
 initrd=0x4100,8M console=ttySAC1,115200 init=/linuxrc;
  +   bootargs = root=/dev/ram0 rw ramdisk=8192
 initrd=0x4100,8M console=ttySAC2,115200 init=/linuxrc;
  };

 Dear Mr. Kim,

 What is the reason for changing the console port to 2 for smdkv310 board?

 Since uart1 can be used for other purpose, we changed the default console
 port to use uart2 a few month ago for all of SMDKs. And if required, I will
 change it for current defconfigs.

Ok, thanks for the information.

Regards,
Thomas.
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Re: [PATCH 2/3] ARM: EXYNOS: add device tree based discovery support for FIMD

2012-09-19 Thread Jingoo Han
On Wednesday, September 19, 2012 3:22 AM Leela Krishna Amudala wrote
 
 This patch adds support for device tree based discovery for Samsung's
 display controller. Adds DRM-Fimd plat data for smdk5250
 evt1 to the corresponding dts file
 
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5250-smdk5250.dts |   16 
  arch/arm/mach-exynos/include/mach/map.h   |1 +
  arch/arm/mach-exynos/mach-exynos5-dt.c|2 ++
  3 files changed, 19 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
 b/arch/arm/boot/dts/exynos5250-smdk5250.dts
 index 8a5e348..c8d32f5 100644
 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
 +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
 @@ -109,4 +109,20 @@
   spi_2: spi@12d4 {
   status = disabled;
   };
 +
 + lcd_fimd0: lcd_panel0 {
 + lcd-htiming = 4 4 4 1280;
 + lcd-vtiming = 4 4 4 800;
 + supports-mipi-panel;
 + };
 +
 + fimd {
 + samsung,fimd-display = lcd_fimd0;
 + samsung,fimd-vidout-rgb;
 + samsung,fimd-inv-vclk;
 + samsung,fimd-frame-rate = 60;
 + samsung,default-window = 0;
 + samsung,fimd-win-bpp = 32;
 + };
 +
  };
 diff --git a/arch/arm/mach-exynos/include/mach/map.h 
 b/arch/arm/mach-exynos/include/mach/map.h
 index b2021bd..dd9cea3 100644
 --- a/arch/arm/mach-exynos/include/mach/map.h
 +++ b/arch/arm/mach-exynos/include/mach/map.h
 @@ -174,6 +174,7 @@
  #define EXYNOS4_PA_MIPI_CSIS10x1189
 
  #define EXYNOS4_PA_FIMD0 0x11C0
 +#define EXYNOS5_PA_FIMD  0x1440

CC'ed Thomas Abraham

Please, replace EXYNOS5_PA_FIMD with EXYNOS5_PA_FIMD1.

As I mentioned before, Other Exynos5 SoCs can have 2 FIMD IPs.
Also, Exynos5250 uses FIMD1.


 
  #define EXYNOS4_PA_HSMMC(x)  (0x1251 + ((x) * 0x1))
  #define EXYNOS4_PA_DWMCI 0x1255
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index e707eb1..0d35d31 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -64,6 +64,8 @@ static const struct of_dev_auxdata 
 exynos5250_auxdata_lookup[] __initconst = {
   exynos-gsc.2, NULL),
   OF_DEV_AUXDATA(samsung,exynos5-gsc, EXYNOS5_PA_GSC3,
   exynos-gsc.3, NULL),
 + OF_DEV_AUXDATA(samsung,exynos5-fimd, EXYNOS5_PA_FIMD,
 + exynos5-fb.1, NULL),
   {},
  };
 
 --
 1.7.0.4

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Re: [PATCH 2/3] ARM: EXYNOS: add device tree based discovery support for FIMD

2012-09-19 Thread Leela Krishna Amudala
Hi Jingoo Han,

On Thu, Sep 20, 2012 at 10:32 AM, Jingoo Han jg1@samsung.com wrote:
 On Wednesday, September 19, 2012 3:22 AM Leela Krishna Amudala wrote

 This patch adds support for device tree based discovery for Samsung's
 display controller. Adds DRM-Fimd plat data for smdk5250
 evt1 to the corresponding dts file

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5250-smdk5250.dts |   16 
  arch/arm/mach-exynos/include/mach/map.h   |1 +
  arch/arm/mach-exynos/mach-exynos5-dt.c|2 ++
  3 files changed, 19 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
 b/arch/arm/boot/dts/exynos5250-smdk5250.dts
 index 8a5e348..c8d32f5 100644
 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
 +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
 @@ -109,4 +109,20 @@
   spi_2: spi@12d4 {
   status = disabled;
   };
 +
 + lcd_fimd0: lcd_panel0 {
 + lcd-htiming = 4 4 4 1280;
 + lcd-vtiming = 4 4 4 800;
 + supports-mipi-panel;
 + };
 +
 + fimd {
 + samsung,fimd-display = lcd_fimd0;
 + samsung,fimd-vidout-rgb;
 + samsung,fimd-inv-vclk;
 + samsung,fimd-frame-rate = 60;
 + samsung,default-window = 0;
 + samsung,fimd-win-bpp = 32;
 + };
 +
  };
 diff --git a/arch/arm/mach-exynos/include/mach/map.h 
 b/arch/arm/mach-exynos/include/mach/map.h
 index b2021bd..dd9cea3 100644
 --- a/arch/arm/mach-exynos/include/mach/map.h
 +++ b/arch/arm/mach-exynos/include/mach/map.h
 @@ -174,6 +174,7 @@
  #define EXYNOS4_PA_MIPI_CSIS10x1189

  #define EXYNOS4_PA_FIMD0 0x11C0
 +#define EXYNOS5_PA_FIMD  0x1440

 CC'ed Thomas Abraham

 Please, replace EXYNOS5_PA_FIMD with EXYNOS5_PA_FIMD1.

 As I mentioned before, Other Exynos5 SoCs can have 2 FIMD IPs.
 Also, Exynos5250 uses FIMD1.



As per Joonyoung Shim's comment on my previous patches I renamed it
from EXYNOS5_PA_FIMD1 to EXYNOS5_PA_FIMD. Will change it in next
version.
Thanks for reviewing the patch set.

Best Wishes,
Leela Krishna Amudala.


  #define EXYNOS4_PA_HSMMC(x)  (0x1251 + ((x) * 0x1))
  #define EXYNOS4_PA_DWMCI 0x1255
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index e707eb1..0d35d31 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -64,6 +64,8 @@ static const struct of_dev_auxdata 
 exynos5250_auxdata_lookup[] __initconst = {
   exynos-gsc.2, NULL),
   OF_DEV_AUXDATA(samsung,exynos5-gsc, EXYNOS5_PA_GSC3,
   exynos-gsc.3, NULL),
 + OF_DEV_AUXDATA(samsung,exynos5-fimd, EXYNOS5_PA_FIMD,
 + exynos5-fb.1, NULL),
   {},
  };

 --
 1.7.0.4

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Re: [PATCH v2 1/5] mmc: host: sdhci-s3c: Add broken-voltage DT property for broken voltage quirk

2012-09-19 Thread Jaehoon Chung
On 09/19/2012 11:39 PM, Chris Ball wrote:
 Hi,
 
 On Wed, Sep 19 2012, Jaehoon Chung wrote:
 On Wed, Sep 19 2012, Tomasz Figa wrote:
 We could just check if the regulator provides the capability to change the 
 voltage.

 I don't see any direct way of querying the regulator for provided 
 capabilities (correct me if I'm just blind), but calling 
 regulator_count_voltages() on the regulator and checking if the returned 
 value is 1 should be enough to assume that the regulator is fixed.

 Sounds good, I agree.  Are you able to test that the obvious patch below
 works on your fixed-regulator board?

 Jaehoon and Adrian, can you think of any reason why we shouldn't replace
 MMC_CAP2_BROKEN_VOLTAGE with the regulator_count_voltages() call below?
 Thanks.

 I think this is better than using MMC_CAP2_BROKEN_VOLTAGE.
 I tested with this..and working fine.
 
 Great, here's the patch.  Jaehoon, once this is merged, maybe you could
 help remove the uses of MMC_CAP2_BROKEN_VOLTAGE from arch/arm/mach-exynos
 and arch/arm/mach-s5pv210 now that they're no longer needed?
Right, I will remove them and send the patch.

Best Regards,
Jaehoon Chung
 
 Thanks,
 
 - Chris.
 
 
 Subject: [PATCH] mmc: core: Replace MMC_CAP2_BROKEN_VOLTAGE with test for 
 fixed regulator
 
 Before this patch, we were using MMC_CAP2_BROKEN_VOLTAGE as a way to
 avoid calling regulator_set_voltage() on a fixed regulator, but that's
 just duplicating information that already exists -- we should test
 whether the regulator is fixed directly, instead of via a capability.
 
 This patch implements that test.  We can't reclaim the capability bit
 just yet, since there are still boards in arch/arm/ that reference it;
 those references can be removed now.
 
 Reported-by: Tomasz Figa t.f...@samsung.com
 Signed-off-by: Chris Ball c...@laptop.org
 ---
  drivers/mmc/core/core.c | 10 ++
  1 file changed, 6 insertions(+), 4 deletions(-)
 
 diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
 index 044cd01..6612163 100644
 --- a/drivers/mmc/core/core.c
 +++ b/drivers/mmc/core/core.c
 @@ -1113,7 +1113,8 @@ int mmc_regulator_set_ocr(struct mmc_host *mmc,
   int tmp;
   int voltage;
  
 - /* REVISIT mmc_vddrange_to_ocrmask() may have set some
 + /*
 +  * REVISIT mmc_vddrange_to_ocrmask() may have set some
* bits this regulator doesn't quite support ... don't
* be too picky, most cards and regulators are OK with
* a 0.1V range goof (it's a small error percentage).
 @@ -1127,12 +1128,13 @@ int mmc_regulator_set_ocr(struct mmc_host *mmc,
   max_uV = min_uV + 100 * 1000;
   }
  
 - /* avoid needless changes to this voltage; the regulator
 -  * might not allow this operation
 + /*
 +  * If we're using a fixed/static regulator, don't call
 +  * regulator_set_voltage; it would fail.
*/
   voltage = regulator_get_voltage(supply);
  
 - if (mmc-caps2  MMC_CAP2_BROKEN_VOLTAGE)
 + if (regulator_count_voltages(supply) == 1)
   min_uV = max_uV = voltage;
  
   if (voltage  0)
 

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