Re: [PATCH V4 2/2] video: drm: exynos: Add device tree support

2012-09-20 Thread Inki Dae
Hi,

I had merged this patch set but I realizes this patch has no
descriptions enough so please add the descriptions what is this patch.


2012/9/6 Leela Krishna Amudala l.kris...@samsung.com:
 Add device tree based discovery support for DRM-FIMD driver.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  Documentation/devicetree/bindings/fb/drm-fimd.txt |   80 +

and, how about making drm folder instead of fb? so like below;
 Documentation/devicetree/bindings/drm/exynos/fimd.txt

Thanks,
Inki Dae

  drivers/gpu/drm/exynos/exynos_drm_fimd.c  |   95 
 -
  2 files changed, 173 insertions(+), 2 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/fb/drm-fimd.txt

 diff --git a/Documentation/devicetree/bindings/fb/drm-fimd.txt 
 b/Documentation/devicetree/bindings/fb/drm-fimd.txt
 new file mode 100644
 index 000..4ff1829
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/fb/drm-fimd.txt
 @@ -0,0 +1,80 @@
 +* Samsung Display Controller using DRM frame work
 +
 +The display controller is used to transfer image data from memory to an
 +external LCD driver interface. It supports various color formats such as
 +rgb and yuv.
 +
 +Required properties:
 + - compatible: Should be samsung,exynos5-fimd or samsung,exynos4-fb for
 +   fimd using DRM frame work.
 + - reg: physical base address of the controller and length of memory
 +   mapped region.
 + - interrupts: Three interrupts should be specified. The interrupts should be
 +   specified in the following order.
 +   - VSYNC interrupt
 +   - FIFO level interrupt
 +   - FIMD System Interrupt
 +
 + - samsung,fimd-display: This property should specify the phandle of the
 +   display device node which holds the video interface timing with the
 +   below mentioned properties.
 +
 +   - lcd-htiming: Specifies the horizontal timing for the overlay. The
 + horizontal timing includes four parameters in the following order.
 +
 + - horizontal back porch (in number of lcd clocks)
 + - horizontal front porch (in number of lcd clocks)
 + - hsync pulse width (in number of lcd clocks)
 + - Display panels X resolution.
 +
 +   - lcd-vtiming: Specifies the vertical timing for the overlay. The
 + vertical timing includes four parameters in the following order.
 +
 + - vertical back porch (in number of lcd lines)
 + - vertical front porch (in number of lcd lines)
 + - vsync pulse width (in number of lcd clocks)
 + - Display panels Y resolution.
 +
 +
 + - samsung,default-window: Specifies the default window number of the fimd 
 controller.
 +
 + - samsung,fimd-win-bpp: Specifies the bits per pixel.
 +
 +Optional properties:
 + - samsung,fimd-vidout-rgb: Video output format is RGB.
 + - samsung,fimd-inv-vclk: invert video clock polarity.
 + - samsung,fimd-frame-rate: Number of video frames per second.
 +
 +Example:
 +
 +   The following is an example for the fimd controller is split into
 +   two portions. The SoC specific portion can be specified in the SoC
 +   specific dts file. The board specific portion can be specified in the
 +   board specific dts file.
 +
 +   - SoC Specific portion
 +
 +   fimd {
 +   compatible = samsung,exynos5-fimd;
 +   interrupt-parent = combiner;
 +   reg = 0x1440 0x4;
 +   interrupts = 18 5, 18 4, 18 6;
 +   };
 +
 +   - Board Specific portion
 +
 +   lcd_fimd0: lcd_panel0 {
 +   lcd-htiming = 4 4 4 480;
 +   lcd-vtiming = 4 4 4 320;
 +   supports-mipi-panel;
 +   };
 +
 +   fimd {
 +   samsung,fimd-display = lcd_fimd0;
 +   samsung,fimd-vidout-rgb;
 +   samsung,fimd-inv-vclk;
 +   samsung,fimd-frame-rate = 60;
 +   samsung,default-window = 0;
 +   samsung,fimd-win-bpp = 32;
 +   };
 +
 diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
 b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 index 3701fbe..a4fa8e9 100644
 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 @@ -18,6 +18,7 @@
  #include linux/platform_device.h
  #include linux/clk.h
  #include linux/pm_runtime.h
 +#include linux/of.h

  #include video/samsung_fimd.h
  #include drm/exynos_drm.h
 @@ -103,9 +104,18 @@ struct fimd_context {
 struct exynos_drm_panel_info *panel;
  };

 +static const struct of_device_id fimd_dt_match[];
 +
  static inline struct fimd_driver_data *drm_fimd_get_driver_data(
 struct platform_device *pdev)
  {
 +#ifdef CONFIG_OF
 +   if (pdev-dev.of_node) {
 +   const struct of_device_id *match;
 +   match = of_match_ptr(fimd_dt_match);
 +   return (struct fimd_driver_data *)match-data;
 +   }
 +#endif
 return (struct fimd_driver_data *)
 

[PATCH] samsung: clock: Modify for the case with the only parent

2012-09-20 Thread In-Bae Jeong
'camera' clock has the only parent and thus has no reg_src.
It has a parent clock but it prints 'No parent clock specified' message.
This patch is to deal with the case with the only parent clock.
---
 arch/arm/plat-samsung/clock-clksrc.c |   17 +
 1 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/arch/arm/plat-samsung/clock-clksrc.c 
b/arch/arm/plat-samsung/clock-clksrc.c
index 786a410..c00bd86 100644
--- a/arch/arm/plat-samsung/clock-clksrc.c
+++ b/arch/arm/plat-samsung/clock-clksrc.c
@@ -131,18 +131,19 @@ void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk 
*clk, bool announce)
 {
struct clksrc_sources *srcs = clk-sources;
u32 mask = bit_mask(clk-reg_src.shift, clk-reg_src.size);
-   u32 clksrc;
+   u32 clksrc = 0;
 
-   if (!clk-reg_src.reg) {
-   if (!clk-clk.parent)
-   printk(KERN_ERR %s: no parent clock specified\n,
-   clk-clk.name);
+   if (!clk-reg_src.reg  !clk-clk.parent  !srcs-nr_sources) {
+   printk(KERN_ERR %s: no parent clock specified\n,
+  clk-clk.name);
return;
}
 
-   clksrc = __raw_readl(clk-reg_src.reg);
-   clksrc = mask;
-   clksrc = clk-reg_src.shift;
+   if (srcs-nr_sources  1) {
+   clksrc = __raw_readl(clk-reg_src.reg);
+   clksrc = mask;
+   clksrc = clk-reg_src.shift;
+   }
 
if (clksrc  srcs-nr_sources || !srcs-sources[clksrc]) {
printk(KERN_ERR %s: bad source %d\n,
-- 
1.7.8.6

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Re: [PATCH 1/3] ARM: EXYNOS5: Add fimd node to the exynos5250 dtsi file

2012-09-20 Thread Jingoo Han
On Wednesday, September 19, 2012 3:22 AM Leela Krishna Amudala wrote
 
 This patch adds the fimd node with compatibility string, hardware address,
 interrupt line numbers to the exynos5250 dtsi file.
 
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5250.dtsi |7 +++
  1 files changed, 7 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
 b/arch/arm/boot/dts/exynos5250.dtsi
 index b55794b..6d27ca4 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -488,4 +488,11 @@
   reg = 0x13e3 0x1000;
   interrupts = 0 88 0;
   };
 +
 + fimd {
 + compatible = samsung,exynos5-drm;

Should it be samsung,exynos5-fimd?


 + interrupt-parent = combiner;
 + reg = 0x1440 0x4;
 + interrupts = 18 5, 18 4, 18 6;
 + };
  };
 --
 1.7.0.4

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Re: [PATCH 2/3] ARM: EXYNOS: add device tree based discovery support for FIMD

2012-09-20 Thread Jingoo Han
On Thursday, September 20, 2012 2:54 PM Leela Krishna Amudala wrote
 
 Hi Jingoo Han,
 
 On Thu, Sep 20, 2012 at 10:32 AM, Jingoo Han jg1@samsung.com wrote:
  On Wednesday, September 19, 2012 3:22 AM Leela Krishna Amudala wrote
 
  This patch adds support for device tree based discovery for Samsung's
  display controller. Adds DRM-Fimd plat data for smdk5250
  evt1 to the corresponding dts file
 
  Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
  ---
   arch/arm/boot/dts/exynos5250-smdk5250.dts |   16 
   arch/arm/mach-exynos/include/mach/map.h   |1 +
   arch/arm/mach-exynos/mach-exynos5-dt.c|2 ++
   3 files changed, 19 insertions(+), 0 deletions(-)
 
  diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
  b/arch/arm/boot/dts/exynos5250-smdk5250.dts
  index 8a5e348..c8d32f5 100644
  --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
  +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
  @@ -109,4 +109,20 @@
spi_2: spi@12d4 {
status = disabled;
};
  +
  + lcd_fimd0: lcd_panel0 {
  + lcd-htiming = 4 4 4 1280;
  + lcd-vtiming = 4 4 4 800;
  + supports-mipi-panel;
  + };
  +
  + fimd {
  + samsung,fimd-display = lcd_fimd0;
  + samsung,fimd-vidout-rgb;
  + samsung,fimd-inv-vclk;
  + samsung,fimd-frame-rate = 60;
  + samsung,default-window = 0;
  + samsung,fimd-win-bpp = 32;
  + };
  +
   };
  diff --git a/arch/arm/mach-exynos/include/mach/map.h 
  b/arch/arm/mach-exynos/include/mach/map.h
  index b2021bd..dd9cea3 100644
  --- a/arch/arm/mach-exynos/include/mach/map.h
  +++ b/arch/arm/mach-exynos/include/mach/map.h
  @@ -174,6 +174,7 @@
   #define EXYNOS4_PA_MIPI_CSIS10x1189
 
   #define EXYNOS4_PA_FIMD0 0x11C0
  +#define EXYNOS5_PA_FIMD  0x1440
 
  CC'ed Thomas Abraham
 
  Please, replace EXYNOS5_PA_FIMD with EXYNOS5_PA_FIMD1.
 
  As I mentioned before, Other Exynos5 SoCs can have 2 FIMD IPs.
  Also, Exynos5250 uses FIMD1.
 
 
 
 As per Joonyoung Shim's comment on my previous patches I renamed it
 from EXYNOS5_PA_FIMD1 to EXYNOS5_PA_FIMD. Will change it in next
 version.
 Thanks for reviewing the patch set.

Let me explain why FIMD1 is right.

Exynos5 SoCs have 2 FIMD IPs, and its address are 0x1380
And 0x1440, respectively. Therefore, if address of FIMD IP
Is 0x1440, it means FIMD1.

Best regards,
Jingoo Han

 
 Best Wishes,
 Leela Krishna Amudala.
 
 
   #define EXYNOS4_PA_HSMMC(x)  (0x1251 + ((x) * 0x1))
   #define EXYNOS4_PA_DWMCI 0x1255
  diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
  b/arch/arm/mach-exynos/mach-exynos5-dt.c
  index e707eb1..0d35d31 100644
  --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
  +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
  @@ -64,6 +64,8 @@ static const struct of_dev_auxdata 
  exynos5250_auxdata_lookup[] __initconst = {
exynos-gsc.2, NULL),
OF_DEV_AUXDATA(samsung,exynos5-gsc, EXYNOS5_PA_GSC3,
exynos-gsc.3, NULL),
  + OF_DEV_AUXDATA(samsung,exynos5-fimd, EXYNOS5_PA_FIMD,
  + exynos5-fb.1, NULL),
{},
   };
 
  --
  1.7.0.4
 
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[PATCH 0/6] pinctrl: samsung: Various fixes

2012-09-20 Thread Tomasz Figa
This patch series contains various fixes of problems and nitpicks spotted when
working on adding support for Exynos4x12. See each patch for more detailed
information.

TODO:
 - setting WEINT pins to EINT function in exynos_wkup_irq_set_type

Tomasz Figa (6):
  pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO
EINT
  pinctrl: exynos: Fix typos in gpio/wkup _irq_mask
  pinctrl: exynos: Handle only unmasked wakeup interrupts
  pinctrl: exynos: Mark exynos_irq_demux_eint as inline
  pinctrl: exynos: Correct the detection of wakeup-eint node
  pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data

 drivers/pinctrl/pinctrl-exynos.c  | 39 +--
 drivers/pinctrl/pinctrl-exynos.h  |  1 +
 drivers/pinctrl/pinctrl-samsung.c |  2 +-
 3 files changed, 31 insertions(+), 11 deletions(-)

-- 
1.7.12

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[PATCH 1/6] pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa

2012-09-20 Thread Tomasz Figa
Pins used as GPIO interrupts need to be configured as EINTs. This patch
adds the required configuration code to exynos_gpio_irq_set_type,
to set the pin as EINT when its interrupt trigger is configured.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c | 12 
 drivers/pinctrl/pinctrl-exynos.h |  1 +
 2 files changed, 13 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 447818d..c2fa85f 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -76,9 +76,11 @@ static int exynos_gpio_irq_set_type(struct irq_data *irqd, 
unsigned int type)
struct samsung_pinctrl_drv_data *d = irqd-domain-host_data;
struct samsung_pin_ctrl *ctrl = d-ctrl;
struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+   struct samsung_pin_bank *bank = edata-bank;
unsigned int shift = EXYNOS_EINT_CON_LEN * edata-pin;
unsigned int con, trig_type;
unsigned long reg_con = ctrl-geint_con + edata-eint_offset;
+   unsigned int mask;
 
switch (type) {
case IRQ_TYPE_EDGE_RISING:
@@ -110,6 +112,16 @@ static int exynos_gpio_irq_set_type(struct irq_data *irqd, 
unsigned int type)
con = ~(EXYNOS_EINT_CON_MASK  shift);
con |= trig_type  shift;
writel(con, d-virt_base + reg_con);
+
+   reg_con = bank-pctl_offset;
+   shift = edata-pin * bank-func_width;
+   mask = (1  bank-func_width) - 1;
+
+   con = readl(d-virt_base + reg_con);
+   con = ~(mask  shift);
+   con |= EXYNOS_EINT_FUNC  shift;
+   writel(con, d-virt_base + reg_con);
+
return 0;
 }
 
diff --git a/drivers/pinctrl/pinctrl-exynos.h b/drivers/pinctrl/pinctrl-exynos.h
index 5f27ba9..31d0a06 100644
--- a/drivers/pinctrl/pinctrl-exynos.h
+++ b/drivers/pinctrl/pinctrl-exynos.h
@@ -144,6 +144,7 @@ enum exynos4210_gpio_xc_start {
 #define EXYNOS_WKUP_EMASK_OFFSET   0xF00
 #define EXYNOS_WKUP_EPEND_OFFSET   0xF40
 #define EXYNOS_SVC_OFFSET  0xB08
+#define EXYNOS_EINT_FUNC   0xF
 
 /* helpers to access interrupt service register */
 #define EXYNOS_SVC_GROUP_SHIFT 3
-- 
1.7.12

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[PATCH 2/6] pinctrl: exynos: Fix typos in gpio/wkup _irq_mask

2012-09-20 Thread Tomasz Figa
To mask GPIO/wakeup IRQ, the corresponding bit in mask register has to
be set.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index c2fa85f..46cd637 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -58,7 +58,7 @@ static void exynos_gpio_irq_mask(struct irq_data *irqd)
unsigned long mask;
 
mask = readl(d-virt_base + reg_mask);
-   mask |= ~(1  edata-pin);
+   mask |= 1  edata-pin;
writel(mask, d-virt_base + reg_mask);
 }
 
@@ -290,7 +290,7 @@ static void exynos_wkup_irq_mask(struct irq_data *irqd)
unsigned long mask;
 
mask = readl(d-virt_base + reg_mask);
-   mask = ~(1  pin);
+   mask |= 1  pin;
writel(mask, d-virt_base + reg_mask);
 }
 
-- 
1.7.12

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[PATCH 3/6] pinctrl: exynos: Handle only unmasked wakeup interrupts

2012-09-20 Thread Tomasz Figa
A bit in EINTxx_PEND register is set regardless of interrupt mask, which
causes spurious interrupts. To avoid them, the read value of pending
register must be masked with current interrupt mask manually.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 46cd637..5648971 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -395,12 +395,15 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, 
struct irq_desc *desc)
struct exynos_weint_data *eintd = irq_get_handler_data(irq);
struct samsung_pinctrl_drv_data *d = eintd-domain-host_data;
unsigned long pend;
+   unsigned long mask;
 
chained_irq_enter(chip, desc);
pend = readl(d-virt_base + d-ctrl-weint_pend + 0x8);
-   exynos_irq_demux_eint(16, pend, eintd-domain);
+   mask = readl(d-virt_base + d-ctrl-weint_mask + 0x8);
+   exynos_irq_demux_eint(16, pend  ~mask, eintd-domain);
pend = readl(d-virt_base + d-ctrl-weint_pend + 0xC);
-   exynos_irq_demux_eint(24, pend, eintd-domain);
+   mask = readl(d-virt_base + d-ctrl-weint_mask + 0xC);
+   exynos_irq_demux_eint(24, pend  ~mask, eintd-domain);
chained_irq_exit(chip, desc);
 }
 
-- 
1.7.12

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[PATCH 4/6] pinctrl: exynos: Mark exynos_irq_demux_eint as inline

2012-09-20 Thread Tomasz Figa
The exynos_irq_demux_eint utility function is used in chained IRQ
handler for EINT16-31 to handle multiplexed interrupts. Inlining it
should improve the performance a bit.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 5648971..49ef5a2 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -376,7 +376,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct 
irq_desc *desc)
chained_irq_exit(chip, desc);
 }
 
-static void exynos_irq_demux_eint(int irq_base, unsigned long pend,
+static inline void exynos_irq_demux_eint(int irq_base, unsigned long pend,
struct irq_domain *domain)
 {
unsigned int irq;
-- 
1.7.12

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[PATCH 5/6] pinctrl: exynos: Correct the detection of wakeup-eint node

2012-09-20 Thread Tomasz Figa
Current way of finding the wakeup-eint node scans the whole device tree
not only children of the pinctrl node, so it might detect a wakeup-eint
node of another pinctrl device.

This patch limits the scope of looking for nodes only to subnodes of the
pinctrl node.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 49ef5a2..0d01d19 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -431,15 +431,19 @@ static const struct irq_domain_ops exynos_wkup_irqd_ops = 
{
 static int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
 {
struct device *dev = d-dev;
-   struct device_node *wkup_np;
+   struct device_node *wkup_np = NULL;
+   struct device_node *np;
struct exynos_weint_data *weint_data;
int idx, irq;
 
-   wkup_np = of_find_matching_node(dev-of_node, exynos_wkup_irq_ids);
-   if (!wkup_np) {
-   dev_err(dev, wakeup controller node not found\n);
-   return -ENODEV;
+   for_each_child_of_node(dev-of_node, np) {
+   if (of_match_node(exynos_wkup_irq_ids, np)) {
+   wkup_np = np;
+   break;
+   }
}
+   if (!wkup_np)
+   return -ENODEV;
 
d-wkup_irqd = irq_domain_add_linear(wkup_np, d-ctrl-nr_wint,
exynos_wkup_irqd_ops, d);
-- 
1.7.12

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[PATCH 6/6] pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data

2012-09-20 Thread Tomasz Figa
Although the function is used only a single time, it is not performance
critical and it is pretty heavy, so let the compiler decide whether to
inline it instead.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-samsung.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-samsung.c 
b/drivers/pinctrl/pinctrl-samsung.c
index 8a24223..dd108a9 100644
--- a/drivers/pinctrl/pinctrl-samsung.c
+++ b/drivers/pinctrl/pinctrl-samsung.c
@@ -776,7 +776,7 @@ static int __init samsung_gpiolib_unregister(struct 
platform_device *pdev,
 static const struct of_device_id samsung_pinctrl_dt_match[];
 
 /* retrieve the soc specific data */
-static inline struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data(
+static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data(
struct platform_device *pdev)
 {
int id;
-- 
1.7.12

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[PATCH] ARM: exynos: remove the MMC_CAP2_BROKEN_VOLTAGE

2012-09-20 Thread Jaehoon Chung
This patch is dependency with Chris's patch.
[PATCH] mmc: core: Replace MMC_CAP2_BROKEN_VOLTAGE with test for fixed 
regulator
http://git.kernel.org/?p=linux/kernel/git/cjb/mmc.git;a=commit;h=421fc8e70079b8b9e473a55a6267302695641dcc

After applied that patch, it needs not to set MMC_CAP2_BROKEN_VOLTAGE.

Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/mach-nuri.c   |1 -
 arch/arm/mach-exynos/mach-universal_c210.c |1 -
 arch/arm/mach-s5pv210/mach-goni.c  |1 -
 3 files changed, 0 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 90d8daa..6e0b0fa 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data 
__initdata = {
.host_caps  = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
MMC_CAP_ERASE),
-   .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
.cd_type= S3C_SDHCI_CD_PERMANENT,
 };
 
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c 
b/arch/arm/mach-exynos/mach-universal_c210.c
index 8139cd2..865be0a 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data 
__initdata = {
.max_width  = 8,
.host_caps  = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
-   .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
.cd_type= S3C_SDHCI_CD_PERMANENT,
 };
 
diff --git a/arch/arm/mach-s5pv210/mach-goni.c 
b/arch/arm/mach-s5pv210/mach-goni.c
index c552581..239e896 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -774,7 +774,6 @@ static void __init goni_pmic_init(void)
 /* MoviNAND */
 static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
.max_width  = 4,
-   .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
.cd_type= S3C_SDHCI_CD_PERMANENT,
 };
 
-- 
1.7.4.1
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[RFC 0/6] pinctrl: samsung: Remove static platform-specific data

2012-09-20 Thread Tomasz Figa
This RFC series is a work on replacing static platform-specific data in
pinctrl-samsung driver with data dynamically parsed from device tree.

It aims at reducing the SoC-specific part of the driver and thus the
amount of modifications to driver sources when adding support for next
SoCs (like Exynos4x12).

Furthermore, moving definitions of pin banks to device tree will allow
to simplify GPIO and GEINT specification to a format similar to used
previously by gpiolib-based implementation, using a phandle to the bank
and pin index inside the bank, e.g.
gpios = gpa1 4 0;
interrupt-parent = gpa1;
interrupts = 4 0;

Any comments are welcome.

TODO:
 - bindings documentation
 - per-bank GPIO and GEINT specification

Tomasz Figa (6):
  pinctrl: exynos: Parse wakeup-eint parameters from DT
  pinctrl: samsung: Parse pin banks from DT
  pinctrl: exynos: Remove static platform-specific data
  pinctrl: samsung: Parse bank-specific eint offset from DT
  ARM: dts: exynos4210: Remove legacy gpio nodes
  ARM: dts: exynos4210: Add platform-specific descriptions for pin
controllers

 arch/arm/boot/dts/exynos4210-pinctrl-banks.dtsi | 605 
 arch/arm/boot/dts/exynos4210-pinctrl.dtsi   |   2 +
 arch/arm/boot/dts/exynos4210.dtsi   | 241 +-
 drivers/pinctrl/pinctrl-exynos.c| 124 ++---
 drivers/pinctrl/pinctrl-exynos.h| 157 --
 drivers/pinctrl/pinctrl-samsung.c   | 153 +-
 drivers/pinctrl/pinctrl-samsung.h   |  19 +-
 7 files changed, 813 insertions(+), 488 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl-banks.dtsi

-- 
1.7.12

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[RFC 1/6] pinctrl: exynos: Parse wakeup-eint parameters from DT

2012-09-20 Thread Tomasz Figa
This patch converts the pinctrl-exynos driver to parse wakeup interrupt
count and register offsets from device tree. It reduces the amount of
static platform-specific data and facilitates adding further SoC
variants to pinctrl-samsung driver.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 0d01d19..575378a 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -435,6 +435,8 @@ static int exynos_eint_wkup_init(struct 
samsung_pinctrl_drv_data *d)
struct device_node *np;
struct exynos_weint_data *weint_data;
int idx, irq;
+   u32 val;
+   int ret;
 
for_each_child_of_node(dev-of_node, np) {
if (of_match_node(exynos_wkup_irq_ids, np)) {
@@ -445,6 +447,26 @@ static int exynos_eint_wkup_init(struct 
samsung_pinctrl_drv_data *d)
if (!wkup_np)
return -ENODEV;
 
+   ret = of_property_read_u32(wkup_np, samsung,weint-count, val);
+   if (ret)
+   return -EINVAL;
+   d-ctrl-nr_wint = val;
+
+   ret = of_property_read_u32(wkup_np, samsung,weint-con, val);
+   if (ret)
+   return -EINVAL;
+   d-ctrl-weint_con = val;
+
+   ret = of_property_read_u32(wkup_np, samsung,weint-mask, val);
+   if (ret)
+   return -EINVAL;
+   d-ctrl-weint_mask = val;
+
+   ret = of_property_read_u32(wkup_np, samsung,weint-pend, val);
+   if (ret)
+   return -EINVAL;
+   d-ctrl-weint_pend = val;
+
d-wkup_irqd = irq_domain_add_linear(wkup_np, d-ctrl-nr_wint,
exynos_wkup_irqd_ops, d);
if (!d-gpio_irqd) {
-- 
1.7.12

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[RFC 2/6] pinctrl: samsung: Parse pin banks from DT

2012-09-20 Thread Tomasz Figa
Currently platform-specific properties such as list of pin banks,
register offsets and bitfield sizes is being taken from static data
structure residing in pinctrl-exynos.c.

This patch modifies the pinctrl-samsung driver to parse all
platform-specific data from device tree, which will allow to remove the
static data structures and facilitate adding of further SoC variants to
the pinctrl-samsung driver.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c  |   5 ++
 drivers/pinctrl/pinctrl-samsung.c | 148 +-
 drivers/pinctrl/pinctrl-samsung.h |  17 -
 3 files changed, 166 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 575378a..827b744 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -599,3 +599,8 @@ struct samsung_pin_ctrl exynos4210_pin_ctrl[] = {
.label  = exynos4210-gpio-ctrl2,
},
 };
+
+struct samsung_pin_ctrl_variant exynos4_pin_ctrl = {
+   .eint_gpio_init = exynos_eint_gpio_init,
+   .eint_wkup_init = exynos_eint_wkup_init,
+};
diff --git a/drivers/pinctrl/pinctrl-samsung.c 
b/drivers/pinctrl/pinctrl-samsung.c
index dd108a9..ff1d001 100644
--- a/drivers/pinctrl/pinctrl-samsung.c
+++ b/drivers/pinctrl/pinctrl-samsung.c
@@ -26,6 +26,7 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/gpio.h
+#include linux/spinlock.h
 
 #include core.h
 #include pinctrl-samsung.h
@@ -46,6 +47,10 @@ struct pin_config {
{ samsung,pin-pud-pdn, PINCFG_TYPE_PUD_PDN },
 };
 
+DEFINE_SPINLOCK(init_lock);
+
+static unsigned int pin_base = 0;
+
 /* check if the selector is a valid pin group selector */
 static int samsung_get_group_count(struct pinctrl_dev *pctldev)
 {
@@ -599,6 +604,8 @@ static int __init samsung_pinctrl_parse_dt(struct 
platform_device *pdev,
u32 function;
if (of_find_property(cfg_np, interrupt-controller, NULL))
continue;
+   if (of_find_property(cfg_np, gpio-controller, NULL))
+   continue;
 
ret = samsung_pinctrl_parse_dt_pins(pdev, cfg_np,
drvdata-pctl, pin_list, npins);
@@ -775,6 +782,59 @@ static int __init samsung_gpiolib_unregister(struct 
platform_device *pdev,
 
 static const struct of_device_id samsung_pinctrl_dt_match[];
 
+static int samsung_pinctrl_parse_dt_bank(struct samsung_pin_bank *bank,
+   struct device_node *np)
+{
+   int ret;
+   u32 val;
+
+   ret = of_property_read_string(np, samsung,pin-bank, bank-name);
+   if (ret)
+   return ret;
+
+   ret = of_property_read_u32(np, samsung,pctl-offset, val);
+   if (ret)
+   return ret;
+   bank-pctl_offset = val;
+
+   ret = of_property_read_u32(np, samsung,pin-count, val);
+   if (ret)
+   return ret;
+   bank-nr_pins = val;
+
+   ret = of_property_read_u32(np, samsung,func-width, val);
+   if (ret)
+   return ret;
+   bank-func_width = val;
+
+   ret = of_property_read_u32(np, samsung,pud-width, val);
+   if (ret)
+   return ret;
+   bank-pud_width = val;
+
+   ret = of_property_read_u32(np, samsung,drv-width, val);
+   if (ret)
+   return ret;
+   bank-drv_width = val;
+
+   ret = of_property_read_u32(np, samsung,conpdn-width, val);
+   if (!ret)
+   bank-conpdn_width = val;
+
+   ret = of_property_read_u32(np, samsung,pudpdn-width, val);
+   if (!ret)
+   bank-pudpdn_width = val;
+
+   if (!of_find_property(np, interrupt-controller, NULL)) {
+   bank-eint_type = EINT_TYPE_NONE;
+   return 0;
+   }
+
+   bank-eint_type = EINT_TYPE_GPIO;
+
+   return 0;
+}
+
 /* retrieve the soc specific data */
 static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data(
struct platform_device *pdev)
@@ -782,6 +842,14 @@ static struct samsung_pin_ctrl 
*samsung_pinctrl_get_soc_data(
int id;
const struct of_device_id *match;
const struct device_node *node = pdev-dev.of_node;
+   struct device_node *bank_np;
+   struct samsung_pin_ctrl *ctrl;
+   struct samsung_pin_bank *banks, *b;
+   struct samsung_pin_ctrl_variant *variant;
+   unsigned int bank_cnt = 0;
+   unsigned int eint_cnt = 0;
+   u32 val;
+   int ret;
 
id = of_alias_get_id(pdev-dev.of_node, pinctrl);
if (id  0) {
@@ -789,7 +857,83 @@ static struct samsung_pin_ctrl 
*samsung_pinctrl_get_soc_data(
return NULL;
}
match = of_match_node(samsung_pinctrl_dt_match, node);
-   return (struct samsung_pin_ctrl *)match-data + id;
+   variant = match-data;

[RFC 3/6] pinctrl: exynos: Remove static platform-specific data

2012-09-20 Thread Tomasz Figa
The patch pinctrl: samsung: Parse pin banks from DT introduced parsing
platform-specific data from device tree, so there is no need to keep the
previously used definitions in headers and source files.

This patch cleans up the pinctrl-exynos driver from unused
platform-specific data.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c  |  96 ---
 drivers/pinctrl/pinctrl-exynos.h  | 157 --
 drivers/pinctrl/pinctrl-samsung.h |   1 -
 3 files changed, 254 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 827b744..3cbc632 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -504,102 +504,6 @@ static int exynos_eint_wkup_init(struct 
samsung_pinctrl_drv_data *d)
return 0;
 }
 
-/* pin banks of exynos4210 pin-controller 0 */
-static struct samsung_pin_bank exynos4210_pin_banks0[] = {
-   EXYNOS_PIN_BANK_EINTG(0x000, EXYNOS4210_GPIO_A0, gpa0),
-   EXYNOS_PIN_BANK_EINTG(0x020, EXYNOS4210_GPIO_A1, gpa1),
-   EXYNOS_PIN_BANK_EINTG(0x040, EXYNOS4210_GPIO_B, gpb),
-   EXYNOS_PIN_BANK_EINTG(0x060, EXYNOS4210_GPIO_C0, gpc0),
-   EXYNOS_PIN_BANK_EINTG(0x080, EXYNOS4210_GPIO_C1, gpc1),
-   EXYNOS_PIN_BANK_EINTG(0x0A0, EXYNOS4210_GPIO_D0, gpd0),
-   EXYNOS_PIN_BANK_EINTG(0x0C0, EXYNOS4210_GPIO_D1, gpd1),
-   EXYNOS_PIN_BANK_EINTG(0x0E0, EXYNOS4210_GPIO_E0, gpe0),
-   EXYNOS_PIN_BANK_EINTG(0x100, EXYNOS4210_GPIO_E1, gpe1),
-   EXYNOS_PIN_BANK_EINTG(0x120, EXYNOS4210_GPIO_E2, gpe2),
-   EXYNOS_PIN_BANK_EINTG(0x140, EXYNOS4210_GPIO_E3, gpe3),
-   EXYNOS_PIN_BANK_EINTG(0x160, EXYNOS4210_GPIO_E4, gpe4),
-   EXYNOS_PIN_BANK_EINTG(0x180, EXYNOS4210_GPIO_F0, gpf0),
-   EXYNOS_PIN_BANK_EINTG(0x1A0, EXYNOS4210_GPIO_F1, gpf1),
-   EXYNOS_PIN_BANK_EINTG(0x1C0, EXYNOS4210_GPIO_F2, gpf2),
-   EXYNOS_PIN_BANK_EINTG(0x1E0, EXYNOS4210_GPIO_F3, gpf3),
-};
-
-/* pin banks of exynos4210 pin-controller 1 */
-static struct samsung_pin_bank exynos4210_pin_banks1[] = {
-   EXYNOS_PIN_BANK_EINTG(0x000, EXYNOS4210_GPIO_J0, gpj0),
-   EXYNOS_PIN_BANK_EINTG(0x020, EXYNOS4210_GPIO_J1, gpj1),
-   EXYNOS_PIN_BANK_EINTG(0x040, EXYNOS4210_GPIO_K0, gpk0),
-   EXYNOS_PIN_BANK_EINTG(0x060, EXYNOS4210_GPIO_K1, gpk1),
-   EXYNOS_PIN_BANK_EINTG(0x080, EXYNOS4210_GPIO_K2, gpk2),
-   EXYNOS_PIN_BANK_EINTG(0x0A0, EXYNOS4210_GPIO_K3, gpk3),
-   EXYNOS_PIN_BANK_EINTG(0x0C0, EXYNOS4210_GPIO_L0, gpl0),
-   EXYNOS_PIN_BANK_EINTG(0x0E0, EXYNOS4210_GPIO_L1, gpl1),
-   EXYNOS_PIN_BANK_EINTG(0x100, EXYNOS4210_GPIO_L2, gpl2),
-   EXYNOS_PIN_BANK_EINTN(0x120, EXYNOS4210_GPIO_Y0, gpy0),
-   EXYNOS_PIN_BANK_EINTN(0x140, EXYNOS4210_GPIO_Y1, gpy1),
-   EXYNOS_PIN_BANK_EINTN(0x160, EXYNOS4210_GPIO_Y2, gpy2),
-   EXYNOS_PIN_BANK_EINTN(0x180, EXYNOS4210_GPIO_Y3, gpy3),
-   EXYNOS_PIN_BANK_EINTN(0x1A0, EXYNOS4210_GPIO_Y4, gpy4),
-   EXYNOS_PIN_BANK_EINTN(0x1C0, EXYNOS4210_GPIO_Y5, gpy5),
-   EXYNOS_PIN_BANK_EINTN(0x1E0, EXYNOS4210_GPIO_Y6, gpy6),
-   EXYNOS_PIN_BANK_EINTN(0xC00, EXYNOS4210_GPIO_X0, gpx0),
-   EXYNOS_PIN_BANK_EINTN(0xC20, EXYNOS4210_GPIO_X1, gpx1),
-   EXYNOS_PIN_BANK_EINTN(0xC40, EXYNOS4210_GPIO_X2, gpx2),
-   EXYNOS_PIN_BANK_EINTN(0xC60, EXYNOS4210_GPIO_X3, gpx3),
-};
-
-/* pin banks of exynos4210 pin-controller 2 */
-static struct samsung_pin_bank exynos4210_pin_banks2[] = {
-   EXYNOS_PIN_BANK_EINTN(0x000, EXYNOS4210_GPIO_Z, gpz),
-};
-
-/*
- * Samsung pinctrl driver data for Exynos4210 SoC. Exynos4210 SoC includes
- * three gpio/pin-mux/pinconfig controllers.
- */
-struct samsung_pin_ctrl exynos4210_pin_ctrl[] = {
-   {
-   /* pin-controller instance 0 data */
-   .pin_banks  = exynos4210_pin_banks0,
-   .nr_banks   = ARRAY_SIZE(exynos4210_pin_banks0),
-   .base   = EXYNOS4210_GPIO_A0_START,
-   .nr_pins= EXYNOS4210_GPIOA_NR_PINS,
-   .nr_gint= EXYNOS4210_GPIOA_NR_GINT,
-   .geint_con  = EXYNOS_GPIO_ECON_OFFSET,
-   .geint_mask = EXYNOS_GPIO_EMASK_OFFSET,
-   .geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
-   .svc= EXYNOS_SVC_OFFSET,
-   .eint_gpio_init = exynos_eint_gpio_init,
-   .label  = exynos4210-gpio-ctrl0,
-   }, {
-   /* pin-controller instance 1 data */
-   .pin_banks  = exynos4210_pin_banks1,
-   .nr_banks   = ARRAY_SIZE(exynos4210_pin_banks1),
-   .base   = EXYNOS4210_GPIOA_NR_PINS,
-   .nr_pins= EXYNOS4210_GPIOB_NR_PINS,
-   .nr_gint= EXYNOS4210_GPIOB_NR_GINT,
-   .nr_wint= 32,
-   .geint_con  = EXYNOS_GPIO_ECON_OFFSET,
-   

[RFC 4/6] pinctrl: samsung: Parse bank-specific eint offset from DT

2012-09-20 Thread Tomasz Figa
Some SoCs, like Exynos4x12, have non-linear layout of EINT control
registers and so current way of calculating register addresses does not
work correctly for them.

This patch adds parsing of samsung,eint-offset property from bank nodes
and uses the read values instead of calculating the offsets from bank
index.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c  | 5 ++---
 drivers/pinctrl/pinctrl-samsung.c | 5 +
 drivers/pinctrl/pinctrl-samsung.h | 1 +
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 3cbc632..836ac36 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -146,7 +146,7 @@ static struct exynos_geint_data 
*exynos_get_eint_data(irq_hw_number_t hw,
struct samsung_pin_bank *bank = d-ctrl-pin_banks;
struct exynos_geint_data *eint_data;
unsigned int nr_banks = d-ctrl-nr_banks, idx;
-   unsigned int irq_base = 0, eint_offset = 0;
+   unsigned int irq_base = 0;
 
if (hw = d-ctrl-nr_gint) {
dev_err(d-dev, unsupported ext-gpio interrupt\n);
@@ -159,7 +159,6 @@ static struct exynos_geint_data 
*exynos_get_eint_data(irq_hw_number_t hw,
if ((hw = irq_base)  (hw  (irq_base + bank-nr_pins)))
break;
irq_base += bank-nr_pins;
-   eint_offset += 4;
}
 
if (idx == nr_banks) {
@@ -175,7 +174,7 @@ static struct exynos_geint_data 
*exynos_get_eint_data(irq_hw_number_t hw,
 
eint_data-bank = bank;
eint_data-pin = hw - irq_base;
-   eint_data-eint_offset = eint_offset;
+   eint_data-eint_offset = bank-eint_offset;
return eint_data;
 }
 
diff --git a/drivers/pinctrl/pinctrl-samsung.c 
b/drivers/pinctrl/pinctrl-samsung.c
index ff1d001..03bf743 100644
--- a/drivers/pinctrl/pinctrl-samsung.c
+++ b/drivers/pinctrl/pinctrl-samsung.c
@@ -832,6 +832,11 @@ static int samsung_pinctrl_parse_dt_bank(struct 
samsung_pin_bank *bank,
 
bank-eint_type = EINT_TYPE_GPIO;
 
+   ret = of_property_read_u32(np, samsung,eint-offset, val);
+   if (ret)
+   return ret;
+   bank-eint_offset = val;
+
return 0;
 }
 
diff --git a/drivers/pinctrl/pinctrl-samsung.h 
b/drivers/pinctrl/pinctrl-samsung.h
index db1907c..72303f1 100644
--- a/drivers/pinctrl/pinctrl-samsung.h
+++ b/drivers/pinctrl/pinctrl-samsung.h
@@ -122,6 +122,7 @@ struct samsung_pin_bank {
u8  conpdn_width;
u8  pudpdn_width;
enum eint_type  eint_type;
+   u32 eint_offset;
u32 irq_base;
const char  *name;
 };
-- 
1.7.12

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[RFC 5/6] ARM: dts: exynos4210: Remove legacy gpio nodes

2012-09-20 Thread Tomasz Figa
This patch removes the legacy gpio nodes as the gpio driver is going to
be replaced with the new pinctrl driver.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/boot/dts/exynos4210.dtsi | 229 --
 1 file changed, 229 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index a4bd0c9..ecbc707 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -250,233 +250,4 @@
interrupts = 0 36 0;
};
};
-
-   gpio-controllers {
-   #address-cells = 1;
-   #size-cells = 1;
-   gpio-controller;
-   ranges;
-
-   gpa0: gpio-controller@1140 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x1140 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpa1: gpio-controller@11400020 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400020 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpb: gpio-controller@11400040 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400040 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpc0: gpio-controller@11400060 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400060 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpc1: gpio-controller@11400080 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400080 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpd0: gpio-controller@114000A0 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x114000A0 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpd1: gpio-controller@114000C0 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x114000C0 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpe0: gpio-controller@114000E0 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x114000E0 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpe1: gpio-controller@11400100 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400100 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpe2: gpio-controller@11400120 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400120 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpe3: gpio-controller@11400140 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400140 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpe4: gpio-controller@11400160 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400160 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpf0: gpio-controller@11400180 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x11400180 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpf1: gpio-controller@114001A0 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x114001A0 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpf2: gpio-controller@114001C0 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x114001C0 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpf3: gpio-controller@114001E0 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x114001E0 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpj0: gpio-controller@1100 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x1100 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpj1: gpio-controller@1120 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x1120 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpk0: gpio-controller@1140 {
-   compatible = samsung,exynos4-gpio;
-   reg = 0x1140 0x20;
-   #gpio-cells = 4;
-   };
-
-   gpk1: gpio-controller@1160 {
-   compatible = 

Re: [PATCH 1/3] ARM: EXYNOS5: Add fimd node to the exynos5250 dtsi file

2012-09-20 Thread Leela Krishna Amudala
Hello,

On Thu, Sep 20, 2012 at 1:33 PM, Jingoo Han jg1@samsung.com wrote:
 On Wednesday, September 19, 2012 3:22 AM Leela Krishna Amudala wrote

 This patch adds the fimd node with compatibility string, hardware address,
 interrupt line numbers to the exynos5250 dtsi file.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5250.dtsi |7 +++
  1 files changed, 7 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
 b/arch/arm/boot/dts/exynos5250.dtsi
 index b55794b..6d27ca4 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -488,4 +488,11 @@
   reg = 0x13e3 0x1000;
   interrupts = 0 88 0;
   };
 +
 + fimd {
 + compatible = samsung,exynos5-drm;

 Should it be samsung,exynos5-fimd?



Yes, It is my typo error, it should be samsung,exynos5-fimd.
Will correct it in next version.

 + interrupt-parent = combiner;
 + reg = 0x1440 0x4;
 + interrupts = 18 5, 18 4, 18 6;
 + };
  };
 --
 1.7.0.4

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Re: [PATCH V4 2/2] video: drm: exynos: Add device tree support

2012-09-20 Thread Leela Krishna Amudala
Hello Inki Dae,

On Thu, Sep 20, 2012 at 11:59 AM, Inki Dae inki@samsung.com wrote:
 Hi,

 I had merged this patch set but I realizes this patch has no
 descriptions enough so please add the descriptions what is this patch.


Will give more description and post the next version.


 2012/9/6 Leela Krishna Amudala l.kris...@samsung.com:
 Add device tree based discovery support for DRM-FIMD driver.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  Documentation/devicetree/bindings/fb/drm-fimd.txt |   80 +

 and, how about making drm folder instead of fb? so like below;
  Documentation/devicetree/bindings/drm/exynos/fimd.txt


Okay, will move it to the drm folder.

Best Wishes,
Leela Krishna Amudala.

 Thanks,
 Inki Dae

  drivers/gpu/drm/exynos/exynos_drm_fimd.c  |   95 
 -
  2 files changed, 173 insertions(+), 2 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/fb/drm-fimd.txt

 diff --git a/Documentation/devicetree/bindings/fb/drm-fimd.txt 
 b/Documentation/devicetree/bindings/fb/drm-fimd.txt
 new file mode 100644
 index 000..4ff1829
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/fb/drm-fimd.txt
 @@ -0,0 +1,80 @@
 +* Samsung Display Controller using DRM frame work
 +
 +The display controller is used to transfer image data from memory to an
 +external LCD driver interface. It supports various color formats such as
 +rgb and yuv.
 +
 +Required properties:
 + - compatible: Should be samsung,exynos5-fimd or samsung,exynos4-fb for
 +   fimd using DRM frame work.
 + - reg: physical base address of the controller and length of memory
 +   mapped region.
 + - interrupts: Three interrupts should be specified. The interrupts should 
 be
 +   specified in the following order.
 +   - VSYNC interrupt
 +   - FIFO level interrupt
 +   - FIMD System Interrupt
 +
 + - samsung,fimd-display: This property should specify the phandle of the
 +   display device node which holds the video interface timing with the
 +   below mentioned properties.
 +
 +   - lcd-htiming: Specifies the horizontal timing for the overlay. The
 + horizontal timing includes four parameters in the following order.
 +
 + - horizontal back porch (in number of lcd clocks)
 + - horizontal front porch (in number of lcd clocks)
 + - hsync pulse width (in number of lcd clocks)
 + - Display panels X resolution.
 +
 +   - lcd-vtiming: Specifies the vertical timing for the overlay. The
 + vertical timing includes four parameters in the following order.
 +
 + - vertical back porch (in number of lcd lines)
 + - vertical front porch (in number of lcd lines)
 + - vsync pulse width (in number of lcd clocks)
 + - Display panels Y resolution.
 +
 +
 + - samsung,default-window: Specifies the default window number of the fimd 
 controller.
 +
 + - samsung,fimd-win-bpp: Specifies the bits per pixel.
 +
 +Optional properties:
 + - samsung,fimd-vidout-rgb: Video output format is RGB.
 + - samsung,fimd-inv-vclk: invert video clock polarity.
 + - samsung,fimd-frame-rate: Number of video frames per second.
 +
 +Example:
 +
 +   The following is an example for the fimd controller is split into
 +   two portions. The SoC specific portion can be specified in the SoC
 +   specific dts file. The board specific portion can be specified in the
 +   board specific dts file.
 +
 +   - SoC Specific portion
 +
 +   fimd {
 +   compatible = samsung,exynos5-fimd;
 +   interrupt-parent = combiner;
 +   reg = 0x1440 0x4;
 +   interrupts = 18 5, 18 4, 18 6;
 +   };
 +
 +   - Board Specific portion
 +
 +   lcd_fimd0: lcd_panel0 {
 +   lcd-htiming = 4 4 4 480;
 +   lcd-vtiming = 4 4 4 320;
 +   supports-mipi-panel;
 +   };
 +
 +   fimd {
 +   samsung,fimd-display = lcd_fimd0;
 +   samsung,fimd-vidout-rgb;
 +   samsung,fimd-inv-vclk;
 +   samsung,fimd-frame-rate = 60;
 +   samsung,default-window = 0;
 +   samsung,fimd-win-bpp = 32;
 +   };
 +
 diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
 b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 index 3701fbe..a4fa8e9 100644
 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
 @@ -18,6 +18,7 @@
  #include linux/platform_device.h
  #include linux/clk.h
  #include linux/pm_runtime.h
 +#include linux/of.h

  #include video/samsung_fimd.h
  #include drm/exynos_drm.h
 @@ -103,9 +104,18 @@ struct fimd_context {
 struct exynos_drm_panel_info *panel;
  };

 +static const struct of_device_id fimd_dt_match[];
 +
  static inline struct fimd_driver_data *drm_fimd_get_driver_data(
 struct platform_device *pdev)
  {
 +#ifdef CONFIG_OF
 +   if (pdev-dev.of_node) {
 +   const struct of_device_id *match;
 + 

Re: [PATCH 0/6] pinctrl: samsung: Various fixes

2012-09-20 Thread Linus Walleij
On Thu, Sep 20, 2012 at 10:51 AM, Tomasz Figa t.f...@samsung.com wrote:

 This patch series contains various fixes of problems and nitpicks spotted when
 working on adding support for Exynos4x12. See each patch for more detailed
 information.

This all looks good, do you want me to take this into the pinctrl tree
or will it go through Samsung ARM SoC (Kyungmin)?

In the latter case, Acked-by: Linus Walleij linus.wall...@linaro.org
for all, else poke me and I'll apply them.

Yours,
Linus Walleij
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Re: [RFC 0/6] pinctrl: samsung: Remove static platform-specific data

2012-09-20 Thread Linus Walleij
On Thu, Sep 20, 2012 at 10:53 AM, Tomasz Figa t.f...@samsung.com wrote:

 This RFC series is a work on replacing static platform-specific data in
 pinctrl-samsung driver with data dynamically parsed from device tree.

Please include Stephen Warren on this series, he know his way
around pinctrl - devicetree better than anyone else.

(I'll look and see if I can see something that sticks out...)

Yours,
Linus Walleij
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Re: [PATCH] video: exynos_dp: Add device tree support to DP driver

2012-09-20 Thread Jingoo Han
On Friday, September 14, 2012 3:40 AM Ajay Kumar wrote
 
 This patch enables device tree based discovery support for DP driver.
 The driver is modified to handle platform data in both the cases:
 with DT and non-DT.
 
 DP-PHY should be regarded as a seperate device node while
 being passed from device tree list, and device node for
 DP should contain DP-PHY as child node with property name dp-phy
 associated with it.

Hi Ajay,

Thank you for sending the patch for Device Tree support.
I tested the patch with Exynos5250.

As Leela Krishna Amudala mentioned, please post the documentation
for the bindings.

Also, I added some comments for minor fix.

Best regards,
Jingoo Han

 
 Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
 ---
  drivers/video/exynos/exynos_dp_core.c |  156 
 +++--
  drivers/video/exynos/exynos_dp_core.h |2 +
  2 files changed, 151 insertions(+), 7 deletions(-)
 
 diff --git a/drivers/video/exynos/exynos_dp_core.c 
 b/drivers/video/exynos/exynos_dp_core.c
 index f57c915..15887bd 100644
 --- a/drivers/video/exynos/exynos_dp_core.c
 +++ b/drivers/video/exynos/exynos_dp_core.c
 @@ -18,6 +18,7 @@
  #include linux/io.h
  #include linux/interrupt.h
  #include linux/delay.h
 +#include linux/of.h
 
  #include video/exynos_dp.h
 
 @@ -856,20 +857,117 @@ static irqreturn_t exynos_dp_irq_handler(int irq, void 
 *arg)
   return IRQ_HANDLED;
  }
 
 +#ifdef CONFIG_OF
 +struct exynos_dp_platdata *exynos_dp_dt_parse_pdata(struct device *dev)
 +{
 + struct device_node *dp_node = dev-of_node;
 + struct exynos_dp_platdata *pd;
 + struct video_info *dp_video_config;
 +
 + pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
 + if (!pd) {
 + dev_err(dev, memory allocation for pdata failed\n);
 + return ERR_PTR(-ENOMEM);
 + }
 + dp_video_config = devm_kzalloc(dev,
 + sizeof(*dp_video_config), GFP_KERNEL);
 +
 + if (!dp_video_config) {
 + dev_err(dev, memory allocation for video config failed\n);
 + return ERR_PTR(-ENOMEM);
 + }
 + pd-video_info = dp_video_config;
 +
 + if (of_get_property(dp_node, samsung,h-sync-polarity, NULL))
 + dp_video_config-h_sync_polarity = 1;
 +
 + if (of_get_property(dp_node, samsung,v-sync-polarity, NULL))
 + dp_video_config-v_sync_polarity = 1;
 +
 + if (of_get_property(dp_node, samsung,interlaced, NULL))
 + dp_video_config-interlaced = 1;
 +
 + of_property_read_u32(dp_node, samsung,color_space,
 + dp_video_config-color_space);
 +
 + of_property_read_u32(dp_node, samsung,dynamic_range,
 + dp_video_config-dynamic_range);
 +
 + of_property_read_u32(dp_node, samsung,ycbcr_coeff,
 + dp_video_config-ycbcr_coeff);
 +
 + of_property_read_u32(dp_node, samsung,color_depth,
 + dp_video_config-color_depth);
 +
 + of_property_read_u32(dp_node, samsung,link_rate,
 + dp_video_config-link_rate);
 +
 + of_property_read_u32(dp_node, samsung,lane_count,
 + dp_video_config-lane_count);
 + return pd;
 +}
 +
 +void exynos_dp_dt_parse_phydata(struct exynos_dp_device *dp)
 +{
 + struct device_node *dp_phy_node;
 +
 + const __be32 *parp;
 +
 + u32 phy_base;
 +
 + void *virt_phy_base;

Please, remove unnecessary spaces between variables.


 +
 + parp = of_get_property(dp-dev-of_node, dp_phy, NULL);
 + if (!parp) {
 + dp-dp_phy_addr = NULL;
 + return;
 + }
 +
 + dp_phy_node = of_find_node_by_phandle(be32_to_cpup(parp));
 + if (!dp_phy_node) {
 + dp-dp_phy_addr = NULL;
 + return;
 + }
 +
 + of_property_read_u32(dp_phy_node, samsung,dptx_phy_reg, phy_base);
 + of_property_read_u32(dp_phy_node, samsung,enable_bit,
 + dp-enable_bit);
 + virt_phy_base = ioremap(phy_base, SZ_4);
 + if (!virt_phy_base) {
 + dev_err(dp-dev, failed to ioremap dp-phy\n);
 + dp-dp_phy_addr = NULL;
 + return;
 + }
 + dp-dp_phy_addr = virt_phy_base;
 +}
 +
 +void dp_phy_init(struct exynos_dp_device *dp)

Use exynos_dp_phy_init.

 +{
 + u32 reg;
 +
 + reg = __raw_readl(dp-dp_phy_addr);
 + reg |= dp-enable_bit;
 + __raw_writel(reg, dp-dp_phy_addr);
 +}
 +
 +void dp_phy_exit(struct exynos_dp_device *dp)

Use exynos_dp_phy_exit.

 +{
 + u32 reg;
 +
 + reg = __raw_readl(dp-dp_phy_addr);
 + reg = ~(dp-enable_bit);
 + __raw_writel(reg, dp-dp_phy_addr);
 +}
 +#endif /* CONFIG_OF */
 +
  static int __devinit exynos_dp_probe(struct platform_device *pdev)
  {
   struct resource *res;
   struct exynos_dp_device *dp;
 - struct exynos_dp_platdata *pdata;
 + struct exynos_dp_platdata *pdata = pdev-dev.platform_data;
 

Re: [PATCH 0/6] pinctrl: samsung: Various fixes

2012-09-20 Thread Kukjin Kim

On 09/20/12 19:25, Linus Walleij wrote:

On Thu, Sep 20, 2012 at 10:51 AM, Tomasz Figat.f...@samsung.com  wrote:


This patch series contains various fixes of problems and nitpicks spotted when
working on adding support for Exynos4x12. See each patch for more detailed
information.


This all looks good, do you want me to take this into the pinctrl tree
or will it go through Samsung ARM SoC (Kyungmin)?

In the latter case, Acked-by: Linus Walleijlinus.wall...@linaro.org
for all, else poke me and I'll apply them.

Linus, thanks for your ack and looks OK to me. Since now pinctrl-exynos 
driver is in my tree so let me pick this series on top of it into 
Samsung tree with your ack.


Thanks.

Best regards,
Kgene.
--
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SW Solution Development Team, Samsung Electronics Co., Ltd.
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[PATCH 7/6] pinctrl: exynos: Fix wakeup IRQ domain registration check

2012-09-20 Thread Tomasz Figa
Because of a typo, incorrect field of a structure was being checked.
This patch fixes the check to use correct field.

Signed-off-by: Tomasz Figa t.f...@samsung.com
---
 drivers/pinctrl/pinctrl-exynos.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 0d01d19..21362f4 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -447,7 +447,7 @@ static int exynos_eint_wkup_init(struct 
samsung_pinctrl_drv_data *d)
 
d-wkup_irqd = irq_domain_add_linear(wkup_np, d-ctrl-nr_wint,
exynos_wkup_irqd_ops, d);
-   if (!d-gpio_irqd) {
+   if (!d-wkup_irqd) {
dev_err(dev, wakeup irq domain allocation failed\n);
return -ENXIO;
}
-- 
1.7.12


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Re: [PATCH 0/6] pinctrl: samsung: Various fixes

2012-09-20 Thread Tomasz Figa
Hi Kukjin,

On Thursday 20 of September 2012 23:29:13 Kukjin Kim wrote:
 On 09/20/12 19:25, Linus Walleij wrote:
  On Thu, Sep 20, 2012 at 10:51 AM, Tomasz Figat.f...@samsung.com  
wrote:
  This patch series contains various fixes of problems and nitpicks
  spotted when working on adding support for Exynos4x12. See each patch
  for more detailed information.
  
  This all looks good, do you want me to take this into the pinctrl tree
  or will it go through Samsung ARM SoC (Kyungmin)?
  
  In the latter case, Acked-by: Linus Walleijlinus.wall...@linaro.org
  for all, else poke me and I'll apply them.
 
 Linus, thanks for your ack and looks OK to me. Since now pinctrl-exynos
 driver is in my tree so let me pick this series on top of it into
 Samsung tree with your ack.

I just posted an additional last minute trivial patch which fixes another 
typo I found.

Could you take it with this series?

Best regards,
-- 
Tomasz Figa
Samsung Poland RD Center

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RE: [PATCH 0/6] pinctrl: samsung: Various fixes

2012-09-20 Thread Kukjin Kim
Tomasz Figa wrote:
 
 Hi Kukjin,
 
Hi,

 On Thursday 20 of September 2012 23:29:13 Kukjin Kim wrote:
  On 09/20/12 19:25, Linus Walleij wrote:
   On Thu, Sep 20, 2012 at 10:51 AM, Tomasz Figat.f...@samsung.com
 wrote:
   This patch series contains various fixes of problems and nitpicks
   spotted when working on adding support for Exynos4x12. See each patch
   for more detailed information.
  
   This all looks good, do you want me to take this into the pinctrl tree
   or will it go through Samsung ARM SoC (Kyungmin)?
  
   In the latter case, Acked-by: Linus Walleijlinus.wall...@linaro.org
   for all, else poke me and I'll apply them.
 
  Linus, thanks for your ack and looks OK to me. Since now pinctrl-exynos
  driver is in my tree so let me pick this series on top of it into
  Samsung tree with your ack.
 
 I just posted an additional last minute trivial patch which fixes another
 typo I found.
 
 Could you take it with this series?
 
Sure, your [PATCH 7/6] pinctrl: exynos: Fix wakeup IRQ domain registration
check is correct. I will pick that up with this series.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH] ARM: exynos: remove the MMC_CAP2_BROKEN_VOLTAGE

2012-09-20 Thread Kukjin Kim
Jaehoon Chung wrote:
 
 This patch is dependency with Chris's patch.
 [PATCH] mmc: core: Replace MMC_CAP2_BROKEN_VOLTAGE with test for fixed
 regulator
 http://git.kernel.org/?p=linux/kernel/git/cjb/mmc.git;a=commit;h=421fc8e70
 079b8b9e473a55a6267302695641dcc
 
 After applied that patch, it needs not to set MMC_CAP2_BROKEN_VOLTAGE.
 
Yeah, we don't need more this. This will be queued into -late branch for
v3.7 or can be queued into cleanup for next merge window because this is not
critical.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.


 Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  arch/arm/mach-exynos/mach-nuri.c   |1 -
  arch/arm/mach-exynos/mach-universal_c210.c |1 -
  arch/arm/mach-s5pv210/mach-goni.c  |1 -
  3 files changed, 0 insertions(+), 3 deletions(-)
 
 diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-
 nuri.c
 index 90d8daa..6e0b0fa 100644
 --- a/arch/arm/mach-exynos/mach-nuri.c
 +++ b/arch/arm/mach-exynos/mach-nuri.c
 @@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data
 __initdata = {
   .host_caps  = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED
|
   MMC_CAP_ERASE),
 - .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
   .cd_type= S3C_SDHCI_CD_PERMANENT,
  };
 
 diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-
 exynos/mach-universal_c210.c
 index 8139cd2..865be0a 100644
 --- a/arch/arm/mach-exynos/mach-universal_c210.c
 +++ b/arch/arm/mach-exynos/mach-universal_c210.c
 @@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data
 __initdata = {
   .max_width  = 8,
   .host_caps  = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
   MMC_CAP_MMC_HIGHSPEED |
MMC_CAP_SD_HIGHSPEED),
 - .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
   .cd_type= S3C_SDHCI_CD_PERMANENT,
  };
 
 diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-
 s5pv210/mach-goni.c
 index c552581..239e896 100644
 --- a/arch/arm/mach-s5pv210/mach-goni.c
 +++ b/arch/arm/mach-s5pv210/mach-goni.c
 @@ -774,7 +774,6 @@ static void __init goni_pmic_init(void)
  /* MoviNAND */
  static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
   .max_width  = 4,
 - .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
   .cd_type= S3C_SDHCI_CD_PERMANENT,
  };
 
 --
 1.7.4.1

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Re: [GIT PULL 6/7] Samsung cleanup fimd header for v3.7

2012-09-20 Thread Olof Johansson
On Thu, Sep 20, 2012 at 08:19:15AM +0900, Kukjin Kim wrote:
 Hi Arnd, Olof.
 
 This is for moving header file is related to fimd from platform to
 include/video.
 
 Since this touches many Samsung stuff, it is included in samsung tree and I
 requested to pull into Florian's tree and he already agreed. So its name is
 'v3.7-for-florian'.

Hi,

So, it seems like there's no need to pull this through arm-soc; there are no
conflicts with other patches as far as I can see, and it can just go in through
Florian's tree.

Florian, if you want, you can add:

Acked-by: Olof Johansson o...@lixom.net

on the merge you do.


-Olof
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Re: [GIT PULL 1/7] Samsung cleanup for v3.7

2012-09-20 Thread Olof Johansson
On Thu, Sep 20, 2012 at 08:18:31AM +0900, Kukjin Kim wrote:
 Hi Arnd, Olof
 
 Here, there are cleanup patches for Samsung v3.7 and most of them are
 related to cleanup Samsung specific gpio API.
 
 If any problem, please kindly let me know.

Thanks, I've pulled all but the fimd header branch into arm-soc now.


-Olof
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Re: [GIT PULL 6/7] Samsung cleanup fimd header for v3.7

2012-09-20 Thread Florian Tobias Schandinat
Hi,

On 09/20/2012 11:59 PM, Olof Johansson wrote:
 On Thu, Sep 20, 2012 at 08:19:15AM +0900, Kukjin Kim wrote:
 Hi Arnd, Olof.

 This is for moving header file is related to fimd from platform to
 include/video.

 Since this touches many Samsung stuff, it is included in samsung tree and I
 requested to pull into Florian's tree and he already agreed. So its name is
 'v3.7-for-florian'.
 
 Hi,
 
 So, it seems like there's no need to pull this through arm-soc; there are no
 conflicts with other patches as far as I can see, and it can just go in 
 through
 Florian's tree.
 
 Florian, if you want, you can add:
 
 Acked-by: Olof Johansson o...@lixom.net
 
 on the merge you do.

Works for me. I already merged it.


Best regards,

Florian Tobias Schandinat
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Re: [PATCH] ARM: exynos: remove the MMC_CAP2_BROKEN_VOLTAGE

2012-09-20 Thread Jaehoon Chung
Thanks Kukjin.

Best Regards,
Jaehoon Chung

On 09/21/2012 08:36 AM, Kukjin Kim wrote:
 Jaehoon Chung wrote:

 This patch is dependency with Chris's patch.
 [PATCH] mmc: core: Replace MMC_CAP2_BROKEN_VOLTAGE with test for fixed
 regulator
 http://git.kernel.org/?p=linux/kernel/git/cjb/mmc.git;a=commit;h=421fc8e70
 079b8b9e473a55a6267302695641dcc

 After applied that patch, it needs not to set MMC_CAP2_BROKEN_VOLTAGE.

 Yeah, we don't need more this. This will be queued into -late branch for
 v3.7 or can be queued into cleanup for next merge window because this is not
 critical.
 
 Thanks.
 
 Best regards,
 Kgene.
 --
 Kukjin Kim kgene@samsung.com, Senior Engineer,
 SW Solution Development Team, Samsung Electronics Co., Ltd.
 
 
 Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  arch/arm/mach-exynos/mach-nuri.c   |1 -
  arch/arm/mach-exynos/mach-universal_c210.c |1 -
  arch/arm/mach-s5pv210/mach-goni.c  |1 -
  3 files changed, 0 insertions(+), 3 deletions(-)

 diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-
 nuri.c
 index 90d8daa..6e0b0fa 100644
 --- a/arch/arm/mach-exynos/mach-nuri.c
 +++ b/arch/arm/mach-exynos/mach-nuri.c
 @@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data
 __initdata = {
  .host_caps  = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED
 |
  MMC_CAP_ERASE),
 -.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
  .cd_type= S3C_SDHCI_CD_PERMANENT,
  };

 diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-
 exynos/mach-universal_c210.c
 index 8139cd2..865be0a 100644
 --- a/arch/arm/mach-exynos/mach-universal_c210.c
 +++ b/arch/arm/mach-exynos/mach-universal_c210.c
 @@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data
 __initdata = {
  .max_width  = 8,
  .host_caps  = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  MMC_CAP_MMC_HIGHSPEED |
 MMC_CAP_SD_HIGHSPEED),
 -.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
  .cd_type= S3C_SDHCI_CD_PERMANENT,
  };

 diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-
 s5pv210/mach-goni.c
 index c552581..239e896 100644
 --- a/arch/arm/mach-s5pv210/mach-goni.c
 +++ b/arch/arm/mach-s5pv210/mach-goni.c
 @@ -774,7 +774,6 @@ static void __init goni_pmic_init(void)
  /* MoviNAND */
  static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
  .max_width  = 4,
 -.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
  .cd_type= S3C_SDHCI_CD_PERMANENT,
  };

 --
 1.7.4.1
 
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Re: [PATCH v6 1/6] thermal: add generic cpufreq cooling implementation

2012-09-20 Thread jonghwa3 . lee
Hi, Amit,
On 2012년 08월 16일 20:41, Amit Daniel Kachhap wrote:

  diff --git a/drivers/thermal/cpu_cooling.c b/drivers/thermal/cpu_cooling.c
  new file mode 100644
  index 000..66cbd52
  --- /dev/null
  +++ b/drivers/thermal/cpu_cooling.c
  @@ -0,0 +1,586 @@

  +/**
  + * cpufreq_cooling_register - function to create cpufreq cooling device.
  + * @clip_cpus: cpumask of cpus where the frequency constraints will happen.
  + */
  +struct thermal_cooling_device *cpufreq_cooling_register(
  +   struct cpumask *clip_cpus)
  +{
  +   struct thermal_cooling_device *cool_dev;
  +   struct cpufreq_cooling_device *cpufreq_dev = NULL;
  +   unsigned int cpufreq_dev_count = 0, min = 0, max = 0;
  +   char dev_name[THERMAL_NAME_LENGTH];
  +   int ret = 0, id = 0, i;
  +   struct cpufreq_policy policy;
  +   ret = get_idr(cpufreq_idr,cpufreq_dev-id);
  +   if (ret) {
  +   kfree(cpufreq_dev);
  +   return ERR_PTR(-EINVAL);
  +   }
  +
  +   sprintf(dev_name, thermal-cpufreq-%d, cpufreq_dev-id);
  +
  +   cool_dev = thermal_cooling_device_register(dev_name, cpufreq_dev,
  +cpufreq_cooling_ops);
  +   if (!cool_dev) {
  +   release_idr(cpufreq_idr, cpufreq_dev-id);
  +   kfree(cpufreq_dev);
  +   return ERR_PTR(-EINVAL);
  +   }
  +   cpufreq_dev-id = id;


Why is this needed? Should every cpufreq_dev instance's id be same for
zero? It looks odd. And it also has problem which can be occurred when
it release id during unregistering cpufreq_dev. I think it should keep
the idr value taken before.


  1.7.1

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RE: [PATCH v6 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc

2012-09-20 Thread Seungwon Jeon
On Thursday, September 20, 2012, Thomas Abraham thomas.abra...@linaro.org 
wrote:
 On 19 September 2012 19:12, Seungwon Jeon tgih@samsung.com wrote:
  On Tuesday, September 18, 2012, Thomas Abraham thomas.abra...@linaro.org 
  wrote:
  +int dw_mci_exynos_probe(struct platform_device *pdev)
  +{
  + struct dw_mci_drv_data *drv_data;
  + const struct of_device_id *match;
  +
  + match = of_match_node(dw_mci_exynos_match, pdev-dev.of_node);
  + drv_data = match-data;
  In non-dt case, match has NULL.
  Needed to check pdev-dev.of_node
 
 Since all current users in mainline of this driver on Exynos platforms
 are device tree based, and since Exynos4 and Exynos5 have device tree
 support, I have mainly been adding device tree support here. Only for
 non-exynos portions of the code, I have ensured that both dt and
 legacy modes are supported.
Yes. I know, then dw_mmc-exynos.c should have a dependency of CONFIG_OF?
It needs to prevent kernel panic at least.

Thanks,
Seungwon Jeon
Thanks,
Seungwon Jeon
 
 Thanks,
 Thomas.
 
 [...]
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RE: [PATCH v6 6/9] mmc: dw_mmc: add device tree support

2012-09-20 Thread Seungwon Jeon
On Thursday, September 20, 2012, Thomas Abraham thomas.abra...@linaro.org 
wrote:
 On 19 September 2012 19:09, Seungwon Jeon tgih@samsung.com wrote:
  On Tuesday, September 18, 2012, Thomas Abraham thomas.abra...@linaro.org 
  wrote:
  +#ifdef CONFIG_OF
  +/* given a slot id, find out the device node representing that slot */
  +static struct device_node *dw_mci_of_find_slot_node(struct device *dev, 
  u8 slot)
  +{
  + struct device_node *np;
  + const __be32 *addr;
  + int len;
  +
  + if (!dev || !dev-of_node)
  + return NULL;
  +
  + for_each_child_of_node(dev-of_node, np) {
  + addr = of_get_property(np, reg, len);
  + if (!addr || (len  sizeof(int)))
  + continue;
  + if (be32_to_cpup(addr) == slot)
  + return np;
  + }
  + return NULL;
  +}
  +
  +/* find out bus-width for a given slot */
  +static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
  +{
  + struct device_node *np = dw_mci_of_find_slot_node(dev, slot);
  + u32 bus_wd = 1;
  +
  + if (!np)
  + return 1;
  +
  + if (of_property_read_u32(np, bus-width, bus_wd))
  + dev_err(dev, bus-width property not found, assuming width
  + as 1\n);
  + return bus_wd;
  +}
  +#else /* CONFIG_OF */
  +static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot)
  +{
  + return 1;
  +}
  +static struct device_node *dw_mci_of_find_slot_node(struct device *dev, 
  u8 slot)
  +{
  + return NULL;
  +}
  +#endif /* CONFIG_OF */
  +
   static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
   {
struct mmc_host *mmc;
struct dw_mci_slot *slot;
  + u8 bus_width;
 
mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host-dev);
if (!mmc)
  @@ -1782,6 +1830,7 @@ static int dw_mci_init_slot(struct dw_mci *host, 
  unsigned int id)
slot-id = id;
slot-mmc = mmc;
slot-host = host;
  + host-slot[id] = slot;
 
mmc-ops = dw_mci_ops;
mmc-f_min = DIV_ROUND_UP(host-bus_hz, 510);
  @@ -1806,8 +1855,18 @@ static int dw_mci_init_slot(struct dw_mci *host, 
  unsigned int id)
mmc-caps2 = host-pdata-caps2;
 
if (host-pdata-get_bus_wd)
  - if (host-pdata-get_bus_wd(slot-id) = 4)
  - mmc-caps |= MMC_CAP_4_BIT_DATA;
  + bus_width = host-pdata-get_bus_wd(slot-id);
  + else if (host-dev-of_node)
  + bus_width = dw_mci_of_get_bus_wd(host-dev, slot-id);
  + else
  + bus_width = 1;
  +
  + switch (bus_width) {
  + case 8:
  + mmc-caps |= MMC_CAP_8_BIT_DATA;
  + case 4:
  + mmc-caps |= MMC_CAP_4_BIT_DATA;
  + }
 
if (host-pdata-quirks  DW_MCI_QUIRK_HIGHSPEED)
mmc-caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
  @@ -1852,7 +1911,6 @@ static int dw_mci_init_slot(struct dw_mci *host, 
  unsigned int id)
else
clear_bit(DW_MMC_CARD_PRESENT, slot-flags);
 
  - host-slot[id] = slot;
mmc_add_host(mmc);
 
   #if defined(CONFIG_DEBUG_FS)
  @@ -1944,16 +2002,74 @@ static bool mci_wait_reset(struct device *dev, 
  struct dw_mci *host)
return false;
   }
 
  The following CONFIG_OF block can be put together in upper CONFIG_OF .
 
 The placement of device tree related code is considering the logical
 structure and flow of the code. So maybe we can just retain the below
 code here for now.
 
 
  +#ifdef CONFIG_OF
  +static struct dw_mci_of_quirks {
  + char *quirk;
  + int id;
  +} of_quirks[] = {
  + {
  + .quirk  = supports-highspeed,
  + .id = DW_MCI_QUIRK_HIGHSPEED,
  + }, {
  + .quirk  = broken-cd,
  + .id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
  + },
  +};
  +
  +static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
  +{
  + struct dw_mci_board *pdata;
  + struct device *dev = host-dev;
  + struct device_node *np = dev-of_node;
  + int idx;
  +
  + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  + if (!pdata) {
  + dev_err(dev, could not allocate memory for pdata\n);
  + return ERR_PTR(-ENOMEM);
  + }
  +
  + /* find out number of slots supported */
  + if (of_property_read_u32(dev-of_node, num-slots,
  + pdata-num_slots)) {
  + dev_info(dev, num-slots property not found, 
  + assuming 1 slot is available\n);
  + pdata-num_slots = 1;
  + }
  +
  + /* get quirks */
  + for (idx = 0; idx  ARRAY_SIZE(of_quirks); idx++)
  + if (of_get_property(np, of_quirks[idx].quirk, NULL))
  + pdata-quirks |= of_quirks[idx].id;
  +
  + if (of_property_read_u32(np, fifo-depth, pdata-fifo_depth))
  + dev_info(dev, fifo-depth 

Re: [PATCH v6 6/9] mmc: dw_mmc: add device tree support

2012-09-20 Thread Jaehoon Chung
 +#else /* CONFIG_OF */
 +static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
 +{
 + return ERR_PTR(-EINVAL);
 +}
 +#endif /* CONFIG_OF */
 +
  int dw_mci_probe(struct dw_mci *host)
  {
   int width, i, ret = 0;
   u32 fifo_size;
   int init_slots = 0;

 - if (!host-pdata || !host-pdata-init) {
 !host-pdata-init is removed.
 Please check it.

 I have checked again in mmc-next branch and init is still there.
 I mean that there is no condition whether host-pdata-init is present or 
 not, unlike origin code.
 In this patch this condition is removed. We don't need it anymore?
Actually i didn't know why need the pdata-init.
Why need host-pdata-init? In case of exynos, just return 1.
I didn't know how use this at other-soc.

Best Regards,
Jaehoon Chung
 

 Thanks,
 Thomas.



 Thanks,
 Seungwon Jeon

 - dev_err(host-dev,
 - Platform data must supply init function\n);
 - return -ENODEV;
 + if (!host-pdata) {
 + host-pdata = dw_mci_parse_dt(host);
 + if (IS_ERR(host-pdata)) {
 + dev_err(host-dev, platform data not available\n);
 + return -EINVAL;
 + }
   }

   if (!host-pdata-select_slot  host-pdata-num_slots  1) {
 --
 1.6.6.rc2

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[PATCH V6 0/2] video: drm: Add Device tree support to exynos DRM-FIMD

2012-09-20 Thread Leela Krishna Amudala
This patch set adds device tree support for DRM-FIMD for Samsung's Exynos5250.
It includes parsing platform data from dts file. Also, adds the driver data
for exynos4 and exynos5 devices.

This patchset is based and tested on top of v3.6-rc4 on smdk5250 board
Also depends on below patchset
http://lists.freedesktop.org/archives/dri-devel/2012-August/026076.html

Changes since V5:
- Moved the documentation file to appropriate location.
- Given more description in the commit message to the patch 
  video: drm: exynos: Add device tree support

Changes since V4:
- Changed the compatible string from samsung,exynos4-fb to
  samsung,exynos4-fimd.

Changes since V3:
- Removed the fimd version from driver data and using timing base
  address instead
- Removed the drm_ prefixes to the structures and fucntions

Changes since V2:
- Added driver data to exynos5-drm-fimd as per Marek Szyprowski 
suggestion

Changes since V1:
- Corrected typo errors and changed compatibility string

Leela Krishna Amudala (2):
  drm/exynos: add platform_device_id table and driver data for drm fimd
  video: drm: exynos: Add device tree support

 .../devicetree/bindings/drm/exynos/fimd.txt|   80 +++
 drivers/gpu/drm/exynos/exynos_drm_fimd.c   |  138 +++-
 2 files changed, 212 insertions(+), 6 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/drm/exynos/fimd.txt

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[PATCH V6 1/2] drm/exynos: add platform_device_id table and driver data for drm fimd

2012-09-20 Thread Leela Krishna Amudala
Two device ids are created for exynos4-fb and exynos5-fb.
Also, added driver data for exynos4 and exynos5 to pick the timing base address
at runtime to write data into appropriate register address.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c |   43 +++---
 1 files changed, 39 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index d96db5e..1ad10b6 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -57,6 +57,18 @@
 
 #define get_fimd_context(dev)  platform_get_drvdata(to_platform_device(dev))
 
+struct fimd_driver_data {
+   unsigned int timing_base;
+};
+
+struct fimd_driver_data exynos4_fimd_driver_data = {
+   .timing_base = 0x0,
+};
+
+struct fimd_driver_data exynos5_fimd_driver_data = {
+   .timing_base = 0x2,
+};
+
 struct fimd_win_data {
unsigned intoffset_x;
unsigned intoffset_y;
@@ -91,6 +103,13 @@ struct fimd_context {
struct exynos_drm_panel_info *panel;
 };
 
+static inline struct fimd_driver_data *drm_fimd_get_driver_data(
+   struct platform_device *pdev)
+{
+   return (struct fimd_driver_data *)
+   platform_get_device_id(pdev)-driver_data;
+}
+
 static bool fimd_display_is_connected(struct device *dev)
 {
DRM_DEBUG_KMS(%s\n, __FILE__);
@@ -194,32 +213,35 @@ static void fimd_commit(struct device *dev)
struct fimd_context *ctx = get_fimd_context(dev);
struct exynos_drm_panel_info *panel = ctx-panel;
struct fb_videomode *timing = panel-timing;
+   struct fimd_driver_data *driver_data;
+   struct platform_device *pdev = to_platform_device(dev);
u32 val;
 
+   driver_data = drm_fimd_get_driver_data(pdev);
if (ctx-suspended)
return;
 
DRM_DEBUG_KMS(%s\n, __FILE__);
 
/* setup polarity values from machine code. */
-   writel(ctx-vidcon1, ctx-regs + VIDCON1);
+   writel(ctx-vidcon1, ctx-regs + driver_data-timing_base + VIDCON1);
 
/* setup vertical timing values. */
val = VIDTCON0_VBPD(timing-upper_margin - 1) |
   VIDTCON0_VFPD(timing-lower_margin - 1) |
   VIDTCON0_VSPW(timing-vsync_len - 1);
-   writel(val, ctx-regs + VIDTCON0);
+   writel(val, ctx-regs + driver_data-timing_base + VIDTCON0);
 
/* setup horizontal timing values.  */
val = VIDTCON1_HBPD(timing-left_margin - 1) |
   VIDTCON1_HFPD(timing-right_margin - 1) |
   VIDTCON1_HSPW(timing-hsync_len - 1);
-   writel(val, ctx-regs + VIDTCON1);
+   writel(val, ctx-regs + driver_data-timing_base + VIDTCON1);
 
/* setup horizontal and vertical display size. */
val = VIDTCON2_LINEVAL(timing-yres - 1) |
   VIDTCON2_HOZVAL(timing-xres - 1);
-   writel(val, ctx-regs + VIDTCON2);
+   writel(val, ctx-regs + driver_data-timing_base + VIDTCON2);
 
/* setup clock source, clock divider, enable dma. */
val = ctx-vidcon0;
@@ -977,6 +999,18 @@ static int fimd_runtime_resume(struct device *dev)
 }
 #endif
 
+static struct platform_device_id fimd_driver_ids[] = {
+   {
+   .name   = exynos4-fb,
+   .driver_data= (unsigned long)exynos4_fimd_driver_data,
+   }, {
+   .name   = exynos5-fb,
+   .driver_data= (unsigned long)exynos5_fimd_driver_data,
+   },
+   {},
+};
+MODULE_DEVICE_TABLE(platform, fimd_driver_ids);
+
 static const struct dev_pm_ops fimd_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
@@ -985,6 +1019,7 @@ static const struct dev_pm_ops fimd_pm_ops = {
 struct platform_driver fimd_driver = {
.probe  = fimd_probe,
.remove = __devexit_p(fimd_remove),
+   .id_table   = fimd_driver_ids,
.driver = {
.name   = exynos4-fb,
.owner  = THIS_MODULE,
-- 
1.7.0.4

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Re: [PATCH V6 2/2] video: drm: exynos: Add device tree support

2012-09-20 Thread Stephen Warren
On 09/21/2012 05:22 AM, Leela Krishna Amudala wrote:
 This patch adds device tree based discovery support for exynos DRM-FIMD
 driver which includes driver modification to handle platform data in
 both the cases with DT and non-DT, Also adds the documentation for bindings.

 diff --git a/Documentation/devicetree/bindings/drm/exynos/fimd.txt 
 b/Documentation/devicetree/bindings/drm/exynos/fimd.txt
...
 + - samsung,fimd-display: This property should specify the phandle of the
 +   display device node which holds the video interface timing with the
 +   below mentioned properties.
 +
 +   - lcd-htiming: Specifies the horizontal timing for the overlay. The
 + horizontal timing includes four parameters in the following order.
 +
 + - horizontal back porch (in number of lcd clocks)
 + - horizontal front porch (in number of lcd clocks)
 + - hsync pulse width (in number of lcd clocks)
 + - Display panels X resolution.
 +
 +   - lcd-vtiming: Specifies the vertical timing for the overlay. The
 + vertical timing includes four parameters in the following order.
 +
 + - vertical back porch (in number of lcd lines)
 + - vertical front porch (in number of lcd lines)
 + - vsync pulse width (in number of lcd clocks)
 + - Display panels Y resolution.

Should this not use the new videomode timings that are under discussion at:

http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html
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[PATCH v2 3/3] mmc: sdhci-s3c: Add clk_(enable/disable) in runtime suspend/resume

2012-09-20 Thread Chander Kashyap
From: Chander Kashyap chander.kash...@gmail.com

Perform clock disable/enable in runtime suspend/resume.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
---
Changelog:
v2:
- Wrapped clk_disable in probe and clk_enable in remove with
  #ifdef CONFIG_PM_RUNTIME conditional check.

 drivers/mmc/host/sdhci-s3c.c |   29 +++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index e019672..3726c18 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -637,7 +637,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device 
*pdev)
goto err_no_busclks;
}
 
+#ifndef CONFIG_PM_RUNTIME
clk_enable(sc-clk_bus[sc-cur_clk]);
+#endif
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
host-ioaddr = devm_request_and_ioremap(pdev-dev, res);
@@ -744,10 +746,15 @@ static int __devinit sdhci_s3c_probe(struct 
platform_device *pdev)
gpio_is_valid(pdata-ext_cd_gpio))
sdhci_s3c_setup_card_detect_gpio(sc);
 
+#ifdef CONFIG_PM_RUNTIME
+   clk_disable(sc-clk_io);
+#endif
return 0;
 
  err_req_regs:
+#ifndef CONFIG_PM_RUNTIME
clk_disable(sc-clk_bus[sc-cur_clk]);
+#endif
for (ptr = 0; ptr  MAX_BUS_CLK; ptr++) {
if (sc-clk_bus[ptr]) {
clk_put(sc-clk_bus[ptr]);
@@ -786,12 +793,17 @@ static int __devexit sdhci_s3c_remove(struct 
platform_device *pdev)
if (gpio_is_valid(sc-ext_cd_gpio))
gpio_free(sc-ext_cd_gpio);
 
+#ifdef CONFIG_PM_RUNTIME
+   clk_enable(sc-clk_io);
+#endif
sdhci_remove_host(host, 1);
 
pm_runtime_dont_use_autosuspend(pdev-dev);
pm_runtime_disable(pdev-dev);
 
+#ifndef CONFIG_PM_RUNTIME
clk_disable(sc-clk_bus[sc-cur_clk]);
+#endif
for (ptr = 0; ptr  MAX_BUS_CLK; ptr++) {
if (sc-clk_bus[ptr]) {
clk_put(sc-clk_bus[ptr]);
@@ -831,15 +843,28 @@ static int sdhci_s3c_resume(struct device *dev)
 static int sdhci_s3c_runtime_suspend(struct device *dev)
 {
struct sdhci_host *host = dev_get_drvdata(dev);
+   struct sdhci_s3c *ourhost = to_s3c(host);
+   struct clk *busclk = ourhost-clk_io;
+   int ret;
+
+   ret = sdhci_runtime_suspend_host(host);
 
-   return sdhci_runtime_suspend_host(host);
+   clk_disable(ourhost-clk_bus[ourhost-cur_clk]);
+   clk_disable(busclk);
+   return ret;
 }
 
 static int sdhci_s3c_runtime_resume(struct device *dev)
 {
struct sdhci_host *host = dev_get_drvdata(dev);
+   struct sdhci_s3c *ourhost = to_s3c(host);
+   struct clk *busclk = ourhost-clk_io;
+   int ret;
 
-   return sdhci_runtime_resume_host(host);
+   clk_enable(busclk);
+   clk_enable(ourhost-clk_bus[ourhost-cur_clk]);
+   ret = sdhci_runtime_resume_host(host);
+   return ret;
 }
 #endif
 
-- 
1.7.9.5

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