Hi,
On Fri, Nov 09, 2012 at 06:50:44PM +0530, Praveen Paneri wrote:
> Hi,
>
> On Fri, Nov 9, 2012 at 6:06 PM, Kyungmin Park wrote:
> > On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi wrote:
> >> Hi,
> >>
> >> On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
> >>> Changes from v6:
>
Hi,
On Fri, Nov 9, 2012 at 6:06 PM, Kyungmin Park wrote:
> On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi wrote:
>> Hi,
>>
>> On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
>>> Changes from v6:
>>> Modified register definitions according to the existing ones.
>>> Changed default P
On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi wrote:
> Hi,
>
> On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
>> Changes from v6:
>> Modified register definitions according to the existing ones.
>> Changed default PHY clk selection for SoCs.
>> Improved binding text and rebased to
Hi Kukjin,
On Fri, Nov 9, 2012 at 5:24 PM, Felipe Balbi wrote:
> Hi,
>
> On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
>> Changes from v6:
>> Modified register definitions according to the existing ones.
>> Changed default PHY clk selection for SoCs.
>> Improved binding text and
Hi,
On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote:
> Changes from v6:
> Modified register definitions according to the existing ones.
> Changed default PHY clk selection for SoCs.
> Improved binding text and rebased to the latest usb-next.
>
> Changes from v5:
> Moved clk_get() t
Vasanth Ananthan wrote:
>
> This patch adds Device Nodes for SATA and SATA PHY device.
>
[...]
> @@ -188,6 +188,9 @@
> #define EXYNOS4_PA_SATA 0x1256
> #define EXYNOS4_PA_SATAPHY 0x125D
> #define EXYNOS4_PA_SATAPHY_CTRL 0x126B
> +#defin
Vasanth Ananthan wrote:
>
> This patch adds neccessary clock entries for SATA, SATA PHY and
> I2C_SATAPHY
>
> Signed-off-by: Vasanth Ananthan
> ---
> arch/arm/mach-exynos/clock-exynos5.c | 21 ++---
> 1 files changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm
Bartlomiej Zolnierkiewicz wrote:
>
> Ah, okay. Here is full simplified patch.
>
> From: Bartlomiej Zolnierkiewicz
> Subject: [PATCH v2] ARM: EXYNOS: PL330 MDMA1 fix for revision 0 of
> Exynos4210 SOC
>
> Commit 8214513 ("ARM: EXYNOS: fix address for EXYNOS4 MDMA1")
> changed EXYNOS specific se
On 11/09/2012 11:05 AM, Sylwester Nawrocki wrote:
Hi,
On 11/09/2012 10:31 AM, Andrey Gusakov wrote:
On Fri, Nov 9, 2012 at 12:32 PM, Sylwester Nawrocki
wrote:
The "camera" clock defined in arch/arm/mach-s3c64xx/clock.c has null
clock source mux control register as it can have only one parent
Linus Walleij wrote:
>
> On Wed, Nov 7, 2012 at 5:41 AM, Kukjin Kim wrote:
>
> > A commit 1b6056d6 ("pinctrl: samsung: Include bank-specific eint offset
> in
> > bank struct") which is in your pinctrl tree (samsung branch) changed
> > macro(EXYNOS_PIN_BANK_EINTG) to add offset. Eventually, this
Tomasz Figa wrote:
>
> This patch adds missing USB OTG regulators needed for s3c-hsotg driver
> to work on Origen board.
>
> Confirmed with schematics of and tested on Origen board.
>
> Signed-off-by: Tomasz Figa
> ---
> arch/arm/mach-exynos/mach-origen.c | 2 ++
> 1 file changed, 2 insertions
Andrey Gusakov wrote:
>
> Hi.
>
> On Fri, Nov 9, 2012 at 12:32 PM, Sylwester Nawrocki
> wrote:
> > The "camera" clock defined in arch/arm/mach-s3c64xx/clock.c has null
> > clock source mux control register as it can have only one parent
> > clock. In such cases there is a need to configure the p
Hi,
On 11/09/2012 10:31 AM, Andrey Gusakov wrote:
On Fri, Nov 9, 2012 at 12:32 PM, Sylwester Nawrocki
wrote:
The "camera" clock defined in arch/arm/mach-s3c64xx/clock.c has null
clock source mux control register as it can have only one parent
clock. In such cases there is a need to configure
Hi.
On Fri, Nov 9, 2012 at 12:32 PM, Sylwester Nawrocki
wrote:
> The "camera" clock defined in arch/arm/mach-s3c64xx/clock.c has null
> clock source mux control register as it can have only one parent
> clock. In such cases there is a need to configure the parent clock
> statically, otherwise s3c
The "camera" clock defined in arch/arm/mach-s3c64xx/clock.c has null
clock source mux control register as it can have only one parent
clock. In such cases there is a need to configure the parent clock
statically, otherwise s3c_set_clksrc() bails out with an error message
"no parent clock specified"
On 11/09/2012 08:42 AM, Andrey Gusakov wrote:
Hi.
I think .reg_src can be removed? This clock have only one source.
Yes, good point. I'll repost with reg_src removed.
Can you test that patch then ?
Thanks,
Sylwester
On Thu, Nov 8, 2012 at 2:00 AM, Sylwester Nawrocki
wrote:
The "camera" c
Hi,
On 11/08/2012 07:47 PM, Andrey Gusakov wrote:
Ok, thanks. I will add the missing CONFIG_PM_RUNTIME dependency in Kconfig.
The driver has to have PM_RUNTIME enabled since on s3c64xx SoCs there are
power domains and the camera power domain needs to be enabled for the CAMIF
operation. The pm_ru
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