Re: [RFC PATCH 4/4] video: display: Add Samsung s6e8ax0 display panel driver
Hi Figa,
On Wed, Jan 30, 2013 at 9:09 PM, Tomasz Figa t.f...@samsung.com wrote:
This patch adds Common Display Framework driver for Samsung s6e8ax0
MIPI DSI display panel.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/video/display/Kconfig |3 +
drivers/video/display/Makefile|1 +
drivers/video/display/panel-s6e8ax0.c | 1027
+
include/video/panel-s6e8ax0.h | 41 ++
4 files changed, 1072 insertions(+)
create mode 100644 drivers/video/display/panel-s6e8ax0.c
create mode 100644 include/video/panel-s6e8ax0.h
diff --git a/drivers/video/display/Kconfig b/drivers/video/display/Kconfig
index b14527a..f19ec04 100644
--- a/drivers/video/display/Kconfig
+++ b/drivers/video/display/Kconfig
@@ -5,6 +5,9 @@ menuconfig DISPLAY_CORE
if DISPLAY_CORE
+config DISPLAY_PANEL_S6E8AX0
+ tristate S6E8AX0 DSI video mode panel
+ select OF_VIDEOMODE
config DISPLAY_SOURCE_EXYNOS_DSI
tristate Samsung SoC MIPI DSI Master
diff --git a/drivers/video/display/Makefile b/drivers/video/display/Makefile
index 40a283a..0f7fdc2 100644
--- a/drivers/video/display/Makefile
+++ b/drivers/video/display/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_DISPLAY_CORE) += display-core.o
+obj-$(CONFIG_DISPLAY_PANEL_S6E8AX0) += panel-s6e8ax0.o
obj-$(CONFIG_DISPLAY_SOURCE_EXYNOS_DSI) += source-exynos_dsi.o
diff --git a/drivers/video/display/panel-s6e8ax0.c
b/drivers/video/display/panel-s6e8ax0.c
new file mode 100644
index 000..4c09fe2
--- /dev/null
+++ b/drivers/video/display/panel-s6e8ax0.c
@@ -0,0 +1,1027 @@
+/* linux/drivers/video/exynos/s6e8ax0.c
+ *
+ * MIPI-DSI based s6e8ax0 AMOLED lcd 4.65 inch panel driver.
+ *
+ * Inki Dae, inki@samsung.com
+ * Donghwa Lee, dh09@samsung.com
+ * Tomasz Figa, t.f...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/module.h
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/mutex.h
+#include linux/wait.h
+#include linux/ctype.h
+#include linux/io.h
+#include linux/delay.h
+#include linux/irq.h
+#include linux/interrupt.h
+
+#include linux/fb.h
+#include linux/gpio.h
+#include linux/lcd.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/of_videomode.h
+#include linux/platform_device.h
+#include linux/pm_runtime.h
+#include linux/backlight.h
+#include linux/regulator/consumer.h
+
+#include video/display.h
+#include video/mipi_display.h
+#include video/panel-s6e8ax0.h
+
+#define LDI_MTP_LENGTH 24
+#define DSIM_PM_STABLE_TIME10
+#define MIN_BRIGHTNESS 0
+#define MAX_BRIGHTNESS 24
+#define GAMMA_TABLE_COUNT 26
+
+struct s6e8ax0 {
+ struct display_entity entity;
+ struct device *dev;
+
+ struct s6e8ax0_platform_data *pdata;
+ struct backlight_device *bd;
+ struct lcd_device *ld;
+ struct regulator_bulk_data supplies[2];
+
+ bool enabled;
+ unsigned int id;
+ unsigned int gamma;
+ unsigned int acl_enable;
+ unsigned int cur_acl;
+ int power;
+
+ unsigned int reset_gpio;
+};
+
+#define to_panel(p)container_of(p, struct s6e8ax0, entity)
+
+static const unsigned char s6e8ax0_22_gamma_30[] = {
+ 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad, 0xaf,
+ 0xbA, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1, 0xdc, 0xc0,
+ 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
+};
+
+static const unsigned char s6e8ax0_22_gamma_50[] = {
+ 0xfa, 0x01, 0x60, 0x10, 0x60, 0xe8, 0x1f, 0xf7, 0xad, 0xc0,
+ 0xb5, 0xc4, 0xdc, 0xc4, 0x9e, 0xc6, 0x9c, 0xbb, 0xd8, 0xbb,
+ 0x00, 0x70, 0x00, 0x68, 0x00, 0x86,
+};
+
+static const unsigned char s6e8ax0_22_gamma_60[] = {
+ 0xfa, 0x01, 0x60, 0x10, 0x60, 0xde, 0x1f, 0xef, 0xad, 0xc4,
+ 0xb3, 0xc3, 0xdd, 0xc4, 0x9e, 0xc6, 0x9c, 0xbc, 0xd6, 0xba,
+ 0x00, 0x75, 0x00, 0x6e, 0x00, 0x8d,
+};
+
+static const unsigned char s6e8ax0_22_gamma_70[] = {
+ 0xfa, 0x01, 0x60, 0x10, 0x60, 0xd8, 0x1f, 0xe7, 0xaf, 0xc8,
+ 0xb4, 0xc4, 0xdd, 0xc3, 0x9d, 0xc6, 0x9c, 0xbb, 0xd6, 0xb9,
+ 0x00, 0x7a, 0x00, 0x72, 0x00, 0x93,
+};
+
+static const unsigned char s6e8ax0_22_gamma_80[] = {
+ 0xfa, 0x01, 0x60, 0x10, 0x60, 0xc9, 0x1f, 0xde, 0xae, 0xc9,
+ 0xb1, 0xc3, 0xdd, 0xc2, 0x9d, 0xc5, 0x9b, 0xbc, 0xd6, 0xbb,
+ 0x00, 0x7f, 0x00, 0x77, 0x00, 0x99,
+};
+
+static const unsigned char s6e8ax0_22_gamma_90[] = {
+ 0xfa, 0x01, 0x60, 0x10, 0x60, 0xc7, 0x1f, 0xd9, 0xb0, 0xcc,
+ 0xb2, 0xc3, 0xdc, 0xc1, 0x9c, 0xc6, 0x9c, 0xbc, 0xd4, 0xb9,
+ 0x00, 0x83, 0x00, 0x7b, 0x00, 0x9e,
+};
+
+static const unsigned char s6e8ax0_22_gamma_100[] =
Re: [PATCH 1/5] ARM: dts: exynos5250-arndale: Add node entry for gpio-buttons
+CC: David Jander da...@protonic.nl
+CC: Dmitry Torokhov d...@mail.ru
On 02/07/2013 01:13 PM, Girish KS wrote:
+
+gpio_keys {
+compatible = gpio-keys;
+#address-cells = 1;
+#size-cells = 0;
Just want to understand why these properties are here?
As these properties are for child dt node. But have not seen
anyone is using here.
That is how gpio_keys node entries are defined in other .dts files.
I have gone through example for address-cells and size-cells in following
link:
http://devicetree.org/mediawiki/index.php?title=Device_Tree_Usagestable=1#CPU_addressing
which indicates that these fields are for child reg.
I think, here in child node there is no reg. so there is no use
of address-cells and size-cells propeties.
Please check Documentation/devicetree/bindings/gpio/gpio_keys.txt
And whether these properties are required or not, I will let device tree
experts to comment on that.
As such, currently all node entries for gpio_keys use these properties.
you can just verify by a simple test.
delete the 2 lines. address-cells and size cells.
this will have no affect.
now with these 2 lines deleted lines add a dummy reg property with
address and cell. dtb compiler will warn.
So I think what manish reffered is right.
There is also a reference of smdk4210 for kepads.
Right. Compilation is ok even after removing the address-cell and
size-cell properties.
But since this is used across all the instances, I would like to know
the view of the authors on this.
David, Dimitry,
Can you please let us know your opinion on this? If these properties are
not required, then we can remove them from the documentation and from
node entries in several other dts files.
--
Tushar Behera
___
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--
Tushar Behera
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Re: [RFC PATCH 4/4] video: display: Add Samsung s6e8ax0 display panel driver
On Thursday 07 of February 2013 15:04:30 Vikas Sajjan wrote:
Hi Figa,
On Wed, Jan 30, 2013 at 9:09 PM, Tomasz Figa t.f...@samsung.com wrote:
This patch adds Common Display Framework driver for Samsung s6e8ax0
MIPI DSI display panel.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/video/display/Kconfig |3 +
drivers/video/display/Makefile|1 +
drivers/video/display/panel-s6e8ax0.c | 1027
+ include/video/panel-s6e8ax0.h
| 41 ++
4 files changed, 1072 insertions(+)
create mode 100644 drivers/video/display/panel-s6e8ax0.c
create mode 100644 include/video/panel-s6e8ax0.h
[snip]
+ lcd-ld = lcd_device_register(s6e8ax0, pdev-dev, lcd,
+ s6e8ax0_lcd_ops);
+ if (IS_ERR(lcd-ld)) {
+ dev_err(pdev-dev, failed to register lcd ops.\n);
+ ret = PTR_ERR(lcd-ld);
+ goto err_lcd_register;
+ }
+
+ lcd-bd = backlight_device_register(s6e8ax0-bl, pdev-dev,
lcd, + s6e8ax0_backlight_ops, NULL);
+ if (IS_ERR(lcd-bd)) {
+ dev_err(pdev-dev, failed to register backlight
ops.\n); + ret = PTR_ERR(lcd-bd);
+ goto err_backlight_register;
+ }
+
I think we should try to remove the dependency with LCD framework and
Backlight framework, and incorporate those functionality as par of
CDF.
you can refer to my similar patch Make s6e8ax0 panel driver compliant
with CDF (
http://comments.gmane.org/gmane.linux.drivers.video-input-infrastructur
e/59187 ) which i had posted couple of weeks back, where I made an
attempt to remove lcd_ops dependency.
Yes, I have written in the cover letter that those interfaces is just a
hack to be able to control the display from userspace in current state of
CDF.
I agree that CDF will have to be extended with backlight/brightness
control. However currently CDF does not expose any interface to userspace.
Laurent, what's your opinion on this?
P.S. Tomasz is my first name.
Best regards,
--
Tomasz Figa
Samsung Poland RD Center
SW Solution Development, Linux Platform
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Re: [PATCH 1/5] ARM: dts: exynos5250-arndale: Add node entry for gpio-buttons
Hi,
I'm wondering why Exynos5250 has not been migrated to use pinctrl yet.
Support for it in pinctrl-samsung driver has been already merged, but I
don't see any pinctrl nodes in exynos5250.dtsi.
This is important because the legacy gpio-samsung support is going to be
dropped, as it already happened in case of Exynos 4.
CC'ing Thomas Abraham as he might know something.
Best regards,
--
Tomasz Figa
Samsung Poland RD Center
SW Solution Development, Linux Platform
On Thursday 07 of February 2013 10:45:25 Tushar Behera wrote:
Added GPIO buttons DT node to Arndale board file.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
This series is based on for-next branch of Kukjin Kim's tree
and added on top of the below patch:
https://patchwork.kernel.org/patch/2042451/
---
arch/arm/boot/dts/exynos5250-arndale.dts | 48
++ 1 files changed, 48 insertions(+), 0
deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts index 63572f9..9ce40df
100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -119,4 +119,52 @@
spi_2: spi@12d4 {
status = disabled;
};
+
+ gpio_keys {
+ compatible = gpio-keys;
+ #address-cells = 1;
+ #size-cells = 0;
+
+ menu {
+ label = SW-TACT2;
+ gpios = gpx1 4 0 0x1 2;
+ linux,code = 139;
+ gpio-key,wakeup;
+ };
+
+ home {
+ label = SW-TACT3;
+ gpios = gpx1 5 0 0x1 2;
+ linux,code = 102;
+ gpio-key,wakeup;
+ };
+
+ up {
+ label = SW-TACT4;
+ gpios = gpx1 6 0 0x1 2;
+ linux,code = 103;
+ gpio-key,wakeup;
+ };
+
+ down {
+ label = SW-TACT5;
+ gpios = gpx1 7 0 0x1 2;
+ linux,code = 108;
+ gpio-key,wakeup;
+ };
+
+ back {
+ label = SW-TACT6;
+ gpios = gpx2 0 0 0x1 2;
+ linux,code = 158;
+ gpio-key,wakeup;
+ };
+
+ wakeup {
+ label = SW-TACT7;
+ gpios = gpx2 1 0 0x1 2;
+ linux,code = 143;
+ gpio-key,wakeup;
+ };
+ };
};
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Re: [PATCH 2/3] cpufreq: exynos: Adding cpufreq driver for exynos5440
On Thu, Feb 7, 2013 at 1:09 AM, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
This patch adds dvfs support for exynos5440 SOC. The nature of exynos5440
clock controller is different from previous exynos controllers so not using
the common exynos cpufreq framework. Also, the device tree parsing is added
to get different parameters like frequency, voltage etc.
Some information about platform cpu configuration would be helpful.. cpus, type,
clock lines for cpus - shared/separate?
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
.../bindings/cpufreq/cpufreq-exynos5440.txt| 24 ++
drivers/cpufreq/Kconfig.arm|8 +
drivers/cpufreq/Makefile |1 +
drivers/cpufreq/exynos5440-cpufreq.c | 448
4 files changed, 481 insertions(+)
create mode 100644
Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
new file mode 100644
index 000..96cb0ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
@@ -0,0 +1,24 @@
+
+Exynos5440 cpufreq driver
+---
+
+Exynos5440 SoC cpufreq driver for CPU frequency scaling.
+
+Required properties:
+- interrupts: Interrupt to know the completion of cpu frequency change.
+- cpufreq_tbl: Table of frequencies and voltage CPU could be transitioned
into,
This has to be operating-points as in cpufreq-cpu0 driver.
+ in the decreasing order. Frequency should be in KHZ units and voltage
+ should be in microvolts.
+
+All the required listed above must be defined under node cpufreq.
+
+Example:
+
+ cpufreq@16 {
+ compatible = samsung,exynos5440-cpufreq;
+ reg = 0x16 0x1000;
+ interrupts = 0 57 0;
+ cpufreq_tbl = 120 1025000
+ 100 975000
+ 80 925000 ;
+ };
diff --git a/drivers/cpufreq/exynos5440-cpufreq.c
b/drivers/cpufreq/exynos5440-cpufreq.c
new file mode 100644
index 000..41d39e2
--- /dev/null
+++ b/drivers/cpufreq/exynos5440-cpufreq.c
@@ -0,0 +1,448 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Amit Daniel Kachhap amit.dan...@samsung.com
+ *
+ * EXYNOS5440 - CPU frequency scaling support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/clk.h
+#include linux/cpufreq.h
+#include linux/err.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/slab.h
+
+/*Register definations*/
+#define XMU_DVFS_CTRL 0x0060
+#define XMU_PMU_P0_7 0x0064
+#define XMU_C0_3_PSTATE0x0090
+#define XMU_P_LIMIT0x00A0
+#define XMU_P_STATUS 0x00A4
+#define XMU_PMUEVTEN 0x00D0
+#define XMU_PMUIRQEN 0x00D4
+#define XMU_PMUIRQ 0x00D8
+
+/*PMU mask and shift definations*/
+#define P_VALUE_MASK 0x7
+
+#define XMU_DVFS_CTRL_EN_SHIFT 0
+
+#define P0_7_CPUCLKDEV_SHIFT 21
+#define P0_7_CPUCLKDEV_MASK0x7
+#define P0_7_ATBCLKDEV_SHIFT 18
+#define P0_7_ATBCLKDEV_MASK0x7
+#define P0_7_CSCLKDEV_SHIFT15
+#define P0_7_CSCLKDEV_MASK 0x7
+#define P0_7_CPUEMA_SHIFT 28
+#define P0_7_CPUEMA_MASK 0xf
+#define P0_7_L2EMA_SHIFT 24
+#define P0_7_L2EMA_MASK0xf
+#define P0_7_VDD_SHIFT 8
+#define P0_7_VDD_MASK 0x7f
+#define P0_7_FREQ_SHIFT0
+#define P0_7_FREQ_MASK 0xff
+
+#define C0_3_PSTATE_VALID_SHIFT8
+#define C0_3_PSTATE_CURR_SHIFT 4
+#define C0_3_PSTATE_NEW_SHIFT 0
+
+#define PSTATE_CHANGED_EVTEN_SHIFT 0
+
+#define PSTATE_CHANGED_IRQEN_SHIFT 0
+
+#define PSTATE_CHANGED_SHIFT 0
+
+/*some constant values for clock divider calculation*/
+#define CPU_DIV_FREQ_MAX 500
+#define CPU_DBG_FREQ_MAX 375
+#define CPU_ATB_FREQ_MAX 500
+
+#define PMIC_LOW_VOLT 0x30
+#define PMIC_HIGH_VOLT 0x28
+
+#define CPUEMA_HIGH0x2
+#define CPUEMA_MID 0x4
+#define CPUEMA_LOW 0x7
+
+#define L2EMA_HIGH 0x1
+#define L2EMA_MID 0x3
+#define L2EMA_LOW 0x4
+
+#define DIV_TAB_MAX2
+/*frequency unit is 20MHZ*/
+#define FREQ_UNIT 20
+#define MAX_VOLTAGE155 /*In micro volt*/
+#define VOLTAGE_STEP 12500 /*In micro volt*/
+
+#define DRIVER_NAMEexynos5440_dvfs
Re: [PATCH 2/3] cpufreq: exynos: Adding cpufreq driver for exynos5440
On Thu, Feb 7, 2013 at 10:39 AM, Inderpal Singh
inderpal.si...@linaro.org wrote:
+#define DRIVER_NAMEexynos5440_dvfs
+static struct cpufreq_driver exynos_driver = {
+ .name = DRIVER_NAME,
+};
+
Since this driver is only for exynos5440, having the same names as
common exynos-cpufreq is misleading.
Where is it same?
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Re: [PATCH 1/3] cpufreq: exynos: Remove error return even if no soc found
On Thu, Feb 7, 2013 at 1:09 AM, Amit Daniel Kachhap amit.dan...@samsung.com wrote: This change is needed for adding different type of cpufreq driver and support single binary image. That's not sufficient, we need more description of the problem you faced. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/5] ARM: dts: exynos5250-arndale: Add node entry for gpio-buttons
On Thursday 07 of February 2013 15:10:27 Tushar Behera wrote:
+CC: David Jander da...@protonic.nl
+CC: Dmitry Torokhov d...@mail.ru
On 02/07/2013 01:13 PM, Girish KS wrote:
+
+gpio_keys {
+compatible = gpio-keys;
+#address-cells = 1;
+#size-cells = 0;
Just want to understand why these properties are here?
As these properties are for child dt node. But have not seen
anyone is using here.
That is how gpio_keys node entries are defined in other .dts files.
I have gone through example for address-cells and size-cells in
following link:
http://devicetree.org/mediawiki/index.php?title=Device_Tree_Usages
table=1#CPU_addressing
which indicates that these fields are for child reg.
I think, here in child node there is no reg. so there is no use
of address-cells and size-cells propeties.
Please check Documentation/devicetree/bindings/gpio/gpio_keys.txt
And whether these properties are required or not, I will let device
tree experts to comment on that.
As such, currently all node entries for gpio_keys use these
properties.
you can just verify by a simple test.
delete the 2 lines. address-cells and size cells.
this will have no affect.
now with these 2 lines deleted lines add a dummy reg property with
address and cell. dtb compiler will warn.
So I think what manish reffered is right.
There is also a reference of smdk4210 for kepads.
Right. Compilation is ok even after removing the address-cell and
size-cell properties.
But since this is used across all the instances, I would like to know
the view of the authors on this.
David, Dimitry,
Can you please let us know your opinion on this? If these properties are
not required, then we can remove them from the documentation and from
node entries in several other dts files.
The #address-cells and #size-cells are used only together with reg
properties of sub nodes. They define how many cells in reg specifier are
used for registers address and length.
So, if you have #address-cells = 1 and #size-cells = 0, then your reg
specifier will be simply addr. You can get more complex specifiers using
more address cells and size cells, like:
#address-cells = 3;
#size-cells = 1;
subdev@1,2,3 {
reg = 1 2 3 0x1000;
/* ... */
};
If you don't intend to use reg property for child device addressing then
you don't define #address-cells and #size-cells properties.
I think that the documentation of gpio_keys binding should be corrected
and possibly also moved to bindings/input instead of bindings/gpio, as
this directory is intended to be used for GPIO controllers, not GPIO
consumers.
Best regards,
--
Tomasz Figa
Samsung Poland RD Center
SW Solution Development, Linux Platform
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Re: [PATCH 2/3] cpufreq: exynos: Adding cpufreq driver for exynos5440
On 7 February 2013 16:49, Viresh Kumar viresh.ku...@linaro.org wrote:
On Thu, Feb 7, 2013 at 10:39 AM, Inderpal Singh
inderpal.si...@linaro.org wrote:
+#define DRIVER_NAMEexynos5440_dvfs
+static struct cpufreq_driver exynos_driver = {
+ .name = DRIVER_NAME,
+};
+
Since this driver is only for exynos5440, having the same names as
common exynos-cpufreq is misleading.
Where is it same?
I meant hooks names (verify/get/target and init)
Thanks,
Inder
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[PATCH 1/1] ARM: dts: exynos4412-origen: Add MSHC node
Added MSHC node to Origen-4412 board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos4412-origen.dts | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index 1df7ebd..14709da 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -48,6 +48,26 @@
status = okay;
};
+ mshc@1255 {
+ pinctrl-0 = sd4_clk sd4_cmd sd4_bus4 sd4_bus8;
+ pinctrl-names = default;
+ status = okay;
+
+ num-slots = 1;
+ supports-highspeed;
+ broken-cd;
+ fifo-depth = 0x80;
+ card-detect-delay = 200;
+ samsung,dw-mshc-ciu-div = 3;
+ samsung,dw-mshc-sdr-timing = 2 3;
+ samsung,dw-mshc-ddr-timing = 1 2;
+
+ slot@0 {
+ reg = 0;
+ bus-width = 8;
+ };
+ };
+
codec@1340 {
samsung,mfc-r = 0x4300 0x80;
samsung,mfc-l = 0x5100 0x80;
--
1.7.4.1
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Re: [PATCH 3/3] dts: Add cpufreq controller node for Exynos5440 SoC
On Wed, Feb 6, 2013 at 8:49 PM, Inderpal Singh
inderpal.si...@linaro.org wrote:
On 7 February 2013 01:09, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
Add cpufreq controller device node for Exynos5440 SoC for passing
parameters like controller base address, interrupt and cpufreq
table.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
arch/arm/boot/dts/exynos5440.dtsi |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 024269d..b20b517 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -63,6 +63,15 @@
};
+ cpufreq@16 {
+ compatible = samsung,exynos5440-cpufreq;
+ reg = 0x16 0x1000;
+ interrupts = 0 57 0;
+ cpufreq_tbl = 120 1025000
+ 100 975000
+ 80 925000 ;
+ };
+
I think cpufreq_tbl should be part of the cpu node as it's the
property of the cpu.
Please refer cpufreq-cpu0 and spear-cpufreq.
http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/15364.
In this thread same discussion followed. I am not sure what is the
correct way but looks like Kukjin concluded this with a timer node
separate from the CPU code.
Thanks,
Amit Daniel
serial@B {
compatible = samsung,exynos4210-uart;
reg = 0xB 0x1000;
--
1.7.10.4
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Re: [PATCH 2/3] cpufreq: exynos: Adding cpufreq driver for exynos5440
Hi Viresh,
Thanks for the detailed review. Will try to handle them in the next version,
On Thu, Feb 7, 2013 at 3:17 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
On Thu, Feb 7, 2013 at 1:09 AM, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
This patch adds dvfs support for exynos5440 SOC. The nature of exynos5440
clock controller is different from previous exynos controllers so not using
the common exynos cpufreq framework. Also, the device tree parsing is added
to get different parameters like frequency, voltage etc.
Some information about platform cpu configuration would be helpful.. cpus,
type,
clock lines for cpus - shared/separate?
Ok.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
.../bindings/cpufreq/cpufreq-exynos5440.txt| 24 ++
drivers/cpufreq/Kconfig.arm|8 +
drivers/cpufreq/Makefile |1 +
drivers/cpufreq/exynos5440-cpufreq.c | 448
4 files changed, 481 insertions(+)
create mode 100644
Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
create mode 100644 drivers/cpufreq/exynos5440-cpufreq.c
diff --git
a/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
new file mode 100644
index 000..96cb0ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-exynos5440.txt
@@ -0,0 +1,24 @@
+
+Exynos5440 cpufreq driver
+---
+
+Exynos5440 SoC cpufreq driver for CPU frequency scaling.
+
+Required properties:
+- interrupts: Interrupt to know the completion of cpu frequency change.
+- cpufreq_tbl: Table of frequencies and voltage CPU could be transitioned
into,
This has to be operating-points as in cpufreq-cpu0 driver.
Yes I will check if opp table is beneficial. In my case it is just one
time parsing of cpufreq table and those values(freq, volt) are not
used later so did not use opp libraries.
+ in the decreasing order. Frequency should be in KHZ units and voltage
+ should be in microvolts.
+
+All the required listed above must be defined under node cpufreq.
+
+Example:
+
+ cpufreq@16 {
+ compatible = samsung,exynos5440-cpufreq;
+ reg = 0x16 0x1000;
+ interrupts = 0 57 0;
+ cpufreq_tbl = 120 1025000
+ 100 975000
+ 80 925000 ;
+ };
diff --git a/drivers/cpufreq/exynos5440-cpufreq.c
b/drivers/cpufreq/exynos5440-cpufreq.c
new file mode 100644
index 000..41d39e2
--- /dev/null
+++ b/drivers/cpufreq/exynos5440-cpufreq.c
@@ -0,0 +1,448 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Amit Daniel Kachhap amit.dan...@samsung.com
+ *
+ * EXYNOS5440 - CPU frequency scaling support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include linux/clk.h
+#include linux/cpufreq.h
+#include linux/err.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/of_address.h
+#include linux/of_irq.h
+#include linux/slab.h
+
+/*Register definations*/
+#define XMU_DVFS_CTRL 0x0060
+#define XMU_PMU_P0_7 0x0064
+#define XMU_C0_3_PSTATE0x0090
+#define XMU_P_LIMIT0x00A0
+#define XMU_P_STATUS 0x00A4
+#define XMU_PMUEVTEN 0x00D0
+#define XMU_PMUIRQEN 0x00D4
+#define XMU_PMUIRQ 0x00D8
+
+/*PMU mask and shift definations*/
+#define P_VALUE_MASK 0x7
+
+#define XMU_DVFS_CTRL_EN_SHIFT 0
+
+#define P0_7_CPUCLKDEV_SHIFT 21
+#define P0_7_CPUCLKDEV_MASK0x7
+#define P0_7_ATBCLKDEV_SHIFT 18
+#define P0_7_ATBCLKDEV_MASK0x7
+#define P0_7_CSCLKDEV_SHIFT15
+#define P0_7_CSCLKDEV_MASK 0x7
+#define P0_7_CPUEMA_SHIFT 28
+#define P0_7_CPUEMA_MASK 0xf
+#define P0_7_L2EMA_SHIFT 24
+#define P0_7_L2EMA_MASK0xf
+#define P0_7_VDD_SHIFT 8
+#define P0_7_VDD_MASK 0x7f
+#define P0_7_FREQ_SHIFT0
+#define P0_7_FREQ_MASK 0xff
+
+#define C0_3_PSTATE_VALID_SHIFT8
+#define C0_3_PSTATE_CURR_SHIFT 4
+#define C0_3_PSTATE_NEW_SHIFT 0
+
+#define PSTATE_CHANGED_EVTEN_SHIFT 0
+
+#define PSTATE_CHANGED_IRQEN_SHIFT 0
+
+#define PSTATE_CHANGED_SHIFT 0
+
+/*some constant values for clock divider calculation*/
+#define CPU_DIV_FREQ_MAX 500
+#define CPU_DBG_FREQ_MAX 375
+#define CPU_ATB_FREQ_MAX 500
+
+#define PMIC_LOW_VOLT 0x30
+#define PMIC_HIGH_VOLT 0x28
+
+#define CPUEMA_HIGH0x2
+#define CPUEMA_MID 0x4
+#define CPUEMA_LOW 0x7
+
[PATCH 0/2] ARM: S3C24XX: make s3c24XX.h header content local
This series moves the contents of the plat/s3c24XX.h headers into common.h, as their content does not need to be global anymore, now that everything lives in mach-s3c24xx. Heiko Stuebner (2): ARM: S3C24XX: move plat-samsung/s3c24XX headers to local common.h ARM: S3C24XX: cleanup the included soc init functions in common.h arch/arm/mach-s3c24xx/clock-s3c2410.c|1 - arch/arm/mach-s3c24xx/clock-s3c2412.c|1 - arch/arm/mach-s3c24xx/clock-s3c2416.c|1 - arch/arm/mach-s3c24xx/clock-s3c2443.c|1 - arch/arm/mach-s3c24xx/common.c |7 +-- arch/arm/mach-s3c24xx/common.h | 90 +- arch/arm/mach-s3c24xx/mach-jive.c|2 +- arch/arm/mach-s3c24xx/mach-n30.c |1 - arch/arm/mach-s3c24xx/mach-nexcoder.c|2 - arch/arm/mach-s3c24xx/mach-otom.c|1 - arch/arm/mach-s3c24xx/mach-smdk2413.c|4 +- arch/arm/mach-s3c24xx/mach-smdk2416.c|3 +- arch/arm/mach-s3c24xx/mach-smdk2440.c|2 - arch/arm/mach-s3c24xx/mach-smdk2443.c|4 +- arch/arm/mach-s3c24xx/mach-vstms.c |4 +- arch/arm/mach-s3c24xx/pm-s3c2412.c |1 - arch/arm/mach-s3c24xx/s3c2410.c |1 - arch/arm/mach-s3c24xx/s3c2412.c |1 - arch/arm/mach-s3c24xx/s3c2416.c |1 - arch/arm/mach-s3c24xx/s3c2440.c |1 - arch/arm/mach-s3c24xx/s3c2442.c |1 - arch/arm/mach-s3c24xx/s3c2443.c |1 - arch/arm/mach-s3c24xx/s3c244x.c |2 - arch/arm/plat-samsung/include/plat/s3c2410.h | 31 - arch/arm/plat-samsung/include/plat/s3c2412.h | 32 - arch/arm/plat-samsung/include/plat/s3c2416.h | 37 --- arch/arm/plat-samsung/include/plat/s3c2443.h | 36 -- arch/arm/plat-samsung/include/plat/s3c244x.h | 42 28 files changed, 99 insertions(+), 212 deletions(-) delete mode 100644 arch/arm/plat-samsung/include/plat/s3c2410.h delete mode 100644 arch/arm/plat-samsung/include/plat/s3c2412.h delete mode 100644 arch/arm/plat-samsung/include/plat/s3c2416.h delete mode 100644 arch/arm/plat-samsung/include/plat/s3c2443.h delete mode 100644 arch/arm/plat-samsung/include/plat/s3c244x.h -- 1.7.2.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] ARM: S3C24XX: cleanup the included soc init functions in common.h
Only the _init, _init_clocks, _init_uarts and _map_io functions need NULL defines, as they are used in the cpu map. Further integrate the two restart functions already in common.h in their respective soc part and compact the numerous empty lines. Signed-off-by: Heiko Stuebner he...@sntech.de --- arch/arm/mach-s3c24xx/common.h | 47 --- 1 files changed, 5 insertions(+), 42 deletions(-) diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h index 4db3dd8..8a2b413 100644 --- a/arch/arm/mach-s3c24xx/common.h +++ b/arch/arm/mach-s3c24xx/common.h @@ -12,17 +12,15 @@ #ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H #define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__ -#ifdef CONFIG_CPU_S3C2410 +struct s3c2410_uartcfg; +#ifdef CONFIG_CPU_S3C2410 extern int s3c2410_init(void); extern int s3c2410a_init(void); - extern void s3c2410_map_io(void); - extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); - extern void s3c2410_init_clocks(int xtal); - +extern void s3c2410_restart(char mode, const char *cmd); #else #define s3c2410_init_clocks NULL #define s3c2410_init_uarts NULL @@ -32,61 +30,41 @@ extern void s3c2410_init_clocks(int xtal); #endif #ifdef CONFIG_CPU_S3C2412 - extern int s3c2412_init(void); - extern void s3c2412_map_io(void); - extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); - extern void s3c2412_init_clocks(int xtal); - extern int s3c2412_baseclk_add(void); - extern void s3c2412_restart(char mode, const char *cmd); #else #define s3c2412_init_clocks NULL #define s3c2412_init_uarts NULL #define s3c2412_map_io NULL #define s3c2412_init NULL -#define s3c2412_restart NULL #endif #ifdef CONFIG_CPU_S3C2416 - -struct s3c2410_uartcfg; - extern int s3c2416_init(void); - extern void s3c2416_map_io(void); - extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no); - extern void s3c2416_init_clocks(int xtal); - extern int s3c2416_baseclk_add(void); - extern void s3c2416_restart(char mode, const char *cmd); - extern void s3c2416_init_irq(void); -extern struct syscore_ops s3c2416_irq_syscore_ops; +extern struct syscore_ops s3c2416_irq_syscore_ops; #else #define s3c2416_init_clocks NULL #define s3c2416_init_uarts NULL #define s3c2416_map_io NULL #define s3c2416_init NULL -#define s3c2416_restart NULL #endif #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) - extern void s3c244x_map_io(void); - extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no); - extern void s3c244x_init_clocks(int xtal); - +extern void s3c244x_restart(char mode, const char *cmd); #else #define s3c244x_init_clocks NULL #define s3c244x_init_uarts NULL @@ -94,7 +72,6 @@ extern void s3c244x_init_clocks(int xtal); #ifdef CONFIG_CPU_S3C2440 extern int s3c2440_init(void); - extern void s3c2440_map_io(void); #else #define s3c2440_init NULL @@ -103,7 +80,6 @@ extern void s3c2440_map_io(void); #ifdef CONFIG_CPU_S3C2442 extern int s3c2442_init(void); - extern void s3c2442_map_io(void); #else #define s3c2442_init NULL @@ -111,33 +87,20 @@ extern void s3c2442_map_io(void); #endif #ifdef CONFIG_CPU_S3C2443 - -struct s3c2410_uartcfg; - extern int s3c2443_init(void); - extern void s3c2443_map_io(void); - extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no); - extern void s3c2443_init_clocks(int xtal); - extern int s3c2443_baseclk_add(void); - extern void s3c2443_restart(char mode, const char *cmd); - extern void s3c2443_init_irq(void); #else #define s3c2443_init_clocks NULL #define s3c2443_init_uarts NULL #define s3c2443_map_io NULL #define s3c2443_init NULL -#define s3c2443_restart NULL #endif -void s3c2410_restart(char mode, const char *cmd); -void s3c244x_restart(char mode, const char *cmd); - extern struct syscore_ops s3c24xx_irq_syscore_ops; #endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */ -- 1.7.2.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Help connect s3c2410-lcd device to SMDK2443
06.02.2013 02:17, Heiko Stübner пишет: Hi Alexander, Am Dienstag, 5. Februar 2013, 20:36:20 schrieb Alexander Varnin: Hello. I'm trying to setup s3c2410-lcd device on SMDK2443 with 3.6 kernel. On requesting interrupt it fails with EINVAL: ~ # dmesg | grep lcd s3c2410-lcd s3c2410-lcd: cannot get irq 32 - err -22 s3c2410-lcd: probe of s3c2410-lcd failed with error -16 If I remember correctly the s3c2443 has a new-style framebuffer. So using the s3c2410-fb/lcd driver is the wrong approach. The correct driver to use would be the s3cfb. Take a look at mach-smdk2416.c which uses this driver. The init for the s3c2443 should probably be similar. Also the irq you requested is a parent irq to different lcd-irqs in the sub- register on the s3c2443 and s3c2416. Therfore requesting it directly is disabled by the irq-subsystem. Hope that helps Heiko Thank you for help. I have used s3c-fb driver and all is ok. The interrupt is not busy by something else. Here is my table: ~ # cat /proc/interrupts CPU0 17: 0 s3c-ext0 s3c-mci 30: 409934 s3c S3C2410 Timer Tick 37: 0 s3c s3c-mci 42:416 s3c ohci_hcd:usb1 43: 0 s3c s3c2410-i2c 56: 1 s3c-ext uio_mcross 57: 72585 s3c-ext eth0 73: 63 s3c-uart1 s3c2440-uart 74:108 s3c-uart1 s3c2440-uart 97: 0 - s3c2410-wdt Err: Please, help me to find the reason. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] i2c: s3c2410: move mach/regs-iic.h into i2c-s3c2410 device driver
The register definitions are only used in the driver itself. This also removes the last dependency on plat/ includes from the i2c driver. Signed-off-by: Heiko Stuebner he...@sntech.de --- arch/arm/mach-s3c24xx/mach-rx1950.c |1 - arch/arm/plat-samsung/devs.c |1 - arch/arm/plat-samsung/include/plat/regs-iic.h | 56 - drivers/i2c/busses/i2c-s3c2410.c | 41 ++- 4 files changed, 40 insertions(+), 59 deletions(-) delete mode 100644 arch/arm/plat-samsung/include/plat/regs-iic.h diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index 799af43..64b52a9 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c @@ -56,7 +56,6 @@ #include plat/cpu.h #include plat/devs.h #include plat/pm.h -#include plat/regs-iic.h #include plat/regs-serial.h #include plat/samsung-time.h diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index e1124d9..6317a9e 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c @@ -62,7 +62,6 @@ #include linux/platform_data/usb-s3c2410_udc.h #include linux/platform_data/usb-ohci-s3c2410.h #include plat/usb-phy.h -#include plat/regs-iic.h #include plat/regs-serial.h #include plat/regs-spi.h #include linux/platform_data/spi-s3c64xx.h diff --git a/arch/arm/plat-samsung/include/plat/regs-iic.h b/arch/arm/plat-samsung/include/plat/regs-iic.h deleted file mode 100644 index 2f7c17d..000 --- a/arch/arm/plat-samsung/include/plat/regs-iic.h +++ /dev/null @@ -1,56 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/regs-iic.h - * - * Copyright (c) 2004 Simtec Electronics li...@simtec.co.uk - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 I2C Controller -*/ - -#ifndef __ASM_ARCH_REGS_IIC_H -#define __ASM_ARCH_REGS_IIC_H __FILE__ - -/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ - -#define S3C2410_IICREG(x) (x) - -#define S3C2410_IICCONS3C2410_IICREG(0x00) -#define S3C2410_IICSTAT S3C2410_IICREG(0x04) -#define S3C2410_IICADDS3C2410_IICREG(0x08) -#define S3C2410_IICDS S3C2410_IICREG(0x0C) -#define S3C2440_IICLCS3C2410_IICREG(0x10) - -#define S3C2410_IICCON_ACKEN (17) -#define S3C2410_IICCON_TXDIV_16(06) -#define S3C2410_IICCON_TXDIV_512 (16) -#define S3C2410_IICCON_IRQEN (15) -#define S3C2410_IICCON_IRQPEND (14) -#define S3C2410_IICCON_SCALE(x)((x)15) -#define S3C2410_IICCON_SCALEMASK (0xf) - -#define S3C2410_IICSTAT_MASTER_RX (26) -#define S3C2410_IICSTAT_MASTER_TX (36) -#define S3C2410_IICSTAT_SLAVE_RX (06) -#define S3C2410_IICSTAT_SLAVE_TX (16) -#define S3C2410_IICSTAT_MODEMASK (36) - -#define S3C2410_IICSTAT_START (15) -#define S3C2410_IICSTAT_BUSBUSY(15) -#define S3C2410_IICSTAT_TXRXEN (14) -#define S3C2410_IICSTAT_ARBITR (13) -#define S3C2410_IICSTAT_ASSLAVE(12) -#define S3C2410_IICSTAT_ADDR0 (11) -#define S3C2410_IICSTAT_LASTBIT(10) - -#define S3C2410_IICLC_SDA_DELAY0 (0 0) -#define S3C2410_IICLC_SDA_DELAY5 (1 0) -#define S3C2410_IICLC_SDA_DELAY10 (2 0) -#define S3C2410_IICLC_SDA_DELAY15 (3 0) -#define S3C2410_IICLC_SDA_DELAY_MASK (3 0) - -#define S3C2410_IICLC_FILTER_ON(12) - -#endif /* __ASM_ARCH_REGS_IIC_H */ diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index a290d08..5cc4f71 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -42,9 +42,48 @@ #include asm/irq.h -#include plat/regs-iic.h #include linux/platform_data/i2c-s3c2410.h +/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ + +#define S3C2410_IICREG(x) (x) + +#define S3C2410_IICCONS3C2410_IICREG(0x00) +#define S3C2410_IICSTAT S3C2410_IICREG(0x04) +#define S3C2410_IICADDS3C2410_IICREG(0x08) +#define S3C2410_IICDS S3C2410_IICREG(0x0C) +#define S3C2440_IICLCS3C2410_IICREG(0x10) + +#define S3C2410_IICCON_ACKEN (17) +#define S3C2410_IICCON_TXDIV_16(06) +#define S3C2410_IICCON_TXDIV_512 (16) +#define S3C2410_IICCON_IRQEN (15) +#define S3C2410_IICCON_IRQPEND (14) +#define S3C2410_IICCON_SCALE(x)((x)15) +#define S3C2410_IICCON_SCALEMASK (0xf) + +#define S3C2410_IICSTAT_MASTER_RX (26) +#define S3C2410_IICSTAT_MASTER_TX (36) +#define S3C2410_IICSTAT_SLAVE_RX (06) +#define S3C2410_IICSTAT_SLAVE_TX (16) +#define S3C2410_IICSTAT_MODEMASK (36) + +#define S3C2410_IICSTAT_START (15) +#define S3C2410_IICSTAT_BUSBUSY(15) +#define
[PATCH 2/2] i2c: s3c2410: fixup the styling of the newly moved register definitions
Make them conform more to established standards. Signed-off-by: Heiko Stuebner he...@sntech.de --- drivers/i2c/busses/i2c-s3c2410.c | 50 ++--- 1 files changed, 24 insertions(+), 26 deletions(-) diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 5cc4f71..5ef5c3d 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -46,35 +46,33 @@ /* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ -#define S3C2410_IICREG(x) (x) - -#define S3C2410_IICCONS3C2410_IICREG(0x00) -#define S3C2410_IICSTAT S3C2410_IICREG(0x04) -#define S3C2410_IICADDS3C2410_IICREG(0x08) -#define S3C2410_IICDS S3C2410_IICREG(0x0C) -#define S3C2440_IICLCS3C2410_IICREG(0x10) - -#define S3C2410_IICCON_ACKEN (17) -#define S3C2410_IICCON_TXDIV_16(06) -#define S3C2410_IICCON_TXDIV_512 (16) -#define S3C2410_IICCON_IRQEN (15) -#define S3C2410_IICCON_IRQPEND (14) -#define S3C2410_IICCON_SCALE(x)((x)15) +#define S3C2410_IICCON 0x00 +#define S3C2410_IICSTAT0x04 +#define S3C2410_IICADD 0x08 +#define S3C2410_IICDS 0x0C +#define S3C2440_IICLC 0x10 + +#define S3C2410_IICCON_ACKEN (1 7) +#define S3C2410_IICCON_TXDIV_16(0 6) +#define S3C2410_IICCON_TXDIV_512 (1 6) +#define S3C2410_IICCON_IRQEN (1 5) +#define S3C2410_IICCON_IRQPEND (1 4) +#define S3C2410_IICCON_SCALE(x)((x) 0xf) #define S3C2410_IICCON_SCALEMASK (0xf) -#define S3C2410_IICSTAT_MASTER_RX (26) -#define S3C2410_IICSTAT_MASTER_TX (36) -#define S3C2410_IICSTAT_SLAVE_RX (06) -#define S3C2410_IICSTAT_SLAVE_TX (16) -#define S3C2410_IICSTAT_MODEMASK (36) +#define S3C2410_IICSTAT_MASTER_RX (2 6) +#define S3C2410_IICSTAT_MASTER_TX (3 6) +#define S3C2410_IICSTAT_SLAVE_RX (0 6) +#define S3C2410_IICSTAT_SLAVE_TX (1 6) +#define S3C2410_IICSTAT_MODEMASK (3 6) -#define S3C2410_IICSTAT_START (15) -#define S3C2410_IICSTAT_BUSBUSY(15) -#define S3C2410_IICSTAT_TXRXEN (14) -#define S3C2410_IICSTAT_ARBITR (13) -#define S3C2410_IICSTAT_ASSLAVE(12) -#define S3C2410_IICSTAT_ADDR0 (11) -#define S3C2410_IICSTAT_LASTBIT(10) +#define S3C2410_IICSTAT_START (1 5) +#define S3C2410_IICSTAT_BUSBUSY(1 5) +#define S3C2410_IICSTAT_TXRXEN (1 4) +#define S3C2410_IICSTAT_ARBITR (1 3) +#define S3C2410_IICSTAT_ASSLAVE(1 2) +#define S3C2410_IICSTAT_ADDR0 (1 1) +#define S3C2410_IICSTAT_LASTBIT(1 0) #define S3C2410_IICLC_SDA_DELAY0 (0 0) #define S3C2410_IICLC_SDA_DELAY5 (1 0) @@ -82,7 +80,7 @@ #define S3C2410_IICLC_SDA_DELAY15 (3 0) #define S3C2410_IICLC_SDA_DELAY_MASK (3 0) -#define S3C2410_IICLC_FILTER_ON(12) +#define S3C2410_IICLC_FILTER_ON(1 2) /* Treat S3C2410 as baseline hardware, anything else is supported via quirks */ #define QUIRK_S3C2440 (1 0) -- 1.7.2.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 2/2] thermal: exynos: Use the framework for temperature emulation support
Hi Rui,
Please merge this patch also. The 1st series of this patchset is
already accepted by you. This is just a adaptation of the earlier one
and does code cleanup.
Thanks,
Amit Daniel
On Sun, Feb 3, 2013 at 6:14 PM, Zhang Rui rui.zh...@intel.com wrote:
On Sun, 2013-01-27 at 19:28 -0800, Amit Daniel Kachhap wrote:
This removes the driver specific sysfs support of the temperature
emulation and uses the newly added core thermal framework for thermal
emulation. A platform specific handler is added to support this.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
---
Changes in V2:
* Added config option CONFIG_THERMAL_EMULATION instead of
CONFIG_EXYNOS_THERMAL_EMUL
This patchset is based on thermal maintainer next tree.
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git next
Documentation/thermal/exynos_thermal_emulation |8 +-
drivers/thermal/Kconfig|9 --
drivers/thermal/exynos_thermal.c | 158
++--
3 files changed, 67 insertions(+), 108 deletions(-)
diff --git a/Documentation/thermal/exynos_thermal_emulation
b/Documentation/thermal/exynos_thermal_emulation
index b73bbfb..36a3e79 100644
--- a/Documentation/thermal/exynos_thermal_emulation
+++ b/Documentation/thermal/exynos_thermal_emulation
@@ -13,11 +13,11 @@ Thermal emulation mode supports software debug for TMU's
operation. User can set
manually with software code and TMU will read current temperature from user
value not from
sensor's value.
-Enabling CONFIG_EXYNOS_THERMAL_EMUL option will make this support in
available.
-When it's enabled, sysfs node will be created under
-/sys/bus/platform/devices/'exynos device name'/ with name of 'emulation'.
+Enabling CONFIG_THERMAL_EMULATION option will make this support available.
+When it's enabled, sysfs node will be created as
+/sys/devices/virtual/thermal/thermal_zone'zone id'/emul_temp.
-The sysfs node, 'emulation', will contain value 0 for the initial state.
When you input any
+The sysfs node, 'emul_node', will contain value 0 for the initial state.
When you input any
temperature you want to update to sysfs node, it automatically enable
emulation mode and
current temperature will be changed into it.
(Exynos also supports user changable delay time which would be used to
delay of
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index e4cf7fb..2a79510 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -109,15 +109,6 @@ config EXYNOS_THERMAL
If you say yes here you get support for TMU (Thermal Management
Unit) on SAMSUNG EXYNOS series of SoC.
-config EXYNOS_THERMAL_EMUL
- bool EXYNOS TMU emulation mode support
- depends on EXYNOS_THERMAL
- help
- Exynos 4412 and 4414 and 5 series has emulation mode on TMU.
- Enable this option will be make sysfs node in exynos thermal platform
- device directory to support emulation mode. With emulation mode sysfs
- node, you can manually input temperature to TMU for simulation
purpose.
-
config DB8500_THERMAL
bool DB8500 thermal management
depends on ARCH_U8500
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index 327102a..afe9c2a 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -99,13 +99,13 @@
#define IDLE_INTERVAL 1
#define MCELSIUS 1000
-#ifdef CONFIG_EXYNOS_THERMAL_EMUL
+#ifdef CONFIG_THERMAL_EMULATION
#define EXYNOS_EMUL_TIME 0x57F0
#define EXYNOS_EMUL_TIME_SHIFT 16
#define EXYNOS_EMUL_DATA_SHIFT 8
#define EXYNOS_EMUL_DATA_MASK0xFF
#define EXYNOS_EMUL_ENABLE 0x1
-#endif /* CONFIG_EXYNOS_THERMAL_EMUL */
+#endif /* CONFIG_THERMAL_EMULATION */
/* CPU Zone information */
#define PANIC_ZONE 4
@@ -143,6 +143,7 @@ structthermal_cooling_conf {
struct thermal_sensor_conf {
char name[SENSOR_NAME_LEN];
int (*read_temperature)(void *data);
+ int (*write_emul_temp)(void *data, unsigned long temp);
struct thermal_trip_point_conf trip_data;
struct thermal_cooling_conf cooling_data;
void *private_data;
@@ -366,6 +367,23 @@ static int exynos_get_temp(struct thermal_zone_device
*thermal,
return 0;
}
+/* Get temperature callback functions for thermal zone */
+static int exynos_set_emul_temp(struct thermal_zone_device *thermal,
+ unsigned long temp)
+{
+ void *data;
+ int ret = -EINVAL;
+
+ if (!th_zone-sensor_conf) {
+ pr_info(Temperature sensor not initialised\n);
+ return -EINVAL;
+ }
+ data = th_zone-sensor_conf-private_data;
+ if (th_zone-sensor_conf-write_emul_temp)
+ ret = th_zone-sensor_conf-write_emul_temp(data, temp);
+ return ret;
+}
+
/* Get
[PATCH V3 1/2] Thermal: exynos: Add support for temperature falling interrupt.
From: Jonghwa Lee jonghwa3@samsung.com
This patch introduces using temperature falling interrupt in exynos
thermal driver. Former patch, it only use polling way to check
whether if system themperature is fallen. However, exynos SOC also
provides temperature falling interrupt way to do same things by hw.
This feature is not supported in exynos4210.
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
Hi,
Submitting these patches again as they got lost somewhere and was not merged.
Changes since V2:
* Rebased against Rui Zhang next tree.
* Added Kukjin Kim acked by.
Changes since V1: Used the new thermal trend type macro
All these patches are based on thermal maintainer next branch.
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git thermal
drivers/thermal/exynos_thermal.c | 81 +++---
include/linux/platform_data/exynos_thermal.h |3 +
2 files changed, 49 insertions(+), 35 deletions(-)
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index 3a1b01e..65f69cf 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -94,6 +94,7 @@
#define SENSOR_NAME_LEN16
#define MAX_TRIP_COUNT 8
#define MAX_COOLING_DEVICE 4
+#define MAX_THRESHOLD_LEVS 4
#define ACTIVE_INTERVAL 500
#define IDLE_INTERVAL 1
@@ -133,6 +134,7 @@ struct exynos_tmu_data {
struct thermal_trip_point_conf {
int trip_val[MAX_TRIP_COUNT];
int trip_count;
+ u8 trigger_falling;
};
struct thermal_cooling_conf {
@@ -183,7 +185,8 @@ static int exynos_set_mode(struct thermal_zone_device
*thermal,
mutex_lock(th_zone-therm_dev-lock);
- if (mode == THERMAL_DEVICE_ENABLED)
+ if (mode == THERMAL_DEVICE_ENABLED
+ !th_zone-sensor_conf-trip_data.trigger_falling)
th_zone-therm_dev-polling_delay = IDLE_INTERVAL;
else
th_zone-therm_dev-polling_delay = 0;
@@ -447,7 +450,8 @@ static void exynos_report_trigger(void)
break;
}
- if (th_zone-mode == THERMAL_DEVICE_ENABLED) {
+ if (th_zone-mode == THERMAL_DEVICE_ENABLED
+ !th_zone-sensor_conf-trip_data.trigger_falling) {
if (i 0)
th_zone-therm_dev-polling_delay = ACTIVE_INTERVAL;
else
@@ -486,7 +490,8 @@ static int exynos_register_thermal(struct
thermal_sensor_conf *sensor_conf)
th_zone-therm_dev = thermal_zone_device_register(sensor_conf-name,
EXYNOS_ZONE_COUNT, 0, NULL, exynos_dev_ops, NULL, 0,
- IDLE_INTERVAL);
+ sensor_conf-trip_data.trigger_falling ?
+ 0 : IDLE_INTERVAL);
if (IS_ERR(th_zone-therm_dev)) {
pr_err(Failed to register thermal zone device\n);
@@ -593,8 +598,9 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
{
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata = data-pdata;
- unsigned int status, trim_info, rising_threshold;
- int ret = 0, threshold_code;
+ unsigned int status, trim_info;
+ unsigned int rising_threshold = 0, falling_threshold = 0;
+ int ret = 0, threshold_code, i, trigger_levs = 0;
mutex_lock(data-lock);
clk_enable(data-clk);
@@ -619,6 +625,11 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
(data-temp_error2 != 0))
data-temp_error1 = pdata-efuse_value;
+ /* Count trigger levels to be enabled */
+ for (i = 0; i MAX_THRESHOLD_LEVS; i++)
+ if (pdata-trigger_levels[i])
+ trigger_levs++;
+
if (data-soc == SOC_ARCH_EXYNOS4210) {
/* Write temperature code for threshold */
threshold_code = temp_to_code(data, pdata-threshold);
@@ -628,44 +639,38 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
}
writeb(threshold_code,
data-base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
-
- writeb(pdata-trigger_levels[0],
- data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL0);
- writeb(pdata-trigger_levels[1],
- data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL1);
- writeb(pdata-trigger_levels[2],
- data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL2);
- writeb(pdata-trigger_levels[3],
- data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL3);
+ for (i = 0; i trigger_levs; i++)
+ writeb(pdata-trigger_levels[i],
+ data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4);
writel(EXYNOS4210_TMU_INTCLEAR_VAL,
[PATCH V3 2/2] thermal: exynos: Use the new thermal trend type for quick cooling action.
This patch uses the quick thermal cooling trend type macros. This is needed
as exynos5 and other thermal sensors now supports only interrupt method for
thresold temperature check.
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
Hi,
Submitting these patches again as they got lost somewhere and was not merged.
Changes since V2:
* Rebased against Rui Zhang next tree.
* Added Kukjin Kim acked by.
All these patches are based on thermal maintainer next branch.
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git thermal
drivers/thermal/exynos_thermal.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index 65f69cf..030bba3 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -296,7 +296,7 @@ static int exynos_bind(struct thermal_zone_device *thermal,
case MONITOR_ZONE:
case WARN_ZONE:
if (thermal_zone_bind_cooling_device(thermal, i, cdev,
- level, level)) {
+ level, 0)) {
pr_err(error binding cdev inst %d\n, i);
ret = -EINVAL;
}
@@ -399,9 +399,9 @@ static int exynos_get_trend(struct thermal_zone_device
*thermal,
return ret;
if (thermal-temperature = trip_temp)
- *trend = THERMAL_TREND_RAISING;
+ *trend = THERMAL_TREND_RAISE_FULL;
else
- *trend = THERMAL_TREND_DROPPING;
+ *trend = THERMAL_TREND_DROP_FULL;
return 0;
}
--
1.7.5.4
--
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Re: [PATCH 2/3] cpufreq: exynos: Adding cpufreq driver for exynos5440
On 8 February 2013 00:38, amit kachhap amit.kach...@gmail.com wrote:
Hi Viresh,
Thanks for the detailed review. Will try to handle them in the next version,
np. I haven't seen reply to few questions, you missed them or accept them.
General tip: Leave a blank line before and after your comment, it makes it more
readable. :)
On Thu, Feb 7, 2013 at 3:17 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
On Thu, Feb 7, 2013 at 1:09 AM, Amit Daniel Kachhap
+Required properties:
+- interrupts: Interrupt to know the completion of cpu frequency change.
+- cpufreq_tbl: Table of frequencies and voltage CPU could be transitioned
into,
This has to be operating-points as in cpufreq-cpu0 driver.
Yes I will check if opp table is beneficial. In my case it is just one
time parsing of cpufreq table and those values(freq, volt) are not
used later so did not use opp libraries.
Its one time parsing for everybody, nobody do it twice :)
+ for (old_index = 0;
+ freq_table[old_index].frequency != CPUFREQ_TABLE_END;
+ old_index++)
+ if (freq_table[old_index].frequency == freqs.old)
+ break;
+
+ if (freq_table[old_index].frequency == CPUFREQ_TABLE_END) {
How can this be true?
This is error scenario
We have given cpufreq core a valid table and it has to set frequency from
this table only. How can cpu have any other freq here ? And you have done
something similar in your init() too, where you check if cpu has freq from the
table or not.
+ dvfs_info = kzalloc(sizeof(struct exynos_dvfs_data), GFP_KERNEL);
sizeof(*dvfs_info) ?? why don't make it static too, as you have other
stuff too.. ?
The better option for single image solution to allocate everything
dynamically, so that
unused drivers don't occupy any space.
?
+ if ((len == 0) || (len / 2 CPUFREQ_LEVEL_END)) {
I really didn't like this limit you have put at the number of dvfs
points. Better
would be to use:
+ dvfs_info-dvfs_init = true;
why do you need this ?
This is added to synchronize the interrupts.
How? You are setting it once in init() and not touching it afterwards. :)
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Re: [PATCH V2 2/2] thermal: exynos: Use the framework for temperature emulation support
On Mon, 2013-02-04 at 10:14 +0800, Zhang Rui wrote:
On Sun, 2013-01-27 at 19:28 -0800, Amit Daniel Kachhap wrote:
This removes the driver specific sysfs support of the temperature
emulation and uses the newly added core thermal framework for thermal
emulation. A platform specific handler is added to support this.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
---
Changes in V2:
* Added config option CONFIG_THERMAL_EMULATION instead of
CONFIG_EXYNOS_THERMAL_EMUL
This patchset is based on thermal maintainer next tree.
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git next
Documentation/thermal/exynos_thermal_emulation |8 +-
drivers/thermal/Kconfig|9 --
drivers/thermal/exynos_thermal.c | 158
++--
3 files changed, 67 insertions(+), 108 deletions(-)
diff --git a/Documentation/thermal/exynos_thermal_emulation
b/Documentation/thermal/exynos_thermal_emulation
index b73bbfb..36a3e79 100644
--- a/Documentation/thermal/exynos_thermal_emulation
+++ b/Documentation/thermal/exynos_thermal_emulation
@@ -13,11 +13,11 @@ Thermal emulation mode supports software debug for
TMU's operation. User can set
manually with software code and TMU will read current temperature from
user value not from
sensor's value.
-Enabling CONFIG_EXYNOS_THERMAL_EMUL option will make this support in
available.
-When it's enabled, sysfs node will be created under
-/sys/bus/platform/devices/'exynos device name'/ with name of 'emulation'.
+Enabling CONFIG_THERMAL_EMULATION option will make this support available.
+When it's enabled, sysfs node will be created as
+/sys/devices/virtual/thermal/thermal_zone'zone id'/emul_temp.
-The sysfs node, 'emulation', will contain value 0 for the initial state.
When you input any
+The sysfs node, 'emul_node', will contain value 0 for the initial state.
When you input any
temperature you want to update to sysfs node, it automatically enable
emulation mode and
current temperature will be changed into it.
(Exynos also supports user changable delay time which would be used to
delay of
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index e4cf7fb..2a79510 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -109,15 +109,6 @@ config EXYNOS_THERMAL
If you say yes here you get support for TMU (Thermal Management
Unit) on SAMSUNG EXYNOS series of SoC.
-config EXYNOS_THERMAL_EMUL
- bool EXYNOS TMU emulation mode support
- depends on EXYNOS_THERMAL
- help
- Exynos 4412 and 4414 and 5 series has emulation mode on TMU.
- Enable this option will be make sysfs node in exynos thermal platform
- device directory to support emulation mode. With emulation mode sysfs
- node, you can manually input temperature to TMU for simulation
purpose.
-
config DB8500_THERMAL
bool DB8500 thermal management
depends on ARCH_U8500
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index 327102a..afe9c2a 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -99,13 +99,13 @@
#define IDLE_INTERVAL 1
#define MCELSIUS 1000
-#ifdef CONFIG_EXYNOS_THERMAL_EMUL
+#ifdef CONFIG_THERMAL_EMULATION
#define EXYNOS_EMUL_TIME 0x57F0
#define EXYNOS_EMUL_TIME_SHIFT 16
#define EXYNOS_EMUL_DATA_SHIFT 8
#define EXYNOS_EMUL_DATA_MASK 0xFF
#define EXYNOS_EMUL_ENABLE 0x1
-#endif /* CONFIG_EXYNOS_THERMAL_EMUL */
+#endif /* CONFIG_THERMAL_EMULATION */
/* CPU Zone information */
#define PANIC_ZONE 4
@@ -143,6 +143,7 @@ struct thermal_cooling_conf {
struct thermal_sensor_conf {
char name[SENSOR_NAME_LEN];
int (*read_temperature)(void *data);
+ int (*write_emul_temp)(void *data, unsigned long temp);
struct thermal_trip_point_conf trip_data;
struct thermal_cooling_conf cooling_data;
void *private_data;
@@ -366,6 +367,23 @@ static int exynos_get_temp(struct thermal_zone_device
*thermal,
return 0;
}
+/* Get temperature callback functions for thermal zone */
+static int exynos_set_emul_temp(struct thermal_zone_device *thermal,
+ unsigned long temp)
+{
+ void *data;
+ int ret = -EINVAL;
+
+ if (!th_zone-sensor_conf) {
+ pr_info(Temperature sensor not initialised\n);
+ return -EINVAL;
+ }
+ data = th_zone-sensor_conf-private_data;
+ if (th_zone-sensor_conf-write_emul_temp)
+ ret = th_zone-sensor_conf-write_emul_temp(data, temp);
+ return ret;
+}
+
/* Get the temperature trend */
static int exynos_get_trend(struct thermal_zone_device *thermal,
int trip, enum
Re: [PATCH 2/3] cpufreq: exynos: Adding cpufreq driver for exynos5440
On Thu, Feb 7, 2013 at 6:42 PM, Viresh Kumar viresh.ku...@linaro.org wrote:
On 8 February 2013 00:38, amit kachhap amit.kach...@gmail.com wrote:
Hi Viresh,
Thanks for the detailed review. Will try to handle them in the next version,
np. I haven't seen reply to few questions, you missed them or accept them.
Many of your comments were apt so I agreed to most of them :)
General tip: Leave a blank line before and after your comment, it makes it
more
readable. :)
On Thu, Feb 7, 2013 at 3:17 AM, Viresh Kumar viresh.ku...@linaro.org wrote:
On Thu, Feb 7, 2013 at 1:09 AM, Amit Daniel Kachhap
+Required properties:
+- interrupts: Interrupt to know the completion of cpu frequency change.
+- cpufreq_tbl: Table of frequencies and voltage CPU could be transitioned
into,
This has to be operating-points as in cpufreq-cpu0 driver.
Yes I will check if opp table is beneficial. In my case it is just one
time parsing of cpufreq table and those values(freq, volt) are not
used later so did not use opp libraries.
Its one time parsing for everybody, nobody do it twice :)
By every time I mean like using the opp table and getting voltage from
there and then doing set_voltage. For me if I use opp table it is just
once during initializations so i didn't use it.
+ for (old_index = 0;
+ freq_table[old_index].frequency != CPUFREQ_TABLE_END;
+ old_index++)
+ if (freq_table[old_index].frequency == freqs.old)
+ break;
+
+ if (freq_table[old_index].frequency == CPUFREQ_TABLE_END) {
How can this be true?
This is error scenario
We have given cpufreq core a valid table and it has to set frequency from
this table only. How can cpu have any other freq here ? And you have done
something similar in your init() too, where you check if cpu has freq from the
table or not.
Yes agreed this is repetition.
+ dvfs_info = kzalloc(sizeof(struct exynos_dvfs_data), GFP_KERNEL);
sizeof(*dvfs_info) ?? why don't make it static too, as you have other
stuff too.. ?
The better option for single image solution to allocate everything
dynamically, so that
unused drivers don't occupy any space.
?
+ if ((len == 0) || (len / 2 CPUFREQ_LEVEL_END)) {
I really didn't like this limit you have put at the number of dvfs
points. Better
would be to use:
+ dvfs_info-dvfs_init = true;
why do you need this ?
This is added to synchronize the interrupts.
How? You are setting it once in init() and not touching it afterwards. :)
Yes but during init also if interrupts starts arriving before complete
initialization so to protect that case it is there. I suppose there
are other ways. Will check them
Thanks,
Amit Daniel
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Re: [PATCH V2 2/2] thermal: exynos: Use the framework for temperature emulation support
On Thu, Feb 7, 2013 at 7:04 PM, Zhang Rui rui.zh...@intel.com wrote:
On Mon, 2013-02-04 at 10:14 +0800, Zhang Rui wrote:
On Sun, 2013-01-27 at 19:28 -0800, Amit Daniel Kachhap wrote:
This removes the driver specific sysfs support of the temperature
emulation and uses the newly added core thermal framework for thermal
emulation. A platform specific handler is added to support this.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
---
Changes in V2:
* Added config option CONFIG_THERMAL_EMULATION instead of
CONFIG_EXYNOS_THERMAL_EMUL
This patchset is based on thermal maintainer next tree.
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git next
Documentation/thermal/exynos_thermal_emulation |8 +-
drivers/thermal/Kconfig|9 --
drivers/thermal/exynos_thermal.c | 158
++--
3 files changed, 67 insertions(+), 108 deletions(-)
diff --git a/Documentation/thermal/exynos_thermal_emulation
b/Documentation/thermal/exynos_thermal_emulation
index b73bbfb..36a3e79 100644
--- a/Documentation/thermal/exynos_thermal_emulation
+++ b/Documentation/thermal/exynos_thermal_emulation
@@ -13,11 +13,11 @@ Thermal emulation mode supports software debug for
TMU's operation. User can set
manually with software code and TMU will read current temperature from
user value not from
sensor's value.
-Enabling CONFIG_EXYNOS_THERMAL_EMUL option will make this support in
available.
-When it's enabled, sysfs node will be created under
-/sys/bus/platform/devices/'exynos device name'/ with name of 'emulation'.
+Enabling CONFIG_THERMAL_EMULATION option will make this support available.
+When it's enabled, sysfs node will be created as
+/sys/devices/virtual/thermal/thermal_zone'zone id'/emul_temp.
-The sysfs node, 'emulation', will contain value 0 for the initial state.
When you input any
+The sysfs node, 'emul_node', will contain value 0 for the initial state.
When you input any
temperature you want to update to sysfs node, it automatically enable
emulation mode and
current temperature will be changed into it.
(Exynos also supports user changable delay time which would be used to
delay of
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index e4cf7fb..2a79510 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -109,15 +109,6 @@ config EXYNOS_THERMAL
If you say yes here you get support for TMU (Thermal Management
Unit) on SAMSUNG EXYNOS series of SoC.
-config EXYNOS_THERMAL_EMUL
- bool EXYNOS TMU emulation mode support
- depends on EXYNOS_THERMAL
- help
- Exynos 4412 and 4414 and 5 series has emulation mode on TMU.
- Enable this option will be make sysfs node in exynos thermal platform
- device directory to support emulation mode. With emulation mode sysfs
- node, you can manually input temperature to TMU for simulation
purpose.
-
config DB8500_THERMAL
bool DB8500 thermal management
depends on ARCH_U8500
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index 327102a..afe9c2a 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -99,13 +99,13 @@
#define IDLE_INTERVAL 1
#define MCELSIUS 1000
-#ifdef CONFIG_EXYNOS_THERMAL_EMUL
+#ifdef CONFIG_THERMAL_EMULATION
#define EXYNOS_EMUL_TIME 0x57F0
#define EXYNOS_EMUL_TIME_SHIFT 16
#define EXYNOS_EMUL_DATA_SHIFT 8
#define EXYNOS_EMUL_DATA_MASK 0xFF
#define EXYNOS_EMUL_ENABLE 0x1
-#endif /* CONFIG_EXYNOS_THERMAL_EMUL */
+#endif /* CONFIG_THERMAL_EMULATION */
/* CPU Zone information */
#define PANIC_ZONE 4
@@ -143,6 +143,7 @@ struct thermal_cooling_conf {
struct thermal_sensor_conf {
char name[SENSOR_NAME_LEN];
int (*read_temperature)(void *data);
+ int (*write_emul_temp)(void *data, unsigned long temp);
struct thermal_trip_point_conf trip_data;
struct thermal_cooling_conf cooling_data;
void *private_data;
@@ -366,6 +367,23 @@ static int exynos_get_temp(struct thermal_zone_device
*thermal,
return 0;
}
+/* Get temperature callback functions for thermal zone */
+static int exynos_set_emul_temp(struct thermal_zone_device *thermal,
+ unsigned long temp)
+{
+ void *data;
+ int ret = -EINVAL;
+
+ if (!th_zone-sensor_conf) {
+ pr_info(Temperature sensor not initialised\n);
+ return -EINVAL;
+ }
+ data = th_zone-sensor_conf-private_data;
+ if (th_zone-sensor_conf-write_emul_temp)
+ ret = th_zone-sensor_conf-write_emul_temp(data, temp);
+ return ret;
+}
+
/* Get the temperature trend */
static int exynos_get_trend(struct thermal_zone_device
Re: [PATCH V3 4/5] ARM: dts: Add #dma-cells for generic dma binding support
Hi Rob,
On Wed, Feb 6, 2013 at 8:54 PM, Rob Herring robherri...@gmail.com wrote:
On 02/06/2013 12:18 AM, Padmavathi Venna wrote:
This patch adds #dma-cells property to PL330 DMA controller
nodes for supporting generic dma dt bindings on samsung
exynos5250 platform.
The subject doesn't reflect this is for pl330.
OK. I will fix this.
Signed-off-by: Padmavathi Venna padm...@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de
---
.../devicetree/bindings/dma/arm-pl330.txt | 15 +++
arch/arm/boot/dts/exynos5250.dtsi |4
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/arm-pl330.txt
b/Documentation/devicetree/bindings/dma/arm-pl330.txt
index 36e27d5..1fdbff6 100644
--- a/Documentation/devicetree/bindings/dma/arm-pl330.txt
+++ b/Documentation/devicetree/bindings/dma/arm-pl330.txt
@@ -8,6 +8,8 @@ Required properties:
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: interrupt number to the cpu.
+ - #dma-cells: must be 1. used to represent the number of integer
+cells in the dmas property of client device.
This should be optional in the case of platforms supporting only memory
to memory xfers.
In Exynos we have support for both peripheral to peripheral and memory
to memory.
So I made it as required property. Should I make this as optional?
Rob
Optional properties:
- dma-coherent : Present if dma operations are coherent
@@ -18,16 +20,21 @@ Example:
compatible = arm,pl330, arm,primecell;
reg = 0x1268 0x1000;
interrupts = 99;
+ #dma-cells = 1;
};
Client drivers (device nodes requiring dma transfers from dev-to-mem or
-mem-to-dev) should specify the DMA channel numbers using a two-value pair
+mem-to-dev) should specify the DMA channel numbers and dma channel names
as shown below.
[property name] = [phandle of the dma controller] [dma request id];
+ [property name] = [dma channel name]
where 'dma request id' is the dma request number which is connected
- to the client controller. The 'property name' is recommended to be
- of the form name-dma-channel.
+ to the client controller. The 'property name' 'dmas' and 'dma-names'
+ as required by the generic dma device tree binding helpers. The dma
+ names correspond 1:1 with the dma request ids in the dmas property.
- Example: tx-dma-channel = pdma0 12;
+ Example: dmas = pdma0 12
+ pdma1 11;
+ dma-names = tx, rx;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index f50b4e8..724f5bd 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -312,24 +312,28 @@
compatible = arm,pl330, arm,primecell;
reg = 0x121A 0x1000;
interrupts = 0 34 0;
+ #dma-cells = 1;
};
pdma1: pdma@121B {
compatible = arm,pl330, arm,primecell;
reg = 0x121B 0x1000;
interrupts = 0 35 0;
+ #dma-cells = 1;
};
mdma0: mdma@1080 {
compatible = arm,pl330, arm,primecell;
reg = 0x1080 0x1000;
interrupts = 0 33 0;
+ #dma-cells = 1;
};
mdma1: mdma@11C1 {
compatible = arm,pl330, arm,primecell;
reg = 0x11C1 0x1000;
interrupts = 0 124 0;
+ #dma-cells = 1;
};
};
Thanks
Padma
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Re: [RESEND][PATCH] ARM: EXYNOS: Add clocks for EXYNOS I2S and PCM I/F
On Wed, Feb 6, 2013 at 10:51 AM, Sangsu Park sangsu4u.p...@samsung.com wrote:
Audio Subsystem has own clocks for I2S0 and PCM0 in all EXYNOS series.
This patch add clocks for I2S0 and PCM0 I/F.
Signed-off-by: Sangsu Park sangsu4u.p...@samsung.com
---
arch/arm/mach-exynos/Makefile |1 +
arch/arm/mach-exynos/clock-audss.c | 64
2 files changed, 65 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-exynos/clock-audss.c
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 7e53a3a..5b6c7c0 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -13,6 +13,7 @@ obj- :=
# Core
obj-$(CONFIG_ARCH_EXYNOS) += common.o
+obj-$(CONFIG_ARCH_EXYNOS) += clock-audss.o
obj-$(CONFIG_ARCH_EXYNOS4) += clock-exynos4.o
obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
diff --git a/arch/arm/mach-exynos/clock-audss.c
b/arch/arm/mach-exynos/clock-audss.c
new file mode 100644
index 000..8260185
--- /dev/null
+++ b/arch/arm/mach-exynos/clock-audss.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Clock support for EXYNOS Audio Subsystem
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/err.h
+#include linux/io.h
+
+#include plat/clock.h
+#include plat/s5p-clock.h
+
+#define EXYNOS_PA_AUDSS(0x0381)
+
+/* IP Clock Gate 0 Registers */
+#define EXYNOS_AUDSS_CLKGATE_I2SBUS(12)
+#define EXYNOS_AUDSS_CLKGATE_I2SSPECIAL(13)
+#define EXYNOS_AUDSS_CLKGATE_PCMBUS(14)
+#define EXYNOS_AUDSS_CLKGATE_PCMSPECIAL(15)
+#define EXYNOS_AUDSS_CLKGATE_GPIO (16)
+
+static void __iomem *clk_audss_base = 0;
+
+static int exynos_clk_audss_ctrl(struct clk *clk, int enable)
+{
+ if (!clk_audss_base)
+ return ENOMEM;
+
+ return s5p_gatectrl(clk_audss_base, clk, enable);
+}
+
+static struct clk exynos_init_audss_clocks[] = {
+ {
+ .name = iis,
+ .devname= samsung-i2s.0,
+ .enable = exynos_clk_audss_ctrl,
+ .ctrlbit= EXYNOS_AUDSS_CLKGATE_I2SSPECIAL |
EXYNOS_AUDSS_CLKGATE_I2SBUS
+ | EXYNOS_AUDSS_CLKGATE_GPIO,
+ }, {
+ .name = pcm,
+ .devname= samsung-pcm.0,
+ .enable = exynos_clk_audss_ctrl,
+ .ctrlbit= EXYNOS_AUDSS_CLKGATE_PCMSPECIAL |
EXYNOS_AUDSS_CLKGATE_PCMBUS
+ | EXYNOS_AUDSS_CLKGATE_GPIO,
+ },
+};
+
+void __init exynos_register_audss_clocks(void)
+{
+ clk_audss_base = ioremap(EXYNOS_PA_AUDSS, SZ_4K);
+ if (clk_audss_base == NULL) {
Please run checkpatch. There should be space after if.
+ pr_err(unable to ioremap for gpio_base1\n);
Please fix the err message.
+ return;
+ }
+
+ s3c_register_clocks(exynos_init_audss_clocks,
ARRAY_SIZE(exynos_init_audss_clocks));
+ s3c_disable_clocks(exynos_init_audss_clocks,
ARRAY_SIZE(exynos_init_audss_clocks));
+}
--
1.7.4.1
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Thanks
Padma
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Re: [PATCH 2/3] cpufreq: exynos: Adding cpufreq driver for exynos5440
On 8 February 2013 08:56, amit kachhap amit.kach...@gmail.com wrote: + dvfs_info-dvfs_init = true; why do you need this ? This is added to synchronize the interrupts. How? You are setting it once in init() and not touching it afterwards. :) Yes but during init also if interrupts starts arriving before complete initialization so to protect that case it is there. I suppose there are other ways. Will check them Then clear any pending interrupts from init () -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] pinctrl: samsung: remove duplicated line of samsung_pinctrl_register()
This patch removes duplicated line of samsung_pinctrl_register(), because the number of pins is redundantly assigned twice. Signed-off-by: Jingoo Han jg1@samsung.com --- drivers/pinctrl/pinctrl-samsung.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index 294bcdd..3d5cf63 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -716,7 +716,6 @@ static int samsung_pinctrl_register(struct platform_device *pdev, } ctrldesc-pins = pindesc; ctrldesc-npins = drvdata-ctrl-nr_pins; - ctrldesc-npins = drvdata-ctrl-nr_pins; /* dynamically populate the pin number and pin name for pindesc */ for (pin = 0, pdesc = pindesc; pin ctrldesc-npins; pin++, pdesc++) -- 1.7.2.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
