Hi,
On Sat, Mar 2, 2013 at 9:23 PM, Alan Stern st...@rowland.harvard.edu wrote:
On Sat, 2 Mar 2013, Vivek Gautam wrote:
By enabling runtime pm in this driver allows users of
xhci-plat to enter into runtime pm. This is not full
runtime pm support (AKA xhci-plat doesn't actually power
Hi,
From: Lonsn [mailto:lonsn2...@gmail.com]
Sent: Sunday, March 03, 2013 4:10 AM
Which firmware should be used for S5PV210 for kernel 3.8?
Here:
https://git.kernel.org/cgit/linux/kernel/git/firmware/linux-
firmware.git/commit/?id=fb5cda9c70277f633ca0c1e81b6fa7b13007bbf6
It only says for
Hi Lonsn,
From: Lonsn [mailto:lonsn2...@gmail.com]
Sent: Saturday, March 02, 2013 5:00 AM
Hi,
I tested the MFC decode example v4l2_decode from
http://git.infradead.org/users/kmpark/public-apps and meet some
problems as following:
# ./v4l2_decode -f /dev/video5 -m /dev/video9 -d /dev/fb0
Hi,
This problem is known to us and Marek is planning a fix. However, the
problem
proved to be quite difficult, so please be patient.
Best wishes,
--
Kamil Debski
Linux Platform Group
Samsung Poland RD Center
-Original Message-
From: Lonsn [mailto:lonsn2...@gmail.com]
Sent:
Exynos5440 has two PCIe controllers which can be used as Root Complex.
This driver supports the PCIe controllers as Root Complex mode.
Signed-off-by: Surendranath Gurivireddy Balla suren.re...@samsung.com
Signed-off-by: Siva Reddy Kallam siva.kal...@samsung.com
Signed-off-by: Jingoo Han
Exynos5440 has two PCIe controllers which can be used as root complex
for PCIe interface.
Signed-off-by: Jingoo Han jg1@samsung.com
---
arch/arm/boot/dts/exynos5440-ssdk5440.dts |8 +++
arch/arm/boot/dts/exynos5440.dtsi | 32 +
2 files changed,
On 4 March 2013 15:52, Jingoo Han jg1@samsung.com wrote:
Exynos5440 has two PCIe controllers which can be used as Root Complex.
This driver supports the PCIe controllers as Root Complex mode.
Signed-off-by: Surendranath Gurivireddy Balla suren.re...@samsung.com
Signed-off-by: Siva Reddy
于 2013/3/4 17:30, Kamil Debski 写道:
Hi,
This problem is known to us and Marek is planning a fix. However, the
problem
proved to be quite difficult, so please be patient.
Best wishes,
Kamil,
Thanks for your information.
Is there any workaround method which can let me continue the MFC decoder
Cesar Eduardo Barros wrote:
This directory was removed by commit 09ec1d7 (ARM: S3C24XX: Remove
plat-s3c24xx directory in arch/arm/).
Cc: Kukjin Kim kgene@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Thanks.
- Kukjin
Cc: Ben Dooks ben-li...@fluff.org
Cc: Russell King
Lonsn wrote:
于 2013/3/2 20:38, Sylwester Nawrocki 写道:
Since the DMA controller clocks are managed at amba bus level,
the PL330 device clocks handling has been removed from the driver
in commit 7c71b8eb268ee38235f7e924d943ea9d90e59469
DMA: PL330: Remove redundant runtime_suspend/resume
On Monday 04 March 2013, Padmavathi Venna wrote:
+
+ if (adev-dev.of_node) {
+ ret = of_dma_controller_register(adev-dev.of_node,
+of_dma_pl330_xlate, pdmac);
+ if (ret) {
+ dev_err(adev-dev,
+
Sachin Kamat wrote:
Hi Sylwester,
On 25 February 2013 15:34, Sylwester Nawrocki s.nawro...@samsung.com
wrote:
Hi Sachin,
On 02/25/2013 09:12 AM, Sachin Kamat wrote:
Commit 56bc91 ([media] s5p-fimc: Redefine platform data structure for
fimc-is)
split bus_type into fimc_bus_type
With device core now able to setup the default pin configuration,
the call to devm_pinctrl_get_select_default can be removed. And
the pin configuration code based on the deprecated Samsung specific
gpio bindings is also removed.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
Hi
On 03/04/2013 02:00 PM, Kukjin Kim wrote:
Looks good to me, applied into -fixes.
Sylwester, why did you want to re-send this patch?
Only to add
Tested-by: Lonsn lonsn2...@gmail.com
Cc: sta...@vger.kernel.org # 3.7
tags, and any other in case someone else tests the patch.
I think we would
Hi Thomas,
Am Montag, 4. März 2013, 14:42:53 schrieb Thomas Abraham:
With device core now able to setup the default pin configuration,
the call to devm_pinctrl_get_select_default can be removed. And
the pin configuration code based on the deprecated Samsung specific
gpio bindings is also
Hi Doug,
On 2 March 2013 17:18, Tomasz Figa tomasz.f...@gmail.com wrote:
Hello Doug,
On Friday 01 of March 2013 16:19:39 Doug Anderson wrote:
Thomas and Tomasz,
I'm trying to get my head wrapped around the state of pinctrl for
exynos5250. I see various patches that have floated around at
On 4 March 2013 19:33, Heiko Stübner he...@sntech.de wrote:
Hi Thomas,
Am Montag, 4. März 2013, 14:42:53 schrieb Thomas Abraham:
With device core now able to setup the default pin configuration,
the call to devm_pinctrl_get_select_default can be removed. And
the pin configuration code based
On 03/04/2013 02:11 PM, Kukjin Kim wrote:
Sachin Kamat wrote:
On 25 February 2013 15:34, Sylwester Nawrocki s.nawro...@samsung.com
wrote:
On 02/25/2013 09:12 AM, Sachin Kamat wrote:
Commit 56bc91 ([media] s5p-fimc: Redefine platform data structure for
fimc-is)
split bus_type into
Hi,
On Fri, Mar 01, 2013 at 08:41:29AM +0200, Felipe Balbi wrote:
Moreover, SoCs having multiple dwc3 controllers will have multiple
PHYs, which eventually be added using usb_add_phy_dev(), and not
using usb_add_phy(). So each dwc3 controller won't be able to
get PHYs by
On Mon, 4 Mar 2013, Vivek Gautam wrote:
@@ -149,6 +150,8 @@ static int xhci_plat_probe(struct platform_device
*pdev)
if (ret)
goto put_usb3_hcd;
+ pm_runtime_enable(pdev-dev);
This is generally not a good idea. You shouldn't enable a device for
runtime
Hi,
On Sat, Mar 02, 2013 at 06:53:02PM +0530, Vivek Gautam wrote:
Adding APIs to handle runtime power management on PHY
devices. PHY consumers may need to wake-up/suspend PHYs
when they work across autosuspend.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
On Sun, 3 Mar 2013, Felipe Balbi wrote:
this is good point and, in fact, a doubt I have myself. How are we
supposed to check if device is suspended ? In case it _is_ suspended we
might not be able to read device's registers due to clocks possibly
being gated.
That's really a
On 2 March 2013 15:04, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
This patch adds dvfs support for exynos5440 SOC. This soc has 4 cores and
they run at same frequency. The nature of exynos5440 clock controller is
different from previous exynos controllers so not using the common exynos
Hi Arnd,
On Mon, Mar 4, 2013 at 6:28 PM, Arnd Bergmann a...@arndb.de wrote:
On Monday 04 March 2013, Padmavathi Venna wrote:
+
+ if (adev-dev.of_node) {
+ ret = of_dma_controller_register(adev-dev.of_node,
+of_dma_pl330_xlate,
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