[PATCH] usb: phy: samsung: Add support for EXYNOS4210
Add support for EXYNOS4210 that includes USB EHCI/OHCI.
Previous PHY initialization code is not correct; thus, it is modifed
to support EXYNOS4210 PHY. Also, after common clock framework for
Samsung is added, clock name is defined as 'usb_device'.
Signed-off-by: Jingoo Han jg1@samsung.com
---
Tested on Exynos4210.
drivers/usb/phy/phy-samsung-usb.h | 35 ++---
drivers/usb/phy/phy-samsung-usb2.c | 74 +---
2 files changed, 98 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/phy/phy-samsung-usb.h
b/drivers/usb/phy/phy-samsung-usb.h
index 70a9cae..34c35e8 100644
--- a/drivers/usb/phy/phy-samsung-usb.h
+++ b/drivers/usb/phy/phy-samsung-usb.h
@@ -22,13 +22,22 @@
#define SAMSUNG_PHYPWR (0x00)
+#define PHYPWR_PHY1_HSIC_NORMAL_MASK (0xf 9)
+#define PHYPWR_PHY1_HSIC1_SLEEP(1 12)
+#define PHYPWR_PHY1_HSIC1_FORCE_SUSPEND(1 11)
+#define PHYPWR_PHY1_HSIC0_SLEEP(1 10)
+#define PHYPWR_PHY1_HSIC0_FORCE_SUSPEND(1 9)
+#define PHYPWR_PHY1_STD_NORMAL_MASK(0x7 6)
+#define PHYPWR_PHY1_STD_SLEEP (1 8)
+#define PHYPWR_PHY1_STD_ANALOG_POWERDOWN (1 7)
+#define PHYPWR_PHY1_STD_FORCE_SUSPEND (1 6)
#define PHYPWR_NORMAL_MASK (0x19 0)
#define PHYPWR_OTG_DISABLE (0x1 4)
#define PHYPWR_ANALOG_POWERDOWN(0x1 3)
#define PHYPWR_FORCE_SUSPEND (0x1 1)
/* For Exynos4 */
-#define PHYPWR_NORMAL_MASK_PHY0(0x39 0)
-#define PHYPWR_SLEEP_PHY0 (0x1 5)
+#define PHYPWR_PHY0_NORMAL_MASK(0x39 0)
+#define PHYPWR_PHY0_SLEEP (0x1 5)
#define SAMSUNG_PHYCLK (0x04)
@@ -43,9 +52,25 @@
#define SAMSUNG_RSTCON (0x08)
-#define RSTCON_PHYLINK_SWRST (0x1 2)
-#define RSTCON_HLINK_SWRST (0x1 1)
-#define RSTCON_SWRST (0x1 0)
+#define RSTCON_HOST_LINK_PORT_SWRST_MASK (0xf 6)
+#define RSTCON_HOST_LINK_PORT2_SWRST (0x1 9)
+#define RSTCON_HOST_LINK_PORT1_SWRST (0x1 8)
+#define RSTCON_HOST_LINK_PORT0_SWRST (0x1 7)
+#define RSTCON_HOST_LINK_ALL_SWRST (0x1 6)
+#define RSTCON_PHY1_SWRST_MASK (0x7 3)
+#define RSTCON_PHY1_HSIC_SWRST (0x1 5)
+#define RSTCON_PHY1_STD_SWRST (0x1 4)
+#define RSTCON_PHY1_ALL_SWRST (0x1 3)
+#define RSTCON_PHY0_SWRST_MASK (0x7 0)
+#define RSTCON_PHY0_PHYLINK_SWRST (0x1 2)
+#define RSTCON_PHY0_HLINK_SWRST(0x1 1)
+#define RSTCON_PHY0_SWRST (0x1 0)
+
+/* EXYNOS4 */
+#define EXYNOS4_PHY1CON(0x34)
+
+#define PHY1CON_FPENABLEN (0x1 0)
+
/* EXYNOS5 */
#define EXYNOS5_PHY_HOST_CTRL0 (0x00)
diff --git a/drivers/usb/phy/phy-samsung-usb2.c
b/drivers/usb/phy/phy-samsung-usb2.c
index 9d5e273..4f93d84 100644
--- a/drivers/usb/phy/phy-samsung-usb2.c
+++ b/drivers/usb/phy/phy-samsung-usb2.c
@@ -158,6 +158,15 @@ static void samsung_exynos5_usb2phy_enable(struct
samsung_usbphy *sphy)
writel(ohcictrl, regs + EXYNOS5_PHY_HOST_OHCICTRL);
}
+static bool exynos4_phyhost_is_on(void __iomem *regs)
+{
+ u32 reg;
+
+ reg = readl(regs + SAMSUNG_PHYPWR);
+
+ return !(reg PHYPWR_PHY1_STD_ANALOG_POWERDOWN);
+}
+
static void samsung_usb2phy_enable(struct samsung_usbphy *sphy)
{
void __iomem *regs = sphy-regs;
@@ -165,6 +174,18 @@ static void samsung_usb2phy_enable(struct samsung_usbphy
*sphy)
u32 phyclk;
u32 rstcon;
+ switch (sphy-drv_data-cpu_type) {
+ case TYPE_EXYNOS4210:
+ atomic_inc(sphy-phy_usage);
+
+ if (exynos4_phyhost_is_on(regs)) {
+ dev_info(sphy-dev, Already power on PHY\n);
+ return;
+ }
+ default:
+ break;
+ }
+
/* set clock frequency for PLL */
phyclk = sphy-ref_clk_freq;
phypwr = readl(regs + SAMSUNG_PHYPWR);
@@ -174,22 +195,48 @@ static void samsung_usb2phy_enable(struct samsung_usbphy
*sphy)
case TYPE_S3C64XX:
phyclk = ~PHYCLK_COMMON_ON_N;
phypwr = ~PHYPWR_NORMAL_MASK;
- rstcon |= RSTCON_SWRST;
+ rstcon |= RSTCON_PHY0_SWRST;
break;
case TYPE_EXYNOS4210:
- phypwr = ~PHYPWR_NORMAL_MASK_PHY0;
- rstcon |= RSTCON_SWRST;
+ phypwr = ~(PHYPWR_PHY0_NORMAL_MASK |
+ PHYPWR_PHY1_STD_NORMAL_MASK |
+ PHYPWR_PHY1_HSIC_NORMAL_MASK);
+ rstcon |=
[PATCH V2] ARM: dts: Correct the base address of pinctrl_3 on Exynos5250
This patch corrects the base address of pinctrl_3 on Exynos5250
platform.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
Changes since V1:
- Added platform name in the subject line.
arch/arm/boot/dts/exynos5250-pinctrl.dtsi |2 +-
arch/arm/boot/dts/exynos5250.dtsi |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
index d1650fb..ded558b 100644
--- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
@@ -763,7 +763,7 @@
};
};
- pinctrl@0368 {
+ pinctrl@0386 {
gpz: gpz {
gpio-controller;
#gpio-cells = 2;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 7154e3d..e9bfd13 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -169,9 +169,9 @@
interrupts = 0 50 0;
};
- pinctrl_3: pinctrl@0368 {
+ pinctrl_3: pinctrl@0386 {
compatible = samsung,exynos5250-pinctrl;
- reg = 0x0368000 0x1000;
+ reg = 0x0386 0x1000;
interrupts = 0 47 0;
};
--
1.7.4.4
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[PATCH V3 0/4] clk: Samsung: audss: Register audio subsytem clocks using common clk framework
Samsung S5PV210 and Exynos SoC has a separate subsystem for audio. This subsystem has a internal clock controller which controls i2s0 and pcm0 clocks. This patch series adds the Samsung audio subsytem clock to the common clock framework and provides the I2S controllers clock information in the dtsi file. This patch series is made based on Kukjin Kim for-next branch Changes since V2: - Removed s5pv210 compatible name from driver as it is not yet supported which is different from Exynos series audio subsystem clock conroller. - Removed clkdev lookup support and added alias names in the i2s0 controller node. Changes since V1: - Reworked on all review comments by Sylwester Nawrocki - Added a header file for all clock indexes as requested by Sylwester - Added different compatible names for s5pv210, exynos4 and exynos5 - Registered the pcm clocks with common clock framework Padmavathi Venna (4): ARM: samsung: use #include for all device trees clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: add Exynos audio subsystem clock controller node ARM: dts: add clock provider information for i2s controllers in Exynos5250 .../bindings/clock/clk-samsung-audss.txt | 64 ++ arch/arm/boot/dts/exynos4.dtsi |2 +- arch/arm/boot/dts/exynos4210-origen.dts|2 +- arch/arm/boot/dts/exynos4210-smdkv310.dts |2 +- arch/arm/boot/dts/exynos4210-trats.dts |2 +- arch/arm/boot/dts/exynos4210-universal_c210.dts|2 +- arch/arm/boot/dts/exynos4210.dtsi |4 +- arch/arm/boot/dts/exynos4212.dtsi |2 +- arch/arm/boot/dts/exynos4412-odroidx.dts |2 +- arch/arm/boot/dts/exynos4412-origen.dts|2 +- arch/arm/boot/dts/exynos4412-smdk4412.dts |2 +- arch/arm/boot/dts/exynos4412.dtsi |2 +- arch/arm/boot/dts/exynos4x12.dtsi |4 +- arch/arm/boot/dts/exynos5250-arndale.dts |2 +- arch/arm/boot/dts/exynos5250-smdk5250.dts |2 +- arch/arm/boot/dts/exynos5250-snow.dts |4 +- arch/arm/boot/dts/exynos5250.dtsi | 23 +++- arch/arm/boot/dts/exynos5440-sd5v1.dts |2 +- arch/arm/boot/dts/exynos5440-ssdk5440.dts |2 +- arch/arm/boot/dts/exynos5440.dtsi |2 +- arch/arm/boot/dts/s3c2416-smdk2416.dts |2 +- arch/arm/boot/dts/s3c2416.dtsi |4 +- arch/arm/boot/dts/s3c24xx.dtsi |2 +- drivers/clk/samsung/Makefile |1 + drivers/clk/samsung/clk-samsung-audss.c| 133 include/dt-bindings/clk/samsung-audss-clk.h| 25 26 files changed, 269 insertions(+), 27 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/clk-samsung-audss.txt create mode 100644 drivers/clk/samsung/clk-samsung-audss.c create mode 100644 include/dt-bindings/clk/samsung-audss-clk.h -- 1.7.4.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 1/4] ARM: samsung: use #include for all device trees
Replace /include/ (dtc) with #include (C pre-processor) for all
Samsung DT files
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi |2 +-
arch/arm/boot/dts/exynos4210-origen.dts |2 +-
arch/arm/boot/dts/exynos4210-smdkv310.dts |2 +-
arch/arm/boot/dts/exynos4210-trats.dts |2 +-
arch/arm/boot/dts/exynos4210-universal_c210.dts |2 +-
arch/arm/boot/dts/exynos4210.dtsi |4 ++--
arch/arm/boot/dts/exynos4212.dtsi |2 +-
arch/arm/boot/dts/exynos4412-odroidx.dts|2 +-
arch/arm/boot/dts/exynos4412-origen.dts |2 +-
arch/arm/boot/dts/exynos4412-smdk4412.dts |2 +-
arch/arm/boot/dts/exynos4412.dtsi |2 +-
arch/arm/boot/dts/exynos4x12.dtsi |4 ++--
arch/arm/boot/dts/exynos5250-arndale.dts|2 +-
arch/arm/boot/dts/exynos5250-smdk5250.dts |2 +-
arch/arm/boot/dts/exynos5250-snow.dts |4 ++--
arch/arm/boot/dts/exynos5250.dtsi |4 ++--
arch/arm/boot/dts/exynos5440-sd5v1.dts |2 +-
arch/arm/boot/dts/exynos5440-ssdk5440.dts |2 +-
arch/arm/boot/dts/exynos5440.dtsi |2 +-
arch/arm/boot/dts/s3c2416-smdk2416.dts |2 +-
arch/arm/boot/dts/s3c2416.dtsi |4 ++--
arch/arm/boot/dts/s3c24xx.dtsi |2 +-
22 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index bed40ee..3f94fe8 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -19,7 +19,7 @@
* published by the Free Software Foundation.
*/
-/include/ skeleton.dtsi
+#include skeleton.dtsi
/ {
interrupt-parent = gic;
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts
b/arch/arm/boot/dts/exynos4210-origen.dts
index bcf8079..5f851d7 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -15,7 +15,7 @@
*/
/dts-v1/;
-/include/ exynos4210.dtsi
+#include exynos4210.dtsi
/ {
model = Insignal Origen evaluation board based on Exynos4210;
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts
b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 91332b7..9c01b71 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -15,7 +15,7 @@
*/
/dts-v1/;
-/include/ exynos4210.dtsi
+#include exynos4210.dtsi
/ {
model = Samsung smdkv310 evaluation board based on Exynos4210;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index 9a14484..94eebff 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -13,7 +13,7 @@
*/
/dts-v1/;
-/include/ exynos4210.dtsi
+#include exynos4210.dtsi
/ {
model = Samsung Trats based on Exynos4210;
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 345cdb5..889cdad 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -13,7 +13,7 @@
*/
/dts-v1/;
-/include/ exynos4210.dtsi
+#include exynos4210.dtsi
/ {
model = Samsung Universal C210 based on Exynos4210 rev0;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index 366795a..75c2756 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -19,8 +19,8 @@
* published by the Free Software Foundation.
*/
-/include/ exynos4.dtsi
-/include/ exynos4210-pinctrl.dtsi
+#include exynos4.dtsi
+#include exynos4210-pinctrl.dtsi
/ {
compatible = samsung,exynos4210;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi
b/arch/arm/boot/dts/exynos4212.dtsi
index c0f60f4..6f34d7f 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -17,7 +17,7 @@
* published by the Free Software Foundation.
*/
-/include/ exynos4x12.dtsi
+#include exynos4x12.dtsi
/ {
compatible = samsung,exynos4212;
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 53bc8bf..7bb8d48 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -12,7 +12,7 @@
*/
/dts-v1/;
-/include/ exynos4412.dtsi
+#include exynos4412.dtsi
/ {
model = Hardkernel ODROID-X board based on Exynos4412;
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index 790a999..df097b5 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -13,7 +13,7 @@
*/
/dts-v1/;
-/include/ exynos4412.dtsi
+#include exynos4412.dtsi
/ {
model = Insignal Origen evaluation board based on Exynos4412;
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts
[PATCH V3 3/4] ARM: dts: add Exynos audio subsystem clock controller node
Audio subsystem introduced in s5pv210 and exynos platforms
which has a internal clock controller. This patch adds a node
for the same on exynos5250.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index bccda67..388983e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -72,6 +72,12 @@
#clock-cells = 1;
};
+ clock_audss: audss-clock-controller@381 {
+ compatible = samsung,exynos5250-audss-clock;
+ reg = 0x0381 0x0C;
+ #clock-cells = 1;
+ };
+
gic:interrupt-controller@10481000 {
compatible = arm,cortex-a15-gic, arm,cortex-a9-gic;
#interrupt-cells = 3;
--
1.7.4.4
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[PATCH V3 4/4] ARM: dts: add clock provider information for i2s controllers in Exynos5250
Add clock lookup information for i2s controllers on exynos5250 SoC.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 388983e..7154e3d 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,6 +20,8 @@
#include skeleton.dtsi
#include exynos5250-pinctrl.dtsi
+#include dt-bindings/clk/samsung-audss-clk.h
+
/ {
compatible = samsung,exynos5250;
interrupt-parent = gic;
@@ -457,6 +459,13 @@
pdma0 9
pdma0 8;
dma-names = tx, rx, tx-sec;
+ clocks = clock_audss SAMSUNG_I2S_BUS,
+ clock_audss SAMSUNG_I2S_BUS,
+ clock_audss SAMSUNG_SCLK_I2S,
+ clock_audss SAMSUNG_MOUT_AUDSS,
+ clock_audss SAMSUNG_MOUT_I2S;
+ clock-names = iis, i2s_opclk0, i2s_opclk1,
+ mout_audss, mout_i2s;
samsung,supports-6ch;
samsung,supports-rstclr;
samsung,supports-secdai;
@@ -471,6 +480,8 @@
dmas = pdma1 12
pdma1 11;
dma-names = tx, rx;
+ clocks = clock 307;
+ clock-names = iis;
pinctrl-names = default;
pinctrl-0 = i2s1_bus;
};
@@ -481,6 +492,8 @@
dmas = pdma0 12
pdma0 11;
dma-names = tx, rx;
+ clocks = clock 308;
+ clock-names = iis;
pinctrl-names = default;
pinctrl-0 = i2s2_bus;
};
--
1.7.4.4
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[PATCH V3 2/4] clk: samsung: register audio subsystem clocks using common clock framework
Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can control i2s0 and
pcm0 clocks. This patch registers the audio subsystem clocks
with the common clock framework on Exynos family.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
.../bindings/clock/clk-samsung-audss.txt | 64 ++
drivers/clk/samsung/Makefile |1 +
drivers/clk/samsung/clk-samsung-audss.c| 133
include/dt-bindings/clk/samsung-audss-clk.h| 25
4 files changed, 223 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings/clock/clk-samsung-audss.txt
create mode 100644 drivers/clk/samsung/clk-samsung-audss.c
create mode 100644 include/dt-bindings/clk/samsung-audss-clk.h
diff --git a/Documentation/devicetree/bindings/clock/clk-samsung-audss.txt
b/Documentation/devicetree/bindings/clock/clk-samsung-audss.txt
new file mode 100644
index 000..07a7ed4
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/clk-samsung-audss.txt
@@ -0,0 +1,64 @@
+* Samsung Audio Subsystem Clock Controller
+
+The Samsung Audio Subsystem clock controller generates and supplies clocks
+to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
+binding described here is applicable to all SoC's in Exynos family.
+
+Required Properties:
+
+- compatible: should be one of the following:
+ - samsung,exynos4210-audss-clock - controller compatible with all Exynos4
SoCs.
+ - samsung,exynos5250-audss-clock - controller compatible with all Exynos5
SoCs.
+
+- reg: physical base address and length of the controller's register set.
+
+- #clock-cells: should be 1.
+
+The following is the list of clocks generated by the controller. Each clock is
+assigned an identifier and client nodes use this identifier to specify the
+clock which they consume. Some of the clocks are available only on a particular
+Exynos4 SoC and this is specified where applicable.
+
+Provided clocks:
+
+Clock ID SoC (if specific)
+---
+
+mout_audss 0
+mout_i2s1
+dout_srp2
+dout_bus3
+dout_i2s4
+srp_clk 5
+i2s_bus 6
+sclk_i2s7
+pcm_bus 8
+sclk_pcm9
+
+Example 1: An example of a clock controller node is listed below.
+
+clock_audss: audss-clock-controller@381 {
+ compatible = samsung,exynos5250-audss-clock;
+ reg = 0x0381 0x0C;
+ #clock-cells = 1;
+};
+
+Example 2: I2S controller node that consumes the clock generated by the clock
+ controller. Refer to the standard clock bindings for information
+ about 'clocks' and 'clock-names' property.
+
+i2s0: i2s@0383 {
+ compatible = samsung,i2s-v5;
+ reg = 0x0383 0x100;
+ dmas = pdma0 10
+ pdma0 9
+ pdma0 8;
+ dma-names = tx, rx, tx-sec;
+ clocks = clock_audss SAMSUNG_I2S_BUS,
+ clock_audss SAMSUNG_I2S_BUS,
+ clock_audss SAMSUNG_SCLK_I2S,
+ clock_audss SAMSUNG_MOUT_AUDSS,
+ clock_audss SAMSUNG_MOUT_I2S;
+ clock-names = iis, i2s_opclk0, i2s_opclk1,
+ mout_audss, mout_i2s;
+};
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index b7c232e..5425fa8 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_COMMON_CLK)+= clk.o clk-pll.o
obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o
obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o
obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o
+obj-$(CONFIG_PLAT_SAMSUNG) += clk-samsung-audss.o
diff --git a/drivers/clk/samsung/clk-samsung-audss.c
b/drivers/clk/samsung/clk-samsung-audss.c
new file mode 100644
index 000..534cdef
--- /dev/null
+++ b/drivers/clk/samsung/clk-samsung-audss.c
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Padmavathi Venna padm...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Common Clock Framework support for Audio Subsystem Clock Controller.
+*/
+
+#include linux/clkdev.h
+#include linux/io.h
+#include linux/clk-provider.h
+#include linux/of_address.h
+#include linux/syscore_ops.h
+
+#include dt-bindings/clk/samsung-audss-clk.h
+
+static DEFINE_SPINLOCK(lock);
+static struct clk **clk_table;
+static void __iomem *reg_base;
+static struct clk_onecell_data clk_data;
+
+#define ASS_CLK_SRC 0x0
+#define ASS_CLK_DIV 0x4
+#define ASS_CLK_GATE 0x8
+
+static unsigned long reg_save[][2] = {
+ {ASS_CLK_SRC, 0},
+ {ASS_CLK_DIV, 0},
+ {ASS_CLK_GATE, 0},
+};
+
+/* list of all parent clock list */
+static const char *mout_audss_p[] = { fin_pll, fout_epll };
+static const char
[PATCH] ARM: dts: wm8994: Add wm8994 regulator support on smdk5250.
This patch adds the required regulator supplies and properties
for wm8994 codec on smdk5250 board.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 53 +++-
1 files changed, 51 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index f2a025e..42fc79e 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -37,6 +37,46 @@
};
};
+ avdd2:fixed-regulator@0 {
+ compatible = regulator-fixed;
+ regulator-name = avdd2-supply;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
+ cpvdd:fixed-regulator@1 {
+ compatible = regulator-fixed;
+ regulator-name = cpvdd-supply;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
+ dbvdd:fixed-regulator@2 {
+ compatible = regulator-fixed;
+ regulator-name = dbvdd-supply;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ regulator-always-on;
+ };
+
+ spkvdd1:fixed-regulator@3 {
+ compatible = regulator-fixed;
+ regulator-name = spkvdd1-supply;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ regulator-always-on;
+ };
+
+ spkvdd2:fixed-regulator@4 {
+ compatible = regulator-fixed;
+ regulator-name = spkvdd2-supply;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ regulator-always-on;
+ };
+
i2c@12C7 {
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 2;
@@ -47,8 +87,17 @@
};
wm8994: wm8994@1a {
-compatible = wlf,wm8994;
-reg = 0x1a;
+ compatible = wlf,wm8994;
+ reg = 0x1a;
+
+ gpio-controller;
+ #gpio-cells = 2;
+
+ AVDD2-supply = avdd2;
+ CPVDD-supply = cpvdd;
+ DBVDD-supply = dbvdd;
+ SPKVDD1-supply = spkvdd1;
+ SPKVDD2-supply = spkvdd2;
};
};
--
1.7.4.4
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[PATCH] serial: samsung: enable clock before clearing pending interrupts during init
Ensure that the uart controller clock is enabled prior to writing to the
interrupt mask and pending registers in the s3c24xx_serial_init_port
function.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
drivers/tty/serial/samsung.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 2c873c4..d1972b9 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1166,6 +1166,18 @@ static int s3c24xx_serial_init_port(struct
s3c24xx_uart_port *ourport,
ourport-tx_irq = ret;
ourport-clk= clk_get(platdev-dev, uart);
+ if (IS_ERR(ourport-clk)) {
+ pr_err(%s: Controller clock not found\n,
+ dev_name(platdev-dev));
+ return PTR_ERR(ourport-clk);
+ }
+
+ ret = clk_prepare_enable(ourport-clk);
+ if (ret) {
+ pr_err(uart: clock failed to prepare+enable: %d\n, ret);
+ clk_put(ourport-clk);
+ return ret;
+ }
/* Keep all interrupts masked and cleared */
if (s3c24xx_serial_has_interrupt_mask(port)) {
@@ -1180,6 +1192,7 @@ static int s3c24xx_serial_init_port(struct
s3c24xx_uart_port *ourport,
/* reset the fifos (and setup the uart) */
s3c24xx_serial_resetport(port, cfg);
+ clk_disable_unprepare(ourport-clk);
return 0;
}
--
1.7.9.5
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Re: [PATCH] ARM: dts: wm8994: Add wm8994 regulator support on smdk5250.
On Tue, May 28, 2013 at 04:05:22PM +0530, Padmavathi Venna wrote:
+ avdd2:fixed-regulator@0 {
+ compatible = regulator-fixed;
+ regulator-name = avdd2-supply;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+ cpvdd:fixed-regulator@1 {
+ compatible = regulator-fixed;
+ regulator-name = cpvdd-supply;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
Several of these look like the same supply (especially the speaker ones)
so it seems like it'd be sensible to define a single regulator for each
of them. Not much practical difference but it might be neater.
+
+ dbvdd:fixed-regulator@2 {
+ compatible = regulator-fixed;
+ regulator-name = dbvdd-supply;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ regulator-always-on;
+ };
+
+ spkvdd1:fixed-regulator@3 {
+ compatible = regulator-fixed;
+ regulator-name = spkvdd1-supply;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ regulator-always-on;
+ };
+
+ spkvdd2:fixed-regulator@4 {
+ compatible = regulator-fixed;
+ regulator-name = spkvdd2-supply;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ regulator-always-on;
+ };
+
i2c@12C7 {
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 2;
@@ -47,8 +87,17 @@
};
wm8994: wm8994@1a {
- compatible = wlf,wm8994;
- reg = 0x1a;
+ compatible = wlf,wm8994;
+ reg = 0x1a;
+
+ gpio-controller;
+ #gpio-cells = 2;
+
+ AVDD2-supply = avdd2;
+ CPVDD-supply = cpvdd;
+ DBVDD-supply = dbvdd;
+ SPKVDD1-supply = spkvdd1;
+ SPKVDD2-supply = spkvdd2;
};
};
--
1.7.4.4
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Description: Digital signature
Re: [PATCH] usb: phy: samsung: Add support for EXYNOS4210
On Tue, May 28, 2013 at 06:04:07PM +0900, Jingoo Han wrote:
@@ -165,6 +174,18 @@ static void samsung_usb2phy_enable(struct samsung_usbphy
*sphy)
u32 phyclk;
u32 rstcon;
+ switch (sphy-drv_data-cpu_type) {
+ case TYPE_EXYNOS4210:
+ atomic_inc(sphy-phy_usage);
please switch over to the generic reference counting which I have
pending in my testing branch. It'll be available for v3.11 merge window.
--
balbi
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Description: Digital signature
Re: [PATCH] ARM: EXYNOS: Update defconfig for Arndale and Origen board
On Tue, May 14, 2013 at 08:37:53AM +0530, Tushar Behera wrote: On 05/14/2013 05:36 AM, Kevin Hilman wrote: Tushar Behera tushar.beh...@linaro.org writes: It updates following drivers for EXYNOS based DT platform. * S5M8767 driver * MAX8997 driver * MMC SDHCI driver Signed-off-by: Tushar Behera tushar.beh...@linaro.org I tested this using v3.10-rc1 on Arndale, but still don't get any support for the wired network. Do you know if this is a Kconfig issue, or a missing driver? I suspect it may be related to the various unable to find transceiver of type USB2 PHY messages I'm seeing? Yes, right. The missing USB-PHY components are one of the issues (they were there in linux-next when I last tested). Also, on Arndale board, we need to reset the USB hub during EHCI initialization (a couple of those patches are required, which I am not sure if we would be able to upstream). I am collecting a minimal set of patches that would enable USB and wired network on Arndale with 3.10-rc1 kernel. Once done, I will let you know. Hi Tushar, Got an update on what these patches are yet? -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: EXYNOS: Update defconfig for Arndale and Origen board
Hi, On Thu, May 9, 2013 at 11:49 PM, Tushar Behera tushar.beh...@linaro.org wrote: It updates following drivers for EXYNOS based DT platform. * S5M8767 driver * MAX8997 driver * MMC SDHCI driver Signed-off-by: Tushar Behera tushar.beh...@linaro.org I didn't see any movement from Kukjin on this, so I have (tentatively) applied this together with my base defconfig update to the fixes branch of arm-soc. I'll take it out in case he protests, but it's very useful since the simplefb driver has landed in 3.10-rc3. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: EXYNOS: Update defconfig for Arndale and Origen board
Olof Johansson wrote: Hi, On Thu, May 9, 2013 at 11:49 PM, Tushar Behera tushar.beh...@linaro.org wrote: It updates following drivers for EXYNOS based DT platform. * S5M8767 driver * MAX8997 driver * MMC SDHCI driver Signed-off-by: Tushar Behera tushar.beh...@linaro.org I didn't see any movement from Kukjin on this, so I have (tentatively) applied this together with my base defconfig update to the fixes branch of arm-soc. I'll take it out in case he protests, but it's very useful since the simplefb driver has landed in 3.10-rc3. I'm fine on this, so please go ahead with my ack if you want, Acked-by: Kukjin Kim kgene@samsung.com Thanks for your gentle reminder :-) - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Booting mainline kernels on Samsung ARM-based Chromebooks
Just a quick note that as of v3.10-rc4 (or -rc3 + arm-soc fixes branch) there should be enough pieces in mainline to boot a Chromebook to a useful state without out-of-tree patches. For more info, see: https://plus.google.com/u/0/109993695638569781190/posts/bQpzEGG15G8 There's plenty of stuff not working yet, but it'll come up with simplefb, keyboard, trackpad and USB 2.0 for now. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: Booting mainline kernels on Samsung ARM-based Chromebooks
Olof Johansson wrote: Just a quick note that as of v3.10-rc4 (or -rc3 + arm-soc fixes branch) there should be enough pieces in mainline to boot a Chromebook to a useful state without out-of-tree patches. Sounds great. Yeah, we wanted to support mass product without any other patches and its first product using Samsung SoC is Samsung ARM-based Chromebook. Thanks for many guys' effort and time. - Kukjin For more info, see: https://plus.google.com/u/0/109993695638569781190/posts/bQpzEGG15G8 There's plenty of stuff not working yet, but it'll come up with simplefb, keyboard, trackpad and USB 2.0 for now. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Booting mainline kernels on Samsung ARM-based Chromebooks
On Wednesday, May 29, 2013 9:35 AM, Olof Johansson wrote: Just a quick note that as of v3.10-rc4 (or -rc3 + arm-soc fixes branch) there should be enough pieces in mainline to boot a Chromebook to a useful state without out-of-tree patches. For more info, see: https://plus.google.com/u/0/109993695638569781190/posts/bQpzEGG15G8 Oh, great! As Kukjin Kim mentioned, we have wanted to support mass product without out-of-tree patches. Also, I have gone the extra mile to do this. There's plenty of stuff not working yet, but it'll come up with simplefb, keyboard, trackpad and USB 2.0 for now. I will look at the patches about simplefb, USB 2.0, and so on. If possible, I will review it. Good luck. Best regards, Jingoo Han -Olof -- -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: EXYNOS: Update defconfig for Arndale and Origen board
On 05/29/2013 04:47 AM, Olof Johansson wrote: On Tue, May 14, 2013 at 08:37:53AM +0530, Tushar Behera wrote: On 05/14/2013 05:36 AM, Kevin Hilman wrote: Tushar Behera tushar.beh...@linaro.org writes: It updates following drivers for EXYNOS based DT platform. * S5M8767 driver * MAX8997 driver * MMC SDHCI driver Signed-off-by: Tushar Behera tushar.beh...@linaro.org I tested this using v3.10-rc1 on Arndale, but still don't get any support for the wired network. Do you know if this is a Kconfig issue, or a missing driver? I suspect it may be related to the various unable to find transceiver of type USB2 PHY messages I'm seeing? Yes, right. The missing USB-PHY components are one of the issues (they were there in linux-next when I last tested). Also, on Arndale board, we need to reset the USB hub during EHCI initialization (a couple of those patches are required, which I am not sure if we would be able to upstream). I am collecting a minimal set of patches that would enable USB and wired network on Arndale with 3.10-rc1 kernel. Once done, I will let you know. Hi Tushar, Got an update on what these patches are yet? -Olof The patches are at [1]. There are a total of 6 patches on top of v3.10-rc3. 3 of them (a, b, d) are queued for 3.10-rc4 and another patch (c) is just a defconfig hack to get Arndale booting. Remaining 2 patches (e, f) are required to reset the hub during EHCI initialization. a. ARM: exynos: defconfig update b. ARM: EXYNOS: Update defconfig for Arndale and Origen board c. [TEMP] ARM: EXYNOS: Set low-level UART port to 2 d. ARM: dts: Enabling samsung-usb2phy driver for exynos5250 e. usb: ehci-s5p: add the HSIC port initialization f. ARM: dts: Add USB gpio entries for Arndale board I am not sure whether such kind of board-specific patches (e, f) are appreciated in the drivers. But that is all we need to get USB and Ethernet to work on v3.10-rc3 kernel. [1] git://git.linaro.org/landing-teams/working/samsung/kernel.git (upstream/arndale-usb) -- Tushar Behera -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: EXYNOS: Update defconfig for Arndale and Origen board
On Tue, May 28, 2013 at 8:59 PM, Tushar Behera tushar.beh...@linaro.org wrote: The patches are at [1]. FWIW, a cgit/gitweb link is easier to follow when you're reading an email. Anyway, found the patches. There are a total of 6 patches on top of v3.10-rc3. 3 of them (a, b, d) are queued for 3.10-rc4 and another patch (c) is just a defconfig hack to get Arndale booting. Remaining 2 patches (e, f) are required to reset the hub during EHCI initialization. Huh, I thought you said that (c) wasn't needed when I posted the defconfig update. It'd be nice to see the code fixed to handle this case instead of Linaro carrying a patch like this though. I.e. make it able to deselect the uart, or make it tied to DEBUG_LL like on other platforms instead of having a separate config for this. a. ARM: exynos: defconfig update b. ARM: EXYNOS: Update defconfig for Arndale and Origen board c. [TEMP] ARM: EXYNOS: Set low-level UART port to 2 d. ARM: dts: Enabling samsung-usb2phy driver for exynos5250 e. usb: ehci-s5p: add the HSIC port initialization f. ARM: dts: Add USB gpio entries for Arndale board I am not sure whether such kind of board-specific patches (e, f) are appreciated in the drivers. But that is all we need to get USB and Ethernet to work on v3.10-rc3 kernel. I've come across a similar situation with wifi reset sequence on the chromebook. On the product kernel we added some code to the board file to deal with it, but if we keep doing that things will grow out of hand. I don't know if it'll be unpopular, but I think it's time to start a drivers/platform/arm for these kind of things, and have those drivers probe on the system compatible value, similar to how x86 does it (with DMI tables). At least that's my plan for approaching the wifi reset/power-on sequence on the Chromebook. I hope to have patches in not all that long... Likewise, the hub reset/enable code doesn't have to go with the USB driver, right? I.e. if you cycle reset/enable on the hub after the host and phy is configured, you'll still have a working setup? -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
