[PATCH V6 00/30] thermal: exynos: Re-structure driver and add support for exynos5440

2013-06-17 Thread Amit Daniel Kachhap
Hi Rui/Eduardo,

Submitting V6 version with all comments fixed. It is good if these patches gets
merged in this merge window. If any comments please let me know.

Thanks,
Amit Daniel

Changes in V6:
* Uses ARCH_HAS_BANDGAP config flag which is merged now in arm tree.
(http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7758/1).
* In this version patches 1, 2, 3, 4 and 30 are modified. Others are same as V5.
* Added acked by from Jonghwa Lee.
* Rebased against Thermal Maintainer next tree.

Changes in V5:
* Most of the changes in this version is as per suggestion from Jonghwa Lee. I
 have retained one to one mapping of platform data with TMU instances as the
 TMU's are different devices. In exynos5440 soc there is some register
 sharing across multiple TMU's but in exynos5420 there is no register between
 multiple TMU's, so the current implementation is useful to support both of the
 above.
 This patch uses localized ARCH_HAS_TMU Kconfig option and is a temporary 
solution
 until a more generic macro ARCH_HAS_BANDGAP is introduced as per discussion in
 the link https://patchwork.kernel.org/patch/2659001/.
* trip type is passed as platform data.
* HW trip is allowed only for maximum level.
* Platform data structure is now abstracted inside 1 more structure to support
  multiple sensor TMU data. 

Changes in V4:
 Almost all the changes in this version is as per suggestion from Eduardo.The
 major ones are listed below,
* Added kconfig symbol ARCH_HAS_TMU which needs to be enabled by platform. With
  this change existing symbol EXYNOS_TMU_DATA is not needed.
* Movement of freq_clip_table from exynos_tmu.h to exynos_thermal_common.h is
  explained in the commit logs.
* Wrote all register description documentation.
* Split 5440 TMU support patch into controller change, configuration data and
  feature addition patches.
* Remove all *LINUX_* in the header files.
* Still regulator enable is kept optional but a TODO: comment is added to fix
  it later.

Changes in V3:
* Added proper dependency of different exynos thermal Kconfig symbols. 
Basically 3
 Kconfig can be enabled now and corresponds to tmu driver. exynos common part
 and exynos configuration data. This issue was raised by Rui Zhang.

Changes in V2:
* Separated SOC data from TMU driver. This is as per suggestion from Eduardo.
* Merged the new file created for exynos5440 TMU controller with the existing
 TMU controller code.
* Removed the DT parsing code as now the SOC specific data are cleanly put
 inside the data specific file.
* Even the register definations/bitfields are treated as data as there is
 some variation across SOC's.

This patchset adds TMU(Thermal management Unit) driver support for
exynos5440 platform. There are 3 instances of the TMU controllers so
necessary cleanup/re-structure is done to handle multiple thermal zone.

Patch (exynos4: Add documentation for Exynos SoC thermal bindings) from
Lukasz Majewski is already posted to mainline. Adding it here for completeness.
(http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg17817.html)

Patch (thermal: exynos: Support thermal tripping ) from Jonghwan Choi is
added here with some changes.
(https://patchwork.kernel.org/patch/1668371/)

Patch (thermal: exynos: Support for TMU regulator defined at device tree)
is a repost of my earlier 
patch(https://patchwork-mail1.kernel.org/patch/2510771/) 
and adds regulator support.

Patch (ARM: dts: Add device tree node for exynos5440 TMU controller) and
patch (arm: exynos: enable ARCH_HAS_TMU) can be merged through exynos platform
maintainer as this can cause merge conflict.

All these patches are based on thermal maintainers git tree,
git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git next.

Amit Daniel Kachhap (29):
  thermal: exynos: Moving exynos thermal files into samsung directory
  thermal: exynos: Use ARCH_HAS_BANDGAP config to know the supported
soc's
  thermal: exynos: Remove un-necessary CPU_THERMAL dependency
  thermal: exynos: Bifurcate exynos thermal common and tmu controller
code
  thermal: exynos: Rename exynos_thermal.c to exynos_tmu.c
  thermal: exynos: Move exynos_thermal.h from include/* to driver/*
folder
  thermal: exynos: Bifurcate exynos tmu driver and configuration data
  thermal: exynos: Add missing definations and code cleanup
  thermal: exynos: Add extra entries in the tmu platform data
  thermal: exynos: Move register definitions from driver to data file
  thermal: exynos: Support thermal tripping
  thermal: exynos: Fix to clear only the generated interrupts
  thermal: exynos: Add support for instance based register/unregister
  thermal: exynos: Modify private_data to appropriate name driver_data
  thermal: exynos: Return success even if no cooling data supplied
  thermal: exynos: Make the zone handling use trip information
  thermal: exynos: Remove non DT based support
  thermal: exynos: Add support to handle many instances of TMU
  thermal: exynos: Add TMU features to check 

[PATCH V6 16/30] thermal: exynos: Make the zone handling use trip information

2013-06-17 Thread Amit Daniel Kachhap
This code simplifies the zone handling to use the trip information passed
by the TMU driver and not the hardcoded macros. This also helps in adding
more zone support.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.c |   61 +--
 drivers/thermal/samsung/exynos_thermal_common.h |3 +-
 drivers/thermal/samsung/exynos_tmu.c|5 ++-
 3 files changed, 40 insertions(+), 29 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.c 
b/drivers/thermal/samsung/exynos_thermal_common.c
index 86d39aa..2873ca3 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -78,17 +78,22 @@ static int exynos_set_mode(struct thermal_zone_device 
*thermal,
 static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
 enum thermal_trip_type *type)
 {
-   switch (GET_ZONE(trip)) {
-   case MONITOR_ZONE:
-   case WARN_ZONE:
-   *type = THERMAL_TRIP_ACTIVE;
-   break;
-   case PANIC_ZONE:
-   *type = THERMAL_TRIP_CRITICAL;
-   break;
-   default:
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
+   int max_trip = th_zone-sensor_conf-trip_data.trip_count;
+   int trip_type;
+
+   if (trip  0 || trip = max_trip)
return -EINVAL;
-   }
+
+   trip_type = th_zone-sensor_conf-trip_data.trip_type[trip];
+
+   if (trip_type == SW_TRIP)
+   *type = THERMAL_TRIP_CRITICAL;
+   else if (trip_type == THROTTLE_ACTIVE)
+   *type = THERMAL_TRIP_ACTIVE;
+   else if (trip_type == THROTTLE_PASSIVE)
+   *type = THERMAL_TRIP_PASSIVE;
+
return 0;
 }
 
@@ -97,8 +102,9 @@ static int exynos_get_trip_temp(struct thermal_zone_device 
*thermal, int trip,
unsigned long *temp)
 {
struct exynos_thermal_zone *th_zone = thermal-devdata;
+   int max_trip = th_zone-sensor_conf-trip_data.trip_count;
 
-   if (trip  GET_TRIP(MONITOR_ZONE) || trip  GET_TRIP(PANIC_ZONE))
+   if (trip  0 || trip = max_trip)
return -EINVAL;
 
*temp = th_zone-sensor_conf-trip_data.trip_val[trip];
@@ -112,10 +118,10 @@ static int exynos_get_trip_temp(struct 
thermal_zone_device *thermal, int trip,
 static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
unsigned long *temp)
 {
-   int ret;
-   /* Panic zone */
-   ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
-   return ret;
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
+   int max_trip = th_zone-sensor_conf-trip_data.trip_count;
+   /* Get the temp of highest trip*/
+   return exynos_get_trip_temp(thermal, max_trip - 1, temp);
 }
 
 /* Bind callback functions for thermal zone */
@@ -340,19 +346,22 @@ int exynos_register_thermal(struct thermal_sensor_conf 
*sensor_conf)
return -ENOMEM;
 
th_zone-sensor_conf = sensor_conf;
-   cpumask_set_cpu(0, mask_val);
-   th_zone-cool_dev[0] = cpufreq_cooling_register(mask_val);
-   if (IS_ERR(th_zone-cool_dev[0])) {
-   pr_err(Failed to register cpufreq cooling device\n);
-   ret = -EINVAL;
-   goto err_unregister;
+   if (sensor_conf-cooling_data.freq_clip_count  0) {
+   cpumask_set_cpu(0, mask_val);
+   th_zone-cool_dev[0] = cpufreq_cooling_register(mask_val);
+   if (IS_ERR(th_zone-cool_dev[0])) {
+   pr_err(Failed to register cpufreq cooling device\n);
+   ret = -EINVAL;
+   goto err_unregister;
+   }
+   th_zone-cool_dev_size++;
}
-   th_zone-cool_dev_size++;
 
-   th_zone-therm_dev = thermal_zone_device_register(sensor_conf-name,
-   EXYNOS_ZONE_COUNT, 0, th_zone, exynos_dev_ops, NULL, 0,
-   sensor_conf-trip_data.trigger_falling ?
-   0 : IDLE_INTERVAL);
+   th_zone-therm_dev = thermal_zone_device_register(
+   sensor_conf-name, sensor_conf-trip_data.trip_count,
+   0, th_zone, exynos_dev_ops, NULL, 0,
+   sensor_conf-trip_data.trigger_falling ? 0 :
+   IDLE_INTERVAL);
 
if (IS_ERR(th_zone-therm_dev)) {
pr_err(Failed to register thermal zone device\n);
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
b/drivers/thermal/samsung/exynos_thermal_common.h
index 1e9a326..dd0077e 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -42,8 +42,6 @@
 #define GET_ZONE(trip) (trip + 2)
 #define 

[PATCH V6 20/30] thermal: exynos: use device resource management infrastructure

2013-06-17 Thread Amit Daniel Kachhap
This patch uses the device pointer stored in the configuration structure
and converts to dev_* prints and devm API's.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.c |   39 ++
 1 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.c 
b/drivers/thermal/samsung/exynos_thermal_common.c
index 2873ca3..59b47e3 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -52,7 +52,8 @@ static int exynos_set_mode(struct thermal_zone_device 
*thermal,
 {
struct exynos_thermal_zone *th_zone = thermal-devdata;
if (!th_zone) {
-   pr_notice(thermal zone not registered\n);
+   dev_err(th_zone-sensor_conf-dev,
+   thermal zone not registered\n);
return 0;
}
 
@@ -68,8 +69,9 @@ static int exynos_set_mode(struct thermal_zone_device 
*thermal,
 
th_zone-mode = mode;
thermal_zone_device_update(thermal);
-   pr_info(thermal polling set for duration=%d msec\n,
-   thermal-polling_delay);
+   dev_dbg(th_zone-sensor_conf-dev,
+   thermal polling set for duration=%d msec\n,
+   thermal-polling_delay);
return 0;
 }
 
@@ -159,7 +161,8 @@ static int exynos_bind(struct thermal_zone_device *thermal,
case WARN_ZONE:
if (thermal_zone_bind_cooling_device(thermal, i, cdev,
level, 0)) {
-   pr_err(error binding cdev inst %d\n, i);
+   dev_err(data-dev,
+   error unbinding cdev inst=%d\n, i);
ret = -EINVAL;
}
th_zone-bind = true;
@@ -204,7 +207,8 @@ static int exynos_unbind(struct thermal_zone_device 
*thermal,
case WARN_ZONE:
if (thermal_zone_unbind_cooling_device(thermal, i,
cdev)) {
-   pr_err(error unbinding cdev inst=%d\n, i);
+   dev_err(data-dev,
+   error unbinding cdev inst=%d\n, i);
ret = -EINVAL;
}
th_zone-bind = false;
@@ -224,7 +228,8 @@ static int exynos_get_temp(struct thermal_zone_device 
*thermal,
void *data;
 
if (!th_zone-sensor_conf) {
-   pr_info(Temperature sensor not initialised\n);
+   dev_err(th_zone-sensor_conf-dev,
+   Temperature sensor not initialised\n);
return -EINVAL;
}
data = th_zone-sensor_conf-driver_data;
@@ -243,7 +248,8 @@ static int exynos_set_emul_temp(struct thermal_zone_device 
*thermal,
struct exynos_thermal_zone *th_zone = thermal-devdata;
 
if (!th_zone-sensor_conf) {
-   pr_info(Temperature sensor not initialised\n);
+   dev_err(th_zone-sensor_conf-dev,
+   Temperature sensor not initialised\n);
return -EINVAL;
}
data = th_zone-sensor_conf-driver_data;
@@ -337,11 +343,13 @@ int exynos_register_thermal(struct thermal_sensor_conf 
*sensor_conf)
struct exynos_thermal_zone *th_zone;
 
if (!sensor_conf || !sensor_conf-read_temperature) {
-   pr_err(Temperature sensor not initialised\n);
+   dev_err(sensor_conf-dev,
+   Temperature sensor not initialised\n);
return -EINVAL;
}
 
-   th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
+   th_zone = devm_kzalloc(sensor_conf-dev,
+   sizeof(struct exynos_thermal_zone), GFP_KERNEL);
if (!th_zone)
return -ENOMEM;
 
@@ -350,7 +358,8 @@ int exynos_register_thermal(struct thermal_sensor_conf 
*sensor_conf)
cpumask_set_cpu(0, mask_val);
th_zone-cool_dev[0] = cpufreq_cooling_register(mask_val);
if (IS_ERR(th_zone-cool_dev[0])) {
-   pr_err(Failed to register cpufreq cooling device\n);
+   dev_err(sensor_conf-dev,
+   Failed to register cpufreq cooling device\n);
ret = -EINVAL;
goto err_unregister;
}
@@ -364,14 +373,16 @@ int exynos_register_thermal(struct thermal_sensor_conf 
*sensor_conf)
IDLE_INTERVAL);
 
if (IS_ERR(th_zone-therm_dev)) {
-   pr_err(Failed to register thermal zone device\n);
+ 

[PATCH V6 19/30] thermal: exynos: Add TMU features to check instead of using SOC type

2013-06-17 Thread Amit Daniel Kachhap
This patch adds several features supported by TMU as bitfields.
This features varies across different SOC type and comparing
the features present in the TMU is more logical than comparing
the soc itself.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_tmu.c  |   26 +++-
 drivers/thermal/samsung/exynos_tmu.h  |   31 +
 drivers/thermal/samsung/exynos_tmu_data.c |6 -
 3 files changed, 52 insertions(+), 11 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 1880c4e..877dab8 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -142,13 +142,15 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
mutex_lock(data-lock);
clk_enable(data-clk);
 
-   status = readb(data-base + reg-tmu_status);
-   if (!status) {
-   ret = -EBUSY;
-   goto out;
+   if (TMU_SUPPORTS(pdata, READY_STATUS)) {
+   status = readb(data-base + reg-tmu_status);
+   if (!status) {
+   ret = -EBUSY;
+   goto out;
+   }
}
 
-   if (data-soc == SOC_ARCH_EXYNOS)
+   if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
__raw_writel(1, data-base + reg-triminfo_ctrl);
 
/* Save trimming info in order to perform calibration */
@@ -287,7 +289,7 @@ static void exynos_tmu_control(struct platform_device 
*pdev, bool on)
pdata-trigger_enable[2]  reg-inten_rise2_shift |
pdata-trigger_enable[1]  reg-inten_rise1_shift |
pdata-trigger_enable[0]  reg-inten_rise0_shift;
-   if (pdata-threshold_falling)
+   if (TMU_SUPPORTS(pdata, FALLING_TRIP))
interrupt_en |=
interrupt_en  reg-inten_fall0_shift;
} else {
@@ -329,7 +331,7 @@ static int exynos_tmu_set_emulation(void *drv_data, 
unsigned long temp)
unsigned int val;
int ret = -EINVAL;
 
-   if (data-soc == SOC_ARCH_EXYNOS4210)
+   if (!TMU_SUPPORTS(pdata, EMULATION))
goto out;
 
if (temp  temp  MCELSIUS)
@@ -343,9 +345,13 @@ static int exynos_tmu_set_emulation(void *drv_data, 
unsigned long temp)
if (temp) {
temp /= MCELSIUS;
 
-   val = (EXYNOS_EMUL_TIME  reg-emul_time_shift) |
-   (temp_to_code(data, temp)
- reg-emul_temp_shift) | EXYNOS_EMUL_ENABLE;
+   if (TMU_SUPPORTS(pdata, EMUL_TIME)) {
+   val = ~(EXYNOS_EMUL_TIME_MASK  reg-emul_time_shift);
+   val |= (EXYNOS_EMUL_TIME  reg-emul_time_shift);
+   }
+   val = ~(EXYNOS_EMUL_DATA_MASK  reg-emul_temp_shift);
+   val |= (temp_to_code(data, temp)  reg-emul_temp_shift) |
+   EXYNOS_EMUL_ENABLE;
} else {
val = ~EXYNOS_EMUL_ENABLE;
}
diff --git a/drivers/thermal/samsung/exynos_tmu.h 
b/drivers/thermal/samsung/exynos_tmu.h
index b614407..6f55673 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -41,6 +41,34 @@ enum soc_type {
 };
 
 /**
+ * EXYNOS TMU supported features.
+ * TMU_SUPPORT_EMULATION - This features is used to set user defined
+ * temperature to the TMU controller.
+ * TMU_SUPPORT_MULTI_INST - This features denotes that the soc
+ * has many instances of TMU.
+ * TMU_SUPPORT_TRIM_RELOAD - This features shows that trimming can
+ * be reloaded.
+ * TMU_SUPPORT_FALLING_TRIP - This features shows that interrupt can
+ * be registered for falling trips also.
+ * TMU_SUPPORT_READY_STATUS - This feature tells that the TMU current
+ * state(active/idle) can be checked.
+ * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
+ * sample time.
+ * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU
+ * sensors shares some common registers.
+ * TMU_SUPPORT - macro to compare the above features with the supplied.
+ */
+#define TMU_SUPPORT_EMULATION  BIT(0)
+#define TMU_SUPPORT_MULTI_INST BIT(1)
+#define TMU_SUPPORT_TRIM_RELOADBIT(2)
+#define TMU_SUPPORT_FALLING_TRIP   BIT(3)
+#define TMU_SUPPORT_READY_STATUS   BIT(4)
+#define TMU_SUPPORT_EMUL_TIME  BIT(5)
+#define TMU_SUPPORT_SHARED_MEMORY  BIT(6)
+
+#define TMU_SUPPORTS(a, b) (a-features  TMU_SUPPORT_ ## b)
+
+/**
  * struct exynos_tmu_register - register descriptors to access registers and
  * bitfields. 

[PATCH V6 28/30] thermal: exynos: Support for TMU regulator defined at device tree

2013-06-17 Thread Amit Daniel Kachhap
TMU probe function now checks for a device tree defined regulator.
For compatibility reasons it is allowed to probe driver even without
this regulator defined.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../devicetree/bindings/thermal/exynos-thermal.txt |4 +++
 drivers/thermal/samsung/exynos_tmu.c   |   23 
 2 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt 
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index e6386ea..284f530 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -16,6 +16,9 @@
 - interrupts : Should contain interrupt for thermal system
 - clocks : The main clock for TMU device
 - clock-names : Thermal system clock name
+- vtmu-supply: This entry is optional and provides the regulator node supplying
+   voltage to TMU. If needed this entry can be placed inside
+   board/platform specific dts file.
 
 Example 1):
 
@@ -27,6 +30,7 @@ Example 1):
clocks = clock 383;
clock-names = tmu_apbif;
status = disabled;
+   vtmu-supply = tmu_regulator_node;
};
 
 Example 2):
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 7a259f4..441efd5 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -29,6 +29,7 @@
 #include linux/of_address.h
 #include linux/of_irq.h
 #include linux/platform_device.h
+#include linux/regulator/consumer.h
 
 #include exynos_thermal_common.h
 #include exynos_tmu.h
@@ -48,6 +49,7 @@
  * @clk: pointer to the clock structure.
  * @temp_error1: fused value of the first point trim.
  * @temp_error2: fused value of the second point trim.
+ * @regulator: pointer to the TMU regulator structure.
  * @reg_conf: pointer to structure to register with core thermal.
  */
 struct exynos_tmu_data {
@@ -61,6 +63,7 @@ struct exynos_tmu_data {
struct mutex lock;
struct clk *clk;
u8 temp_error1, temp_error2;
+   struct regulator *regulator;
struct thermal_sensor_conf *reg_conf;
 };
 
@@ -510,10 +513,27 @@ static int exynos_map_dt_data(struct platform_device 
*pdev)
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata;
struct resource res;
+   int ret;
 
if (!data)
return -ENODEV;
 
+   /*
+* Try enabling the regulator if found
+* TODO: Add regulator as an SOC feature, so that regulator enable
+* is a compulsory call.
+*/
+   data-regulator = devm_regulator_get(pdev-dev, vtmu);
+   if (!IS_ERR(data-regulator)) {
+   ret = regulator_enable(data-regulator);
+   if (ret) {
+   dev_err(pdev-dev, failed to enable vtmu\n);
+   return ret;
+   }
+   } else {
+   dev_info(pdev-dev, Regulator node (vtmu) not found\n);
+   }
+
data-id = of_alias_get_id(pdev-dev.of_node, tmuctrl);
if (data-id  0)
data-id = 0;
@@ -680,6 +700,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
 
clk_unprepare(data-clk);
 
+   if (!IS_ERR(data-regulator))
+   regulator_disable(data-regulator);
+
return 0;
 }
 
-- 
1.7.1

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[PATCH V6 29/30] ARM: dts: Add device tree node for exynos5440 TMU controller

2013-06-17 Thread Amit Daniel Kachhap
This patch adds device node for TMU controller. There are 3
instances of the controllers so 3 nodes are created.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/boot/dts/exynos5440.dtsi |   30 ++
 1 files changed, 30 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5440.dtsi 
b/arch/arm/boot/dts/exynos5440.dtsi
index f6b1c89..716e90c 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -16,6 +16,12 @@
 
interrupt-parent = gic;
 
+   aliases {
+   tmuctrl0 = tmuctrl_0;
+   tmuctrl1 = tmuctrl_1;
+   tmuctrl2 = tmuctrl_2;
+   };
+
clock: clock-controller@0x16 {
compatible = samsung,exynos5440-clock;
reg = 0x16 0x1000;
@@ -216,4 +222,28 @@
clock-names = rtc;
status = disabled;
};
+
+   tmuctrl_0: tmuctrl@160118 {
+   compatible = samsung,exynos5440-tmu;
+   reg = 0x160118 0x230, 0x160368 0x10;
+   interrupts = 0 58 0;
+   clocks = clock 21;
+   clock-names = tmu_apbif;
+   };
+
+   tmuctrl_1: tmuctrl@16011C {
+   compatible = samsung,exynos5440-tmu;
+   reg = 0x16011C 0x230, 0x160368 0x10;
+   interrupts = 0 58 0;
+   clocks = clock 21;
+   clock-names = tmu_apbif;
+   };
+
+   tmuctrl_2: tmuctrl@160120 {
+   compatible = samsung,exynos5440-tmu;
+   reg = 0x160120 0x230, 0x160368 0x10;
+   interrupts = 0 58 0;
+   clocks = clock 21;
+   clock-names = tmu_apbif;
+   };
 };
-- 
1.7.1

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[PATCH V6 30/30] arm: exynos: enable ARCH_HAS_BANDGAP

2013-06-17 Thread Amit Daniel Kachhap
This patch enables ARCH_HAS_BANDGAP config for exynos4210, 4212, 4412, 5250
and 5440 SOC. This config symbol is recently added to allow the platforms
to enable bandgap based temperature sensor.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Kconfig |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index d19edff..d3cb5c7 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -33,6 +33,7 @@ config CPU_EXYNOS4210
bool SAMSUNG EXYNOS4210
default y
depends on ARCH_EXYNOS4
+   select ARCH_HAS_BANDGAP
select ARM_CPU_SUSPEND if PM
select PM_GENERIC_DOMAINS
select S5P_PM if PM
@@ -45,6 +46,7 @@ config SOC_EXYNOS4212
bool SAMSUNG EXYNOS4212
default y
depends on ARCH_EXYNOS4
+   select ARCH_HAS_BANDGAP
select S5P_PM if PM
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
@@ -55,6 +57,7 @@ config SOC_EXYNOS4412
bool SAMSUNG EXYNOS4412
default y
depends on ARCH_EXYNOS4
+   select ARCH_HAS_BANDGAP
select SAMSUNG_DMADEV
help
  Enable EXYNOS4412 SoC support
@@ -63,6 +66,7 @@ config SOC_EXYNOS5250
bool SAMSUNG EXYNOS5250
default y
depends on ARCH_EXYNOS5
+   select ARCH_HAS_BANDGAP
select PM_GENERIC_DOMAINS if PM
select S5P_PM if PM
select S5P_SLEEP if PM
@@ -76,6 +80,7 @@ config SOC_EXYNOS5440
default y
depends on ARCH_EXYNOS5
select ARCH_HAS_OPP
+   select ARCH_HAS_BANDGAP
select ARM_ARCH_TIMER
select AUTO_ZRELADDR
select PINCTRL
-- 
1.7.1

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[PATCH V6 25/30] thermal: exynos: Fix to set the second point correction value

2013-06-17 Thread Amit Daniel Kachhap
This patch sets the second point trimming value according to the platform
data if the register value is 0.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_tmu.c |   13 +
 1 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index a4dbc84..af0e6ca 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -180,10 +180,15 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
data-temp_error2 = ((trim_info  reg-triminfo_85_shift) 
EXYNOS_TMU_TEMP_MASK);
 
-   if ((pdata-min_efuse_value  data-temp_error1) ||
-   (data-temp_error1  pdata-max_efuse_value) ||
-   (data-temp_error2 != 0))
-   data-temp_error1 = pdata-efuse_value;
+   if (!data-temp_error1 ||
+   (pdata-min_efuse_value  data-temp_error1) ||
+   (data-temp_error1  pdata-max_efuse_value))
+   data-temp_error1 = pdata-efuse_value  EXYNOS_TMU_TEMP_MASK;
+
+   if (!data-temp_error2)
+   data-temp_error2 =
+   (pdata-efuse_value  reg-triminfo_85_shift) 
+   EXYNOS_TMU_TEMP_MASK;
 
if (pdata-max_trigger_level  MAX_THRESHOLD_LEVS) {
dev_err(pdev-dev, Invalid max trigger level\n);
-- 
1.7.1

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[PATCH V6 27/30] Documentation: thermal: Explain the exynos thermal driver model

2013-06-17 Thread Amit Daniel Kachhap
This patch updates the documentation to explain the driver model
and file layout.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 Documentation/thermal/exynos_thermal |   43 ++---
 1 files changed, 34 insertions(+), 9 deletions(-)

diff --git a/Documentation/thermal/exynos_thermal 
b/Documentation/thermal/exynos_thermal
index 2b46f67..9010c44 100644
--- a/Documentation/thermal/exynos_thermal
+++ b/Documentation/thermal/exynos_thermal
@@ -1,17 +1,17 @@
-Kernel driver exynos4_tmu
+Kernel driver exynos_tmu
 =
 
 Supported chips:
-* ARM SAMSUNG EXYNOS4 series of SoC
-  Prefix: 'exynos4-tmu'
+* ARM SAMSUNG EXYNOS4, EXYNOS5 series of SoC
   Datasheet: Not publicly available
 
 Authors: Donggeun Kim dg77@samsung.com
+Authors: Amit Daniel amit.dan...@samsung.com
 
-Description

+TMU controller Description:
+---
 
-This driver allows to read temperature inside SAMSUNG EXYNOS4 series of SoC.
+This driver allows to read temperature inside SAMSUNG EXYNOS4/5 series of SoC.
 
 The chip only exposes the measured 8-bit temperature code value
 through a register.
@@ -34,9 +34,9 @@ The three equations are:
   TI2: Trimming info for 85 degree Celsius (stored at TRIMINFO register)
Temperature code measured at 85 degree Celsius which is unchanged
 
-TMU(Thermal Management Unit) in EXYNOS4 generates interrupt
+TMU(Thermal Management Unit) in EXYNOS4/5 generates interrupt
 when temperature exceeds pre-defined levels.
-The maximum number of configurable threshold is four.
+The maximum number of configurable threshold is five.
 The threshold levels are defined as follows:
   Level_0: current temperature  trigger_level_0 + threshold
   Level_1: current temperature  trigger_level_1 + threshold
@@ -47,6 +47,31 @@ The threshold levels are defined as follows:
   through the corresponding registers.
 
 When an interrupt occurs, this driver notify kernel thermal framework
-with the function exynos4_report_trigger.
+with the function exynos_report_trigger.
 Although an interrupt condition for level_0 can be set,
 it can be used to synchronize the cooling action.
+
+TMU driver description:
+---
+
+The exynos thermal driver is structured as,
+
+   Kernel Core thermal framework
+   (thermal_core.c, step_wise.c, cpu_cooling.c)
+   ^
+   |
+   |
+TMU configuration data --- TMU Driver  -- Exynos Core thermal 
wrapper
+(exynos_tmu_data.c)  (exynos_tmu.c)   (exynos_thermal_common.c)
+(exynos_tmu_data.h)  (exynos_tmu.h)   (exynos_thermal_common.h)
+
+a) TMU configuration data: This consist of TMU register offsets/bitfields
+   described through structure exynos_tmu_registers. Also several
+   other platform data (struct exynos_tmu_platform_data) members
+   are used to configure the TMU.
+b) TMU driver: This component initialises the TMU controller and sets different
+   thresholds. It invokes core thermal implementation with the call
+   exynos_report_trigger.
+c) Exynos Core thermal wrapper: This provides 3 wrapper function to use the
+   Kernel core thermal framework. They are 
exynos_unregister_thermal,
+   exynos_register_thermal and exynos_report_trigger.
-- 
1.7.1

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[PATCH V6 24/30] thermal: exynos: Add thermal configuration data for exynos5440 TMU sensor

2013-06-17 Thread Amit Daniel Kachhap
This patch adds configuration data for exynos5440 soc. Also register
definations for the controller are added.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_tmu.c  |4 ++
 drivers/thermal/samsung/exynos_tmu_data.c |   71 +
 drivers/thermal/samsung/exynos_tmu_data.h |7 +++
 3 files changed, 82 insertions(+), 0 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index db4035d..a4dbc84 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -455,6 +455,10 @@ static const struct of_device_id exynos_tmu_match[] = {
.compatible = samsung,exynos5250-tmu,
.data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
+   {
+   .compatible = samsung,exynos5440-tmu,
+   .data = (void *)EXYNOS5440_TMU_DRV_DATA,
+   },
{},
 };
 MODULE_DEVICE_TABLE(of, exynos_tmu_match);
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c 
b/drivers/thermal/samsung/exynos_tmu_data.c
index 694557e..b34e726 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -175,3 +175,74 @@ struct exynos_tmu_init_data const 
exynos5250_default_tmu_data = {
.tmu_count = 1,
 };
 #endif
+
+#if defined(CONFIG_SOC_EXYNOS5440)
+static const struct exynos_tmu_registers exynos5440_tmu_registers = {
+   .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
+   .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
+   .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+   .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
+   .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
+   .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
+   .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
+   .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
+   .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
+   .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
+   .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+   .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
+   .tmu_status = EXYNOS5440_TMU_S0_7_STATUS,
+   .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
+   .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0,
+   .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1,
+   .threshold_th2 = EXYNOS5440_TMU_S0_7_TH2,
+   .threshold_th3_l0_shift = EXYNOS5440_TMU_TH_RISE4_SHIFT,
+   .tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN,
+   .inten_rise_mask = EXYNOS5440_TMU_RISE_INT_MASK,
+   .inten_rise_shift = EXYNOS5440_TMU_RISE_INT_SHIFT,
+   .inten_fall_mask = EXYNOS5440_TMU_FALL_INT_MASK,
+   .inten_fall_shift = EXYNOS5440_TMU_FALL_INT_SHIFT,
+   .inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT,
+   .inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT,
+   .inten_rise2_shift = EXYNOS5440_TMU_INTEN_RISE2_SHIFT,
+   .inten_rise3_shift = EXYNOS5440_TMU_INTEN_RISE3_SHIFT,
+   .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
+   .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
+   .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
+   .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
+   .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
+   .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
+   .tmu_pmin = EXYNOS5440_TMU_PMIN,
+};
+
+#define EXYNOS5440_TMU_DATA \
+   .trigger_levels[0] = 100, \
+   .trigger_levels[4] = 105, \
+   .trigger_enable[0] = 1, \
+   .trigger_type[0] = SW_TRIP, \
+   .trigger_type[4] = HW_TRIP, \
+   .max_trigger_level = 5, \
+   .gain = 5, \
+   .reference_voltage = 16, \
+   .noise_cancel_mode = 4, \
+   .cal_type = TYPE_ONE_POINT_TRIMMING, \
+   .cal_mode = 0, \
+   .efuse_value = 0x5b2d, \
+   .min_efuse_value = 16, \
+   .max_efuse_value = 76, \
+   .first_point_trim = 25, \
+   .second_point_trim = 70, \
+   .default_temp_offset = 25, \
+   .type = SOC_ARCH_EXYNOS5440, \
+   .registers = exynos5440_tmu_registers, \
+   .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
+   TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
+
+struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
+   .tmu_data = {
+   { EXYNOS5440_TMU_DATA } ,
+   { EXYNOS5440_TMU_DATA } ,
+   { EXYNOS5440_TMU_DATA } ,
+   },
+   .tmu_count = 3,
+};
+#endif
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h 
b/drivers/thermal/samsung/exynos_tmu_data.h
index ad263e9..43ce5fb 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -143,4 +143,11 @@ extern struct exynos_tmu_init_data const 
exynos5250_default_tmu_data;
 #define EXYNOS5250_TMU_DRV_DATA (NULL)
 #endif
 
+#if defined(CONFIG_SOC_EXYNOS5440)
+extern struct 

[PATCH V6 26/30] thermal: exynos: Add hardware mode thermal calibration support

2013-06-17 Thread Amit Daniel Kachhap
This patch adds support for h/w mode calibration in the TMU controller.
soc's like 5440 support this features.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_tmu.c  |   15 +++
 drivers/thermal/samsung/exynos_tmu.h  |6 ++
 drivers/thermal/samsung/exynos_tmu_data.c |2 ++
 drivers/thermal/samsung/exynos_tmu_data.h |2 ++
 4 files changed, 25 insertions(+), 0 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index af0e6ca..7a259f4 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -73,6 +73,9 @@ static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
struct exynos_tmu_platform_data *pdata = data-pdata;
int temp_code;
 
+   if (pdata-cal_mode == HW_MODE)
+   return temp;
+
if (data-soc == SOC_ARCH_EXYNOS4210)
/* temp should range between 25 and 125 */
if (temp  25 || temp  125) {
@@ -107,6 +110,9 @@ static int code_to_temp(struct exynos_tmu_data *data, u8 
temp_code)
struct exynos_tmu_platform_data *pdata = data-pdata;
int temp;
 
+   if (pdata-cal_mode == HW_MODE)
+   return temp_code;
+
if (data-soc == SOC_ARCH_EXYNOS4210)
/* temp_code should range between 75 and 175 */
if (temp_code  75 || temp_code  175) {
@@ -155,6 +161,9 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
__raw_writel(1, data-base + reg-triminfo_ctrl);
 
+   if (pdata-cal_mode == HW_MODE)
+   goto skip_calib_data;
+
/* Save trimming info in order to perform calibration */
if (data-soc == SOC_ARCH_EXYNOS5440) {
/*
@@ -190,6 +199,7 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
(pdata-efuse_value  reg-triminfo_85_shift) 
EXYNOS_TMU_TEMP_MASK;
 
+skip_calib_data:
if (pdata-max_trigger_level  MAX_THRESHOLD_LEVS) {
dev_err(pdev-dev, Invalid max trigger level\n);
goto out;
@@ -319,6 +329,11 @@ static void exynos_tmu_control(struct platform_device 
*pdev, bool on)
con |= (pdata-noise_cancel_mode  reg-therm_trip_mode_shift);
}
 
+   if (pdata-cal_mode == HW_MODE) {
+   con = ~(reg-calib_mode_mask  reg-calib_mode_shift);
+   con |= pdata-cal_type  reg-calib_mode_shift;
+   }
+
if (on) {
con |= (1  reg-core_en_shift);
interrupt_en =
diff --git a/drivers/thermal/samsung/exynos_tmu.h 
b/drivers/thermal/samsung/exynos_tmu.h
index 73aaed7..abfa1eb 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -88,6 +88,10 @@ enum soc_type {
  * @buf_slope_sel_shift: shift bits of amplifier gain value in tmu_ctrl
register.
  * @buf_slope_sel_mask: mask bits of amplifier gain value in tmu_ctrl register.
+ * @calib_mode_shift: shift bits of calibration mode value in tmu_ctrl
+   register.
+ * @calib_mode_mask: mask bits of calibration mode value in tmu_ctrl
+   register.
  * @therm_trip_tq_en_shift: shift bits of thermal trip enable by TQ pin in
tmu_ctrl register.
  * @core_en_shift: shift bits of TMU core enable bit in tmu_ctrl register.
@@ -149,6 +153,8 @@ struct exynos_tmu_registers {
u32 therm_trip_en_shift;
u32 buf_slope_sel_shift;
u32 buf_slope_sel_mask;
+   u32 calib_mode_shift;
+   u32 calib_mode_mask;
u32 therm_trip_tq_en_shift;
u32 core_en_shift;
 
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c 
b/drivers/thermal/samsung/exynos_tmu_data.c
index b34e726..47c5d6b 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -189,6 +189,8 @@ static const struct exynos_tmu_registers 
exynos5440_tmu_registers = {
.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
.buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
.buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+   .calib_mode_shift = EXYNOS_TMU_CALIB_MODE_SHIFT,
+   .calib_mode_mask = EXYNOS_TMU_CALIB_MODE_MASK,
.core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
.tmu_status = EXYNOS5440_TMU_S0_7_STATUS,
.tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h 
b/drivers/thermal/samsung/exynos_tmu_data.h
index 43ce5fb..dc7feb5 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -75,6 +75,8 @@
 #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
 #define EXYNOS_TMU_TRIP_MODE_MASK  0x7
 #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
+#define 

[PATCH V6 23/30] thermal: exynos: Add driver support for exynos5440 TMU sensor

2013-06-17 Thread Amit Daniel Kachhap
This patch modifies TMU controller to add changes needed to work with
exynos5440 platform. This sensor registers 3 instance of the tmu controller
with the thermal zone and hence reports 3 temperature output. This controller
supports upto five trip points. For critical threshold the driver uses the
core driver thermal framework for shutdown.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Jungseok Lee jays@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../devicetree/bindings/thermal/exynos-thermal.txt |   24 -
 drivers/thermal/samsung/exynos_thermal_common.h|2 +-
 drivers/thermal/samsung/exynos_tmu.c   |   54 +---
 drivers/thermal/samsung/exynos_tmu.h   |6 ++
 drivers/thermal/samsung/exynos_tmu_data.h  |   36 +
 5 files changed, 112 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt 
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 0ea33f7..e6386ea 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -6,6 +6,7 @@
   samsung,exynos4412-tmu
   samsung,exynos4210-tmu
   samsung,exynos5250-tmu
+  samsung,exynos5440-tmu
 - interrupt-parent : The phandle for the interrupt controller
 - reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
@@ -16,7 +17,7 @@
 - clocks : The main clock for TMU device
 - clock-names : Thermal system clock name
 
-Example:
+Example 1):
 
tmu@100C {
compatible = samsung,exynos4412-tmu;
@@ -27,3 +28,24 @@ Example:
clock-names = tmu_apbif;
status = disabled;
};
+
+Example 2):
+
+   tmuctrl_0: tmuctrl@160118 {
+   compatible = samsung,exynos5440-tmu;
+   reg = 0x160118 0x230, 0x160368 0x10;
+   interrupts = 0 58 0;
+   clocks = clock 21;
+   clock-names = tmu_apbif;
+   };
+
+Note: For multi-instance tmu each instance should have an alias correctly
+numbered in aliases node.
+
+Example:
+
+aliases {
+   tmuctrl0 = tmuctrl_0;
+   tmuctrl1 = tmuctrl_1;
+   tmuctrl2 = tmuctrl_2;
+};
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
b/drivers/thermal/samsung/exynos_thermal_common.h
index 0c189d6..7d7c29a 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -27,7 +27,7 @@
 #define SENSOR_NAME_LEN16
 #define MAX_TRIP_COUNT 8
 #define MAX_COOLING_DEVICE 4
-#define MAX_THRESHOLD_LEVS 4
+#define MAX_THRESHOLD_LEVS 5
 
 #define ACTIVE_INTERVAL 500
 #define IDLE_INTERVAL 1
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 150a869..db4035d 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -156,7 +156,26 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
__raw_writel(1, data-base + reg-triminfo_ctrl);
 
/* Save trimming info in order to perform calibration */
-   trim_info = readl(data-base + reg-triminfo_data);
+   if (data-soc == SOC_ARCH_EXYNOS5440) {
+   /*
+* For exynos5440 soc triminfo value is swapped between TMU0 and
+* TMU2, so the below logic is needed.
+*/
+   switch (data-id) {
+   case 0:
+   trim_info = readl(data-base +
+   EXYNOS5440_EFUSE_SWAP_OFFSET + reg-triminfo_data);
+   break;
+   case 1:
+   trim_info = readl(data-base + reg-triminfo_data);
+   break;
+   case 2:
+   trim_info = readl(data-base -
+   EXYNOS5440_EFUSE_SWAP_OFFSET + reg-triminfo_data);
+   }
+   } else {
+   trim_info = readl(data-base + reg-triminfo_data);
+   }
data-temp_error1 = trim_info  EXYNOS_TMU_TEMP_MASK;
data-temp_error2 = ((trim_info  reg-triminfo_85_shift) 
EXYNOS_TMU_TEMP_MASK);
@@ -201,7 +220,8 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
reg-threshold_th0 + i * sizeof(reg-threshold_th0));
 
writel(reg-inten_rise_mask, data-base + reg-tmu_intclear);
-   } else if (data-soc == SOC_ARCH_EXYNOS) {
+   } else if (data-soc == SOC_ARCH_EXYNOS ||
+   data-soc == SOC_ARCH_EXYNOS5440) {
/* Write temperature code for rising and falling threshold */
for (i = 0;
i  trigger_levs  i  EXYNOS_MAX_TRIGGER_PER_REG; 

[PATCH V6 22/30] thermal: exynos: Add support to access common register for multistance

2013-06-17 Thread Amit Daniel Kachhap
This patch adds support to parse one more common set of TMU register. First
set of register belongs to each instance of TMU and second set belongs to
common TMU registers.

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../devicetree/bindings/thermal/exynos-thermal.txt |6 +-
 drivers/thermal/samsung/exynos_tmu.c   |   20 
 2 files changed, 25 insertions(+), 1 deletions(-)

diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt 
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 535fd0e..0ea33f7 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -7,7 +7,11 @@
   samsung,exynos4210-tmu
   samsung,exynos5250-tmu
 - interrupt-parent : The phandle for the interrupt controller
-- reg : Address range of the thermal registers
+- reg : Address range of the thermal registers. For soc's which has multiple
+   instances of TMU and some registers are shared across all TMU's like
+   interrupt related then 2 set of register has to supplied. First set
+   belongs to each instance of TMU and second set belongs to common TMU
+   registers.
 - interrupts : Should contain interrupt for thermal system
 - clocks : The main clock for TMU device
 - clock-names : Thermal system clock name
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 877dab8..150a869 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -40,6 +40,7 @@
  * @id: identifier of the one instance of the TMU controller.
  * @pdata: pointer to the tmu platform/configuration data
  * @base: base address of the single instance of the TMU controller.
+ * @base_common: base address of the common registers of the TMU controller.
  * @irq: irq number of the TMU controller.
  * @soc: id of the SOC type.
  * @irq_work: pointer to the irq work structure.
@@ -53,6 +54,7 @@ struct exynos_tmu_data {
int id;
struct exynos_tmu_platform_data *pdata;
void __iomem *base;
+   void __iomem *base_common;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -478,6 +480,24 @@ static int exynos_map_dt_data(struct platform_device *pdev)
return -ENODEV;
}
data-pdata = pdata;
+   /*
+* Check if the TMU shares some registers and then try to map the
+* memory of common registers.
+*/
+   if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
+   return 0;
+
+   if (of_address_to_resource(pdev-dev.of_node, 1, res)) {
+   dev_err(pdev-dev, failed to get Resource 1\n);
+   return -ENODEV;
+   }
+
+   data-base_common = devm_ioremap(pdev-dev, res.start,
+   resource_size(res));
+   if (!data-base) {
+   dev_err(pdev-dev, Failed to ioremap memory\n);
+   return -ENOMEM;
+   }
 
return 0;
 }
-- 
1.7.1

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[PATCH V6 21/30] ARM: dts: thermal: exynos4: Add documentation for Exynos SoC thermal bindings

2013-06-17 Thread Amit Daniel Kachhap
From: Lukasz Majewski l.majew...@samsung.com

Proper description for Exynos4 bindings added to Documentation/devicetree/
bindings

Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../devicetree/bindings/thermal/exynos-thermal.txt |   25 
 1 files changed, 25 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/thermal/exynos-thermal.txt

diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt 
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
new file mode 100644
index 000..535fd0e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -0,0 +1,25 @@
+* Exynos Thermal Management Unit (TMU)
+
+** Required properties:
+
+- compatible : One of the following:
+  samsung,exynos4412-tmu
+  samsung,exynos4210-tmu
+  samsung,exynos5250-tmu
+- interrupt-parent : The phandle for the interrupt controller
+- reg : Address range of the thermal registers
+- interrupts : Should contain interrupt for thermal system
+- clocks : The main clock for TMU device
+- clock-names : Thermal system clock name
+
+Example:
+
+   tmu@100C {
+   compatible = samsung,exynos4412-tmu;
+   interrupt-parent = combiner;
+   reg = 0x100C 0x100;
+   interrupts = 2 4;
+   clocks = clock 383;
+   clock-names = tmu_apbif;
+   status = disabled;
+   };
-- 
1.7.1

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[PATCH V6 14/30] thermal: exynos: Modify private_data to appropriate name driver_data

2013-06-17 Thread Amit Daniel Kachhap
This patch renames member private_data to driver_data of the thermal
zone registration structure as this item stores the driver related
data and uses it to call the driver related callbacks.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.c |4 ++--
 drivers/thermal/samsung/exynos_thermal_common.h |2 +-
 drivers/thermal/samsung/exynos_tmu.c|2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.c 
b/drivers/thermal/samsung/exynos_thermal_common.c
index 2af1e3b..7064eb7 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -221,7 +221,7 @@ static int exynos_get_temp(struct thermal_zone_device 
*thermal,
pr_info(Temperature sensor not initialised\n);
return -EINVAL;
}
-   data = th_zone-sensor_conf-private_data;
+   data = th_zone-sensor_conf-driver_data;
*temp = th_zone-sensor_conf-read_temperature(data);
/* convert the temperature into millicelsius */
*temp = *temp * MCELSIUS;
@@ -240,7 +240,7 @@ static int exynos_set_emul_temp(struct thermal_zone_device 
*thermal,
pr_info(Temperature sensor not initialised\n);
return -EINVAL;
}
-   data = th_zone-sensor_conf-private_data;
+   data = th_zone-sensor_conf-driver_data;
if (th_zone-sensor_conf-write_emul_temp)
ret = th_zone-sensor_conf-write_emul_temp(data, temp);
return ret;
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
b/drivers/thermal/samsung/exynos_thermal_common.h
index a845c2d..1e9a326 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -83,7 +83,7 @@ struct thermal_sensor_conf {
int (*write_emul_temp)(void *drv_data, unsigned long temp);
struct thermal_trip_point_conf trip_data;
struct thermal_cooling_conf cooling_data;
-   void *private_data;
+   void *driver_data;
void *pzone_data;
 };
 
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index a7bba69..40e0cfd 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -504,7 +504,7 @@ static int exynos_tmu_probe(struct platform_device *pdev)
exynos_tmu_control(pdev, true);
 
/* Register the sensor with thermal management interface */
-   (exynos_sensor_conf)-private_data = data;
+   (exynos_sensor_conf)-driver_data = data;
exynos_sensor_conf.trip_data.trip_count = pdata-trigger_enable[0] +
pdata-trigger_enable[1] + pdata-trigger_enable[2]+
pdata-trigger_enable[3];
-- 
1.7.1

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[PATCH V6 15/30] thermal: exynos: Return success even if no cooling data supplied

2013-06-17 Thread Amit Daniel Kachhap
This patch removes the error return in the bind/unbind routine
as the platform may not register any cpufreq cooling data.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.c 
b/drivers/thermal/samsung/exynos_thermal_common.c
index 7064eb7..86d39aa 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -131,7 +131,7 @@ static int exynos_bind(struct thermal_zone_device *thermal,
tab_size = data-cooling_data.freq_clip_count;
 
if (tab_ptr == NULL || tab_size == 0)
-   return -EINVAL;
+   return 0;
 
/* find the cooling device registered*/
for (i = 0; i  th_zone-cool_dev_size; i++)
@@ -180,7 +180,7 @@ static int exynos_unbind(struct thermal_zone_device 
*thermal,
tab_size = data-cooling_data.freq_clip_count;
 
if (tab_size == 0)
-   return -EINVAL;
+   return 0;
 
/* find the cooling device registered*/
for (i = 0; i  th_zone-cool_dev_size; i++)
-- 
1.7.1

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[PATCH V6 13/30] thermal: exynos: Add support for instance based register/unregister

2013-06-17 Thread Amit Daniel Kachhap
This code modifies the thermal driver to have multiple thermal zone
support by replacing the global thermal zone variable with device data
member of thermal_zone_device.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.c |   36 ++
 drivers/thermal/samsung/exynos_thermal_common.h |9 +++--
 drivers/thermal/samsung/exynos_tmu.c|   15 +
 3 files changed, 36 insertions(+), 24 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.c 
b/drivers/thermal/samsung/exynos_thermal_common.c
index dd49c9f..2af1e3b 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -36,12 +36,11 @@ struct exynos_thermal_zone {
bool bind;
 };
 
-static struct exynos_thermal_zone *th_zone;
-
 /* Get mode callback functions for thermal zone */
 static int exynos_get_mode(struct thermal_zone_device *thermal,
enum thermal_device_mode *mode)
 {
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
if (th_zone)
*mode = th_zone-mode;
return 0;
@@ -51,25 +50,26 @@ static int exynos_get_mode(struct thermal_zone_device 
*thermal,
 static int exynos_set_mode(struct thermal_zone_device *thermal,
enum thermal_device_mode mode)
 {
-   if (!th_zone-therm_dev) {
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
+   if (!th_zone) {
pr_notice(thermal zone not registered\n);
return 0;
}
 
-   mutex_lock(th_zone-therm_dev-lock);
+   mutex_lock(thermal-lock);
 
if (mode == THERMAL_DEVICE_ENABLED 
!th_zone-sensor_conf-trip_data.trigger_falling)
-   th_zone-therm_dev-polling_delay = IDLE_INTERVAL;
+   thermal-polling_delay = IDLE_INTERVAL;
else
-   th_zone-therm_dev-polling_delay = 0;
+   thermal-polling_delay = 0;
 
-   mutex_unlock(th_zone-therm_dev-lock);
+   mutex_unlock(thermal-lock);
 
th_zone-mode = mode;
-   thermal_zone_device_update(th_zone-therm_dev);
+   thermal_zone_device_update(thermal);
pr_info(thermal polling set for duration=%d msec\n,
-   th_zone-therm_dev-polling_delay);
+   thermal-polling_delay);
return 0;
 }
 
@@ -96,6 +96,8 @@ static int exynos_get_trip_type(struct thermal_zone_device 
*thermal, int trip,
 static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
unsigned long *temp)
 {
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
+
if (trip  GET_TRIP(MONITOR_ZONE) || trip  GET_TRIP(PANIC_ZONE))
return -EINVAL;
 
@@ -122,6 +124,7 @@ static int exynos_bind(struct thermal_zone_device *thermal,
 {
int ret = 0, i, tab_size, level;
struct freq_clip_table *tab_ptr, *clip_data;
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
struct thermal_sensor_conf *data = th_zone-sensor_conf;
 
tab_ptr = (struct freq_clip_table *)data-cooling_data.freq_data;
@@ -168,6 +171,7 @@ static int exynos_unbind(struct thermal_zone_device 
*thermal,
struct thermal_cooling_device *cdev)
 {
int ret = 0, i, tab_size;
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
struct thermal_sensor_conf *data = th_zone-sensor_conf;
 
if (th_zone-bind == false)
@@ -210,6 +214,7 @@ static int exynos_unbind(struct thermal_zone_device 
*thermal,
 static int exynos_get_temp(struct thermal_zone_device *thermal,
unsigned long *temp)
 {
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
void *data;
 
if (!th_zone-sensor_conf) {
@@ -229,6 +234,7 @@ static int exynos_set_emul_temp(struct thermal_zone_device 
*thermal,
 {
void *data;
int ret = -EINVAL;
+   struct exynos_thermal_zone *th_zone = thermal-devdata;
 
if (!th_zone-sensor_conf) {
pr_info(Temperature sensor not initialised\n);
@@ -276,11 +282,12 @@ static struct thermal_zone_device_ops const 
exynos_dev_ops = {
  * This function may be called from interrupt based temperature sensor
  * when threshold is changed.
  */
-void exynos_report_trigger(void)
+void exynos_report_trigger(struct thermal_sensor_conf *conf)
 {
unsigned int i;
char data[10];
char *envp[] = { data, NULL };
+   struct exynos_thermal_zone *th_zone = conf-pzone_data;
 
if (!th_zone || !th_zone-therm_dev)
return;
@@ -321,6 +328,7 @@ int exynos_register_thermal(struct thermal_sensor_conf 
*sensor_conf)
 {
int ret;
struct cpumask mask_val;
+   struct exynos_thermal_zone *th_zone;
 
if 

[PATCH V6 18/30] thermal: exynos: Add support to handle many instances of TMU

2013-06-17 Thread Amit Daniel Kachhap
This patch adds support to handle multiple instances of the TMU controllers.
This is done by removing the static structure to register with the core thermal
and creating it dynamically for each instance of the TMU controller. The
interrupt is made shared type to handle shared interrupts. Also
the identifier of the TMU controller is extracted from device tree alias.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.h |1 +
 drivers/thermal/samsung/exynos_tmu.c|  147 ---
 drivers/thermal/samsung/exynos_tmu.h|   13 ++
 drivers/thermal/samsung/exynos_tmu_data.c   |  145 --
 drivers/thermal/samsung/exynos_tmu_data.h   |4 +-
 5 files changed, 197 insertions(+), 113 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
b/drivers/thermal/samsung/exynos_thermal_common.h
index dd0077e..0c189d6 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -84,6 +84,7 @@ struct thermal_sensor_conf {
struct thermal_cooling_conf cooling_data;
void *driver_data;
void *pzone_data;
+   struct device *dev;
 };
 
 /*Functions used exynos based thermal sensor driver*/
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 4356118..1880c4e 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -26,15 +26,32 @@
 #include linux/interrupt.h
 #include linux/module.h
 #include linux/of.h
+#include linux/of_address.h
+#include linux/of_irq.h
 #include linux/platform_device.h
 
 #include exynos_thermal_common.h
 #include exynos_tmu.h
 #include exynos_tmu_data.h
 
+/**
+ * struct exynos_tmu_data : A structure to hold the private data of the TMU
+   driver
+ * @id: identifier of the one instance of the TMU controller.
+ * @pdata: pointer to the tmu platform/configuration data
+ * @base: base address of the single instance of the TMU controller.
+ * @irq: irq number of the TMU controller.
+ * @soc: id of the SOC type.
+ * @irq_work: pointer to the irq work structure.
+ * @lock: lock to implement synchronization.
+ * @clk: pointer to the clock structure.
+ * @temp_error1: fused value of the first point trim.
+ * @temp_error2: fused value of the second point trim.
+ * @reg_conf: pointer to structure to register with core thermal.
+ */
 struct exynos_tmu_data {
+   int id;
struct exynos_tmu_platform_data *pdata;
-   struct resource *mem;
void __iomem *base;
int irq;
enum soc_type soc;
@@ -42,6 +59,7 @@ struct exynos_tmu_data {
struct mutex lock;
struct clk *clk;
u8 temp_error1, temp_error2;
+   struct thermal_sensor_conf *reg_conf;
 };
 
 /*
@@ -345,12 +363,6 @@ static int exynos_tmu_set_emulation(void *drv_data,
unsigned long temp)
{ return -EINVAL; }
 #endif/*CONFIG_THERMAL_EMULATION*/
 
-static struct thermal_sensor_conf exynos_sensor_conf = {
-   .name   = exynos-therm,
-   .read_temperature   = (int (*)(void *))exynos_tmu_read,
-   .write_emul_temp= exynos_tmu_set_emulation,
-};
-
 static void exynos_tmu_work(struct work_struct *work)
 {
struct exynos_tmu_data *data = container_of(work,
@@ -359,7 +371,7 @@ static void exynos_tmu_work(struct work_struct *work)
const struct exynos_tmu_registers *reg = pdata-registers;
unsigned int val_irq;
 
-   exynos_report_trigger(exynos_sensor_conf);
+   exynos_report_trigger(data-reg_conf);
mutex_lock(data-lock);
clk_enable(data-clk);
 
@@ -404,33 +416,73 @@ MODULE_DEVICE_TABLE(of, exynos_tmu_match);
 #endif
 
 static inline struct  exynos_tmu_platform_data *exynos_get_driver_data(
-   struct platform_device *pdev)
+   struct platform_device *pdev, int id)
 {
+   struct  exynos_tmu_init_data *data_table;
+   struct exynos_tmu_platform_data *tmu_data;
 #ifdef CONFIG_OF
if (pdev-dev.of_node) {
const struct of_device_id *match;
match = of_match_node(exynos_tmu_match, pdev-dev.of_node);
if (!match)
return NULL;
-   return (struct exynos_tmu_platform_data *) match-data;
+   data_table = (struct exynos_tmu_init_data *) match-data;
+   if (!data_table || id = data_table-tmu_count)
+   return NULL;
+   tmu_data = data_table-tmu_data;
+   return (struct exynos_tmu_platform_data *) (tmu_data + id);
}
 #endif
return NULL;
 }
 
-static int exynos_tmu_probe(struct platform_device *pdev)
+static int exynos_map_dt_data(struct platform_device *pdev)
 {
-   struct exynos_tmu_data *data;
-   struct 

[PATCH V6 11/30] thermal: exynos: Support thermal tripping

2013-06-17 Thread Amit Daniel Kachhap
TMU urgently sends active-high signal (thermal trip) to PMU, and thermal
tripping by hardware logic. Thermal tripping means that PMU cuts off the
whole power of SoC by controlling external voltage regulator.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_tmu.c  |   45 +---
 drivers/thermal/samsung/exynos_tmu_data.c |2 +
 drivers/thermal/samsung/exynos_tmu_data.h |2 +
 3 files changed, 44 insertions(+), 5 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 6fd776f..33f494e 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -117,7 +117,7 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata = data-pdata;
const struct exynos_tmu_registers *reg = pdata-registers;
-   unsigned int status, trim_info;
+   unsigned int status, trim_info = 0, con;
unsigned int rising_threshold = 0, falling_threshold = 0;
int ret = 0, threshold_code, i, trigger_levs = 0;
 
@@ -144,10 +144,26 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
(data-temp_error2 != 0))
data-temp_error1 = pdata-efuse_value;
 
-   /* Count trigger levels to be enabled */
-   for (i = 0; i  MAX_THRESHOLD_LEVS; i++)
-   if (pdata-trigger_levels[i])
+   if (pdata-max_trigger_level  MAX_THRESHOLD_LEVS) {
+   dev_err(pdev-dev, Invalid max trigger level\n);
+   goto out;
+   }
+
+   for (i = 0; i  pdata-max_trigger_level; i++) {
+   if (!pdata-trigger_levels[i])
+   continue;
+
+   if ((pdata-trigger_type[i] == HW_TRIP) 
+   (!pdata-trigger_levels[pdata-max_trigger_level - 1])) {
+   dev_err(pdev-dev, Invalid hw trigger level\n);
+   ret = -EINVAL;
+   goto out;
+   }
+
+   /* Count trigger levels except the HW trip*/
+   if (!(pdata-trigger_type[i] == HW_TRIP))
trigger_levs++;
+   }
 
if (data-soc == SOC_ARCH_EXYNOS4210) {
/* Write temperature code for threshold */
@@ -165,7 +181,8 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
writel(reg-inten_rise_mask, data-base + reg-tmu_intclear);
} else if (data-soc == SOC_ARCH_EXYNOS) {
/* Write temperature code for rising and falling threshold */
-   for (i = 0; i  trigger_levs; i++) {
+   for (i = 0;
+   i  trigger_levs  i  EXYNOS_MAX_TRIGGER_PER_REG; i++) {
threshold_code = temp_to_code(data,
pdata-trigger_levels[i]);
if (threshold_code  0) {
@@ -191,6 +208,24 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
writel((reg-inten_rise_mask  reg-inten_rise_shift) |
(reg-inten_fall_mask  reg-inten_fall_shift),
data-base + reg-tmu_intclear);
+
+   /* if last threshold limit is also present */
+   i = pdata-max_trigger_level - 1;
+   if (pdata-trigger_levels[i] 
+   (pdata-trigger_type[i] == HW_TRIP)) {
+   threshold_code = temp_to_code(data,
+   pdata-trigger_levels[i]);
+   if (threshold_code  0) {
+   ret = threshold_code;
+   goto out;
+   }
+   rising_threshold |= threshold_code  8 * i;
+   writel(rising_threshold,
+   data-base + reg-threshold_th0);
+   con = readl(data-base + reg-tmu_ctrl);
+   con |= (1  reg-therm_trip_en_shift);
+   writel(con, data-base + reg-tmu_ctrl);
+   }
}
 out:
clk_disable(data-clk);
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c 
b/drivers/thermal/samsung/exynos_tmu_data.c
index 589a519..e7cb1cc 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -123,6 +123,7 @@ struct exynos_tmu_platform_data const 
exynos5250_default_tmu_data = {
.trigger_levels[0] = 85,
.trigger_levels[1] = 103,
.trigger_levels[2] = 110,
+   .trigger_levels[3] = 120,
.trigger_enable[0] = 1,
.trigger_enable[1] = 1,
.trigger_enable[2] = 1,
@@ -130,6 +131,7 @@ struct 

[PATCH V6 12/30] thermal: exynos: Fix to clear only the generated interrupts

2013-06-17 Thread Amit Daniel Kachhap
This patch uses the TMU status register to know the generated interrupts
and only clear them in the interrupt handler.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_tmu.c  |   11 +--
 drivers/thermal/samsung/exynos_tmu_data.c |2 ++
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 33f494e..f6f63ca 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -351,17 +351,16 @@ static void exynos_tmu_work(struct work_struct *work)
struct exynos_tmu_data, irq_work);
struct exynos_tmu_platform_data *pdata = data-pdata;
const struct exynos_tmu_registers *reg = pdata-registers;
+   unsigned int val_irq;
 
exynos_report_trigger();
mutex_lock(data-lock);
clk_enable(data-clk);
 
-   if (data-soc == SOC_ARCH_EXYNOS)
-   writel((reg-inten_rise_mask  reg-inten_rise_shift) |
-   (reg-inten_fall_mask  reg-inten_fall_shift),
-   data-base + reg-tmu_intclear);
-   else
-   writel(reg-inten_rise_mask, data-base + reg-tmu_intclear);
+   /* TODO: take action based on particular interrupt */
+   val_irq = readl(data-base + reg-tmu_intstat);
+   /* clear the interrupts */
+   writel(val_irq, data-base + reg-tmu_intclear);
 
clk_disable(data-clk);
mutex_unlock(data-lock);
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c 
b/drivers/thermal/samsung/exynos_tmu_data.c
index e7cb1cc..7fcf183 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -45,6 +45,7 @@ static const struct exynos_tmu_registers 
exynos4210_tmu_registers = {
.inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
.inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
+   .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
 };
 struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
@@ -112,6 +113,7 @@ static const struct exynos_tmu_registers 
exynos5250_tmu_registers = {
.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
.inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
+   .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
.emul_con = EXYNOS_EMUL_CON,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
-- 
1.7.1

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[PATCH V6 09/30] thermal: exynos: Add extra entries in the tmu platform data

2013-06-17 Thread Amit Daniel Kachhap
This patch adds entries min_efuse_value, max_efuse_value, default_temp_offset,
trigger_type, cal_type, trim_first_point, trim_second_point, max_trigger_level
trigger_enable in the TMU platform data structure. Also the driver is modified
to use the data passed by these new platform memebers instead of the constant
macros. All these changes helps in separating the SOC specific data part from
the TMU driver.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.h |7 +++
 drivers/thermal/samsung/exynos_tmu.c|   43 ++--
 drivers/thermal/samsung/exynos_tmu.h|   49 ++
 drivers/thermal/samsung/exynos_tmu_data.c   |   35 
 4 files changed, 86 insertions(+), 48 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
b/drivers/thermal/samsung/exynos_thermal_common.h
index 068f56c..fd789a5 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -44,6 +44,13 @@
 
 #define EXYNOS_ZONE_COUNT  3
 
+enum trigger_type {
+   THROTTLE_ACTIVE = 1,
+   THROTTLE_PASSIVE,
+   SW_TRIP,
+   HW_TRIP,
+};
+
 /**
  * struct freq_clip_table
  * @freq_clip_max: maximum frequency allowed for this cooling state.
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index fa33a48..401ec98 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -49,7 +49,6 @@
 #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK  0xf
 #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
 #define EXYNOS_TMU_CORE_EN_SHIFT   0
-#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
 
 /* Exynos4210 specific registers */
 #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP  0x44
@@ -94,9 +93,6 @@
 #define EXYNOS_TMU_INTEN_FALL1_SHIFT   20
 #define EXYNOS_TMU_INTEN_FALL2_SHIFT   24
 
-#define EFUSE_MIN_VALUE 40
-#define EFUSE_MAX_VALUE 100
-
 #ifdef CONFIG_THERMAL_EMULATION
 #define EXYNOS_EMUL_TIME   0x57F0
 #define EXYNOS_EMUL_TIME_MASK  0x
@@ -136,15 +132,16 @@ static int temp_to_code(struct exynos_tmu_data *data, u8 
temp)
 
switch (pdata-cal_type) {
case TYPE_TWO_POINT_TRIMMING:
-   temp_code = (temp - 25) *
-   (data-temp_error2 - data-temp_error1) /
-   (85 - 25) + data-temp_error1;
+   temp_code = (temp - pdata-first_point_trim) *
+   (data-temp_error2 - data-temp_error1) /
+   (pdata-second_point_trim - pdata-first_point_trim) +
+   data-temp_error1;
break;
case TYPE_ONE_POINT_TRIMMING:
-   temp_code = temp + data-temp_error1 - 25;
+   temp_code = temp + data-temp_error1 - pdata-first_point_trim;
break;
default:
-   temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
+   temp_code = temp + pdata-default_temp_offset;
break;
}
 out:
@@ -169,14 +166,16 @@ static int code_to_temp(struct exynos_tmu_data *data, u8 
temp_code)
 
switch (pdata-cal_type) {
case TYPE_TWO_POINT_TRIMMING:
-   temp = (temp_code - data-temp_error1) * (85 - 25) /
-   (data-temp_error2 - data-temp_error1) + 25;
+   temp = (temp_code - data-temp_error1) *
+   (pdata-second_point_trim - pdata-first_point_trim) /
+   (data-temp_error2 - data-temp_error1) +
+   pdata-first_point_trim;
break;
case TYPE_ONE_POINT_TRIMMING:
-   temp = temp_code - data-temp_error1 + 25;
+   temp = temp_code - data-temp_error1 + pdata-first_point_trim;
break;
default:
-   temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
+   temp = temp_code - pdata-default_temp_offset;
break;
}
 out:
@@ -209,8 +208,8 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
data-temp_error1 = trim_info  EXYNOS_TMU_TRIM_TEMP_MASK;
data-temp_error2 = ((trim_info  8)  EXYNOS_TMU_TRIM_TEMP_MASK);
 
-   if ((EFUSE_MIN_VALUE  data-temp_error1) ||
-   (data-temp_error1  EFUSE_MAX_VALUE) ||
+   if ((pdata-min_efuse_value  data-temp_error1) ||
+   (data-temp_error1  pdata-max_efuse_value) ||
(data-temp_error2 != 0))
data-temp_error1 = pdata-efuse_value;
 
@@ -300,10 +299,10 @@ static void exynos_tmu_control(struct platform_device 
*pdev, bool on)
if (on) {
con |= (1  EXYNOS_TMU_CORE_EN_SHIFT);
interrupt_en =
-   pdata-trigger_level3_en  EXYNOS_TMU_INTEN_RISE3_SHIFT |
-   pdata-trigger_level2_en  

[PATCH V6 08/30] thermal: exynos: Add missing definations and code cleanup

2013-06-17 Thread Amit Daniel Kachhap
This patch adds some extra register bitfield definations and cleans
up the code to prepare for moving register macros and definations inside
the TMU data section.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_tmu.c |   62 +-
 1 files changed, 46 insertions(+), 16 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 5df04a1..fa33a48 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -43,9 +43,12 @@
 
 #define EXYNOS_TMU_TRIM_TEMP_MASK  0xff
 #define EXYNOS_TMU_GAIN_SHIFT  8
+#define EXYNOS_TMU_GAIN_MASK   0xf
 #define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
-#define EXYNOS_TMU_CORE_ON 3
-#define EXYNOS_TMU_CORE_OFF2
+#define EXYNOS_TMU_REF_VOLTAGE_MASK0x1f
+#define EXYNOS_TMU_BUF_SLOPE_SEL_MASK  0xf
+#define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
+#define EXYNOS_TMU_CORE_EN_SHIFT   0
 #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
 
 /* Exynos4210 specific registers */
@@ -63,6 +66,7 @@
 #define EXYNOS4210_TMU_TRIG_LEVEL1_MASK0x10
 #define EXYNOS4210_TMU_TRIG_LEVEL2_MASK0x100
 #define EXYNOS4210_TMU_TRIG_LEVEL3_MASK0x1000
+#define EXYNOS4210_TMU_TRIG_LEVEL_MASK 0x
 #define EXYNOS4210_TMU_INTCLEAR_VAL0x
 
 /* Exynos5250 and Exynos4412 specific registers */
@@ -72,17 +76,30 @@
 #define EXYNOS_EMUL_CON0x80
 
 #define EXYNOS_TRIMINFO_RELOAD 0x1
+#define EXYNOS_TRIMINFO_SHIFT  0x0
+#define EXYNOS_TMU_RISE_INT_MASK   0x111
+#define EXYNOS_TMU_RISE_INT_SHIFT  0
+#define EXYNOS_TMU_FALL_INT_MASK   0x111
+#define EXYNOS_TMU_FALL_INT_SHIFT  12
 #define EXYNOS_TMU_CLEAR_RISE_INT  0x111
 #define EXYNOS_TMU_CLEAR_FALL_INT  (0x111  12)
-#define EXYNOS_MUX_ADDR_VALUE  6
-#define EXYNOS_MUX_ADDR_SHIFT  20
 #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
+#define EXYNOS_TMU_TRIP_MODE_MASK  0x7
+
+#define EXYNOS_TMU_INTEN_RISE0_SHIFT   0
+#define EXYNOS_TMU_INTEN_RISE1_SHIFT   4
+#define EXYNOS_TMU_INTEN_RISE2_SHIFT   8
+#define EXYNOS_TMU_INTEN_RISE3_SHIFT   12
+#define EXYNOS_TMU_INTEN_FALL0_SHIFT   16
+#define EXYNOS_TMU_INTEN_FALL1_SHIFT   20
+#define EXYNOS_TMU_INTEN_FALL2_SHIFT   24
 
 #define EFUSE_MIN_VALUE 40
 #define EFUSE_MAX_VALUE 100
 
 #ifdef CONFIG_THERMAL_EMULATION
 #define EXYNOS_EMUL_TIME   0x57F0
+#define EXYNOS_EMUL_TIME_MASK  0x
 #define EXYNOS_EMUL_TIME_SHIFT 16
 #define EXYNOS_EMUL_DATA_SHIFT 8
 #define EXYNOS_EMUL_DATA_MASK  0xFF
@@ -261,24 +278,37 @@ static void exynos_tmu_control(struct platform_device 
*pdev, bool on)
mutex_lock(data-lock);
clk_enable(data-clk);
 
-   con = pdata-reference_voltage  EXYNOS_TMU_REF_VOLTAGE_SHIFT |
-   pdata-gain  EXYNOS_TMU_GAIN_SHIFT;
+   con = readl(data-base + EXYNOS_TMU_REG_CONTROL);
 
-   if (data-soc == SOC_ARCH_EXYNOS) {
-   con |= pdata-noise_cancel_mode  EXYNOS_TMU_TRIP_MODE_SHIFT;
-   con |= (EXYNOS_MUX_ADDR_VALUE  EXYNOS_MUX_ADDR_SHIFT);
+   if (pdata-reference_voltage) {
+   con = ~(EXYNOS_TMU_REF_VOLTAGE_MASK 
+   EXYNOS_TMU_REF_VOLTAGE_SHIFT);
+   con |= pdata-reference_voltage  EXYNOS_TMU_REF_VOLTAGE_SHIFT;
+   }
+
+   if (pdata-gain) {
+   con = ~(EXYNOS_TMU_GAIN_MASK  EXYNOS_TMU_GAIN_SHIFT);
+   con |= (pdata-gain  EXYNOS_TMU_GAIN_SHIFT);
+   }
+
+   if (pdata-noise_cancel_mode) {
+   con = ~(EXYNOS_TMU_TRIP_MODE_MASK 
+   EXYNOS_TMU_TRIP_MODE_SHIFT);
+   con |= (pdata-noise_cancel_mode  EXYNOS_TMU_TRIP_MODE_SHIFT);
}
 
if (on) {
-   con |= EXYNOS_TMU_CORE_ON;
-   interrupt_en = pdata-trigger_level3_en  12 |
-   pdata-trigger_level2_en  8 |
-   pdata-trigger_level1_en  4 |
-   pdata-trigger_level0_en;
+   con |= (1  EXYNOS_TMU_CORE_EN_SHIFT);
+   interrupt_en =
+   pdata-trigger_level3_en  EXYNOS_TMU_INTEN_RISE3_SHIFT |
+   pdata-trigger_level2_en  EXYNOS_TMU_INTEN_RISE2_SHIFT |
+   pdata-trigger_level1_en  EXYNOS_TMU_INTEN_RISE1_SHIFT |
+   pdata-trigger_level0_en  EXYNOS_TMU_INTEN_RISE0_SHIFT;
if (pdata-threshold_falling)
-   interrupt_en |= interrupt_en  16;
+   interrupt_en |=
+   interrupt_en  EXYNOS_TMU_INTEN_FALL0_SHIFT;
} else {
-   con |= EXYNOS_TMU_CORE_OFF;
+   con = ~(1  EXYNOS_TMU_CORE_EN_SHIFT);
interrupt_en = 0; /* Disable all interrupts */
}
writel(interrupt_en, data-base + 

[PATCH V6 10/30] thermal: exynos: Move register definitions from driver to data file

2013-06-17 Thread Amit Daniel Kachhap
This patch migrates the TMU register definition/bitfields to data file. This
is needed to support SoC's which use the same TMU controller but register
validity, offsets or bitfield may slightly vary across SOC's.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_tmu.c  |  172 +---
 drivers/thermal/samsung/exynos_tmu.h  |  133 ++
 drivers/thermal/samsung/exynos_tmu_data.c |   59 ++
 drivers/thermal/samsung/exynos_tmu_data.h |   68 +++
 4 files changed, 315 insertions(+), 117 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 401ec98..6fd776f 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -32,76 +32,6 @@
 #include exynos_tmu.h
 #include exynos_tmu_data.h
 
-/* Exynos generic registers */
-#define EXYNOS_TMU_REG_TRIMINFO0x0
-#define EXYNOS_TMU_REG_CONTROL 0x20
-#define EXYNOS_TMU_REG_STATUS  0x28
-#define EXYNOS_TMU_REG_CURRENT_TEMP0x40
-#define EXYNOS_TMU_REG_INTEN   0x70
-#define EXYNOS_TMU_REG_INTSTAT 0x74
-#define EXYNOS_TMU_REG_INTCLEAR0x78
-
-#define EXYNOS_TMU_TRIM_TEMP_MASK  0xff
-#define EXYNOS_TMU_GAIN_SHIFT  8
-#define EXYNOS_TMU_GAIN_MASK   0xf
-#define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
-#define EXYNOS_TMU_REF_VOLTAGE_MASK0x1f
-#define EXYNOS_TMU_BUF_SLOPE_SEL_MASK  0xf
-#define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
-#define EXYNOS_TMU_CORE_EN_SHIFT   0
-
-/* Exynos4210 specific registers */
-#define EXYNOS4210_TMU_REG_THRESHOLD_TEMP  0x44
-#define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50
-#define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54
-#define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58
-#define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C
-#define EXYNOS4210_TMU_REG_PAST_TEMP0  0x60
-#define EXYNOS4210_TMU_REG_PAST_TEMP1  0x64
-#define EXYNOS4210_TMU_REG_PAST_TEMP2  0x68
-#define EXYNOS4210_TMU_REG_PAST_TEMP3  0x6C
-
-#define EXYNOS4210_TMU_TRIG_LEVEL0_MASK0x1
-#define EXYNOS4210_TMU_TRIG_LEVEL1_MASK0x10
-#define EXYNOS4210_TMU_TRIG_LEVEL2_MASK0x100
-#define EXYNOS4210_TMU_TRIG_LEVEL3_MASK0x1000
-#define EXYNOS4210_TMU_TRIG_LEVEL_MASK 0x
-#define EXYNOS4210_TMU_INTCLEAR_VAL0x
-
-/* Exynos5250 and Exynos4412 specific registers */
-#define EXYNOS_TMU_TRIMINFO_CON0x14
-#define EXYNOS_THD_TEMP_RISE   0x50
-#define EXYNOS_THD_TEMP_FALL   0x54
-#define EXYNOS_EMUL_CON0x80
-
-#define EXYNOS_TRIMINFO_RELOAD 0x1
-#define EXYNOS_TRIMINFO_SHIFT  0x0
-#define EXYNOS_TMU_RISE_INT_MASK   0x111
-#define EXYNOS_TMU_RISE_INT_SHIFT  0
-#define EXYNOS_TMU_FALL_INT_MASK   0x111
-#define EXYNOS_TMU_FALL_INT_SHIFT  12
-#define EXYNOS_TMU_CLEAR_RISE_INT  0x111
-#define EXYNOS_TMU_CLEAR_FALL_INT  (0x111  12)
-#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
-#define EXYNOS_TMU_TRIP_MODE_MASK  0x7
-
-#define EXYNOS_TMU_INTEN_RISE0_SHIFT   0
-#define EXYNOS_TMU_INTEN_RISE1_SHIFT   4
-#define EXYNOS_TMU_INTEN_RISE2_SHIFT   8
-#define EXYNOS_TMU_INTEN_RISE3_SHIFT   12
-#define EXYNOS_TMU_INTEN_FALL0_SHIFT   16
-#define EXYNOS_TMU_INTEN_FALL1_SHIFT   20
-#define EXYNOS_TMU_INTEN_FALL2_SHIFT   24
-
-#ifdef CONFIG_THERMAL_EMULATION
-#define EXYNOS_EMUL_TIME   0x57F0
-#define EXYNOS_EMUL_TIME_MASK  0x
-#define EXYNOS_EMUL_TIME_SHIFT 16
-#define EXYNOS_EMUL_DATA_SHIFT 8
-#define EXYNOS_EMUL_DATA_MASK  0xFF
-#define EXYNOS_EMUL_ENABLE 0x1
-#endif /* CONFIG_THERMAL_EMULATION */
-
 struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
@@ -186,6 +116,7 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
 {
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata = data-pdata;
+   const struct exynos_tmu_registers *reg = pdata-registers;
unsigned int status, trim_info;
unsigned int rising_threshold = 0, falling_threshold = 0;
int ret = 0, threshold_code, i, trigger_levs = 0;
@@ -193,20 +124,20 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
mutex_lock(data-lock);
clk_enable(data-clk);
 
-   status = readb(data-base + EXYNOS_TMU_REG_STATUS);
+   status = readb(data-base + reg-tmu_status);
if (!status) {
ret = -EBUSY;
goto out;
}
 
-   if (data-soc == SOC_ARCH_EXYNOS) {
-   __raw_writel(EXYNOS_TRIMINFO_RELOAD,
-   data-base + EXYNOS_TMU_TRIMINFO_CON);
-   }
+   if (data-soc == SOC_ARCH_EXYNOS)
+   __raw_writel(1, data-base + reg-triminfo_ctrl);
+
/* Save trimming info in order to perform calibration */
-   trim_info = 

[PATCH V6 07/30] thermal: exynos: Bifurcate exynos tmu driver and configuration data

2013-06-17 Thread Amit Daniel Kachhap
This code splits the exynos tmu driver code into SOC specific data parts.
This will simplify adding new SOC specific data to the same TMU controller.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/Kconfig   |3 +-
 drivers/thermal/samsung/Makefile  |1 +
 drivers/thermal/samsung/exynos_tmu.c  |   67 ++---
 drivers/thermal/samsung/exynos_tmu_data.c |   78 +
 drivers/thermal/samsung/exynos_tmu_data.h |   40 +++
 5 files changed, 125 insertions(+), 64 deletions(-)
 create mode 100644 drivers/thermal/samsung/exynos_tmu_data.c
 create mode 100644 drivers/thermal/samsung/exynos_tmu_data.h

diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig
index f8100b1..b653f15 100644
--- a/drivers/thermal/samsung/Kconfig
+++ b/drivers/thermal/samsung/Kconfig
@@ -5,7 +5,8 @@ config EXYNOS_THERMAL
  If you say yes here you get support for the TMU (Thermal Management
  Unit) driver for SAMSUNG EXYNOS series of soc. This driver initialises
  the TMU, reports temperature and handles cooling action if defined.
- This driver uses the exynos core thermal API's.
+ This driver uses the exynos core thermal API's and TMU configuration
+ data from the supported soc's.
 
 config EXYNOS_THERMAL_CORE
bool Core thermal framework support for EXYNOS SOC's
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
index 22528d6..c09d830 100644
--- a/drivers/thermal/samsung/Makefile
+++ b/drivers/thermal/samsung/Makefile
@@ -3,4 +3,5 @@
 #
 obj-$(CONFIG_EXYNOS_THERMAL)   += exynos_thermal.o
 exynos_thermal-y   := exynos_tmu.o
+exynos_thermal-y   += exynos_tmu_data.o
 exynos_thermal-$(CONFIG_EXYNOS_THERMAL_CORE)   += exynos_thermal_common.o
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 6aa2fd2..5df04a1 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -30,6 +30,7 @@
 
 #include exynos_thermal_common.h
 #include exynos_tmu.h
+#include exynos_tmu_data.h
 
 /* Exynos generic registers */
 #define EXYNOS_TMU_REG_TRIMINFO0x0
@@ -381,66 +382,6 @@ static struct thermal_sensor_conf exynos_sensor_conf = {
.write_emul_temp= exynos_tmu_set_emulation,
 };
 
-#if defined(CONFIG_CPU_EXYNOS4210)
-static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
-   .threshold = 80,
-   .trigger_levels[0] = 5,
-   .trigger_levels[1] = 20,
-   .trigger_levels[2] = 30,
-   .trigger_level0_en = 1,
-   .trigger_level1_en = 1,
-   .trigger_level2_en = 1,
-   .trigger_level3_en = 0,
-   .gain = 15,
-   .reference_voltage = 7,
-   .cal_type = TYPE_ONE_POINT_TRIMMING,
-   .freq_tab[0] = {
-   .freq_clip_max = 800 * 1000,
-   .temp_level = 85,
-   },
-   .freq_tab[1] = {
-   .freq_clip_max = 200 * 1000,
-   .temp_level = 100,
-   },
-   .freq_tab_count = 2,
-   .type = SOC_ARCH_EXYNOS4210,
-};
-#define EXYNOS4210_TMU_DRV_DATA (exynos4210_default_tmu_data)
-#else
-#define EXYNOS4210_TMU_DRV_DATA (NULL)
-#endif
-
-#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
-static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
-   .threshold_falling = 10,
-   .trigger_levels[0] = 85,
-   .trigger_levels[1] = 103,
-   .trigger_levels[2] = 110,
-   .trigger_level0_en = 1,
-   .trigger_level1_en = 1,
-   .trigger_level2_en = 1,
-   .trigger_level3_en = 0,
-   .gain = 8,
-   .reference_voltage = 16,
-   .noise_cancel_mode = 4,
-   .cal_type = TYPE_ONE_POINT_TRIMMING,
-   .efuse_value = 55,
-   .freq_tab[0] = {
-   .freq_clip_max = 800 * 1000,
-   .temp_level = 85,
-   },
-   .freq_tab[1] = {
-   .freq_clip_max = 200 * 1000,
-   .temp_level = 103,
-   },
-   .freq_tab_count = 2,
-   .type = SOC_ARCH_EXYNOS,
-};
-#define EXYNOS_TMU_DRV_DATA (exynos_default_tmu_data)
-#else
-#define EXYNOS_TMU_DRV_DATA (NULL)
-#endif
-
 #ifdef CONFIG_OF
 static const struct of_device_id exynos_tmu_match[] = {
{
@@ -449,11 +390,11 @@ static const struct of_device_id exynos_tmu_match[] = {
},
{
.compatible = samsung,exynos4412-tmu,
-   .data = (void *)EXYNOS_TMU_DRV_DATA,
+   .data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
{
.compatible = samsung,exynos5250-tmu,
-   .data = (void *)EXYNOS_TMU_DRV_DATA,
+   .data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
{},
 };
@@ -467,7 +408,7 @@ 

[PATCH V6 01/30] thermal: exynos: Moving exynos thermal files into samsung directory

2013-06-17 Thread Amit Daniel Kachhap
This movement of files is done for easy maintenance and adding more
new sensor's support for exynos platform easily . This will also help in
bifurcating exynos common, sensor driver and sensor data related parts.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/Kconfig|   13 +
 drivers/thermal/Makefile   |2 +-
 drivers/thermal/samsung/Kconfig|9 +
 drivers/thermal/samsung/Makefile   |4 
 drivers/thermal/{ = samsung}/exynos_thermal.c |0
 5 files changed, 19 insertions(+), 9 deletions(-)
 create mode 100644 drivers/thermal/samsung/Kconfig
 create mode 100644 drivers/thermal/samsung/Makefile
 rename drivers/thermal/{ = samsung}/exynos_thermal.c (100%)

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index b13c2bc..ef10cf2 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -114,14 +114,6 @@ config KIRKWOOD_THERMAL
  Support for the Kirkwood thermal sensor driver into the Linux thermal
  framework. Only kirkwood 88F6282 and 88F6283 have this sensor.
 
-config EXYNOS_THERMAL
-   tristate Temperature sensor on Samsung EXYNOS
-   depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5)
-   depends on CPU_THERMAL
-   help
- If you say yes here you get support for TMU (Thermal Management
- Unit) on SAMSUNG EXYNOS series of SoC.
-
 config DOVE_THERMAL
tristate Temperature sensor on Marvell Dove SoCs
depends on ARCH_DOVE
@@ -185,4 +177,9 @@ menu Texas Instruments thermal drivers
 source drivers/thermal/ti-soc-thermal/Kconfig
 endmenu
 
+menu Samsung thermal drivers
+depends on PLAT_SAMSUNG
+source drivers/thermal/samsung/Kconfig
+endmenu
+
 endif
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 67184a2..1f27ada 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -17,7 +17,7 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o
 obj-$(CONFIG_SPEAR_THERMAL)+= spear_thermal.o
 obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
 obj-$(CONFIG_KIRKWOOD_THERMAL)  += kirkwood_thermal.o
-obj-$(CONFIG_EXYNOS_THERMAL)   += exynos_thermal.o
+obj-y  += samsung/
 obj-$(CONFIG_DOVE_THERMAL) += dove_thermal.o
 obj-$(CONFIG_DB8500_THERMAL)   += db8500_thermal.o
 obj-$(CONFIG_ARMADA_THERMAL)   += armada_thermal.o
diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig
new file mode 100644
index 000..2d3d9dc
--- /dev/null
+++ b/drivers/thermal/samsung/Kconfig
@@ -0,0 +1,9 @@
+config EXYNOS_THERMAL
+   tristate Temperature sensor on Samsung EXYNOS
+   depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5)
+   depends on CPU_THERMAL
+   help
+ If you say yes here you get support for TMU (Thermal Management
+ Unit) on SAMSUNG EXYNOS series of SoC. This helps in registering
+ the exynos thermal driver with the core thermal layer and cpu
+ cooling API's.
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
new file mode 100644
index 000..1fe6d93
--- /dev/null
+++ b/drivers/thermal/samsung/Makefile
@@ -0,0 +1,4 @@
+#
+# Samsung thermal specific Makefile
+#
+obj-$(CONFIG_EXYNOS_THERMAL)   += exynos_thermal.o
diff --git a/drivers/thermal/exynos_thermal.c 
b/drivers/thermal/samsung/exynos_thermal.c
similarity index 100%
rename from drivers/thermal/exynos_thermal.c
rename to drivers/thermal/samsung/exynos_thermal.c
-- 
1.7.1

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[PATCH V6 02/30] thermal: exynos: Use ARCH_HAS_BANDGAP config to know the supported soc's

2013-06-17 Thread Amit Daniel Kachhap
This patch uses the recently added config sybmol ARCH_HAS_BANDGAP to enable
the TMU driver. This will allow adding support for new soc easily as now it
is the platform responsibility to enable this config symbol for a particular
soc.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/Kconfig |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig
index 2d3d9dc..883a8a8 100644
--- a/drivers/thermal/samsung/Kconfig
+++ b/drivers/thermal/samsung/Kconfig
@@ -1,6 +1,6 @@
 config EXYNOS_THERMAL
tristate Temperature sensor on Samsung EXYNOS
-   depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5)
+   depends on ARCH_HAS_BANDGAP
depends on CPU_THERMAL
help
  If you say yes here you get support for TMU (Thermal Management
-- 
1.7.1

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[PATCH V6 06/30] thermal: exynos: Move exynos_thermal.h from include/* to driver/* folder

2013-06-17 Thread Amit Daniel Kachhap
This patch renames and moves include/linux/platform_data/exynos_thermal.h to
drivers/thermal/samsung/exynos_tmu.h. This file movement is needed as exynos
SOC's are not supporting non-DT based platforms and this file now just contains
exynos tmu driver related definations.
Also struct freq_clip_table is now moved to exynos_thermal_common.c as it fixes
the compilation issue occuring because now this new tmu header file is included
in tmu driver c file and not in the common thermal header file.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.c|1 -
 drivers/thermal/samsung/exynos_thermal_common.h|   15 
 drivers/thermal/samsung/exynos_tmu.c   |2 +-
 .../thermal/samsung/exynos_tmu.h   |   24 ---
 4 files changed, 21 insertions(+), 21 deletions(-)
 rename include/linux/platform_data/exynos_thermal.h = 
drivers/thermal/samsung/exynos_tmu.h (84%)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.c 
b/drivers/thermal/samsung/exynos_thermal_common.c
index 92e50bc..dd49c9f 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -21,7 +21,6 @@
  */
 
 #include linux/cpu_cooling.h
-#include linux/platform_data/exynos_thermal.h
 #include linux/slab.h
 #include linux/thermal.h
 
diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
b/drivers/thermal/samsung/exynos_thermal_common.h
index 8df1848..068f56c 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -44,6 +44,21 @@
 
 #define EXYNOS_ZONE_COUNT  3
 
+/**
+ * struct freq_clip_table
+ * @freq_clip_max: maximum frequency allowed for this cooling state.
+ * @temp_level: Temperature level at which the temperature clipping will
+ * happen.
+ * @mask_val: cpumask of the allowed cpu's where the clipping will take place.
+ *
+ * This structure is required to be filled and passed to the
+ * cpufreq_cooling_unregister function.
+ */
+struct freq_clip_table {
+   unsigned int freq_clip_max;
+   unsigned int temp_level;
+   const struct cpumask *mask_val;
+};
 struct thermal_trip_point_conf {
int trip_val[MAX_TRIP_COUNT];
int trip_count;
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 22a8874..6aa2fd2 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -27,9 +27,9 @@
 #include linux/module.h
 #include linux/of.h
 #include linux/platform_device.h
-#include linux/platform_data/exynos_thermal.h
 
 #include exynos_thermal_common.h
+#include exynos_tmu.h
 
 /* Exynos generic registers */
 #define EXYNOS_TMU_REG_TRIMINFO0x0
diff --git a/include/linux/platform_data/exynos_thermal.h 
b/drivers/thermal/samsung/exynos_tmu.h
similarity index 84%
rename from include/linux/platform_data/exynos_thermal.h
rename to drivers/thermal/samsung/exynos_tmu.h
index da7e627..9e0f887 100644
--- a/include/linux/platform_data/exynos_thermal.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -1,8 +1,9 @@
 /*
- * exynos_thermal.h - Samsung EXYNOS TMU (Thermal Management Unit)
+ * exynos_tmu.h - Samsung EXYNOS TMU (Thermal Management Unit)
  *
  *  Copyright (C) 2011 Samsung Electronics
  *  Donggeun Kim dg77@samsung.com
+ *  Amit Daniel Kachhap amit.dan...@samsung.com
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -19,8 +20,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-#ifndef _LINUX_EXYNOS_THERMAL_H
-#define _LINUX_EXYNOS_THERMAL_H
+#ifndef _EXYNOS_TMU_H
+#define _EXYNOS_TMU_H
 #include linux/cpu_cooling.h
 
 enum calibration_type {
@@ -33,21 +34,6 @@ enum soc_type {
SOC_ARCH_EXYNOS4210 = 1,
SOC_ARCH_EXYNOS,
 };
-/**
- * struct freq_clip_table
- * @freq_clip_max: maximum frequency allowed for this cooling state.
- * @temp_level: Temperature level at which the temperature clipping will
- * happen.
- * @mask_val: cpumask of the allowed cpu's where the clipping will take place.
- *
- * This structure is required to be filled and passed to the
- * cpufreq_cooling_unregister function.
- */
-struct freq_clip_table {
-   unsigned int freq_clip_max;
-   unsigned int temp_level;
-   const struct cpumask *mask_val;
-};
 
 /**
  * struct exynos_tmu_platform_data
@@ -116,4 +102,4 @@ struct exynos_tmu_platform_data {
struct freq_clip_table freq_tab[4];
unsigned int freq_tab_count;
 };
-#endif /* _LINUX_EXYNOS_THERMAL_H */
+#endif /* _EXYNOS_TMU_H */
-- 
1.7.1

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[PATCH V6 03/30] thermal: exynos: Remove un-necessary CPU_THERMAL dependency

2013-06-17 Thread Amit Daniel Kachhap
This patch removes the dependency on CPU_THERMAL for compiling TMU driver.
This is useful for cases when only TMU controller needs to be initialised
without cpu cooling action.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/Kconfig |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig
index 883a8a8..2cf31ad 100644
--- a/drivers/thermal/samsung/Kconfig
+++ b/drivers/thermal/samsung/Kconfig
@@ -1,7 +1,6 @@
 config EXYNOS_THERMAL
tristate Temperature sensor on Samsung EXYNOS
depends on ARCH_HAS_BANDGAP
-   depends on CPU_THERMAL
help
  If you say yes here you get support for TMU (Thermal Management
  Unit) on SAMSUNG EXYNOS series of SoC. This helps in registering
-- 
1.7.1

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[PATCH V6 04/30] thermal: exynos: Bifurcate exynos thermal common and tmu controller code

2013-06-17 Thread Amit Daniel Kachhap
This code bifurcates exynos thermal implementation into common and sensor
specific parts. The common thermal code interacts with core thermal layer and
core cpufreq cooling parts and is independent of SOC specific driver. This
change is needed to cleanly add support for new TMU sensors.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/Kconfig |   19 +-
 drivers/thermal/samsung/Makefile|4 +-
 drivers/thermal/samsung/exynos_thermal.c|  419 +--
 drivers/thermal/samsung/exynos_thermal_common.c |  384 +
 drivers/thermal/samsung/exynos_thermal_common.h |   83 +
 5 files changed, 490 insertions(+), 419 deletions(-)
 create mode 100644 drivers/thermal/samsung/exynos_thermal_common.c
 create mode 100644 drivers/thermal/samsung/exynos_thermal_common.h

diff --git a/drivers/thermal/samsung/Kconfig b/drivers/thermal/samsung/Kconfig
index 2cf31ad..f8100b1 100644
--- a/drivers/thermal/samsung/Kconfig
+++ b/drivers/thermal/samsung/Kconfig
@@ -1,8 +1,17 @@
 config EXYNOS_THERMAL
-   tristate Temperature sensor on Samsung EXYNOS
+   tristate Exynos thermal management unit driver
depends on ARCH_HAS_BANDGAP
help
- If you say yes here you get support for TMU (Thermal Management
- Unit) on SAMSUNG EXYNOS series of SoC. This helps in registering
- the exynos thermal driver with the core thermal layer and cpu
- cooling API's.
+ If you say yes here you get support for the TMU (Thermal Management
+ Unit) driver for SAMSUNG EXYNOS series of soc. This driver initialises
+ the TMU, reports temperature and handles cooling action if defined.
+ This driver uses the exynos core thermal API's.
+
+config EXYNOS_THERMAL_CORE
+   bool Core thermal framework support for EXYNOS SOC's
+   depends on EXYNOS_THERMAL
+   help
+ If you say yes here you get support for EXYNOS TMU
+ (Thermal Management Unit) common registration/unregistration
+ functions to the core thermal layer and also to use the generic
+ cpu cooling API's.
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
index 1fe6d93..6227d4f 100644
--- a/drivers/thermal/samsung/Makefile
+++ b/drivers/thermal/samsung/Makefile
@@ -1,4 +1,6 @@
 #
 # Samsung thermal specific Makefile
 #
-obj-$(CONFIG_EXYNOS_THERMAL)   += exynos_thermal.o
+obj-$(CONFIG_EXYNOS_THERMAL)   += exynos_soc_thermal.o
+exynos_soc_thermal-y   := exynos_thermal.o
+exynos_soc_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o
diff --git a/drivers/thermal/samsung/exynos_thermal.c 
b/drivers/thermal/samsung/exynos_thermal.c
index 03e4bbc..5293849 100644
--- a/drivers/thermal/samsung/exynos_thermal.c
+++ b/drivers/thermal/samsung/exynos_thermal.c
@@ -21,23 +21,15 @@
  *
  */
 
-#include linux/module.h
-#include linux/err.h
-#include linux/kernel.h
-#include linux/slab.h
-#include linux/platform_device.h
-#include linux/interrupt.h
 #include linux/clk.h
-#include linux/workqueue.h
-#include linux/sysfs.h
-#include linux/kobject.h
 #include linux/io.h
-#include linux/mutex.h
-#include linux/platform_data/exynos_thermal.h
-#include linux/thermal.h
-#include linux/cpufreq.h
-#include linux/cpu_cooling.h
+#include linux/interrupt.h
+#include linux/module.h
 #include linux/of.h
+#include linux/platform_device.h
+#include linux/platform_data/exynos_thermal.h
+
+#include exynos_thermal_common.h
 
 /* Exynos generic registers */
 #define EXYNOS_TMU_REG_TRIMINFO0x0
@@ -88,16 +80,6 @@
 #define EFUSE_MIN_VALUE 40
 #define EFUSE_MAX_VALUE 100
 
-/* In-kernel thermal framework related macros  definations */
-#define SENSOR_NAME_LEN16
-#define MAX_TRIP_COUNT 8
-#define MAX_COOLING_DEVICE 4
-#define MAX_THRESHOLD_LEVS 4
-
-#define ACTIVE_INTERVAL 500
-#define IDLE_INTERVAL 1
-#define MCELSIUS   1000
-
 #ifdef CONFIG_THERMAL_EMULATION
 #define EXYNOS_EMUL_TIME   0x57F0
 #define EXYNOS_EMUL_TIME_SHIFT 16
@@ -106,17 +88,6 @@
 #define EXYNOS_EMUL_ENABLE 0x1
 #endif /* CONFIG_THERMAL_EMULATION */
 
-/* CPU Zone information */
-#define PANIC_ZONE  4
-#define WARN_ZONE   3
-#define MONITOR_ZONE2
-#define SAFE_ZONE   1
-
-#define GET_ZONE(trip) (trip + 2)
-#define GET_TRIP(zone) (zone - 2)
-
-#define EXYNOS_ZONE_COUNT  3
-
 struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
@@ -129,384 +100,6 @@ struct exynos_tmu_data {
u8 temp_error1, temp_error2;
 };
 
-struct thermal_trip_point_conf {
-   int trip_val[MAX_TRIP_COUNT];
-   int trip_count;
-   u8 trigger_falling;
-};
-
-struct thermal_cooling_conf {
-   struct freq_clip_table freq_data[MAX_TRIP_COUNT];
-   int freq_clip_count;
-};
-

Re: [PATCH v2 06/10] clk: exynos5420: register clocks using common clock framework

2013-06-17 Thread Chander Kashyap
On 14 June 2013 22:56, Andrew Bresticker abres...@google.com wrote:
 Hi Chander,

 +   [Core Clocks]
 +
 +  ClockID
 +  
 +
 +  oscclk   1

 I know the UM refers to this as 'oscclk', but could we instead call
 this 'fin_pll' to be consistent with Exynos 4 and Exynos 5250?
I will rename it to make consistent.
Thanks.

 Thanks,
 Andrew



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Re: [PATCH v2 07/10] ARM: dts: Add initial device tree support for Exynos5420

2013-06-17 Thread Mark Rutland
Hi,

 diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
 b/arch/arm/boot/dts/exynos5420-smdk5420.dts
 new file mode 100644
 index 000..43f0eb8
 --- /dev/null
 +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
 @@ -0,0 +1,40 @@
 +/*
 + * SAMSUNG SMDK5420 board device tree source
 + *
 + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 + *   http://www.samsung.com
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +/dts-v1/;
 +#include exynos5420.dtsi
 +
 +/ {
 + model = Samsung SMDK5420 board based on EXYNOS5420;
 + compatible = samsung,smdk5420, samsung,exynos5420;
 +
 + memory {
 + reg =   0x2000 0x1000
 +  0x3000 0x1000
 +  0x4000 0x1000
 +  0x5000 0x1000
 +  0x6000 0x1000
 +  0x7000 0x1000
 +  0x8000 0x1000
 +  0x9000 0x1000;
 + };

As splitting these into 256MB banks is a workaround for an implementation
issue, there should at least be a comment to that effect.

It would be far nicer if this were described as one bank and the kernel could
split it up as necessary when using sparsemem.

Thanks,
Mark.
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Re: [PATCH 14/28] ARM: SAMSUNG: Introduce GPIO_SAMSUNG Kconfig entry

2013-06-17 Thread Linus Walleij
On Fri, Jun 14, 2013 at 9:32 PM, Tomasz Figa t.f...@samsung.com wrote:

 This patch adds Kconfig entry that selects whether legacy Samsung GPIO
 driver should be built or not. For platforms that support only DT based
 boot, the new pinctrl driver is used and so the old one is not needed.

 Cc: Grant Likely grant.lik...@linaro.org
 Cc: Linus Walleij linus.wall...@linaro.org
 Signed-off-by: Tomasz Figa t.f...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com

Looks good to me.

Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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Re: [PATCH V5 1/3] pci: Add PCIe driver for Samsung Exynos

2013-06-17 Thread Jingoo Han
On Friday, June 14, 2013 9:54 PM, Arnd Bergmann wrote:
 On Friday 14 June 2013 17:18:46 Jingoo Han wrote:
  On Thursday, June 13, 2013 11:14 PM, Arnd Bergmann wrote:
   On Thursday 13 June 2013 22:22:31 Jingoo Han wrote:
 
+struct pcie_port {
+   struct device   *dev;
+   u8  controller;
+   u8  root_bus_nr;
+   void __iomem*dbi_base;
+   void __iomem*elbi_base;
+   void __iomem*phy_base;
+   void __iomem*purple_base;
+   phys_addr_t cfg0_base;
+   void __iomem*va_cfg0_base;
+   phys_addr_t cfg1_base;
+   void __iomem*va_cfg1_base;
+   phys_addr_t io_base;
+   phys_addr_t mem_base;
+   spinlock_t  conf_lock;
+   struct resource cfg;
+   struct resource io;
+   struct resource mem;
+   struct pcie_port_info   config;
+   struct clk  *clk;
+   struct clk  *bus_clk;
+   int irq;
+   int reset_gpio;
+};
  
   You mentioned that you'd use u64 for the resources here but did not.
 
  Do you mean the following?
 
  +   u64 cfg0_base;
  +   u64 cfg1_base;
  +   u64 io_base;
  +   u64 mem_base;
 
 Yes, anything you need to program into a 64 bit hardware register.

OK,

 
+static void exynos_pcie_prog_viewport_cfg1(struct pcie_port *pp, u32 
busdev)
+{
+   u32 val;
+   void __iomem *dbi_base = pp-dbi_base;
+
+   /* Program viewport 1 : OUTBOUND : CFG1 */
+   val = PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1;
+   writel_rc(pp, val, dbi_base + PCIE_ATU_VIEWPORT);
+   writel_rc(pp, PCIE_ATU_TYPE_CFG1, dbi_base + PCIE_ATU_CR1);
+   val = PCIE_ATU_ENABLE;
+   writel_rc(pp, val, dbi_base + PCIE_ATU_CR2);
+   writel_rc(pp, (u64)pp-cfg1_base, dbi_base + 
PCIE_ATU_LOWER_BASE);
+   writel_rc(pp, 0, dbi_base + PCIE_ATU_UPPER_BASE);
+   writel_rc(pp, (u64)pp-cfg1_base + pp-config.cfg1_size - 1,
+   dbi_base + PCIE_ATU_LIMIT);
+   writel_rc(pp, busdev, dbi_base + PCIE_ATU_LOWER_TARGET);
+   writel_rc(pp, 0, dbi_base + PCIE_ATU_UPPER_TARGET);
+}
  
   And you still don't set up the UPPER halves, which was really the point
   of my comment. Same thing for all the other ones.
 
  Do you mean the following?
 
  +   writel_rc(pp, pp-cfg1_base, dbi_base + PCIE_ATU_LOWER_BASE);
  +   writel_rc(pp, (pp-cfg1_base  32), dbi_base + PCIE_ATU_UPPER_BASE);
 
 Right. Note that you could achieve the same using phys_addr_t instead of
 u64, but it's more complicated to get that to work for both 32 and 64 bit
 phys_addr_t types, since you cannot shift a 32 bit value by 32 bits in C.

OK,

 
+static void exynos_pcie_prog_viewport_mem_inbound(struct pcie_port *pp)
+{
+   u32 val;
+   void __iomem *dbi_base = pp-dbi_base;
+
+   /* Program viewport 0 : INBOUND : MEM */
+   val = PCIE_ATU_REGION_INBOUND | PCIE_ATU_REGION_INDEX0;
+   writel_rc(pp, val, dbi_base + PCIE_ATU_VIEWPORT);
+   writel_rc(pp, PCIE_ATU_TYPE_MEM, dbi_base + PCIE_ATU_CR1);
+   val = PCIE_ATU_ENABLE | PCIE_ATU_BAR_MODE_ENABLE;
+   writel_rc(pp, val, dbi_base + PCIE_ATU_CR2);
+   writel_rc(pp, (u64)pp-config.mem_bus_addr,
+   dbi_base + PCIE_ATU_LOWER_BASE);
+   writel_rc(pp, 0, dbi_base + PCIE_ATU_UPPER_BASE);
+   writel_rc(pp, (u64)pp-config.mem_bus_addr + 
pp-config.mem_size - 1,
+   dbi_base + PCIE_ATU_LIMIT);
+   writel_rc(pp, (u64)pp-mem_base, dbi_base + 
PCIE_ATU_LOWER_TARGET);
+   writel_rc(pp, 0, dbi_base + PCIE_ATU_UPPER_TARGET);
+}
  
   This makes even less sense than before, it seems like now you only
   allow DMA between PCI devices but not to main memory.
 
  Sorry, I cannot understand it.
  Could you give me more details?
  Also, pseudo-code will be very helpful.
 
 Please look up the documentation about inbound viewport and describe
 in a code comment what it does. I /assume/ that this is how DMA accesses
 from the bus get translated into AXI bus transactions. If so, you have
 to let the window translate addresses from RAM. If it's something else,
 then you should document what it is and how it needs to be set up.

One of our hardware engineer confirmed it.
He said that these inbound functions are unnecessary.
Also, I checked that PCIe works properly without these functions.
So, I will remove these inbound functions.


 
+static int exynos_pcie_setup(int nr, struct pci_sys_data *sys)
+{
+   struct pcie_port *pp;
+
+   pp 

[PATCH 1/1] pinctrl: exynos: Fix build breakage

2013-06-17 Thread Sachin Kamat
'exynos_wkup_irq_mask' should be defined ahead of its call.

Fixes the following error:
drivers/pinctrl/pinctrl-exynos.c: In function ‘exynos_wkup_irq_mask’:
drivers/pinctrl/pinctrl-exynos.c:299:3: error: implicit declaration of
function ‘exynos_wkup_irq_ack’ [-Werror=implicit-function-declaration]
   exynos_wkup_irq_ack(irqd);

Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Cc: Doug Anderson diand...@chromium.org
---
 drivers/pinctrl/pinctrl-exynos.c |   18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 8cd5bf5..f9277bc 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -279,6 +279,15 @@ err_domains:
return ret;
 }
 
+static void exynos_wkup_irq_ack(struct irq_data *irqd)
+{
+   struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
+   struct samsung_pinctrl_drv_data *d = b-drvdata;
+   unsigned long pend = d-ctrl-weint_pend + b-eint_offset;
+
+   writel(1  irqd-hwirq, d-virt_base + pend);
+}
+
 static void exynos_wkup_irq_mask(struct irq_data *irqd)
 {
struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
@@ -307,15 +316,6 @@ static void exynos_wkup_irq_mask(struct irq_data *irqd)
spin_unlock_irqrestore(b-slock, flags);
 }
 
-static void exynos_wkup_irq_ack(struct irq_data *irqd)
-{
-   struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
-   struct samsung_pinctrl_drv_data *d = b-drvdata;
-   unsigned long pend = d-ctrl-weint_pend + b-eint_offset;
-
-   writel(1  irqd-hwirq, d-virt_base + pend);
-}
-
 static void exynos_wkup_irq_unmask(struct irq_data *irqd)
 {
struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
-- 
1.7.9.5

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[PATCH Resend] pinctrl: exynos: Fix build breakage

2013-06-17 Thread Sachin Kamat
'exynos_wkup_irq_ack' should be defined ahead of its call.

Fixes the following error:
drivers/pinctrl/pinctrl-exynos.c: In function ‘exynos_wkup_irq_mask’:
drivers/pinctrl/pinctrl-exynos.c:299:3: error: implicit declaration of
function ‘exynos_wkup_irq_ack’ [-Werror=implicit-function-declaration]
   exynos_wkup_irq_ack(irqd);

Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Cc: Doug Anderson diand...@chromium.org
---
Fixed the commit message.
---

 drivers/pinctrl/pinctrl-exynos.c |   18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 8cd5bf5..f9277bc 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -279,6 +279,15 @@ err_domains:
return ret;
 }
 
+static void exynos_wkup_irq_ack(struct irq_data *irqd)
+{
+   struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
+   struct samsung_pinctrl_drv_data *d = b-drvdata;
+   unsigned long pend = d-ctrl-weint_pend + b-eint_offset;
+
+   writel(1  irqd-hwirq, d-virt_base + pend);
+}
+
 static void exynos_wkup_irq_mask(struct irq_data *irqd)
 {
struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
@@ -307,15 +316,6 @@ static void exynos_wkup_irq_mask(struct irq_data *irqd)
spin_unlock_irqrestore(b-slock, flags);
 }
 
-static void exynos_wkup_irq_ack(struct irq_data *irqd)
-{
-   struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
-   struct samsung_pinctrl_drv_data *d = b-drvdata;
-   unsigned long pend = d-ctrl-weint_pend + b-eint_offset;
-
-   writel(1  irqd-hwirq, d-virt_base + pend);
-}
-
 static void exynos_wkup_irq_unmask(struct irq_data *irqd)
 {
struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
-- 
1.7.9.5

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Re: [PATCH v2 08/10] clocksource: exynos_mct: use (request/free)_irq calls for local timer registration

2013-06-17 Thread Mark Rutland
On Fri, Jun 14, 2013 at 03:02:50PM +0100, Chander Kashyap wrote:
 Replace the (setup/remove)_irq calls for local timer registration with
 (request/free)_irq calls. This generalizes the local timer registration API.
 Suggested by Mark Rutland.
 
 Signed-off-by: Chander Kashyap chander.kash...@linaro.org
 Cc: Mark Rutland mark.rutl...@arm.com
 
 Replace the (setup/remove)_irq calls for local timer registration with
 (request/free)_irq calls. This generalises the local timer registration API.
 
 Signed-off-by: Chander Kashyap chander.kash...@linaro.org

This looks much nicer now.

Acked-by: Mark Rutland mark.rutl...@arm.com

 ---
  drivers/clocksource/exynos_mct.c |   35 +--
  1 file changed, 9 insertions(+), 26 deletions(-)
 
 diff --git a/drivers/clocksource/exynos_mct.c 
 b/drivers/clocksource/exynos_mct.c
 index 662fcc0..a704804 100644
 --- a/drivers/clocksource/exynos_mct.c
 +++ b/drivers/clocksource/exynos_mct.c
 @@ -400,18 +400,6 @@ static irqreturn_t exynos4_mct_tick_isr(int irq, void 
 *dev_id)
   return IRQ_HANDLED;
  }
  
 -static struct irqaction mct_tick0_event_irq = {
 - .name   = mct_tick0_irq,
 - .flags  = IRQF_TIMER | IRQF_NOBALANCING,
 - .handler= exynos4_mct_tick_isr,
 -};
 -
 -static struct irqaction mct_tick1_event_irq = {
 - .name   = mct_tick1_irq,
 - .flags  = IRQF_TIMER | IRQF_NOBALANCING,
 - .handler= exynos4_mct_tick_isr,
 -};
 -
  static int __cpuinit exynos4_local_timer_setup(struct clock_event_device 
 *evt)
  {
   struct mct_clock_event_device *mevt;
 @@ -435,16 +423,15 @@ static int __cpuinit exynos4_local_timer_setup(struct 
 clock_event_device *evt)
   exynos4_mct_write(TICK_BASE_CNT, mevt-base + MCT_L_TCNTB_OFFSET);
  
   if (mct_int_type == MCT_INT_SPI) {
 - if (cpu == 0) {
 - mct_tick0_event_irq.dev_id = mevt;
 - evt-irq = mct_irqs[MCT_L0_IRQ];
 - setup_irq(evt-irq, mct_tick0_event_irq);
 - } else {
 - mct_tick1_event_irq.dev_id = mevt;
 - evt-irq = mct_irqs[MCT_L1_IRQ];
 - setup_irq(evt-irq, mct_tick1_event_irq);
 - irq_set_affinity(evt-irq, cpumask_of(1));
 + evt-irq = mct_irqs[MCT_L0_IRQ + cpu];
 + if (request_irq(evt-irq, exynos4_mct_tick_isr,
 + IRQF_TIMER | IRQF_NOBALANCING,
 + evt-name, mevt)) {
 + pr_err(exynos-mct: cannot register IRQ %d\n,
 + evt-irq);
 + return -EIO;
   }
 + irq_set_affinity(evt-irq, cpumask_of(cpu));
   } else {
   enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
   }
 @@ -454,13 +441,9 @@ static int __cpuinit exynos4_local_timer_setup(struct 
 clock_event_device *evt)
  
  static void exynos4_local_timer_stop(struct clock_event_device *evt)
  {
 - unsigned int cpu = smp_processor_id();
   evt-set_mode(CLOCK_EVT_MODE_UNUSED, evt);
   if (mct_int_type == MCT_INT_SPI)
 - if (cpu == 0)
 - remove_irq(evt-irq, mct_tick0_event_irq);
 - else
 - remove_irq(evt-irq, mct_tick1_event_irq);
 + free_irq(evt-irq, this_cpu_ptr(percpu_mct_tick));
   else
   disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
  }
 -- 
 1.7.9.5
 
 
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RE: [PATCH V6 6/6] clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2

2013-06-17 Thread Kukjin Kim
Padma Venkat wrote:
 
 Hi Mike,
 
 On Thu, Jun 13, 2013 at 8:32 AM, Padma Venkat padma@gmail.com wrote:
  Hi Mike,
 
  On Wed, Jun 12, 2013 at 10:15 PM, Mike Turquette mturque...@linaro.org
 wrote:
  Quoting Padmavathi Venna (2013-06-12 01:07:43)
  This patch adds enum entries for div_i2s1 and div_i2s2 which are
  required for i2s1 and i2s2 controllers.
 
  Signed-off-by: Padmavathi Venna padm...@samsung.com
 
  Looks good.  Did you want me to take the clk patches or just gathering
  Acks?
 
  Please take the patches :).
 
  Thanks
  Padma
 
 clk related patches in this set has some dependency on arch side
 patches because one of the patch replaces all '/include's with
 '#include's and adds a header file in
 arch/arm/boot/include/dt-bindings/. So all these patches required to
 go into one tree.
 
 Hi Kukjin,
 
 Can you please take all these patches into samsung-tree?
 
Padma, sure, I will.

BTW, Mike, according to your reply, I may get your ack on 2nd and 6th clk
patches...If any problems, please kindly let me know.

Thanks,
- Kukjin

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[PATCH] Documentation: Add examples to samsung-pinctrl device tree bindings documentation

2013-06-17 Thread Leela Krishna Amudala
This patch adds examples to samsung-pinctrl.txt documentaion file
on how to make gpio binding and gpio request

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
 .../bindings/pinctrl/samsung-pinctrl.txt   |   48 +++-
 1 file changed, 46 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index b2bc219..f1cf177 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -25,8 +25,18 @@ Required Properties:
 
   - gpio-controller: identifies the node as a gpio controller and pin bank.
   - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
-binding is used, the amount of cells must be specified as 2. See generic
-GPIO binding documentation for description of particular cells.
+binding is used, the amount of cells must be specified as 2. See the below
+mentioned gpio binding representation for description of particular cells.
+
+   Eg: gpx2 6 0
+   [phandle of the gpio controller node]
+   [pin number within the gpio controller]
+   [flags]
+
+   Values for gpio specifier:
+   - Pin number: is a value between 0 to 7.
+   - Flags: 0 - Active High
+1 - Active Low
 
 - Pin mux/config groups as child nodes: The pin mux (selecting pin function
   mode) and pin config (pull up/down, driver strength) settings are represented
@@ -274,3 +284,37 @@ Example 4: Set up the default pin state for uart 
controller.
 
pinctrl = devm_pinctrl_get_select_default(pdev-dev);
}
+
+Example 5: A display port client node that supports 'default' pinctrl state
+  and gpio binding.
+
+   display-port-controller {
+   samsung,color-space = 0;
+   samsung,dynamic-range = 0;
+   samsung,ycbcr-coeff = 0;
+   samsung,color-depth = 1;
+   samsung,link-rate = 0x06;
+   samsung,lane-count = 2;
+   samsung,hpd-gpio = gpx2 6 0;
+   pinctrl-names = default;
+   pinctrl-0 = dp_hpd;
+   };
+
+Example 6: Request the gpio for display port controller
+
+   static int exynos_dp_probe(struct platform_device *pdev)
+   {
+   int hpd_gpio, ret;
+   struct device *dev = pdev-dev;
+   struct device_node *dp_node = dev-of_node;
+
+   /* ... */
+
+   hpd_gpio = of_get_named_gpio(dp_node, samsung,hpd-gpio, 0);
+
+   /* ... */
+
+   ret = devm_gpio_request_one(pdev-dev, hpd_gpio, GPIOF_IN,
+   hpd_gpio);
+   /* ... */
+   }
-- 
1.7.9.5

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RE: [PATCH RESEND V2] ARM: dts: wm8994: Add wm8994 regulator support on smdk5250.

2013-06-17 Thread Kukjin Kim
Padmavathi Venna wrote:
 
 This patch adds the required regulator supplies and properties
 for wm8994 codec on smdk5250 board.
 
 Signed-off-by: Padmavathi Venna padm...@samsung.com
 ---
 
 Changes since V1:
   - Clubbed the same supply regulators as suggested by Mark.
 
Applied, thanks.

- Kukjin

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Re: [PATCH v2 08/10] clocksource: exynos_mct: use (request/free)_irq calls for local timer registration

2013-06-17 Thread Chander Kashyap
On 17 June 2013 15:31, Mark Rutland mark.rutl...@arm.com wrote:
 On Fri, Jun 14, 2013 at 03:02:50PM +0100, Chander Kashyap wrote:
 Replace the (setup/remove)_irq calls for local timer registration with
 (request/free)_irq calls. This generalizes the local timer registration API.
 Suggested by Mark Rutland.

 Signed-off-by: Chander Kashyap chander.kash...@linaro.org
 Cc: Mark Rutland mark.rutl...@arm.com

 Replace the (setup/remove)_irq calls for local timer registration with
 (request/free)_irq calls. This generalises the local timer registration API.

 Signed-off-by: Chander Kashyap chander.kash...@linaro.org

 This looks much nicer now.

 Acked-by: Mark Rutland mark.rutl...@arm.com
Thanks Mark.


 ---
  drivers/clocksource/exynos_mct.c |   35 +--
  1 file changed, 9 insertions(+), 26 deletions(-)

 diff --git a/drivers/clocksource/exynos_mct.c 
 b/drivers/clocksource/exynos_mct.c
 index 662fcc0..a704804 100644
 --- a/drivers/clocksource/exynos_mct.c
 +++ b/drivers/clocksource/exynos_mct.c
 @@ -400,18 +400,6 @@ static irqreturn_t exynos4_mct_tick_isr(int irq, void 
 *dev_id)
   return IRQ_HANDLED;
  }

 -static struct irqaction mct_tick0_event_irq = {
 - .name   = mct_tick0_irq,
 - .flags  = IRQF_TIMER | IRQF_NOBALANCING,
 - .handler= exynos4_mct_tick_isr,
 -};
 -
 -static struct irqaction mct_tick1_event_irq = {
 - .name   = mct_tick1_irq,
 - .flags  = IRQF_TIMER | IRQF_NOBALANCING,
 - .handler= exynos4_mct_tick_isr,
 -};
 -
  static int __cpuinit exynos4_local_timer_setup(struct clock_event_device 
 *evt)
  {
   struct mct_clock_event_device *mevt;
 @@ -435,16 +423,15 @@ static int __cpuinit exynos4_local_timer_setup(struct 
 clock_event_device *evt)
   exynos4_mct_write(TICK_BASE_CNT, mevt-base + MCT_L_TCNTB_OFFSET);

   if (mct_int_type == MCT_INT_SPI) {
 - if (cpu == 0) {
 - mct_tick0_event_irq.dev_id = mevt;
 - evt-irq = mct_irqs[MCT_L0_IRQ];
 - setup_irq(evt-irq, mct_tick0_event_irq);
 - } else {
 - mct_tick1_event_irq.dev_id = mevt;
 - evt-irq = mct_irqs[MCT_L1_IRQ];
 - setup_irq(evt-irq, mct_tick1_event_irq);
 - irq_set_affinity(evt-irq, cpumask_of(1));
 + evt-irq = mct_irqs[MCT_L0_IRQ + cpu];
 + if (request_irq(evt-irq, exynos4_mct_tick_isr,
 + IRQF_TIMER | IRQF_NOBALANCING,
 + evt-name, mevt)) {
 + pr_err(exynos-mct: cannot register IRQ %d\n,
 + evt-irq);
 + return -EIO;
   }
 + irq_set_affinity(evt-irq, cpumask_of(cpu));
   } else {
   enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
   }
 @@ -454,13 +441,9 @@ static int __cpuinit exynos4_local_timer_setup(struct 
 clock_event_device *evt)

  static void exynos4_local_timer_stop(struct clock_event_device *evt)
  {
 - unsigned int cpu = smp_processor_id();
   evt-set_mode(CLOCK_EVT_MODE_UNUSED, evt);
   if (mct_int_type == MCT_INT_SPI)
 - if (cpu == 0)
 - remove_irq(evt-irq, mct_tick0_event_irq);
 - else
 - remove_irq(evt-irq, mct_tick1_event_irq);
 + free_irq(evt-irq, this_cpu_ptr(percpu_mct_tick));
   else
   disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
  }
 --
 1.7.9.5





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with warm regards,
Chander Kashyap
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[PATCH v3 01/10] ARM: dts: fork out common Exynos5 nodes

2013-06-17 Thread Chander Kashyap
In preparation of adding support for Exynos5420, which has many peripherals
similar to Exynos5250, a new common Exynos5 device tree source file is
created out of the exising Exynos5250 device tree source file. Only the
common nodes required for basic boot up on Exynos5420 based boards are moved
into this new file and the rest of the common nodes would be moved subsequently.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
 arch/arm/boot/dts/exynos5.dtsi|  111 +
 arch/arm/boot/dts/exynos5250.dtsi |   68 +--
 2 files changed, 113 insertions(+), 66 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos5.dtsi

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
new file mode 100644
index 000..5684f89
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -0,0 +1,111 @@
+/*
+ * Samsung's Exynos5 SoC series common device tree source
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung's Exynos5 SoC series device nodes are listed in this file. 
Particular
+ * SoCs from Exynos5 series can include this file and provide values for SoCs
+ * specfic bindings.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include skeleton.dtsi
+
+/ {
+   interrupt-parent = gic;
+
+   chipid@1000 {
+   compatible = samsung,exynos4210-chipid;
+   reg = 0x1000 0x100;
+   };
+
+   watchdog {
+   compatible = samsung,s3c2410-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   status = disabled;
+   };
+
+   rtc {
+   compatible = samsung,s3c6410-rtc;
+   reg = 0x101E 0x100;
+   interrupts = 0 43 0, 0 44 0;
+   status = disabled;
+   };
+
+   combiner:interrupt-controller@1044 {
+   compatible = samsung,exynos4210-combiner;
+   #interrupt-cells = 2;
+   interrupt-controller;
+   samsung,combiner-nr = 32;
+   reg = 0x1044 0x1000;
+   interrupts =0 0 0, 0 1 0, 0 2 0, 0 3 0,
+   0 4 0, 0 5 0, 0 6 0, 0 7 0,
+   0 8 0, 0 9 0, 0 10 0, 0 11 0,
+   0 12 0, 0 13 0, 0 14 0, 0 15 0,
+   0 16 0, 0 17 0, 0 18 0, 0 19 0,
+   0 20 0, 0 21 0, 0 22 0, 0 23 0,
+   0 24 0, 0 25 0, 0 26 0, 0 27 0,
+   0 28 0, 0 29 0, 0 30 0, 0 31 0;
+   };
+
+   gic:interrupt-controller@10481000 {
+   compatible = arm,cortex-a15-gic, arm,cortex-a9-gic;
+   #interrupt-cells = 3;
+   interrupt-controller;
+   reg =   0x10481000 0x1000,
+   0x10482000 0x1000,
+   0x10484000 0x2000,
+   0x10486000 0x2000;
+   interrupts = 1 9 0xf04;
+   };
+
+   dwmmc_0: dwmmc0@1220 {
+   compatible = samsung,exynos5250-dw-mshc;
+   interrupts = 0 75 0;
+   #address-cells = 1;
+   #size-cells = 0;
+   };
+
+   dwmmc_1: dwmmc1@1221 {
+   compatible = samsung,exynos5250-dw-mshc;
+   interrupts = 0 76 0;
+   #address-cells = 1;
+   #size-cells = 0;
+   };
+
+   dwmmc_2: dwmmc2@1222 {
+   compatible = samsung,exynos5250-dw-mshc;
+   interrupts = 0 77 0;
+   #address-cells = 1;
+   #size-cells = 0;
+   };
+
+   serial@12C0 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x12C0 0x100;
+   interrupts = 0 51 0;
+   };
+
+   serial@12C1 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x12C1 0x100;
+   interrupts = 0 52 0;
+   };
+
+   serial@12C2 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x12C2 0x100;
+   interrupts = 0 53 0;
+   };
+
+   serial@12C3 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x12C3 0x100;
+   interrupts = 0 54 0;
+   };
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 0673524..2b59ea3 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -17,12 +17,11 @@
  * published by the Free Software Foundation.
 */
 
-/include/ skeleton.dtsi
-/include/ exynos5250-pinctrl.dtsi
+#include exynos5.dtsi
+#include exynos5250-pinctrl.dtsi
 
 / {
compatible = samsung,exynos5250;
-   interrupt-parent = gic;
 

[PATCH v3 02/10] ARM: dts: list the CPU nodes for Exynos5250

2013-06-17 Thread Chander Kashyap
Instead of having to specify the number for CPUs in Exynos5250 in platsmp.c
file, let the number of CPUs be determined by having this information listed
in Exynos5250 device tree file.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 arch/arm/boot/dts/exynos5250.dtsi |   16 
 arch/arm/mach-exynos/platsmp.c|   10 +++---
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 2b59ea3..b4b808e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -50,6 +50,22 @@
pinctrl3 = pinctrl_3;
};
 
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   cpu@0 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 0;
+   };
+   cpu@1 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 1;
+   };
+   };
+
pd_gsc: gsc-power-domain@0x10044000 {
compatible = samsung,exynos4210-pd;
reg = 0x10044000 0x20;
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 1a4e4e5..85ea4ca 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -180,10 +180,14 @@ static void __init exynos_smp_init_cpus(void)
void __iomem *scu_base = scu_base_addr();
unsigned int i, ncores;
 
-   if (soc_is_exynos5250())
-   ncores = 2;
-   else
+   if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+   else
+   /*
+* CPU Nodes are passed thru DT and set_cpu_possible
+* is set by arm_dt_init_cpu_maps.
+*/
+   return;
 
/* sanity check */
if (ncores  nr_cpu_ids) {
-- 
1.7.9.5

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[PATCH v3 08/10] clocksource: exynos_mct: use (request/free)_irq calls for local timer registration

2013-06-17 Thread Chander Kashyap
Replace the (setup/remove)_irq calls for local timer registration with
(request/free)_irq calls. This generalizes the local timer registration API.
Suggested by Mark Rutland.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Cc: Mark Rutland mark.rutl...@arm.com

Replace the (setup/remove)_irq calls for local timer registration with
(request/free)_irq calls. This generalises the local timer registration API.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Acked-by: Mark Rutland mark.rutl...@arm.com
---
 drivers/clocksource/exynos_mct.c |   35 +--
 1 file changed, 9 insertions(+), 26 deletions(-)

diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 662fcc0..a704804 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -400,18 +400,6 @@ static irqreturn_t exynos4_mct_tick_isr(int irq, void 
*dev_id)
return IRQ_HANDLED;
 }
 
-static struct irqaction mct_tick0_event_irq = {
-   .name   = mct_tick0_irq,
-   .flags  = IRQF_TIMER | IRQF_NOBALANCING,
-   .handler= exynos4_mct_tick_isr,
-};
-
-static struct irqaction mct_tick1_event_irq = {
-   .name   = mct_tick1_irq,
-   .flags  = IRQF_TIMER | IRQF_NOBALANCING,
-   .handler= exynos4_mct_tick_isr,
-};
-
 static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
 {
struct mct_clock_event_device *mevt;
@@ -435,16 +423,15 @@ static int __cpuinit exynos4_local_timer_setup(struct 
clock_event_device *evt)
exynos4_mct_write(TICK_BASE_CNT, mevt-base + MCT_L_TCNTB_OFFSET);
 
if (mct_int_type == MCT_INT_SPI) {
-   if (cpu == 0) {
-   mct_tick0_event_irq.dev_id = mevt;
-   evt-irq = mct_irqs[MCT_L0_IRQ];
-   setup_irq(evt-irq, mct_tick0_event_irq);
-   } else {
-   mct_tick1_event_irq.dev_id = mevt;
-   evt-irq = mct_irqs[MCT_L1_IRQ];
-   setup_irq(evt-irq, mct_tick1_event_irq);
-   irq_set_affinity(evt-irq, cpumask_of(1));
+   evt-irq = mct_irqs[MCT_L0_IRQ + cpu];
+   if (request_irq(evt-irq, exynos4_mct_tick_isr,
+   IRQF_TIMER | IRQF_NOBALANCING,
+   evt-name, mevt)) {
+   pr_err(exynos-mct: cannot register IRQ %d\n,
+   evt-irq);
+   return -EIO;
}
+   irq_set_affinity(evt-irq, cpumask_of(cpu));
} else {
enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
}
@@ -454,13 +441,9 @@ static int __cpuinit exynos4_local_timer_setup(struct 
clock_event_device *evt)
 
 static void exynos4_local_timer_stop(struct clock_event_device *evt)
 {
-   unsigned int cpu = smp_processor_id();
evt-set_mode(CLOCK_EVT_MODE_UNUSED, evt);
if (mct_int_type == MCT_INT_SPI)
-   if (cpu == 0)
-   remove_irq(evt-irq, mct_tick0_event_irq);
-   else
-   remove_irq(evt-irq, mct_tick1_event_irq);
+   free_irq(evt-irq, this_cpu_ptr(percpu_mct_tick));
else
disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
 }
-- 
1.7.9.5

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[PATCH v3 04/10] serial: samsung: select Exynos specific driver data if ARCH_EXYNOS is defined

2013-06-17 Thread Chander Kashyap
All Exynos4/5 SoCs share a common driver data in the samsung serial
driver. Hence, let the driver data inclusion be based on ARCH_EXYNOS
instead of SOC specific definition.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
 drivers/tty/serial/samsung.c |4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 2552c7f..e70d19a 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1703,9 +1703,7 @@ static struct s3c24xx_serial_drv_data 
s5pv210_serial_drv_data = {
 #define S5PV210_SERIAL_DRV_DATA(kernel_ulong_t)NULL
 #endif
 
-#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212) || \
-   defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) || \
-   defined(CONFIG_SOC_EXYNOS5440)
+#if defined(CONFIG_ARCH_EXYNOS)
 static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
.info = (struct s3c24xx_uart_info) {
.name   = Samsung Exynos4 UART,
-- 
1.7.9.5

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[PATCH v3 03/10] ARM: Exynos: Add support for Exynos5420 SoC

2013-06-17 Thread Chander Kashyap
Exynos5420 is new SoC in Samsung's Exynos5 SoC series. Add initial support
for this new SoC.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 arch/arm/mach-exynos/Kconfig |   10 ++
 arch/arm/mach-exynos/common.c|7 +++
 arch/arm/mach-exynos/mach-exynos5-dt.c   |1 +
 arch/arm/plat-samsung/include/plat/cpu.h |8 
 4 files changed, 26 insertions(+)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index ff18fc2..5ae41ec 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -71,6 +71,16 @@ config SOC_EXYNOS5250
help
  Enable EXYNOS5250 SoC support
 
+config SOC_EXYNOS5420
+   bool SAMSUNG EXYNOS5420
+   default y
+   depends on ARCH_EXYNOS5
+   select PM_GENERIC_DOMAINS if PM
+   select S5P_PM if PM
+   select S5P_SLEEP if PM
+   help
+ Enable EXYNOS5420 SoC support
+
 config SOC_EXYNOS5440
bool SAMSUNG EXYNOS5440
default y
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index f1240f3..6f435da 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -65,6 +65,7 @@ static const char name_exynos4210[] = EXYNOS4210;
 static const char name_exynos4212[] = EXYNOS4212;
 static const char name_exynos4412[] = EXYNOS4412;
 static const char name_exynos5250[] = EXYNOS5250;
+static const char name_exynos5420[] = EXYNOS5420;
 static const char name_exynos5440[] = EXYNOS5440;
 
 static void exynos4_map_io(void);
@@ -104,6 +105,12 @@ static struct cpu_table cpu_ids[] __initdata = {
.init   = exynos_init,
.name   = name_exynos5250,
}, {
+   .idcode = EXYNOS5420_SOC_ID,
+   .idmask = EXYNOS5_SOC_MASK,
+   .map_io = exynos5_map_io,
+   .init   = exynos_init,
+   .name   = name_exynos5420,
+   }, {
.idcode = EXYNOS5440_SOC_ID,
.idmask = EXYNOS5_SOC_MASK,
.map_io = exynos5440_map_io,
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 753b94f..050a5b1 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -57,6 +57,7 @@ static void __init exynos5_dt_machine_init(void)
 
 static char const *exynos5_dt_compat[] __initdata = {
samsung,exynos5250,
+   samsung,exynos5420,
samsung,exynos5440,
NULL
 };
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h 
b/arch/arm/plat-samsung/include/plat/cpu.h
index 989fefe..4fb1f03 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -46,6 +46,7 @@ extern unsigned long samsung_cpu_id;
 #define EXYNOS4_CPU_MASK   0xFFFE
 
 #define EXYNOS5250_SOC_ID  0x4352
+#define EXYNOS5420_SOC_ID  0xE542
 #define EXYNOS5440_SOC_ID  0xE544
 #define EXYNOS5_SOC_MASK   0xF000
 
@@ -67,6 +68,7 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, 
EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
+IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
 IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
 
 #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
@@ -142,6 +144,12 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, 
EXYNOS5_SOC_MASK)
 # define soc_is_exynos5250()   0
 #endif
 
+#if defined(CONFIG_SOC_EXYNOS5420)
+# define soc_is_exynos5420()   is_samsung_exynos5420()
+#else
+# define soc_is_exynos5420()   0
+#endif
+
 #if defined(CONFIG_SOC_EXYNOS5440)
 # define soc_is_exynos5440()   is_samsung_exynos5440()
 #else
-- 
1.7.9.5

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[PATCH v3 07/10] ARM: dts: Add initial device tree support for Exynos5420

2013-06-17 Thread Chander Kashyap
Add initial device tree nodes for Exynos5420 SoC and SMDK5420 board.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
 arch/arm/boot/dts/Makefile|1 +
 arch/arm/boot/dts/exynos5420-smdk5420.dts |   33 +
 arch/arm/boot/dts/exynos5420.dtsi |  103 +
 3 files changed, 137 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts
 create mode 100644 arch/arm/boot/dts/exynos5420.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f0895c5..5efa7e0 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos5440-sd5v1.dtb \
exynos5250-smdk5250.dtb \
exynos5250-snow.dtb \
+   exynos5420-smdk5420.dtb \
exynos5440-ssdk5440.dtb
 dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
ecx-2000.dtb
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
new file mode 100644
index 000..d14ece5
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -0,0 +1,33 @@
+/*
+ * SAMSUNG SMDK5420 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include exynos5420.dtsi
+
+/ {
+   model = Samsung SMDK5420 board based on EXYNOS5420;
+   compatible = samsung,smdk5420, samsung,exynos5420;
+
+   memory {
+   reg =   0x2000 0x8000;
+   };
+
+   chosen {
+   bootargs = console=ttySAC2,115200 init=/linuxrc;
+   };
+
+   fixed-rate-clocks {
+   oscclk {
+   compatible = samsung,exynos5420-oscclk;
+   clock-frequency = 2400;
+   };
+   };
+};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
new file mode 100644
index 000..e865be5
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -0,0 +1,103 @@
+/*
+ * SAMSUNG EXYNOS5420 SoC device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file.
+ * EXYNOS5420 based board files can include this file and provide
+ * values for board specfic bindings.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include exynos5.dtsi
+/ {
+   compatible = samsung,exynos5420;
+
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   cpu0: cpu@0 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 0x0;
+   clock-frequency = 8;
+   };
+
+   cpu1: cpu@1 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 0x1;
+   clock-frequency = 8;
+   };
+
+   cpu2: cpu@2 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 0x2;
+   clock-frequency = 8;
+   };
+
+   cpu3: cpu@3 {
+   device_type = cpu;
+   compatible = arm,cortex-a15;
+   reg = 0x3;
+   clock-frequency = 8;
+   };
+   };
+
+   clock: clock-controller@0x1001 {
+   compatible = samsung,exynos5420-clock;
+   reg = 0x1001 0x3;
+   #clock-cells = 1;
+   };
+
+   mct@101C {
+   compatible = samsung,exynos4210-mct;
+   reg = 0x101C 0x800;
+   interrupt-controller;
+   #interrups-cells = 1;
+   interrupt-parent = mct_map;
+   interrupts = 0, 1, 2, 3, 4, 5, 6, 7;
+   clocks = clock 1, clock 315;
+   clock-names = fin_pll, mct;
+
+   mct_map: mct-map {
+   #interrupt-cells = 1;
+   #address-cells = 0;
+   #size-cells = 0;
+   interrupt-map = 0 combiner 23 3,
+   1 combiner 23 4,
+   2 combiner 25 2,
+   3 combiner 25 3,
+   4 gic 0 120 0,
+   5 gic 0 121 0,
+   6 

[PATCH v3 10/10] ARM: Exynos: extend soft-reset support for Exynos5420

2013-06-17 Thread Chander Kashyap
Extend the soft reset support for Exynos5420 SoC.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
 arch/arm/mach-exynos/common.c |   11 ---
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 6f435da..4e6c227 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -330,10 +330,10 @@ void exynos5_restart(char mode, const char *cmd)
u32 val;
void __iomem *addr;
 
-   if (of_machine_is_compatible(samsung,exynos5250)) {
-   val = 0x1;
-   addr = EXYNOS_SWRESET;
-   } else if (of_machine_is_compatible(samsung,exynos5440)) {
+   val = 0x1;
+   addr = EXYNOS_SWRESET;
+
+   if (of_machine_is_compatible(samsung,exynos5440)) {
u32 status;
np = of_find_compatible_node(NULL, NULL, 
samsung,exynos5440-clock);
 
@@ -344,9 +344,6 @@ void exynos5_restart(char mode, const char *cmd)
val = __raw_readl(addr);
 
val = (val  0x) | (status  0x);
-   } else {
-   pr_err(%s: cannot support non-DT\n, __func__);
-   return;
}
 
__raw_writel(val, addr);
-- 
1.7.9.5

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[PATCH v3 06/10] clk: exynos5420: register clocks using common clock framework

2013-06-17 Thread Chander Kashyap
The Exynos5420 clocks are statically listed and registered using the
Samsung specific common clock helper functions.

Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
 .../devicetree/bindings/clock/exynos5420-clock.txt |  201 ++
 drivers/clk/samsung/Makefile   |1 +
 drivers/clk/samsung/clk-exynos5420.c   |  762 
 3 files changed, 964 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/exynos5420-clock.txt
 create mode 100644 drivers/clk/samsung/clk-exynos5420.c

diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt 
b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
new file mode 100644
index 000..9bcc4b1
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
@@ -0,0 +1,201 @@
+* Samsung Exynos5420 Clock Controller
+
+The Exynos5420 clock controller generates and supplies clock to various
+controllers within the Exynos5420 SoC.
+
+Required Properties:
+
+- comptible: should be one of the following.
+  - samsung,exynos5420-clock - controller compatible with Exynos5420 SoC.
+
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+- #clock-cells: should be 1.
+
+The following is the list of clocks generated by the controller. Each clock is
+assigned an identifier and client nodes use this identifier to specify the
+clock which they consume.
+
+
+   [Core Clocks]
+
+  ClockID
+  
+
+  fin_pll  1
+
+  [Clock Gate for Special Clocks]
+
+  ClockID
+  
+  sclk_uart0   128
+  sclk_uart1   129
+  sclk_uart2   130
+  sclk_uart3   131
+  sclk_mmc0132
+  sclk_mmc1133
+  sclk_mmc2134
+  sclk_spi0135
+  sclk_spi1136
+  sclk_spi2137
+  sclk_i2s1138
+  sclk_i2s2139
+  sclk_pcm1140
+  sclk_pcm2141
+  sclk_spdif   142
+  sclk_hdmi143
+  sclk_pixel   144
+  sclk_dp1 145
+  sclk_mipi1   146
+  sclk_fimd1   147
+  sclk_maudio0 148
+  sclk_maupcm0 149
+  sclk_usbd300 150
+  sclk_usbd301 151
+  sclk_usbphy300   152
+  sclk_usbphy301   153
+  sclk_unipro  154
+  sclk_pwm 155
+  sclk_gscl_wa 156
+  sclk_gscl_wb 157
+
+   [Peripheral Clock Gates]
+
+  ClockID
+  
+
+  aclk66_peric 256
+  uart0257
+  uart1258
+  uart2259
+  uart3260
+  i2c0 261
+  i2c1 262
+  i2c2 263
+  i2c3 264
+  i2c4 265
+  i2c5 266
+  i2c6 267
+  i2c7 268
+  i2c_hdmi 269
+  tsadc270
+  spi0 271
+  spi1 272
+  spi2 273
+  keyif274
+  i2s1 275
+  i2s2 276
+  pcm1 277
+  pcm2 278
+  pwm  279
+  spdif280
+  i2c8 281
+  i2c9 282
+  i2c10283
+  aclk66_psgen 300
+  chipid   301
+  sysreg   302
+  tzpc0303
+  tzpc1304
+  tzpc2305
+  tzpc3306
+  tzpc4307
+  tzpc5308
+  tzpc6309
+  tzpc7310
+  tzpc8311
+  tzpc9312
+  hdmi_cec 313
+  seckey   314
+  mct  315
+  wdt  316
+  rtc  317
+  tmu  318
+  tmu_gpu  319
+  pclk66_gpio  330
+  aclk200_fsys2350
+  mmc0 351
+  mmc1 352
+  mmc2 353
+  sromc354
+  ufs  355
+  aclk200_fsys 360
+  tsi  361
+  pdma0362
+  pdma1363
+  rtic 364
+  usbh20   365
+  usbd300  366
+  usbd301  377
+  aclk400_mscl 380
+  mscl0381
+  mscl1382
+  mscl2383
+  smmu_mscl0   384
+  smmu_mscl1   385
+  smmu_mscl2   386
+  aclk333  400
+  mfc  401
+  smmu_mfcl402
+  smmu_mfcr403
+  aclk200_disp1410
+  dsim1  

Re: [PATCH v2 07/10] ARM: dts: Add initial device tree support for Exynos5420

2013-06-17 Thread Chander Kashyap
On 17 June 2013 14:22, Alim Akhtar alim.akh...@gmail.com wrote:
 Hi Chander and Mark


 On Mon, Jun 17, 2013 at 2:16 PM, Mark Rutland mark.rutl...@arm.com wrote:

 Hi,

  diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
  b/arch/arm/boot/dts/exynos5420-smdk5420.dts
  new file mode 100644
  index 000..43f0eb8
  --- /dev/null
  +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
  @@ -0,0 +1,40 @@
  +/*
  + * SAMSUNG SMDK5420 board device tree source
  + *
  + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
  + *   http://www.samsung.com
  + *
  + * This program is free software; you can redistribute it and/or modify
  + * it under the terms of the GNU General Public License version 2 as
  + * published by the Free Software Foundation.
  +*/
  +
  +/dts-v1/;
  +#include exynos5420.dtsi
  +
  +/ {
  + model = Samsung SMDK5420 board based on EXYNOS5420;
  + compatible = samsung,smdk5420, samsung,exynos5420;
  +
  + memory {
  + reg =   0x2000 0x1000
  +  0x3000 0x1000
  +  0x4000 0x1000
  +  0x5000 0x1000
  +  0x6000 0x1000
  +  0x7000 0x1000
  +  0x8000 0x1000
  +  0x9000 0x1000;
  + };

 As splitting these into 256MB banks is a workaround for an implementation
 issue, there should at least be a comment to that effect.

 It would be far nicer if this were described as one bank and the kernel
 could
 split it up as necessary when using sparsemem.

 Yes, I thing this is not needed at all, the bootloader should be setting
 this for us.
 Either remove this completly or just add as single bank of memory, like
 starting address and the size.

I will convert it to single bank and resend.

 Thanks,
 Mark.
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 --
 Regards,
 Alim



--
with warm regards,
Chander Kashyap
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Re: [PATCH Resend] pinctrl: exynos: Fix build breakage

2013-06-17 Thread Linus Walleij
On Mon, Jun 17, 2013 at 11:38 AM, Sachin Kamat sachin.ka...@linaro.org wrote:

 'exynos_wkup_irq_ack' should be defined ahead of its call.

 Fixes the following error:
 drivers/pinctrl/pinctrl-exynos.c: In function ‘exynos_wkup_irq_mask’:
 drivers/pinctrl/pinctrl-exynos.c:299:3: error: implicit declaration of
 function ‘exynos_wkup_irq_ack’ [-Werror=implicit-function-declaration]
exynos_wkup_irq_ack(irqd);

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 Cc: Doug Anderson diand...@chromium.org
 ---
 Fixed the commit message.
 ---

Applied.

Usually you should state which commit caused
the problem in the commit message.

Yours,
Linus Walleij
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Re: [PATCH v3 07/10] ARM: dts: Add initial device tree support for Exynos5420

2013-06-17 Thread Tomasz Figa
-- 
Tomasz Figa
Linux Kernel Developer
Samsung RD Institute Poland
Samsung Electronics

On Monday 17 of June 2013 16:30:32 Chander Kashyap wrote:
 Add initial device tree nodes for Exynos5420 SoC and SMDK5420 board.
 
 Signed-off-by: Chander Kashyap chander.kash...@linaro.org
 ---
  arch/arm/boot/dts/Makefile|1 +
  arch/arm/boot/dts/exynos5420-smdk5420.dts |   33 +
  arch/arm/boot/dts/exynos5420.dtsi |  103
 + 3 files changed, 137 insertions(+)
  create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts
  create mode 100644 arch/arm/boot/dts/exynos5420.dtsi
 
 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
 index f0895c5..5efa7e0 100644
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
 @@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
   exynos5440-sd5v1.dtb \
   exynos5250-smdk5250.dtb \
   exynos5250-snow.dtb \
 + exynos5420-smdk5420.dtb \
   exynos5440-ssdk5440.dtb
  dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
   ecx-2000.dtb
 diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
 b/arch/arm/boot/dts/exynos5420-smdk5420.dts new file mode 100644
 index 000..d14ece5
 --- /dev/null
 +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
 @@ -0,0 +1,33 @@
 +/*
 + * SAMSUNG SMDK5420 board device tree source
 + *
 + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 + *   http://www.samsung.com
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +/dts-v1/;
 +#include exynos5420.dtsi
 +
 +/ {
 + model = Samsung SMDK5420 board based on EXYNOS5420;
 + compatible = samsung,smdk5420, samsung,exynos5420;
 +
 + memory {
 + reg =   0x2000 0x8000;
 + };
 +
 + chosen {
 + bootargs = console=ttySAC2,115200 init=/linuxrc;
 + };
 +
 + fixed-rate-clocks {
 + oscclk {
 + compatible = samsung,exynos5420-oscclk;
 + clock-frequency = 2400;
 + };
 + };
 +};
 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi new file mode 100644
 index 000..e865be5
 --- /dev/null
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -0,0 +1,103 @@
 +/*
 + * SAMSUNG EXYNOS5420 SoC device tree source
 + *
 + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 + *   http://www.samsung.com
 + *
 + * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file.
 + * EXYNOS5420 based board files can include this file and provide
 + * values for board specfic bindings.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +#include exynos5.dtsi
 +/ {
 + compatible = samsung,exynos5420;
 +
 + cpus {
 + #address-cells = 1;
 + #size-cells = 0;
 +
 + cpu0: cpu@0 {
 + device_type = cpu;
 + compatible = arm,cortex-a15;
 + reg = 0x0;
 + clock-frequency = 8;

It is the only frequency at which this SoC can run? What code does actually 
use this property? Can't this frequency be read by calling clk_get_rate() on 
armclk?

Otherwise looks good:

Reviewed-by: Tomasz Figa t.f...@samsung.com

Best regards,
Tomasz

 + };
 +
 + cpu1: cpu@1 {
 + device_type = cpu;
 + compatible = arm,cortex-a15;
 + reg = 0x1;
 + clock-frequency = 8;
 + };
 +
 + cpu2: cpu@2 {
 + device_type = cpu;
 + compatible = arm,cortex-a15;
 + reg = 0x2;
 + clock-frequency = 8;
 + };
 +
 + cpu3: cpu@3 {
 + device_type = cpu;
 + compatible = arm,cortex-a15;
 + reg = 0x3;
 + clock-frequency = 8;
 + };
 + };
 +
 + clock: clock-controller@0x1001 {
 + compatible = samsung,exynos5420-clock;
 + reg = 0x1001 0x3;
 + #clock-cells = 1;
 + };
 +
 + mct@101C {
 + compatible = samsung,exynos4210-mct;
 + reg = 0x101C 0x800;
 + interrupt-controller;
 + #interrups-cells = 1;
 + interrupt-parent = mct_map;
 + interrupts = 0, 1, 2, 3, 4, 5, 6, 7;
 + clocks = clock 1, clock 315;
 + clock-names = fin_pll, mct;
 +
 + mct_map: mct-map {
 + #interrupt-cells = 1;
 + #address-cells = 0;
 +

RE: [PATCH v3 04/10] serial: samsung: select Exynos specific driver data if ARCH_EXYNOS is defined

2013-06-17 Thread Kukjin Kim
Chander Kashyap wrote:
 
 All Exynos4/5 SoCs share a common driver data in the samsung serial
 driver. Hence, let the driver data inclusion be based on ARCH_EXYNOS
 instead of SOC specific definition.
 
 Signed-off-by: Chander Kashyap chander.kash...@linaro.org

(+ Greg, Jiri)

Acked-by: Kukjin Kim kgene@samsung.com

Greg, Jiri, please take this in your tree with my ack if no problem on this.

Thanks,
- Kukjin

 ---
  drivers/tty/serial/samsung.c |4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)
 
 diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
 index 2552c7f..e70d19a 100644
 --- a/drivers/tty/serial/samsung.c
 +++ b/drivers/tty/serial/samsung.c
 @@ -1703,9 +1703,7 @@ static struct s3c24xx_serial_drv_data
 s5pv210_serial_drv_data = {
  #define S5PV210_SERIAL_DRV_DATA  (kernel_ulong_t)NULL
  #endif
 
 -#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212) || \
 - defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) ||
 \
 - defined(CONFIG_SOC_EXYNOS5440)
 +#if defined(CONFIG_ARCH_EXYNOS)
  static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
   .info = (struct s3c24xx_uart_info) {
   .name   = Samsung Exynos4 UART,
 --
 1.7.9.5

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Re: [PATCH Resend] pinctrl: exynos: Fix build breakage

2013-06-17 Thread Sachin Kamat
On 17 June 2013 16:55, Linus Walleij linus.wall...@linaro.org wrote:
 On Mon, Jun 17, 2013 at 11:38 AM, Sachin Kamat sachin.ka...@linaro.org 
 wrote:

 'exynos_wkup_irq_ack' should be defined ahead of its call.

 Fixes the following error:
 drivers/pinctrl/pinctrl-exynos.c: In function ‘exynos_wkup_irq_mask’:
 drivers/pinctrl/pinctrl-exynos.c:299:3: error: implicit declaration of
 function ‘exynos_wkup_irq_ack’ [-Werror=implicit-function-declaration]
exynos_wkup_irq_ack(irqd);

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 Cc: Doug Anderson diand...@chromium.org
 ---
 Fixed the commit message.
 ---

 Applied.

Thanks.


 Usually you should state which commit caused
 the problem in the commit message.

Usually I do. But in this case it was not caused by a single commit
per se but a combination.
Hence I wasn't sure if I should mention both as the ones causing it.


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Re: [PATCH v3 00/10] ARM: Exynos: Add Exynos5420 SoC support

2013-06-17 Thread Tomasz Figa
Hi Chander,

On Monday 17 of June 2013 16:30:25 Chander Kashyap wrote:
 Exynos5420 is new SoC in Samsung's Exynos5 SoC series. This series adds
 initial support for this SoC.
 Changes since v2:
 
 1. Renamed oscclk to fin_pll, in order to keep it consistant with
 Exynos4/Exynos5 2. Pass memory as single bank rather than splitting in
 256MB size banks.
 
 Changes since v1:
 
 1. As not-dt platforms will not be supported from 3.11 onwards, following
patches from previous patch series are dropped:
irqchip: exynos-combiner: set irq base as 256 for Exynos5420
ARM: Exynos: initialize l2x0 cache controller only for cortex-a9 based
 SoCs 2. Added device type property in cpu node in the following patch:
ARM: dts: list the CPU nodes for Exynos5250
 3. Sorted out the nodes listed in based upon the physical addresses as
 suggested by Tomasz Figa.
 4. As Tomasz is going to consolidate the secondary cpu power register
 address calculation in all possible scnarios, hence dropped the following
 patch: ARM: Exynos: fix secondary cpu power control register address
 calculation 5. Replaced the setup/remove)_irq calls with
 (request/free)_irq calls as suggested by Mark Rutland in patch:
clocksource: exynos_mct: use (request/free)_irq calls for local timer
 registration
 6. Changed the registration of epll and rpll from pll35xx to pl36xx.
 7. Changed driver data selection for serial port, based on ARCH_EXYNOS.
 8. Changed the interrupt cells from 2 to 1 as suggested by Tomasz Figa.
 
 Chander Kashyap (10):
   ARM: dts: fork out common Exynos5 nodes
   ARM: dts: list the CPU nodes for Exynos5250
   ARM: Exynos: Add support for Exynos5420 SoC
   serial: samsung: select Exynos specific driver data if ARCH_EXYNOS is
 defined
   ARM: Exynos: use four additional chipid bits to identify Exynos
 family
   clk: exynos5420: register clocks using common clock framework
   ARM: dts: Add initial device tree support for Exynos5420
   clocksource: exynos_mct: use (request/free)_irq calls for local timer
 registration
   ARM: Exynos: add secondary CPU boot base location for Exynos5420
   ARM: Exynos: extend soft-reset support for Exynos5420
 
  .../devicetree/bindings/clock/exynos5420-clock.txt |  201 ++
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/exynos5.dtsi |  111 +++
  arch/arm/boot/dts/exynos5250.dtsi  |   80 +-
  arch/arm/boot/dts/exynos5420-smdk5420.dts  |   33 +
  arch/arm/boot/dts/exynos5420.dtsi  |  103 +++
  arch/arm/mach-exynos/Kconfig   |   10 +
  arch/arm/mach-exynos/common.c  |   18 +-
  arch/arm/mach-exynos/include/mach/uncompress.h |7 +-
  arch/arm/mach-exynos/mach-exynos5-dt.c |1 +
  arch/arm/mach-exynos/platsmp.c |   12 +-
  arch/arm/plat-samsung/include/plat/cpu.h   |8 +
  drivers/clk/samsung/Makefile   |1 +
  drivers/clk/samsung/clk-exynos5420.c   |  762
  drivers/clocksource/exynos_mct.c   |  
 35 +-
  drivers/tty/serial/samsung.c   |4 +-
  16 files changed, 1280 insertions(+), 107 deletions(-)
  create mode 100644
 Documentation/devicetree/bindings/clock/exynos5420-clock.txt create mode
 100644 arch/arm/boot/dts/exynos5.dtsi
  create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts
  create mode 100644 arch/arm/boot/dts/exynos5420.dtsi
  create mode 100644 drivers/clk/samsung/clk-exynos5420.c

Except one comment for patch 07/10, the whole series looks good to me. Have my

Reviewed-by: Tomasz Figa t.f...@samsung.com

Best regards,
Tomasz

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RE: [PATCH v3 06/10] clk: exynos5420: register clocks using common clock framework

2013-06-17 Thread Kukjin Kim
Chander Kashyap wrote:
 
 The Exynos5420 clocks are statically listed and registered using the
 Samsung specific common clock helper functions.
 
 Signed-off-by: Chander Kashyap chander.kash...@linaro.org
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org

(+ Mike)

Mike, if you're OK on this, please let me know so that I could take this
with others.

Thanks,
- Kukjin

 ---
  .../devicetree/bindings/clock/exynos5420-clock.txt |  201 ++
  drivers/clk/samsung/Makefile   |1 +
  drivers/clk/samsung/clk-exynos5420.c   |  762
 
  3 files changed, 964 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/clock/exynos5420-
 clock.txt
  create mode 100644 drivers/clk/samsung/clk-exynos5420.c
 
 diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
 b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
 new file mode 100644
 index 000..9bcc4b1
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
 @@ -0,0 +1,201 @@
 +* Samsung Exynos5420 Clock Controller
 +
 +The Exynos5420 clock controller generates and supplies clock to various
 +controllers within the Exynos5420 SoC.
 +
 +Required Properties:
 +
 +- comptible: should be one of the following.
 +  - samsung,exynos5420-clock - controller compatible with Exynos5420
 SoC.
 +
 +- reg: physical base address of the controller and length of memory
 mapped
 +  region.
 +
 +- #clock-cells: should be 1.
 +
 +The following is the list of clocks generated by the controller. Each
 clock is
 +assigned an identifier and client nodes use this identifier to specify
 the
 +clock which they consume.
 +
 +
 +   [Core Clocks]
 +
 +  Clock  ID
 +  
 +
 +  fin_pll1
 +
 +  [Clock Gate for Special Clocks]
 +
 +  Clock  ID
 +  
 +  sclk_uart0 128
 +  sclk_uart1 129
 +  sclk_uart2 130
 +  sclk_uart3 131
 +  sclk_mmc0  132
 +  sclk_mmc1  133
 +  sclk_mmc2  134
 +  sclk_spi0  135
 +  sclk_spi1  136
 +  sclk_spi2  137
 +  sclk_i2s1  138
 +  sclk_i2s2  139
 +  sclk_pcm1  140
 +  sclk_pcm2  141
 +  sclk_spdif 142
 +  sclk_hdmi  143
 +  sclk_pixel 144
 +  sclk_dp1   145
 +  sclk_mipi1 146
 +  sclk_fimd1 147
 +  sclk_maudio0   148
 +  sclk_maupcm0   149
 +  sclk_usbd300   150
 +  sclk_usbd301   151
 +  sclk_usbphy300 152
 +  sclk_usbphy301 153
 +  sclk_unipro154
 +  sclk_pwm   155
 +  sclk_gscl_wa   156
 +  sclk_gscl_wb   157
 +
 +   [Peripheral Clock Gates]
 +
 +  Clock  ID
 +  
 +
 +  aclk66_peric   256
 +  uart0  257
 +  uart1  258
 +  uart2  259
 +  uart3  260
 +  i2c0   261
 +  i2c1   262
 +  i2c2   263
 +  i2c3   264
 +  i2c4   265
 +  i2c5   266
 +  i2c6   267
 +  i2c7   268
 +  i2c_hdmi   269
 +  tsadc  270
 +  spi0   271
 +  spi1   272
 +  spi2   273
 +  keyif  274
 +  i2s1   275
 +  i2s2   276
 +  pcm1   277
 +  pcm2   278
 +  pwm279
 +  spdif  280
 +  i2c8   281
 +  i2c9   282
 +  i2c10  283
 +  aclk66_psgen   300
 +  chipid 301
 +  sysreg 302
 +  tzpc0  303
 +  tzpc1  304
 +  tzpc2  305
 +  tzpc3  306
 +  tzpc4  307
 +  tzpc5  308
 +  tzpc6  309
 +  tzpc7  310
 +  tzpc8  311
 +  tzpc9  312
 +  hdmi_cec   313
 +  seckey 314
 +  mct315
 +  wdt316
 +  rtc317
 +  tmu318
 +  tmu_gpu319
 +  pclk66_gpio330
 +  aclk200_fsys2  350
 +  mmc0   351
 +  mmc1   352
 +  mmc2   353
 +  sromc  354
 +  ufs355
 +  aclk200_fsys   360
 +  tsi361
 +  pdma0  362
 +  pdma1  363
 +  rtic   364
 +  usbh20 365
 +  usbd300  

RE: [PATCH v3 08/10] clocksource: exynos_mct: use (request/free)_irq calls for local timer registration

2013-06-17 Thread Kukjin Kim
Chander Kashyap wrote:
 
 Replace the (setup/remove)_irq calls for local timer registration with
 (request/free)_irq calls. This generalizes the local timer registration
 API.
 Suggested by Mark Rutland.
 
 Signed-off-by: Chander Kashyap chander.kash...@linaro.org
 Cc: Mark Rutland mark.rutl...@arm.com
 
 Replace the (setup/remove)_irq calls for local timer registration with
 (request/free)_irq calls. This generalises the local timer registration
 API.
 
 Signed-off-by: Chander Kashyap chander.kash...@linaro.org

Duplicated comments and sign-off ?...

- Kukjin

 Acked-by: Mark Rutland mark.rutl...@arm.com
 ---
  drivers/clocksource/exynos_mct.c |   35
+-
 -
  1 file changed, 9 insertions(+), 26 deletions(-)
 
 diff --git a/drivers/clocksource/exynos_mct.c
 b/drivers/clocksource/exynos_mct.c
 index 662fcc0..a704804 100644
 --- a/drivers/clocksource/exynos_mct.c
 +++ b/drivers/clocksource/exynos_mct.c
 @@ -400,18 +400,6 @@ static irqreturn_t exynos4_mct_tick_isr(int irq, void
 *dev_id)
   return IRQ_HANDLED;
  }
 
 -static struct irqaction mct_tick0_event_irq = {
 - .name   = mct_tick0_irq,
 - .flags  = IRQF_TIMER | IRQF_NOBALANCING,
 - .handler= exynos4_mct_tick_isr,
 -};
 -
 -static struct irqaction mct_tick1_event_irq = {
 - .name   = mct_tick1_irq,
 - .flags  = IRQF_TIMER | IRQF_NOBALANCING,
 - .handler= exynos4_mct_tick_isr,
 -};
 -
  static int __cpuinit exynos4_local_timer_setup(struct clock_event_device
 *evt)
  {
   struct mct_clock_event_device *mevt;
 @@ -435,16 +423,15 @@ static int __cpuinit
 exynos4_local_timer_setup(struct clock_event_device *evt)
   exynos4_mct_write(TICK_BASE_CNT, mevt-base + MCT_L_TCNTB_OFFSET);
 
   if (mct_int_type == MCT_INT_SPI) {
 - if (cpu == 0) {
 - mct_tick0_event_irq.dev_id = mevt;
 - evt-irq = mct_irqs[MCT_L0_IRQ];
 - setup_irq(evt-irq, mct_tick0_event_irq);
 - } else {
 - mct_tick1_event_irq.dev_id = mevt;
 - evt-irq = mct_irqs[MCT_L1_IRQ];
 - setup_irq(evt-irq, mct_tick1_event_irq);
 - irq_set_affinity(evt-irq, cpumask_of(1));
 + evt-irq = mct_irqs[MCT_L0_IRQ + cpu];
 + if (request_irq(evt-irq, exynos4_mct_tick_isr,
 + IRQF_TIMER | IRQF_NOBALANCING,
 + evt-name, mevt)) {
 + pr_err(exynos-mct: cannot register IRQ %d\n,
 + evt-irq);
 + return -EIO;
   }
 + irq_set_affinity(evt-irq, cpumask_of(cpu));
   } else {
   enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
   }
 @@ -454,13 +441,9 @@ static int __cpuinit exynos4_local_timer_setup(struct
 clock_event_device *evt)
 
  static void exynos4_local_timer_stop(struct clock_event_device *evt)
  {
 - unsigned int cpu = smp_processor_id();
   evt-set_mode(CLOCK_EVT_MODE_UNUSED, evt);
   if (mct_int_type == MCT_INT_SPI)
 - if (cpu == 0)
 - remove_irq(evt-irq, mct_tick0_event_irq);
 - else
 - remove_irq(evt-irq, mct_tick1_event_irq);
 + free_irq(evt-irq, this_cpu_ptr(percpu_mct_tick));
   else
   disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
  }
 --
 1.7.9.5

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RE: [PATCH v3 00/10] ARM: Exynos: Add Exynos5420 SoC support

2013-06-17 Thread Kukjin Kim
Chander Kashyap wrote:
 
 Exynos5420 is new SoC in Samsung's Exynos5 SoC series. This series adds
 initial support for this SoC.
 Changes since v2:
 
 1. Renamed oscclk to fin_pll, in order to keep it consistant with
 Exynos4/Exynos5
 2. Pass memory as single bank rather than splitting in 256MB size banks.
 
 Changes since v1:
 
 1. As not-dt platforms will not be supported from 3.11 onwards, following
patches from previous patch series are dropped:
irqchip: exynos-combiner: set irq base as 256 for Exynos5420
ARM: Exynos: initialize l2x0 cache controller only for cortex-a9 based
 SoCs
 2. Added device type property in cpu node in the following patch:
ARM: dts: list the CPU nodes for Exynos5250
 3. Sorted out the nodes listed in based upon the physical addresses as
 suggested
by Tomasz Figa.
 4. As Tomasz is going to consolidate the secondary cpu power register
 address
calculation in all possible scnarios, hence dropped the following
patch:
   ARM: Exynos: fix secondary cpu power control register address
 calculation
 5. Replaced the setup/remove)_irq calls with (request/free)_irq calls as
suggested by Mark Rutland in patch:
clocksource: exynos_mct: use (request/free)_irq calls for local timer
 registration
 6. Changed the registration of epll and rpll from pll35xx to pl36xx.
 7. Changed driver data selection for serial port, based on ARCH_EXYNOS.
 8. Changed the interrupt cells from 2 to 1 as suggested by Tomasz Figa.
 
 Chander Kashyap (10):
   ARM: dts: fork out common Exynos5 nodes
   ARM: dts: list the CPU nodes for Exynos5250
   ARM: Exynos: Add support for Exynos5420 SoC
   serial: samsung: select Exynos specific driver data if ARCH_EXYNOS is
 defined
   ARM: Exynos: use four additional chipid bits to identify Exynos
 family
   clk: exynos5420: register clocks using common clock framework
   ARM: dts: Add initial device tree support for Exynos5420
   clocksource: exynos_mct: use (request/free)_irq calls for local timer
 registration
   ARM: Exynos: add secondary CPU boot base location for Exynos5420
   ARM: Exynos: extend soft-reset support for Exynos5420
 
  .../devicetree/bindings/clock/exynos5420-clock.txt |  201 ++
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/exynos5.dtsi |  111 +++
  arch/arm/boot/dts/exynos5250.dtsi  |   80 +-
  arch/arm/boot/dts/exynos5420-smdk5420.dts  |   33 +
  arch/arm/boot/dts/exynos5420.dtsi  |  103 +++
  arch/arm/mach-exynos/Kconfig   |   10 +
  arch/arm/mach-exynos/common.c  |   18 +-
  arch/arm/mach-exynos/include/mach/uncompress.h |7 +-
  arch/arm/mach-exynos/mach-exynos5-dt.c |1 +
  arch/arm/mach-exynos/platsmp.c |   12 +-
  arch/arm/plat-samsung/include/plat/cpu.h   |8 +
  drivers/clk/samsung/Makefile   |1 +
  drivers/clk/samsung/clk-exynos5420.c   |  762
 
  drivers/clocksource/exynos_mct.c   |   35 +-
  drivers/tty/serial/samsung.c   |4 +-
  16 files changed, 1280 insertions(+), 107 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/clock/exynos5420-
 clock.txt
  create mode 100644 arch/arm/boot/dts/exynos5.dtsi
  create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts
  create mode 100644 arch/arm/boot/dts/exynos5420.dtsi
  create mode 100644 drivers/clk/samsung/clk-exynos5420.c
 
 --
 1.7.9.5

Chander, basically looks good to me but there are some comments on several
patches.

Please address comments then, let me take this series after getting Mike's
ack on clock stuff.

Thanks,
- Kukjin

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RE: [PATCH] Documentation: Add examples to samsung-pinctrl device tree bindings documentation

2013-06-17 Thread Kukjin Kim
Leela Krishna Amudala wrote:
 
 This patch adds examples to samsung-pinctrl.txt documentaion file
 on how to make gpio binding and gpio request
 
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Doug Anderson diand...@chromium.org
 ---
  .../bindings/pinctrl/samsung-pinctrl.txt   |   48
 +++-
  1 file changed, 46 insertions(+), 2 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 index b2bc219..f1cf177 100644
 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 @@ -25,8 +25,18 @@ Required Properties:
 
- gpio-controller: identifies the node as a gpio controller and pin
 bank.
- #gpio-cells: number of cells in GPIO specifier. Since the generic
 GPIO
 -binding is used, the amount of cells must be specified as 2. See
 generic
 -GPIO binding documentation for description of particular cells.
 +binding is used, the amount of cells must be specified as 2. See the
 below
 +mentioned gpio binding representation for description of particular
 cells.
 +
 + Eg: gpx2 6 0
 + [phandle of the gpio controller node]
 + [pin number within the gpio controller]
 + [flags]
 +
 + Values for gpio specifier:
 + - Pin number: is a value between 0 to 7.
 + - Flags: 0 - Active High
 +  1 - Active Low
 
  - Pin mux/config groups as child nodes: The pin mux (selecting pin
 function
mode) and pin config (pull up/down, driver strength) settings are
 represented
 @@ -274,3 +284,37 @@ Example 4: Set up the default pin state for uart
 controller.
 
   pinctrl = devm_pinctrl_get_select_default(pdev-dev);
   }
 +
 +Example 5: A display port client node that supports 'default' pinctrl
 state
 +and gpio binding.
 +
 + display-port-controller {
 + samsung,color-space = 0;
 + samsung,dynamic-range = 0;
 + samsung,ycbcr-coeff = 0;
 + samsung,color-depth = 1;
 + samsung,link-rate = 0x06;
 + samsung,lane-count = 2;
 + samsung,hpd-gpio = gpx2 6 0;
 + pinctrl-names = default;
 + pinctrl-0 = dp_hpd;
 + };
 +
 +Example 6: Request the gpio for display port controller
 +
 + static int exynos_dp_probe(struct platform_device *pdev)
 + {
 + int hpd_gpio, ret;
 + struct device *dev = pdev-dev;
 + struct device_node *dp_node = dev-of_node;
 +
 + /* ... */
 +
 + hpd_gpio = of_get_named_gpio(dp_node, samsung,hpd-gpio,
0);
 +
 + /* ... */
 +
 + ret = devm_gpio_request_one(pdev-dev, hpd_gpio, GPIOF_IN,
 + hpd_gpio);
 + /* ... */
 + }
 --
 1.7.9.5

Looks good to me, applied.

Thanks,
- Kukjin

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Re: [PATCH Resend] pinctrl: exynos: Fix build breakage

2013-06-17 Thread Tomasz Figa
Hi Sachin,

On Monday 17 of June 2013 15:08:12 Sachin Kamat wrote:
 'exynos_wkup_irq_ack' should be defined ahead of its call.
 
 Fixes the following error:
 drivers/pinctrl/pinctrl-exynos.c: In function ‘exynos_wkup_irq_mask’:
 drivers/pinctrl/pinctrl-exynos.c:299:3: error: implicit declaration of
 function ‘exynos_wkup_irq_ack’ [-Werror=implicit-function-declaration]
exynos_wkup_irq_ack(irqd);
 
 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 Cc: Doug Anderson diand...@chromium.org
 ---
 Fixed the commit message.
 ---

This patch is incorrect.

Compilation error is caused by merge error of Doug's patch:

pinctrl: exynos: ack level-triggered interrupts before unmasking

hunk of which went to wrong function - mask instead of unmask.

Linus, could you fix it?

Best regards,
Tomasz

  drivers/pinctrl/pinctrl-exynos.c |   18 +-
  1 file changed, 9 insertions(+), 9 deletions(-)
 
 diff --git a/drivers/pinctrl/pinctrl-exynos.c
 b/drivers/pinctrl/pinctrl-exynos.c index 8cd5bf5..f9277bc 100644
 --- a/drivers/pinctrl/pinctrl-exynos.c
 +++ b/drivers/pinctrl/pinctrl-exynos.c
 @@ -279,6 +279,15 @@ err_domains:
   return ret;
  }
 
 +static void exynos_wkup_irq_ack(struct irq_data *irqd)
 +{
 + struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
 + struct samsung_pinctrl_drv_data *d = b-drvdata;
 + unsigned long pend = d-ctrl-weint_pend + b-eint_offset;
 +
 + writel(1  irqd-hwirq, d-virt_base + pend);
 +}
 +
  static void exynos_wkup_irq_mask(struct irq_data *irqd)
  {
   struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
 @@ -307,15 +316,6 @@ static void exynos_wkup_irq_mask(struct irq_data *irqd)
 spin_unlock_irqrestore(b-slock, flags);
  }
 
 -static void exynos_wkup_irq_ack(struct irq_data *irqd)
 -{
 - struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
 - struct samsung_pinctrl_drv_data *d = b-drvdata;
 - unsigned long pend = d-ctrl-weint_pend + b-eint_offset;
 -
 - writel(1  irqd-hwirq, d-virt_base + pend);
 -}
 -
  static void exynos_wkup_irq_unmask(struct irq_data *irqd)
  {
   struct samsung_pin_bank *b = irq_data_get_irq_chip_data(irqd);
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RE: [PATCH] Documentation: Add examples to samsung-pinctrl device tree bindings documentation

2013-06-17 Thread Kukjin Kim
Kukjin Kim wrote:
 
 Leela Krishna Amudala wrote:
 
  This patch adds examples to samsung-pinctrl.txt documentaion file
  on how to make gpio binding and gpio request
 
  Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
  Reviewed-by: Doug Anderson diand...@chromium.org
  ---
   .../bindings/pinctrl/samsung-pinctrl.txt   |   48
  +++-
   1 file changed, 46 insertions(+), 2 deletions(-)
 
  diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-
 pinctrl.txt
  b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
  index b2bc219..f1cf177 100644
  --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
  +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
  @@ -25,8 +25,18 @@ Required Properties:
 
 - gpio-controller: identifies the node as a gpio controller and pin
  bank.
 - #gpio-cells: number of cells in GPIO specifier. Since the generic
  GPIO
  -binding is used, the amount of cells must be specified as 2. See
  generic
  -GPIO binding documentation for description of particular cells.
  +binding is used, the amount of cells must be specified as 2. See
the
  below
  +mentioned gpio binding representation for description of particular
  cells.
  +
  +   Eg: gpx2 6 0
  +   [phandle of the gpio controller node]
  +   [pin number within the gpio controller]
  +   [flags]
  +
  +   Values for gpio specifier:
  +   - Pin number: is a value between 0 to 7.
  +   - Flags: 0 - Active High
  +1 - Active Low
 
   - Pin mux/config groups as child nodes: The pin mux (selecting pin
  function
 mode) and pin config (pull up/down, driver strength) settings are
  represented
  @@ -274,3 +284,37 @@ Example 4: Set up the default pin state for uart
  controller.
 
  pinctrl = devm_pinctrl_get_select_default(pdev-dev);
  }
  +
  +Example 5: A display port client node that supports 'default' pinctrl
  state
  +  and gpio binding.
  +
  +   display-port-controller {
  +   samsung,color-space = 0;
  +   samsung,dynamic-range = 0;
  +   samsung,ycbcr-coeff = 0;
  +   samsung,color-depth = 1;
  +   samsung,link-rate = 0x06;
  +   samsung,lane-count = 2;
  +   samsung,hpd-gpio = gpx2 6 0;
  +   pinctrl-names = default;
  +   pinctrl-0 = dp_hpd;
  +   };
  +
  +Example 6: Request the gpio for display port controller
  +
  +   static int exynos_dp_probe(struct platform_device *pdev)
  +   {
  +   int hpd_gpio, ret;
  +   struct device *dev = pdev-dev;
  +   struct device_node *dp_node = dev-of_node;
  +
  +   /* ... */
  +
  +   hpd_gpio = of_get_named_gpio(dp_node, samsung,hpd-gpio,
0);
  +
  +   /* ... */
  +
  +   ret = devm_gpio_request_one(pdev-dev, hpd_gpio, GPIOF_IN,
  +   hpd_gpio);
  +   /* ... */
  +   }
  --
  1.7.9.5
 
 Looks good to me, applied.
 
(+ Linus Walleij)

Hmm, probably I need Linus' ack on this ;-)

- Kukjin

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RE: [PATCH v2] clk: exynos4: Add clock entries for TMU

2013-06-17 Thread Kukjin Kim
Sachin Kamat wrote:
 
 On 10 June 2013 14:21, Sachin Kamat sachin.ka...@linaro.org wrote:
  Hi Kukjin,
 
  On 29 April 2013 22:30, Mike Turquette mturque...@linaro.org wrote:
  Quoting Sachin Kamat (2013-04-21 20:55:46)
  Added clock entries for thermal management unit (TMU) for
  Exynos4 SoCs.
 
  Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
  Cc: Thomas Abraham thomas.abra...@linaro.org
  Cc: Mike Turquette mturque...@linaro.org
 
  This has my Ack if you plan to take it through the Samsung tree.
  If you want it to go through the clk tree then I can take it in after
  3.10-rc1.
 
  Can you apply this one too to Samsung tree?
  Thanks.
 
 Kukjin,
 
 Can you please take this through your tree? This alreday has MIke's Ack.
 
Sure, I've applied with Mike's ack.

Thanks,
- Kukjin

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Re: [PATCH] Documentation: Add examples to samsung-pinctrl device tree bindings documentation

2013-06-17 Thread Tomasz Figa
Hi Leela,

On Monday 17 of June 2013 16:14:55 Leela Krishna Amudala wrote:
 This patch adds examples to samsung-pinctrl.txt documentaion file
 on how to make gpio binding and gpio request
 
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Doug Anderson diand...@chromium.org
 ---
  .../bindings/pinctrl/samsung-pinctrl.txt   |   48
 +++- 1 file changed, 46 insertions(+), 2 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index
 b2bc219..f1cf177 100644
 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 @@ -25,8 +25,18 @@ Required Properties:
 
- gpio-controller: identifies the node as a gpio controller and pin bank.
 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO - 
   binding is used, the amount of cells must be specified as 2. See generic
 -GPIO binding documentation for description of particular cells. +   
 binding is used, the amount of cells must be specified as 2. See the below
 +mentioned gpio binding representation for description of particular
 cells. +
 + Eg: gpx2 6 0
 + [phandle of the gpio controller node]
 + [pin number within the gpio controller]
 + [flags]
 +
 + Values for gpio specifier:
 + - Pin number: is a value between 0 to 7.
 + - Flags: 0 - Active High
 +  1 - Active Low
 
  - Pin mux/config groups as child nodes: The pin mux (selecting pin function
 mode) and pin config (pull up/down, driver strength) settings are
 represented @@ -274,3 +284,37 @@ Example 4: Set up the default pin state
 for uart controller.
 
   pinctrl = devm_pinctrl_get_select_default(pdev-dev);
   }
 +
 +Example 5: A display port client node that supports 'default' pinctrl state
 +and gpio binding.
 +
 + display-port-controller {
 + samsung,color-space = 0;
 + samsung,dynamic-range = 0;
 + samsung,ycbcr-coeff = 0;
 + samsung,color-depth = 1;
 + samsung,link-rate = 0x06;
 + samsung,lane-count = 2;

Maybe it would be better to omit those properties above for readability of the 
example? Just like you did with example 6.

But generally it's a good addition to our documentation. Thanks.

Best regards,
Tomasz

 + samsung,hpd-gpio = gpx2 6 0;
 + pinctrl-names = default;
 + pinctrl-0 = dp_hpd;
 + };
 +
 +Example 6: Request the gpio for display port controller
 +
 + static int exynos_dp_probe(struct platform_device *pdev)
 + {
 + int hpd_gpio, ret;
 + struct device *dev = pdev-dev;
 + struct device_node *dp_node = dev-of_node;
 +
 + /* ... */
 +
 + hpd_gpio = of_get_named_gpio(dp_node, samsung,hpd-gpio, 0);
 +
 + /* ... */
 +
 + ret = devm_gpio_request_one(pdev-dev, hpd_gpio, GPIOF_IN,
 + hpd_gpio);
 + /* ... */
 + }
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Re: [PATCH v3 10/10] ARM: Exynos: extend soft-reset support for Exynos5420

2013-06-17 Thread Arnd Bergmann
On Monday 17 June 2013 16:30:35 Chander Kashyap wrote:
 @@ -330,10 +330,10 @@ void exynos5_restart(char mode, const char *cmd)
 u32 val;
 void __iomem *addr;
  
 -   if (of_machine_is_compatible(samsung,exynos5250)) {
 -   val = 0x1;
 -   addr = EXYNOS_SWRESET;
 -   } else if (of_machine_is_compatible(samsung,exynos5440)) {
 +   val = 0x1;
 +   addr = EXYNOS_SWRESET;
 +
 +   if (of_machine_is_compatible(samsung,exynos5440)) {
 u32 status;
 np = of_find_compatible_node(NULL, NULL, 
 samsung,exynos5440-clock);
  

Please try to avoid adding further uses of hardcoded MMIO addresses.

Can you change that to use the same logic that exynos5440 has?

Arnd
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Re: [PATCH] Documentation: Add examples to samsung-pinctrl device tree bindings documentation

2013-06-17 Thread Leela Krishna Amudala
Hi Tomasz,
Thanks for reviewing the patch.
Will post version 2 soon addressing your comments.

Best Wishes,
Leela Krishna.

On Mon, Jun 17, 2013 at 5:40 PM, Tomasz Figa t.f...@samsung.com wrote:
 Hi Leela,

 On Monday 17 of June 2013 16:14:55 Leela Krishna Amudala wrote:
 This patch adds examples to samsung-pinctrl.txt documentaion file
 on how to make gpio binding and gpio request

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Doug Anderson diand...@chromium.org
 ---
  .../bindings/pinctrl/samsung-pinctrl.txt   |   48
 +++- 1 file changed, 46 insertions(+), 2 deletions(-)

 diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index
 b2bc219..f1cf177 100644
 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 @@ -25,8 +25,18 @@ Required Properties:

- gpio-controller: identifies the node as a gpio controller and pin bank.
 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO -
   binding is used, the amount of cells must be specified as 2. See generic
 -GPIO binding documentation for description of particular cells. +
 binding is used, the amount of cells must be specified as 2. See the below
 +mentioned gpio binding representation for description of particular
 cells. +
 + Eg: gpx2 6 0
 + [phandle of the gpio controller node]
 + [pin number within the gpio controller]
 + [flags]
 +
 + Values for gpio specifier:
 + - Pin number: is a value between 0 to 7.
 + - Flags: 0 - Active High
 +  1 - Active Low

  - Pin mux/config groups as child nodes: The pin mux (selecting pin function
 mode) and pin config (pull up/down, driver strength) settings are
 represented @@ -274,3 +284,37 @@ Example 4: Set up the default pin state
 for uart controller.

   pinctrl = devm_pinctrl_get_select_default(pdev-dev);
   }
 +
 +Example 5: A display port client node that supports 'default' pinctrl state
 +and gpio binding.
 +
 + display-port-controller {
 + samsung,color-space = 0;
 + samsung,dynamic-range = 0;
 + samsung,ycbcr-coeff = 0;
 + samsung,color-depth = 1;
 + samsung,link-rate = 0x06;
 + samsung,lane-count = 2;

 Maybe it would be better to omit those properties above for readability of the
 example? Just like you did with example 6.

 But generally it's a good addition to our documentation. Thanks.

 Best regards,
 Tomasz

 + samsung,hpd-gpio = gpx2 6 0;
 + pinctrl-names = default;
 + pinctrl-0 = dp_hpd;
 + };
 +
 +Example 6: Request the gpio for display port controller
 +
 + static int exynos_dp_probe(struct platform_device *pdev)
 + {
 + int hpd_gpio, ret;
 + struct device *dev = pdev-dev;
 + struct device_node *dp_node = dev-of_node;
 +
 + /* ... */
 +
 + hpd_gpio = of_get_named_gpio(dp_node, samsung,hpd-gpio, 0);
 +
 + /* ... */
 +
 + ret = devm_gpio_request_one(pdev-dev, hpd_gpio, GPIOF_IN,
 + hpd_gpio);
 + /* ... */
 + }
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[PATCH V2] Documentation: Add examples to samsung-pinctrl device tree bindings documentation

2013-06-17 Thread Leela Krishna Amudala
This patch adds examples to samsung-pinctrl.txt documentaion file
on how to make gpio binding and gpio request

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
 .../bindings/pinctrl/samsung-pinctrl.txt   |   44 +++-
 1 file changed, 42 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index b2bc219..72e9cd1 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -25,8 +25,18 @@ Required Properties:
 
   - gpio-controller: identifies the node as a gpio controller and pin bank.
   - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
-binding is used, the amount of cells must be specified as 2. See generic
-GPIO binding documentation for description of particular cells.
+binding is used, the amount of cells must be specified as 2. See the below
+mentioned gpio binding representation for description of particular cells.
+
+   Eg: gpx2 6 0
+   [phandle of the gpio controller node]
+   [pin number within the gpio controller]
+   [flags]
+
+   Values for gpio specifier:
+   - Pin number: is a value between 0 to 7.
+   - Flags: 0 - Active High
+1 - Active Low
 
 - Pin mux/config groups as child nodes: The pin mux (selecting pin function
   mode) and pin config (pull up/down, driver strength) settings are represented
@@ -274,3 +284,33 @@ Example 4: Set up the default pin state for uart 
controller.
 
pinctrl = devm_pinctrl_get_select_default(pdev-dev);
}
+
+Example 5: A display port client node that supports 'default' pinctrl state
+  and gpio binding.
+
+   display-port-controller {
+   /* ... */
+
+   samsung,hpd-gpio = gpx2 6 0;
+   pinctrl-names = default;
+   pinctrl-0 = dp_hpd;
+   };
+
+Example 6: Request the gpio for display port controller
+
+   static int exynos_dp_probe(struct platform_device *pdev)
+   {
+   int hpd_gpio, ret;
+   struct device *dev = pdev-dev;
+   struct device_node *dp_node = dev-of_node;
+
+   /* ... */
+
+   hpd_gpio = of_get_named_gpio(dp_node, samsung,hpd-gpio, 0);
+
+   /* ... */
+
+   ret = devm_gpio_request_one(pdev-dev, hpd_gpio, GPIOF_IN,
+   hpd_gpio);
+   /* ... */
+   }
-- 
1.7.9.5

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Re: [PATCH V5 1/3] pci: Add PCIe driver for Samsung Exynos

2013-06-17 Thread Arnd Bergmann
On Monday 17 June 2013 18:45:52 Jingoo Han wrote:
 On Friday, June 14, 2013 9:54 PM, Arnd Bergmann wrote:
  
  Please look up the documentation about inbound viewport and describe
  in a code comment what it does. I /assume/ that this is how DMA accesses
  from the bus get translated into AXI bus transactions. If so, you have
  to let the window translate addresses from RAM. If it's something else,
  then you should document what it is and how it needs to be set up.
 
 One of our hardware engineer confirmed it.
 He said that these inbound functions are unnecessary.
 Also, I checked that PCIe works properly without these functions.
 So, I will remove these inbound functions.

Ok, good. So DMA just gets translated 1:1 independent of the
inbound viewport? Have you tested this with PCI device using
DMA?

 static int exynos_pcie_setup(int nr, struct pci_sys_data *sys)
 {
   struct pcie_port *pp;
 
   pp = sys_to_pcie(sys);
 
   if (!pp)
   return 0;
 
   if (global_io_offset  SZ_1M  pp-config.io_size  0) {
   sys-io_offset = global_io_offset - pp-config.io_bus_addr; /* 
 normally 0 */
   pci_ioremap_io(sys-io_offset, pp-io.start);
   global_io_offset += SZ_64K;
   }
 
   sys-mem_offset = pp-mem.start - pp-config.mem_bus_addr; /* normally 
 0 */
 
   pci_add_resource_offset(sys-resources, pp-io, sys-io_offset);
   pci_add_resource_offset(sys-resources, pp-mem, sys-mem_offset);
 
 return 1;
 }

This is what I meant, yes.

 In this case, boot message is as below:
 
 PCI host bridge to bus :00
 pci_bus :00: root bus resource [io  0x40001000-0x40010fff]
 pci_bus :00: root bus resource [mem 0x40011000-0x5fff]
 pci_bus :00: No busn resource found for root bus, will use [bus 00-ff]
 pci :00:00.0: [144d:a549] type 01 class 0x060400
 [.]
 PCI host bridge to bus 0001:00
 pci_bus 0001:00: root bus resource [io  0x60001000-0x60010fff] (bus address 
 [0x5fff1000-0x6000
 0fff])
 pci_bus 0001:00: root bus resource [mem 0x60011000-0x7fff]
 pci_bus 0001:00: No busn resource found for root bus, will use [bus 00-ff]
 pci 0001:00:00.0: [144d:a549] type 01 class 0x060400

The io resources here look wrong. I would have expected

pci_bus :00: root bus resource [io  0x001000-0x00]
pci_bus 0001:00: root bus resource [io  0x01-0x01] (bus address 
[0x00-0x00])

Please have a look at the pci-mvebu driver and how it calculates its
'realio' resource.

 +static int __exit exynos_pcie_remove(struct platform_device *pdev)
 +{
 + struct pcie_port *pp = platform_get_drvdata(pdev);
 +
 + clk_disable_unprepare(pp-bus_clk);
 + clk_disable_unprepare(pp-clk);
 +
 + return 0;
 +}
   
You also don't remove the PCI devices here, as mentioned in an earlier
review.
  
   I reviewed Marvell PCIe driver and Tegra PCIe driver; however,
   I cannot know what you mean.
  
   Could let me know which additional functions are needed?
  
  The mvebu driver does not allow module unload. I haven't looked at the
  tegra driver. If you allow unloading the driver and provide a 'remove'
  callback, that callback needs to clean up the entire bus and remove
  all child devices that were added as well as undo everything the
  probe function did. I think it would be great if you can do that, although
  it might not be easy. The simplest solution would be to not support
  unloading though.
 
 As the mvebu driver uses platform_driver_probe(), the Exynos driver uses
 platform_driver_probe(). Thus, I will not provide a 'remove' callback.

Well, the important part is not to provide a module_exit() function, which
will ensure the driver cannot be unloaded.

Arnd
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Re: [PATCH V2] Documentation: Add examples to samsung-pinctrl device tree bindings documentation

2013-06-17 Thread Tomasz Figa
On Monday 17 of June 2013 18:27:06 Leela Krishna Amudala wrote:
 This patch adds examples to samsung-pinctrl.txt documentaion file
 on how to make gpio binding and gpio request
 
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Doug Anderson diand...@chromium.org
 ---
  .../bindings/pinctrl/samsung-pinctrl.txt   |   44
 +++- 1 file changed, 42 insertions(+), 2 deletions(-)

Looks good.

Reviewed-by: Tomasz Figa t.f...@samsung.com

Best regards,
Tomasz

 diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index
 b2bc219..72e9cd1 100644
 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 @@ -25,8 +25,18 @@ Required Properties:
 
- gpio-controller: identifies the node as a gpio controller and pin bank.
 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO - 
   binding is used, the amount of cells must be specified as 2. See generic
 -GPIO binding documentation for description of particular cells. +   
 binding is used, the amount of cells must be specified as 2. See the below
 +mentioned gpio binding representation for description of particular
 cells. +
 + Eg: gpx2 6 0
 + [phandle of the gpio controller node]
 + [pin number within the gpio controller]
 + [flags]
 +
 + Values for gpio specifier:
 + - Pin number: is a value between 0 to 7.
 + - Flags: 0 - Active High
 +  1 - Active Low
 
  - Pin mux/config groups as child nodes: The pin mux (selecting pin function
 mode) and pin config (pull up/down, driver strength) settings are
 represented @@ -274,3 +284,33 @@ Example 4: Set up the default pin state
 for uart controller.
 
   pinctrl = devm_pinctrl_get_select_default(pdev-dev);
   }
 +
 +Example 5: A display port client node that supports 'default' pinctrl state
 +and gpio binding.
 +
 + display-port-controller {
 + /* ... */
 +
 + samsung,hpd-gpio = gpx2 6 0;
 + pinctrl-names = default;
 + pinctrl-0 = dp_hpd;
 + };
 +
 +Example 6: Request the gpio for display port controller
 +
 + static int exynos_dp_probe(struct platform_device *pdev)
 + {
 + int hpd_gpio, ret;
 + struct device *dev = pdev-dev;
 + struct device_node *dp_node = dev-of_node;
 +
 + /* ... */
 +
 + hpd_gpio = of_get_named_gpio(dp_node, samsung,hpd-gpio, 0);
 +
 + /* ... */
 +
 + ret = devm_gpio_request_one(pdev-dev, hpd_gpio, GPIOF_IN,
 + hpd_gpio);
 + /* ... */
 + }
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RE: [PATCH RESEND V2] ARM: dts: Correct the base address of pinctrl_3 on Exynos5250

2013-06-17 Thread Kukjin Kim
Padmavathi Venna wrote:
 
 This patch corrects the base address of pinctrl_3 on Exynos5250
 platform.
 
 Signed-off-by: Padmavathi Venna padm...@samsung.com

(+ Olof)

Olof, there is no other fixes in my tree for v3.10 yet, so would be helpful
if you could take this into fixes in arm-soc for v3.10. Just note, the wrong
address added during v3.10 merge window.

If you want,
Acked-by: Kukjin Kim kgene@samsung.com

If any problems, please kindly let me know.

Thanks,
- Kukjin

 ---
 Changes since V1:
   - Added platform name in the subject line.
 
  arch/arm/boot/dts/exynos5250-pinctrl.dtsi |2 +-
  arch/arm/boot/dts/exynos5250.dtsi |4 ++--
  2 files changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
 b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
 index d1650fb..ded558b 100644
 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
 +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
 @@ -763,7 +763,7 @@
   };
   };
 
 - pinctrl@0368 {
 + pinctrl@0386 {
   gpz: gpz {
   gpio-controller;
   #gpio-cells = 2;
 diff --git a/arch/arm/boot/dts/exynos5250.dtsi
 b/arch/arm/boot/dts/exynos5250.dtsi
 index 7154e3d..e9bfd13 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -169,9 +169,9 @@
   interrupts = 0 50 0;
   };
 
 - pinctrl_3: pinctrl@0368 {
 + pinctrl_3: pinctrl@0386 {
   compatible = samsung,exynos5250-pinctrl;
 - reg = 0x0368000 0x1000;
 + reg = 0x0386 0x1000;
   interrupts = 0 47 0;
   };
 
 --
 1.7.4.4

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RE: [PATCH 1/3] gpio: samsung: add PINCTRL_S3C24XX to exclude options

2013-06-17 Thread Kukjin Kim
Heiko Stübner wrote:
 
 When a pinctrl driver is loaded legacy gpio support has to be disabled.
 The code checking for the pinctrl presence is contained in an #ifdef
 checking for the presence of a valid samsung pinctrl driver.
 
 There the new PINCTRL_S3C24XX was missing resulting in the check never
 being run and the gpio being enabled breaking the pinctrl driver.
 
 Fix this by adding the missing CONFIG_PINCTRL_S3C24XX
 
 Signed-off-by: Heiko Stuebner he...@sntech.de
 ---
  drivers/gpio/gpio-samsung.c |3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
 index a1392f4..c84503e 100644
 --- a/drivers/gpio/gpio-samsung.c
 +++ b/drivers/gpio/gpio-samsung.c
 @@ -2949,7 +2949,8 @@ static __init int samsung_gpiolib_init(void)
   int i, nr_chips;
   int group = 0;
 
 -#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440)
 +#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440)
 || \
 +defined(CONFIG_PINCTRL_S3C24XX)
   /*
   * This gpio driver includes support for device tree support and
 there
   * are platforms using it. In order to maintain compatibility with
 those
 --
 1.7.10.4

Yeah, this is needed :-)

Linus, shall I take this into samsung tree? Or since the pinctrl-s3c24xx 
already merged into arm-soc, this could be picked into your tree...

Thanks,
- Kukjin

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Re: [PATCH 1/3] gpio: samsung: add PINCTRL_S3C24XX to exclude options

2013-06-17 Thread Tomasz Figa
Hi Heiko,

On Friday 14 of June 2013 00:45:27 Heiko Stübner wrote:
 When a pinctrl driver is loaded legacy gpio support has to be disabled.
 The code checking for the pinctrl presence is contained in an #ifdef
 checking for the presence of a valid samsung pinctrl driver.
 
 There the new PINCTRL_S3C24XX was missing resulting in the check never
 being run and the gpio being enabled breaking the pinctrl driver.
 
 Fix this by adding the missing CONFIG_PINCTRL_S3C24XX
 
 Signed-off-by: Heiko Stuebner he...@sntech.de
 ---
  drivers/gpio/gpio-samsung.c |3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
 index a1392f4..c84503e 100644
 --- a/drivers/gpio/gpio-samsung.c
 +++ b/drivers/gpio/gpio-samsung.c
 @@ -2949,7 +2949,8 @@ static __init int samsung_gpiolib_init(void)
   int i, nr_chips;
   int group = 0;
 
 -#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440)
 +#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440) ||
 \ +defined(CONFIG_PINCTRL_S3C24XX)

I wonder if this wouldn't be simply covered by PINCTRL_SAMSUNG (except 
PINCTRL_EXYNOS5440 which doesn't use the common part).

Best regards,
Tomasz

   /*
   * This gpio driver includes support for device tree support and there
   * are platforms using it. In order to maintain compatibility with those
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Re: [PATCH V2] ARM: dts: Enable RTC node for Arndale

2013-06-17 Thread Doug Anderson
Tushar,

On Sun, Jun 16, 2013 at 9:09 PM, Tushar Behera tushar.beh...@linaro.org wrote:
 The issues reported in commit 522ccdb6fd0e (ARM: dts: Disable the RTC
 by default on exynos5) are no longer reproduced on EXYNOS5250 based
 Arndale board. Hence re-enabling RTC support for Arndale board.

 This is helpful for testing S2R on Arndale board.

 Signed-off-by: Tushar Behera tushar.beh...@linaro.org
 ---
 Changes for V2:
 * RTC node is enabled only for Arndale board. Earlier it was enabled
 in exynos5250.dtsi.

  arch/arm/boot/dts/exynos5250-arndale.dts |4 
  1 file changed, 4 insertions(+)

Looks good!  I'll send up one for snow too.

Reviewed-by: Doug Anderson diand...@chromium.org
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Re: [PATCH V2] ARM: dts: Enable RTC node for Arndale

2013-06-17 Thread Kukjin Kim

On 06/17/13 13:09, Tushar Behera wrote:

The issues reported in commit 522ccdb6fd0e (ARM: dts: Disable the RTC
by default on exynos5) are no longer reproduced on EXYNOS5250 based
Arndale board. Hence re-enabling RTC support for Arndale board.

This is helpful for testing S2R on Arndale board.

Signed-off-by: Tushar Beheratushar.beh...@linaro.org
---
Changes for V2:
* RTC node is enabled only for Arndale board. Earlier it was enabled
in exynos5250.dtsi.

  arch/arm/boot/dts/exynos5250-arndale.dts |4 
  1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts 
b/arch/arm/boot/dts/exynos5250-arndale.dts
index 02cfc76..b38080a 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -449,4 +449,8 @@
clock-frequency =2400;
};
};
+
+   rtc {
+   status = okay;
+   };
  };


Applied, thanks.

- Kukjin
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Re: [PATCH] ARM: dts: Enable RTC node for exynos5250-snow

2013-06-17 Thread Kukjin Kim

On 06/18/13 00:06, Doug Anderson wrote:

By default the exynos RTC is disabled.  Enable it for snow.  There's
also an external RTC on the max77686 PMIC but we haven't yet enabled
that.

Signed-off-by: Doug Andersondiand...@chromium.org
---
  arch/arm/boot/dts/exynos5250-snow.dts | 4 
  1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250-snow.dts 
b/arch/arm/boot/dts/exynos5250-snow.dts
index d449feb..05244f1 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -171,6 +171,10 @@
};
};

+   rtc {
+   status = okay;
+   };
+
/*
 * On Snow we've got SIP WiFi and so can keep drive strengths low to
 * reduce EMI.


OK, applied.

Thanks,
- Kukjin
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Re: [PATCH 1/3] gpio: samsung: add PINCTRL_S3C24XX to exclude options

2013-06-17 Thread Kukjin Kim

On 06/17/13 22:19, Tomasz Figa wrote:

Hi Heiko,

On Friday 14 of June 2013 00:45:27 Heiko Stübner wrote:

When a pinctrl driver is loaded legacy gpio support has to be disabled.
The code checking for the pinctrl presence is contained in an #ifdef
checking for the presence of a valid samsung pinctrl driver.

There the new PINCTRL_S3C24XX was missing resulting in the check never
being run and the gpio being enabled breaking the pinctrl driver.

Fix this by adding the missing CONFIG_PINCTRL_S3C24XX

Signed-off-by: Heiko Stuebnerhe...@sntech.de
---
  drivers/gpio/gpio-samsung.c |3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index a1392f4..c84503e 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -2949,7 +2949,8 @@ static __init int samsung_gpiolib_init(void)
int i, nr_chips;
int group = 0;

-#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440)
+#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440) ||
\ +defined(CONFIG_PINCTRL_S3C24XX)


I wonder if this wouldn't be simply covered by PINCTRL_SAMSUNG (except
PINCTRL_EXYNOS5440 which doesn't use the common part).


Well, not added compatible for 's3c64xx-pinctrl' yet?

- Kukjin
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Re: [PATCH v2 2/2] MAINTAINERS: Add exynos filename match to ARM/S5P EXYNOS ARM ARCHITECTURES

2013-06-17 Thread Doug Anderson
Kukjin,

On Mon, Jun 17, 2013 at 8:37 AM, Kukjin Kim kgene@samsung.com wrote:
 On 06/17/13 07:17, Doug Anderson wrote:

 This will help direct patches related to exynos to the
 linux-samsung-soc mailing list for discussion.

 Suggested by Joe Perches.

 Signed-off-by: Doug Andersondiand...@chromium.org


 Acked-by: Kukjin Kim kgene@samsung.com

I _think_ you can even apply this to your tree.  Looking at commits to
MAINTAINERS it looks individual maintainers just include this in their
trees, though I could be wrong.

-Doug
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Re: [PATCH 1/3] gpio: samsung: add PINCTRL_S3C24XX to exclude options

2013-06-17 Thread Tomasz Figa
On Tuesday 18 of June 2013 00:43:41 Kukjin Kim wrote:
 On 06/17/13 22:19, Tomasz Figa wrote:
  Hi Heiko,
  
  On Friday 14 of June 2013 00:45:27 Heiko Stübner wrote:
  When a pinctrl driver is loaded legacy gpio support has to be disabled.
  The code checking for the pinctrl presence is contained in an #ifdef
  checking for the presence of a valid samsung pinctrl driver.
  
  There the new PINCTRL_S3C24XX was missing resulting in the check never
  being run and the gpio being enabled breaking the pinctrl driver.
  
  Fix this by adding the missing CONFIG_PINCTRL_S3C24XX
  
  Signed-off-by: Heiko Stuebnerhe...@sntech.de
  ---
  
drivers/gpio/gpio-samsung.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
  
  diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
  index a1392f4..c84503e 100644
  --- a/drivers/gpio/gpio-samsung.c
  +++ b/drivers/gpio/gpio-samsung.c
  @@ -2949,7 +2949,8 @@ static __init int samsung_gpiolib_init(void)
  
 int i, nr_chips;
 int group = 0;
  
  -#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440)
  +#if defined(CONFIG_PINCTRL_EXYNOS) || defined(CONFIG_PINCTRL_EXYNOS5440)
  || \ +defined(CONFIG_PINCTRL_S3C24XX)
  
  I wonder if this wouldn't be simply covered by PINCTRL_SAMSUNG (except
  PINCTRL_EXYNOS5440 which doesn't use the common part).
 
 Well, not added compatible for 's3c64xx-pinctrl' yet?

Right, but this shouldn't have any effect on this code. PINCTRL_S3C64XX isn't 
selected by anything yet, so PINCTRL_SAMSUNG won't be selected when 
ARCH_S3C64XX is used.

As for s3c64xx DT support, I'm planning to finally post patches this week.

Best regards,
Tomasz

 - Kukjin
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Re: [PATCH v2 1/2] MAINTAINERS: Add Samsung pinctrl entries

2013-06-17 Thread Doug Anderson
Linus,

On Mon, Jun 17, 2013 at 8:37 AM, Kukjin Kim kgene@samsung.com wrote:
 On 06/17/13 12:43, Olof Johansson wrote:

 Kyungmin Parkkmp...@infradead.org  skrev:

 On Mon, Jun 17, 2013 at 7:17 AM, Doug Andersondiand...@chromium.org
 wrote:

 It's convenient if get_maintainer suggests sending samsung/exynos
 pinctrl changes to linux-samsung-soc and to Tomasz and Thomas.

 Signed-off-by: Doug Andersondiand...@chromium.org

 Acked-by: Kyungmin Parkkyungmin.p...@samsung.com


 Acked-by: Olof Johanssono...@lixom.net

 Acked-by: Kukjin Kim kgene@samsung.com

I'm assuming that you'll take this and apply?  If I'm supposed to find
someone else to apply it, please yell.  :)

-Doug
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Re: [PATCH 2/3] pinctrl: s3c24xx: use correct header for chained_irq functions

2013-06-17 Thread Linus Walleij
On Mon, Jun 17, 2013 at 3:16 PM, Kukjin Kim kgene@samsung.com wrote:
 Heiko Stübner wrote:

 chained_irq_enter and chained_irq_exit moved to a real header under
 linux/pinctrl instead of asm/.

 Update the pinctrl driver to use the correct header and fix the build
 error.

 Signed-off-by: Heiko Stuebner he...@sntech.de
(...)

 Hmm, would be nice if I could take 1st and 2nd into samsung tree :-)

 Linus, if any problems, please let me know.

No that should work fine. Nothing is touching pinctrl-s3c in my
pinctrl tree so:
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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Re: [PATCH v2 1/2] MAINTAINERS: Add Samsung pinctrl entries

2013-06-17 Thread Kukjin Kim

On 06/17/13 12:43, Olof Johansson wrote:



Kyungmin Parkkmp...@infradead.org  skrev:


On Mon, Jun 17, 2013 at 7:17 AM, Doug Andersondiand...@chromium.org
wrote:

It's convenient if get_maintainer suggests sending samsung/exynos
pinctrl changes to linux-samsung-soc and to Tomasz and Thomas.

Signed-off-by: Doug Andersondiand...@chromium.org

Acked-by: Kyungmin Parkkyungmin.p...@samsung.com


Acked-by: Olof Johanssono...@lixom.net


Acked-by: Kukjin Kim kgene@samsung.com

Thanks,
- Kukjin
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Re: [PATCH v2 2/2] MAINTAINERS: Add exynos filename match to ARM/S5P EXYNOS ARM ARCHITECTURES

2013-06-17 Thread Kukjin Kim

On 06/18/13 00:48, Doug Anderson wrote:

Kukjin,

On Mon, Jun 17, 2013 at 8:37 AM, Kukjin Kimkgene@samsung.com  wrote:

On 06/17/13 07:17, Doug Anderson wrote:


This will help direct patches related to exynos to the
linux-samsung-soc mailing list for discussion.

Suggested by Joe Perches.

Signed-off-by: Doug Andersondiand...@chromium.org



Acked-by: Kukjin Kimkgene@samsung.com


I _think_ you can even apply this to your tree.  Looking at commits to
MAINTAINERS it looks individual maintainers just include this in their
trees, though I could be wrong.


OK, let me take this into samsung tree.

Thanks,
- Kukjin
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Re: [PATCH 2/3] pinctrl: s3c24xx: use correct header for chained_irq functions

2013-06-17 Thread Kukjin Kim

On 06/18/13 00:45, Linus Walleij wrote:

On Mon, Jun 17, 2013 at 3:16 PM, Kukjin Kimkgene@samsung.com  wrote:

Heiko Stübner wrote:


chained_irq_enter and chained_irq_exit moved to a real header under
linux/pinctrl instead of asm/.

Update the pinctrl driver to use the correct header and fix the build
error.

Signed-off-by: Heiko Stuebnerhe...@sntech.de

(...)


Hmm, would be nice if I could take 1st and 2nd into samsung tree :-)

Linus, if any problems, please let me know.


No that should work fine. Nothing is touching pinctrl-s3c in my
pinctrl tree so:
Acked-by: Linus Walleijlinus.wall...@linaro.org


Thanks, applied with Linus' ack.

- Kukjin
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Re: [PATCH Resend] pinctrl: exynos: Fix build breakage

2013-06-17 Thread Linus Walleij
On Mon, Jun 17, 2013 at 1:57 PM, Tomasz Figa t.f...@samsung.com wrote:
 On Monday 17 of June 2013 15:08:12 Sachin Kamat wrote:
 'exynos_wkup_irq_ack' should be defined ahead of its call.

 Fixes the following error:
 drivers/pinctrl/pinctrl-exynos.c: In function ‘exynos_wkup_irq_mask’:
 drivers/pinctrl/pinctrl-exynos.c:299:3: error: implicit declaration of
 function ‘exynos_wkup_irq_ack’ [-Werror=implicit-function-declaration]
exynos_wkup_irq_ack(irqd);

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 Cc: Doug Anderson diand...@chromium.org
 ---
 Fixed the commit message.
 ---

 This patch is incorrect.

 Compilation error is caused by merge error of Doug's patch:

 pinctrl: exynos: ack level-triggered interrupts before unmasking

 hunk of which went to wrong function - mask instead of unmask.

OK probably I just had git am fail on me and used
patch -p1  ...

 Linus, could you fix it?

No I'm afraid I will cause more trouble.

I took out Doug's commit and this fi from my tree.

Doug, can you respin the patch
pinctrl: exynos: ack level-triggered interrupts before unmasking

On top of my devel branch?

Yours,
Linus Walleij
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Re: [PATCH V2] Documentation: Add examples to samsung-pinctrl device tree bindings documentation

2013-06-17 Thread Linus Walleij
On Mon, Jun 17, 2013 at 2:57 PM, Leela Krishna Amudala
l.kris...@samsung.com wrote:

 This patch adds examples to samsung-pinctrl.txt documentaion file
 on how to make gpio binding and gpio request

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Doug Anderson diand...@chromium.org

Looks like generic GPIO bindings.
Acked-by: Linus Walleij linus.wall...@linaro.org

Yours,
Linus Walleij
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[PATCH v2 37/38] ARM: EXYNOS: Remove legacy L2X0 initialization

2013-06-17 Thread Tomasz Figa
Since Exynos is now supporting only DT-based boot, the old L2X0
initialization code is not needed anymore, so exynos4_l2x0_cache_init()
can be greatly simplified.

Signed-off-by: Arnd Bergmann a...@arndb.de
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/common.c | 48 ---
 1 file changed, 4 insertions(+), 44 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 561890f..e886154 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -412,59 +412,19 @@ static int __init exynos_core_init(void)
 }
 core_initcall(exynos_core_init);
 
-#ifdef CONFIG_CACHE_L2X0
 static int __init exynos4_l2x0_cache_init(void)
 {
int ret;
 
-   if (soc_is_exynos5250() || soc_is_exynos5440())
-   return 0;
-
ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
-   if (!ret) {
-   l2x0_regs_phys = virt_to_phys(l2x0_saved_regs);
-   clean_dcache_area(l2x0_regs_phys, sizeof(unsigned long));
-   return 0;
-   }
-
-   if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL)  0x1)) {
-   l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC;
-   /* TAG, Data Latency Control: 2 cycles */
-   l2x0_saved_regs.tag_latency = 0x110;
-
-   if (soc_is_exynos4212() || soc_is_exynos4412())
-   l2x0_saved_regs.data_latency = 0x120;
-   else
-   l2x0_saved_regs.data_latency = 0x110;
-
-   l2x0_saved_regs.prefetch_ctrl = 0x3007;
-   l2x0_saved_regs.pwr_ctrl =
-   (L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN);
-
-   l2x0_regs_phys = virt_to_phys(l2x0_saved_regs);
-
-   __raw_writel(l2x0_saved_regs.tag_latency,
-   S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
-   __raw_writel(l2x0_saved_regs.data_latency,
-   S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
-
-   /* L2X0 Prefetch Control */
-   __raw_writel(l2x0_saved_regs.prefetch_ctrl,
-   S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
-
-   /* L2X0 Power Control */
-   __raw_writel(l2x0_saved_regs.pwr_ctrl,
-   S5P_VA_L2CC + L2X0_POWER_CTRL);
-
-   clean_dcache_area(l2x0_regs_phys, sizeof(unsigned long));
-   clean_dcache_area(l2x0_saved_regs, sizeof(struct l2x0_regs));
-   }
+   if (ret)
+   return ret;
 
-   l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK);
+   l2x0_regs_phys = virt_to_phys(l2x0_saved_regs);
+   clean_dcache_area(l2x0_regs_phys, sizeof(unsigned long));
return 0;
 }
 early_initcall(exynos4_l2x0_cache_init);
-#endif
 
 static int __init exynos_init(void)
 {
-- 
1.8.2.1

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[PATCH v2 04/38] ARM: EXYNOS: common: Remove legacy PMU initialization code

2013-06-17 Thread Tomasz Figa
This patch removes legacy PMU initialization code that was used to set
up PMU when booting with ATAGS, which is not supported any more.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/common.c | 27 ---
 1 file changed, 27 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 98343577..cb07f4a 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -922,30 +922,3 @@ static int __init exynos_init_irq_eint(void)
return 0;
 }
 arch_initcall(exynos_init_irq_eint);
-
-static struct resource exynos4_pmu_resource[] = {
-   DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU),
-   DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU1),
-#if defined(CONFIG_SOC_EXYNOS4412)
-   DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU2),
-   DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU3),
-#endif
-};
-
-static struct platform_device exynos4_device_pmu = {
-   .name   = arm-pmu,
-   .num_resources  = ARRAY_SIZE(exynos4_pmu_resource),
-   .resource   = exynos4_pmu_resource,
-};
-
-static int __init exynos_armpmu_init(void)
-{
-   if (!of_have_populated_dt()) {
-   if (soc_is_exynos4210() || soc_is_exynos4212())
-   exynos4_device_pmu.num_resources = 2;
-   platform_device_register(exynos4_device_pmu);
-   }
-
-   return 0;
-}
-arch_initcall(exynos_armpmu_init);
-- 
1.8.2.1

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[PATCH v2 07/38] ARM: EXYNOS: Remove legacy dev- and setup- files

2013-06-17 Thread Tomasz Figa
This patch removes now unused files containing old device and GPIO setup
code that was needed for ATAGS based boot, which is not supported on
Exynos any more.

The only exception is setup-i2c0.c that will be removed later, since it
has dependencies in plat-samsung/ directory.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/Makefile   |   3 -
 arch/arm/mach-exynos/dev-audio.c| 254 
 arch/arm/mach-exynos/dev-uart.c |  55 ---
 arch/arm/mach-exynos/setup-fimc.c   |  44 --
 arch/arm/mach-exynos/setup-fimd0.c  |  43 --
 arch/arm/mach-exynos/setup-i2c0.c   |  10 --
 arch/arm/mach-exynos/setup-i2c1.c   |  23 ---
 arch/arm/mach-exynos/setup-i2c2.c   |  23 ---
 arch/arm/mach-exynos/setup-i2c3.c   |  23 ---
 arch/arm/mach-exynos/setup-i2c4.c   |  23 ---
 arch/arm/mach-exynos/setup-i2c5.c   |  23 ---
 arch/arm/mach-exynos/setup-i2c6.c   |  23 ---
 arch/arm/mach-exynos/setup-i2c7.c   |  23 ---
 arch/arm/mach-exynos/setup-keypad.c |  36 -
 arch/arm/mach-exynos/setup-sdhci-gpio.c | 152 ---
 arch/arm/mach-exynos/setup-spi.c|  45 --
 arch/arm/mach-exynos/setup-usb-phy.c| 223 
 17 files changed, 1026 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/dev-audio.c
 delete mode 100644 arch/arm/mach-exynos/dev-uart.c
 delete mode 100644 arch/arm/mach-exynos/setup-fimc.c
 delete mode 100644 arch/arm/mach-exynos/setup-fimd0.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c1.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c2.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c3.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c4.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c5.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c6.c
 delete mode 100644 arch/arm/mach-exynos/setup-i2c7.c
 delete mode 100644 arch/arm/mach-exynos/setup-keypad.c
 delete mode 100644 arch/arm/mach-exynos/setup-sdhci-gpio.c
 delete mode 100644 arch/arm/mach-exynos/setup-spi.c
 delete mode 100644 arch/arm/mach-exynos/setup-usb-phy.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 9811f87..5fc6cfd 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -37,7 +37,4 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o
 
 # device support
 
-obj-y  += dev-uart.o
-obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
-
 obj-$(CONFIG_ARCH_EXYNOS)  += setup-i2c0.o
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
deleted file mode 100644
index c662c89..000
--- a/arch/arm/mach-exynos/dev-audio.c
+++ /dev/null
@@ -1,254 +0,0 @@
-/* linux/arch/arm/mach-exynos4/dev-audio.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Copyright (c) 2010 Samsung Electronics Co. Ltd
- * Jaswinder Singh jassi.b...@samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include linux/platform_device.h
-#include linux/dma-mapping.h
-#include linux/gpio.h
-#include linux/platform_data/asoc-s3c.h
-
-#include plat/gpio-cfg.h
-
-#include mach/map.h
-#include mach/dma.h
-#include mach/irqs.h
-
-#define EXYNOS4_AUDSS_INT_MEM  (0x0300)
-
-static int exynos4_cfg_i2s(struct platform_device *pdev)
-{
-   /* configure GPIO for i2s port */
-   switch (pdev-id) {
-   case 0:
-   s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 7, S3C_GPIO_SFN(2));
-   break;
-   case 1:
-   s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(2));
-   break;
-   case 2:
-   s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(4));
-   break;
-   default:
-   printk(KERN_ERR Invalid Device %d\n, pdev-id);
-   return -EINVAL;
-   }
-
-   return 0;
-}
-
-static struct s3c_audio_pdata i2sv5_pdata = {
-   .cfg_gpio = exynos4_cfg_i2s,
-   .type = {
-   .i2s = {
-   .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
-| QUIRK_NEED_RSTCLR,
-   .idma_addr = EXYNOS4_AUDSS_INT_MEM,
-   },
-   },
-};
-
-static struct resource exynos4_i2s0_resource[] = {
-   [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S0, SZ_256),
-   [1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
-   [2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
-   [3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),
-};
-
-struct platform_device exynos4_device_i2s0 = {
-   .name = samsung-i2s,
-   .id = 0,
-   .num_resources = ARRAY_SIZE(exynos4_i2s0_resource),
-   .resource = exynos4_i2s0_resource,
-   .dev = {
-   

[PATCH v2 13/38] ARM: EXYNOS: pm_domains: Remove legacy power domain registration code

2013-06-17 Thread Tomasz Figa
This patch removes static definitions of power domains and code
responsible for registering them and adding devices to them, since only
DT based boot is now supported on Exynos.

Cc: linux...@vger.kernel.org
Cc: Rafael J. Wysocki r...@sisk.pl
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/pm_domains.c | 94 +--
 1 file changed, 1 insertion(+), 93 deletions(-)

diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/arch/arm/mach-exynos/pm_domains.c
index beb946d..1703593 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -74,16 +74,6 @@ static int exynos_pd_power_off(struct generic_pm_domain 
*domain)
return exynos_pd_power(domain, false);
 }
 
-#define EXYNOS_GPD(PD, BASE, NAME) \
-static struct exynos_pm_domain PD = {  \
-   .base = (void __iomem *)BASE,   \
-   .name = NAME,   \
-   .pd = { \
-   .power_off = exynos_pd_power_off,   \
-   .power_on = exynos_pd_power_on, \
-   },  \
-}
-
 static void exynos_add_device_to_domain(struct exynos_pm_domain *pd,
 struct device *dev)
 {
@@ -156,7 +146,7 @@ static struct notifier_block platform_nb = {
.notifier_call = exynos_pm_notifier_call,
 };
 
-static __init int exynos_pm_dt_parse_domains(void)
+static __init int exynos4_pm_init_power_domain(void)
 {
struct platform_device *pdev;
struct device_node *np;
@@ -192,88 +182,6 @@ static __init int exynos_pm_dt_parse_domains(void)
 
return 0;
 }
-
-static __init __maybe_unused void exynos_pm_add_dev_to_genpd(struct 
platform_device *pdev,
-   struct exynos_pm_domain *pd)
-{
-   if (pdev-dev.bus) {
-   if (!pm_genpd_add_device(pd-pd, pdev-dev))
-   pm_genpd_dev_need_restore(pdev-dev, true);
-   else
-   pr_info(%s: error in adding %s device to %s power
-   domain\n, __func__, dev_name(pdev-dev),
-   pd-name);
-   }
-}
-
-EXYNOS_GPD(exynos4_pd_mfc, S5P_PMU_MFC_CONF, pd-mfc);
-EXYNOS_GPD(exynos4_pd_g3d, S5P_PMU_G3D_CONF, pd-g3d);
-EXYNOS_GPD(exynos4_pd_lcd0, S5P_PMU_LCD0_CONF, pd-lcd0);
-EXYNOS_GPD(exynos4_pd_lcd1, S5P_PMU_LCD1_CONF, pd-lcd1);
-EXYNOS_GPD(exynos4_pd_tv, S5P_PMU_TV_CONF, pd-tv);
-EXYNOS_GPD(exynos4_pd_cam, S5P_PMU_CAM_CONF, pd-cam);
-EXYNOS_GPD(exynos4_pd_gps, S5P_PMU_GPS_CONF, pd-gps);
-
-static struct exynos_pm_domain *exynos4_pm_domains[] = {
-   exynos4_pd_mfc,
-   exynos4_pd_g3d,
-   exynos4_pd_lcd0,
-   exynos4_pd_lcd1,
-   exynos4_pd_tv,
-   exynos4_pd_cam,
-   exynos4_pd_gps,
-};
-
-static __init int exynos4_pm_init_power_domain(void)
-{
-   int idx;
-
-   if (of_have_populated_dt())
-   return exynos_pm_dt_parse_domains();
-
-   for (idx = 0; idx  ARRAY_SIZE(exynos4_pm_domains); idx++) {
-   struct exynos_pm_domain *pd = exynos4_pm_domains[idx];
-   int on = __raw_readl(pd-base + 0x4)  S5P_INT_LOCAL_PWR_EN;
-
-   pm_genpd_init(pd-pd, NULL, !on);
-   }
-
-#ifdef CONFIG_S5P_DEV_FIMD0
-   exynos_pm_add_dev_to_genpd(s5p_device_fimd0, exynos4_pd_lcd0);
-#endif
-#ifdef CONFIG_S5P_DEV_TV
-   exynos_pm_add_dev_to_genpd(s5p_device_hdmi, exynos4_pd_tv);
-   exynos_pm_add_dev_to_genpd(s5p_device_mixer, exynos4_pd_tv);
-#endif
-#ifdef CONFIG_S5P_DEV_MFC
-   exynos_pm_add_dev_to_genpd(s5p_device_mfc, exynos4_pd_mfc);
-#endif
-#ifdef CONFIG_S5P_DEV_FIMC0
-   exynos_pm_add_dev_to_genpd(s5p_device_fimc0, exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_FIMC1
-   exynos_pm_add_dev_to_genpd(s5p_device_fimc1, exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_FIMC2
-   exynos_pm_add_dev_to_genpd(s5p_device_fimc2, exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_FIMC3
-   exynos_pm_add_dev_to_genpd(s5p_device_fimc3, exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_CSIS0
-   exynos_pm_add_dev_to_genpd(s5p_device_mipi_csis0, exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_CSIS1
-   exynos_pm_add_dev_to_genpd(s5p_device_mipi_csis1, exynos4_pd_cam);
-#endif
-#ifdef CONFIG_S5P_DEV_G2D
-   exynos_pm_add_dev_to_genpd(s5p_device_g2d, exynos4_pd_lcd0);
-#endif
-#ifdef CONFIG_S5P_DEV_JPEG
-   exynos_pm_add_dev_to_genpd(s5p_device_jpeg, exynos4_pd_cam);
-#endif
-   return 0;
-}
 arch_initcall(exynos4_pm_init_power_domain);
 
 int __init exynos_pm_late_initcall(void)
-- 
1.8.2.1

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[PATCH v2 35/38] ARM: EXYNOS: Remove custom init_irq callbacks

2013-06-17 Thread Tomasz Figa
Since both exynos4_init_irq() and exynos5_init_irq() are just calling
irqchip_init(), there is no need for them to exist any more, since this
is the default that is called when init_irq callback is not specified.

Signed-off-by: Arnd Bergmann a...@arndb.de
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/common.c  | 10 --
 arch/arm/mach-exynos/common.h  |  2 --
 arch/arm/mach-exynos/mach-exynos4-dt.c |  1 -
 arch/arm/mach-exynos/mach-exynos5-dt.c |  1 -
 4 files changed, 14 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 7b53e4c..91d457f 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -400,16 +400,6 @@ void __init exynos_init_time(void)
clocksource_of_init();
 }
 
-void __init exynos4_init_irq(void)
-{
-   irqchip_init();
-}
-
-void __init exynos5_init_irq(void)
-{
-   irqchip_init();
-}
-
 struct bus_type exynos_subsys = {
.name   = exynos-core,
.dev_name   = exynos-core,
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 11fc1e2..1c83f95 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -20,8 +20,6 @@ extern unsigned long xxti_f, xusbxti_f;
 
 struct map_desc;
 void exynos_init_io(struct map_desc *mach_desc, int size);
-void exynos4_init_irq(void);
-void exynos5_init_irq(void);
 void exynos4_restart(char mode, const char *cmd);
 void exynos5_restart(char mode, const char *cmd);
 void exynos_init_late(void);
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c 
b/arch/arm/mach-exynos/mach-exynos4-dt.c
index b9ed834..df15726 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -55,7 +55,6 @@ static void __init exynos4_reserve(void)
 DT_MACHINE_START(EXYNOS4210_DT, Samsung Exynos4 (Flattened Device Tree))
/* Maintainer: Thomas Abraham thomas.abra...@linaro.org */
.smp= smp_ops(exynos_smp_ops),
-   .init_irq   = exynos4_init_irq,
.map_io = exynos4_dt_map_io,
.init_early = exynos_firmware_init,
.init_machine   = exynos4_dt_machine_init,
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 9596861..8777310 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -104,7 +104,6 @@ static void __init exynos5_reserve(void)
 
 DT_MACHINE_START(EXYNOS5_DT, SAMSUNG EXYNOS5 (Flattened Device Tree))
/* Maintainer: Kukjin Kim kgene@samsung.com */
-   .init_irq   = exynos5_init_irq,
.smp= smp_ops(exynos_smp_ops),
.map_io = exynos5_dt_map_io,
.init_machine   = exynos5_dt_machine_init,
-- 
1.8.2.1

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[PATCH v2 30/38] ARM: EXYNOS: Remove CONFIG_SOC_EXYNOS4412

2013-06-17 Thread Tomasz Figa
Exynos4212 and Exynos4412 SoCs differ only in number of ARM cores and
there is no need to have separate Kconfig options for them, since they
use the same code.

This patch removes CONFIG_SOC_EXYNOS4412, leaving CONFIG_SOC_EXYNOS4212
as the one supporting both SoCs from this series.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/Kconfig | 11 +--
 arch/arm/plat-samsung/include/plat/cpu.h |  6 +-
 2 files changed, 2 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 65ca3ac..fcebdfb 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -46,7 +46,7 @@ config CPU_EXYNOS4210
  Enable EXYNOS4210 CPU support
 
 config SOC_EXYNOS4212
-   bool SAMSUNG EXYNOS4212
+   bool SAMSUNG EXYNOS4212/4412
default y
depends on ARCH_EXYNOS4
select PINCTRL_EXYNOS
@@ -56,15 +56,6 @@ config SOC_EXYNOS4212
help
  Enable EXYNOS4212 SoC support
 
-config SOC_EXYNOS4412
-   bool SAMSUNG EXYNOS4412
-   default y
-   depends on ARCH_EXYNOS4
-   select PINCTRL_EXYNOS
-   select SAMSUNG_DMADEV
-   help
- Enable EXYNOS4412 SoC support
-
 config SOC_EXYNOS5250
bool SAMSUNG EXYNOS5250
default y
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h 
b/arch/arm/plat-samsung/include/plat/cpu.h
index 989fefe..87b03bb 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -122,13 +122,9 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, 
EXYNOS5_SOC_MASK)
 
 #if defined(CONFIG_SOC_EXYNOS4212)
 # define soc_is_exynos4212()   is_samsung_exynos4212()
-#else
-# define soc_is_exynos4212()   0
-#endif
-
-#if defined(CONFIG_SOC_EXYNOS4412)
 # define soc_is_exynos4412()   is_samsung_exynos4412()
 #else
+# define soc_is_exynos4212()   0
 # define soc_is_exynos4412()   0
 #endif
 
-- 
1.8.2.1

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[PATCH v2 38/38] ARM: EXYNOS: Remove remaining dead code after non-DT support removal

2013-06-17 Thread Tomasz Figa
This patch removes remaining small bits of unused code that was left
after removing non-DT support.

Signed-off-by: Arnd Bergmann a...@arndb.de
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/Kconfig| 17 -
 arch/arm/mach-exynos/common.c   |  4 +---
 arch/arm/mach-exynos/include/mach/pm-core.h |  7 +--
 3 files changed, 2 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index fcebdfb..fa14283 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -110,23 +110,6 @@ config MACH_EXYNOS5_DT
  Machine support for Samsung EXYNOS5 machine with device tree enabled.
  Select this if a fdt blob is available for the EXYNOS5 SoC based 
board.
 
-if ARCH_EXYNOS4
-
-comment Configuration for HSMMC 8-bit bus width
-
-config EXYNOS4_SDHCI_CH0_8BIT
-   bool Channel 0 with 8-bit bus
-   help
- Support HSMMC Channel 0 8-bit bus.
- If selected, Channel 1 is disabled.
-
-config EXYNOS4_SDHCI_CH2_8BIT
-   bool Channel 2 with 8-bit bus
-   help
- Support HSMMC Channel 2 8-bit bus.
- If selected, Channel 3 is disabled.
-endif
-
 endmenu
 
 endif
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index e886154..81e6320 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -60,8 +60,6 @@ static void exynos5_map_io(void);
 static void exynos5440_map_io(void);
 static int exynos_init(void);
 
-unsigned long xxti_f = 0, xusbxti_f = 0;
-
 static struct cpu_table cpu_ids[] __initdata = {
{
.idcode = EXYNOS4210_CPU_ID,
@@ -322,7 +320,7 @@ void __init exynos_init_late(void)
exynos_pm_late_initcall();
 }
 
-int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
+static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
int depth, void *data)
 {
struct map_desc iodesc;
diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h 
b/arch/arm/mach-exynos/include/mach/pm-core.h
index 71e6b89..2b00833 100644
--- a/arch/arm/mach-exynos/include/mach/pm-core.h
+++ b/arch/arm/mach-exynos/include/mach/pm-core.h
@@ -34,12 +34,7 @@ static inline void s3c_pm_debug_init_uart(void)
 
 static inline void s3c_pm_arch_prepare_irqs(void)
 {
-   u32 eintmask = s3c_irqwake_eintmask;
-
-   if (of_have_populated_dt())
-   eintmask = exynos_get_eint_wake_mask();
-
-   __raw_writel(eintmask, S5P_EINT_WAKEUP_MASK);
+   __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
__raw_writel(s3c_irqwake_intmask  ~(1  31), S5P_WAKEUP_MASK);
 }
 
-- 
1.8.2.1

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[PATCH v2 32/38] [media] exynos4-is: Remove check for SOC_EXYNOS4412

2013-06-17 Thread Tomasz Figa
Since SOC_EXYNOS4412 Kconfig symbol has been removed, it is enough to
check for SOC_EXYNOS4212 for both SoCs from Exynos4x12 series.

Cc: linux-me...@vger.kernel.org
Cc: Mauro Carvalho Chehab mche...@redhat.com
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/media/platform/exynos4-is/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/platform/exynos4-is/Kconfig 
b/drivers/media/platform/exynos4-is/Kconfig
index 004fd0b..0d4fd5c 100644
--- a/drivers/media/platform/exynos4-is/Kconfig
+++ b/drivers/media/platform/exynos4-is/Kconfig
@@ -33,7 +33,7 @@ config VIDEO_S5P_MIPI_CSIS
  To compile this driver as a module, choose M here: the
  module will be called s5p-csis.
 
-if SOC_EXYNOS4212 || SOC_EXYNOS4412 || SOC_EXYNOS5250
+if SOC_EXYNOS4212 || SOC_EXYNOS5250
 
 config VIDEO_EXYNOS_FIMC_LITE
tristate EXYNOS FIMC-LITE camera interface driver
-- 
1.8.2.1

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[PATCH v2 34/38] ARM: EXYNOS: Remove mach/regs-usb-phy.h header

2013-06-17 Thread Tomasz Figa
This patch removes mach/regs-usb-phy.h header, which is not used
anywhere in the kernel.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/include/mach/regs-usb-phy.h | 74 
 1 file changed, 74 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/regs-usb-phy.h

diff --git a/arch/arm/mach-exynos/include/mach/regs-usb-phy.h 
b/arch/arm/mach-exynos/include/mach/regs-usb-phy.h
deleted file mode 100644
index 0727773..000
--- a/arch/arm/mach-exynos/include/mach/regs-usb-phy.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2011 Samsung Electronics Co.Ltd
- * Author: Joonyoung Shim jy0922.s...@samsung.com
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#ifndef __PLAT_S5P_REGS_USB_PHY_H
-#define __PLAT_S5P_REGS_USB_PHY_H
-
-#define EXYNOS4_HSOTG_PHYREG(x)((x) + S3C_VA_USB_HSPHY)
-
-#define EXYNOS4_PHYPWR EXYNOS4_HSOTG_PHYREG(0x00)
-#define PHY1_HSIC_NORMAL_MASK  (0xf  9)
-#define PHY1_HSIC1_SLEEP   (1  12)
-#define PHY1_HSIC1_FORCE_SUSPEND   (1  11)
-#define PHY1_HSIC0_SLEEP   (1  10)
-#define PHY1_HSIC0_FORCE_SUSPEND   (1  9)
-
-#define PHY1_STD_NORMAL_MASK   (0x7  6)
-#define PHY1_STD_SLEEP (1  8)
-#define PHY1_STD_ANALOG_POWERDOWN  (1  7)
-#define PHY1_STD_FORCE_SUSPEND (1  6)
-
-#define PHY0_NORMAL_MASK   (0x39  0)
-#define PHY0_SLEEP (1  5)
-#define PHY0_OTG_DISABLE   (1  4)
-#define PHY0_ANALOG_POWERDOWN  (1  3)
-#define PHY0_FORCE_SUSPEND (1  0)
-
-#define EXYNOS4_PHYCLK EXYNOS4_HSOTG_PHYREG(0x04)
-#define PHY1_COMMON_ON_N   (1  7)
-#define PHY0_COMMON_ON_N   (1  4)
-#define PHY0_ID_PULLUP (1  2)
-
-#define EXYNOS4_CLKSEL_SHIFT   (0)
-
-#define EXYNOS4210_CLKSEL_MASK (0x3  0)
-#define EXYNOS4210_CLKSEL_48M  (0x0  0)
-#define EXYNOS4210_CLKSEL_12M  (0x2  0)
-#define EXYNOS4210_CLKSEL_24M  (0x3  0)
-
-#define EXYNOS4X12_CLKSEL_MASK (0x7  0)
-#define EXYNOS4X12_CLKSEL_9600K(0x0  0)
-#define EXYNOS4X12_CLKSEL_10M  (0x1  0)
-#define EXYNOS4X12_CLKSEL_12M  (0x2  0)
-#define EXYNOS4X12_CLKSEL_19200K   (0x3  0)
-#define EXYNOS4X12_CLKSEL_20M  (0x4  0)
-#define EXYNOS4X12_CLKSEL_24M  (0x5  0)
-
-#define EXYNOS4_RSTCON EXYNOS4_HSOTG_PHYREG(0x08)
-#define HOST_LINK_PORT_SWRST_MASK  (0xf  6)
-#define HOST_LINK_PORT2_SWRST  (1  9)
-#define HOST_LINK_PORT1_SWRST  (1  8)
-#define HOST_LINK_PORT0_SWRST  (1  7)
-#define HOST_LINK_ALL_SWRST(1  6)
-
-#define PHY1_SWRST_MASK(0x7  3)
-#define PHY1_HSIC_SWRST(1  5)
-#define PHY1_STD_SWRST (1  4)
-#define PHY1_ALL_SWRST (1  3)
-
-#define PHY0_SWRST_MASK(0x7  0)
-#define PHY0_PHYLINK_SWRST (1  2)
-#define PHY0_HLINK_SWRST   (1  1)
-#define PHY0_SWRST (1  0)
-
-#define EXYNOS4_PHY1CONEXYNOS4_HSOTG_PHYREG(0x34)
-#define FPENABLEN  (1  0)
-
-#endif /* __PLAT_S5P_REGS_USB_PHY_H */
-- 
1.8.2.1

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[PATCH v2 12/38] ARM: EXYNOS: firmware: Remove check for device tree presence

2013-06-17 Thread Tomasz Figa
This patch makes the firmware setup code assume presence of DT, since it
is now the only way of booting supported for Exynos.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/firmware.c | 22 ++
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index ed11f10..932129e 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -48,20 +48,18 @@ static const struct firmware_ops exynos_firmware_ops = {
 
 void __init exynos_firmware_init(void)
 {
-   if (of_have_populated_dt()) {
-   struct device_node *nd;
-   const __be32 *addr;
+   struct device_node *nd;
+   const __be32 *addr;
 
-   nd = of_find_compatible_node(NULL, NULL,
-   samsung,secure-firmware);
-   if (!nd)
-   return;
+   nd = of_find_compatible_node(NULL, NULL,
+   samsung,secure-firmware);
+   if (!nd)
+   return;
 
-   addr = of_get_address(nd, 0, NULL, NULL);
-   if (!addr) {
-   pr_err(%s: No address specified.\n, __func__);
-   return;
-   }
+   addr = of_get_address(nd, 0, NULL, NULL);
+   if (!addr) {
+   pr_err(%s: No address specified.\n, __func__);
+   return;
}
 
pr_info(Running under secure firmware.\n);
-- 
1.8.2.1

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[PATCH v2 19/38] ARM: EXYNOS: Decouple ARCH_EXYNOS from PLAT_S5P

2013-06-17 Thread Tomasz Figa
After removing support for ATAGS based boot on Exynos, there is not much
that can be shared between Exynos and other S5P platforms. This patch
makes Exynos a standalone Samsung platform, not using PLAT_S5P.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/Kconfig| 3 +++
 arch/arm/Makefile   | 1 +
 arch/arm/mach-exynos/Kconfig| 1 +
 arch/arm/plat-samsung/Kconfig   | 8 +++-
 arch/arm/plat-samsung/pm-gpio.c | 5 +++--
 5 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9c69e6c..b3560c2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -795,7 +795,9 @@ config ARCH_EXYNOS
bool Samsung EXYNOS
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
+   select ARCH_REQUIRE_GPIOLIB
select ARCH_SPARSEMEM_ENABLE
+   select ARM_GIC
select CLKDEV_LOOKUP
select COMMON_CLK
select CPU_V7
@@ -807,6 +809,7 @@ config ARCH_EXYNOS
select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
select NEED_MACH_MEMORY_H
+   select S5P_GPIO_DRVSTR
select SAMSUNG_ATAGS
select USE_OF
help
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1ba358b..60133fb 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -197,6 +197,7 @@ machine-$(CONFIG_ARCH_SUNXI)+= sunxi
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
+plat-$(CONFIG_ARCH_EXYNOS) += samsung
 plat-$(CONFIG_ARCH_OMAP)   += omap
 plat-$(CONFIG_ARCH_S3C64XX)+= samsung
 plat-$(CONFIG_PLAT_IOP)+= iop
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 0d93ebe..65ca3ac 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -14,6 +14,7 @@ menu SAMSUNG EXYNOS SoCs Support
 config ARCH_EXYNOS4
bool SAMSUNG EXYNOS4
default y
+   select GIC_NON_BANKED
select HAVE_ARM_SCU if SMP
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 7b08b26..ca27cc9 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -6,7 +6,7 @@
 
 config PLAT_SAMSUNG
bool
-   depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
+   depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P || ARCH_EXYNOS
default y
select GENERIC_IRQ_CHIP
select NO_IOPORT
@@ -15,12 +15,10 @@ config PLAT_SAMSUNG
 
 config PLAT_S5P
bool
-   depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+   depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
default y
select ARCH_REQUIRE_GPIOLIB
-   select ARM_GIC if ARCH_EXYNOS
-   select ARM_VIC if !ARCH_EXYNOS
-   select GIC_NON_BANKED if ARCH_EXYNOS4
+   select ARM_VIC
select NO_IOPORT
select PLAT_SAMSUNG
select S3C_GPIO_TRACK
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index c2ff92c..a8de3cf 100644
--- a/arch/arm/plat-samsung/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -192,7 +192,8 @@ struct samsung_gpio_pm samsung_gpio_pm_2bit = {
.resume = samsung_gpio_pm_2bit_resume,
 };
 
-#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P)
+#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) \
+   || defined(CONFIG_ARCH_EXYNOS)
 static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip)
 {
chip-pm_save[1] = __raw_readl(chip-base + OFFS_CON);
@@ -302,7 +303,7 @@ struct samsung_gpio_pm samsung_gpio_pm_4bit = {
.save   = samsung_gpio_pm_4bit_save,
.resume = samsung_gpio_pm_4bit_resume,
 };
-#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */
+#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P || CONFIG_ARCH_EXYNOS */
 
 /**
  * samsung_pm_save_gpio() - save gpio chip data for suspend
-- 
1.8.2.1

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[PATCH v2 15/38] ARM: EXYNOS: Provide compatibility stubs for PM code in pm-core.h header

2013-06-17 Thread Tomasz Figa
This patch adds several compatibility definitions that are not relevant
for Exynos, but are required by Samsung PM core.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/include/mach/pm-core.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h 
b/arch/arm/mach-exynos/include/mach/pm-core.h
index 296090e..dd62559 100644
--- a/arch/arm/mach-exynos/include/mach/pm-core.h
+++ b/arch/arm/mach-exynos/include/mach/pm-core.h
@@ -69,4 +69,8 @@ static inline void samsung_pm_saved_gpios(void)
/* nothing here yet */
 }
 
+/* Compatibility definitions to make plat-samsung/pm.c compile */
+#define s3c_irqwake_intallow   0
+#define s3c_irqwake_eintallow  0
+
 #endif /* __ASM_ARCH_PM_CORE_H */
-- 
1.8.2.1

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[PATCH v2 06/38] ARM: EXYNOS: common: Remove legacy UART initialization code

2013-06-17 Thread Tomasz Figa
This patch removes legacy UART initialization code that was used to
set up UART platform devices when booting with ATAGS, which is not
supported on Exynos any more.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/common.c | 17 -
 arch/arm/plat-samsung/init.c  |  8 +---
 2 files changed, 5 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 488d9bd..598e4b8 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -69,7 +69,6 @@ static const char name_exynos5440[] = EXYNOS5440;
 static void exynos4_map_io(void);
 static void exynos5_map_io(void);
 static void exynos5440_map_io(void);
-static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 static int exynos_init(void);
 
 unsigned long xxti_f = 0, xusbxti_f = 0;
@@ -79,21 +78,18 @@ static struct cpu_table cpu_ids[] __initdata = {
.idcode = EXYNOS4210_CPU_ID,
.idmask = EXYNOS4_CPU_MASK,
.map_io = exynos4_map_io,
-   .init_uarts = exynos4_init_uarts,
.init   = exynos_init,
.name   = name_exynos4210,
}, {
.idcode = EXYNOS4212_CPU_ID,
.idmask = EXYNOS4_CPU_MASK,
.map_io = exynos4_map_io,
-   .init_uarts = exynos4_init_uarts,
.init   = exynos_init,
.name   = name_exynos4212,
}, {
.idcode = EXYNOS4412_CPU_ID,
.idmask = EXYNOS4_CPU_MASK,
.map_io = exynos4_map_io,
-   .init_uarts = exynos4_init_uarts,
.init   = exynos_init,
.name   = name_exynos4412,
}, {
@@ -602,16 +598,3 @@ static int __init exynos_init(void)
 
return device_register(exynos4_dev);
 }
-
-/* uart registration process */
-
-static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-   struct s3c2410_uartcfg *tcfg = cfg;
-   u32 ucnt;
-
-   for (ucnt = 0; ucnt  no; ucnt++, tcfg++)
-   tcfg-has_fracval = 1;
-
-   s3c24xx_init_uartdevs(exynos4210-uart, exynos4_uart_resources, cfg, 
no);
-}
diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
index 79d10fc..3e5c461 100644
--- a/arch/arm/plat-samsung/init.c
+++ b/arch/arm/plat-samsung/init.c
@@ -87,7 +87,7 @@ void __init s3c24xx_init_clocks(int xtal)
 }
 
 /* uart management */
-
+#if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
 static int nr_uarts __initdata = 0;
 
 static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
@@ -134,11 +134,12 @@ void __init s3c24xx_init_uarts(struct s3c2410_uartcfg 
*cfg, int no)
if (cpu == NULL)
return;
 
-   if (cpu-init_uarts == NULL) {
+   if (cpu-init_uarts == NULL  IS_ENABLED(CONFIG_SAMSUNG_ATAGS)) {
printk(KERN_ERR s3c24xx_init_uarts: cpu has no uart init\n);
} else
(cpu-init_uarts)(cfg, no);
 }
+#endif
 
 static int __init s3c_arch_init(void)
 {
@@ -152,8 +153,9 @@ static int __init s3c_arch_init(void)
ret = (cpu-init)();
if (ret != 0)
return ret;
-
+#if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts);
+#endif
return ret;
 }
 
-- 
1.8.2.1

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[PATCH v2 00/38] Thirty eight patches big Exynos cleanup

2013-06-17 Thread Tomasz Figa
Hi All,

As I promised, I am doing some spring (or rather summer) cleaning
of Exynos- and Samsung- related code.

This first part consists mostly of removing dead code remaining after
removal of ATAGS support for Exynos, but several patches cleans up
other things found by the way.

See particular patches for more detailed description.

On Exynos4210-based Trats board:
Tested-by: Tomasz Figa t.f...@samsung.com

Build tested every patch with s3c6400_defconfig, s5pv210_defconfig
and exynos_defconfig.

Changes since v1:
 - Split patches removing SOC_EXYNOS4412
 - Adjusted drivers to check for ARCH_EXYNOS in addition to PLAT_S5P
 - Fixed compilation issue on s5pc100
 - Removed empty line from mach-exynos/Makefile
 - Removed SAMSUNG_GPIOLIB_4BIT selection from ARCH_EXYNOS
 - Sorted Kconfig and Makefile entries
 - Added additional cleanup from Arnd (split and slightly modified)

Tomasz Figa (38):
  ARM: EXYNOS: Remove unused board files
  ARM: EXYNOS: Make ARCH_EXYNOS select USE_OF
  ARM: SAMSUNG: Introduce SAMSUNG_ATAGS Kconfig entry
  ARM: EXYNOS: common: Remove legacy PMU initialization code
  ARM: EXYNOS: common: Remove legacy EINT initialization code
  ARM: EXYNOS: common: Remove legacy UART initialization code
  ARM: EXYNOS: Remove legacy dev- and setup- files
  ARM: EXYNOS: common: Remove legacy interrupt initialization code
  ARM: EXYNOS: common: Remove legacy timer initialization code
  ARM: EXYNOS: common: Remove platform device initialization
  ARM: EXYNOS: common: Remove legacy mapping of chip ID block
  ARM: EXYNOS: firmware: Remove check for device tree presence
  ARM: EXYNOS: pm_domains: Remove legacy power domain registration code
  ARM: SAMSUNG: Introduce GPIO_SAMSUNG Kconfig entry
  ARM: EXYNOS: Provide compatibility stubs for PM code in pm-core.h
header
  ARM: SAMSUNG: Compile legacy IRQ and GPIO PM code only with ATAGS
support
  [media] platform: Check for ARCH_EXYNOS separately
  USB: Check for ARCH_EXYNOS separately
  ARM: EXYNOS: Decouple ARCH_EXYNOS from PLAT_S5P
  ARM: SAMSUNG: pm: Include most of mach/ headers conditionally
  ARM: EXYNOS: Do not select legacy Kconfig symbols any more
  ARM: EXYNOS: Remove setup-i2c0.c
  ARM: EXYNOS: Remove mach/gpio.h
  ARM: EXYNOS: Remove mach/regs-gpio.h header
  ARM: SAMSUNG: Make legacy MFC support code depend on SAMSUNG_ATAGS
  ARM: EXYNOS: Select SPARSE_IRQ for Exynos
  ARM: EXYNOS: Remove mach/irqs.h header
  ARM: EXYNOS: Remove unused base addresses from mach/map.h header
  thermal: exynos: Support both Exynos4x12 SoCs
  ARM: EXYNOS: Remove CONFIG_SOC_EXYNOS4412
  cpufreq: exynos4x12: Remove check for SOC_EXYNOS4412
  [media] exynos4-is: Remove check for SOC_EXYNOS4412
  thermal: exynos: Remove check for SOC_EXYNOS4412
  ARM: EXYNOS: Remove mach/regs-usb-phy.h header
  ARM: EXYNOS: Remove custom init_irq callbacks
  ARM: EXYNOS: Use exynos_init_io() as map_io callback
  ARM: EXYNOS: Remove legacy L2X0 initialization
  ARM: EXYNOS: Remove remaining dead code after non-DT support removal

 arch/arm/Kconfig |   15 +-
 arch/arm/Makefile|1 +
 arch/arm/mach-exynos/Kconfig |   31 +-
 arch/arm/mach-exynos/Makefile|7 -
 arch/arm/mach-exynos/common.c|  537 +
 arch/arm/mach-exynos/common.h|4 +-
 arch/arm/mach-exynos/dev-audio.c |  254 
 arch/arm/mach-exynos/dev-uart.c  |   55 -
 arch/arm/mach-exynos/firmware.c  |   22 +-
 arch/arm/mach-exynos/include/mach/gpio.h |  289 -
 arch/arm/mach-exynos/include/mach/irqs.h |  476 
 arch/arm/mach-exynos/include/mach/map.h  |  218 +---
 arch/arm/mach-exynos/include/mach/pm-core.h  |   12 +-
 arch/arm/mach-exynos/include/mach/regs-gpio.h|   40 -
 arch/arm/mach-exynos/include/mach/regs-usb-phy.h |   74 --
 arch/arm/mach-exynos/mach-armlex4210.c   |  207 
 arch/arm/mach-exynos/mach-exynos4-dt.c   |8 +-
 arch/arm/mach-exynos/mach-exynos5-dt.c   |8 +-
 arch/arm/mach-exynos/mach-nuri.c | 1388 --
 arch/arm/mach-exynos/mach-origen.c   |  823 -
 arch/arm/mach-exynos/mach-smdk4x12.c |  396 --
 arch/arm/mach-exynos/mach-smdkv310.c |  444 ---
 arch/arm/mach-exynos/mach-universal_c210.c   | 1159 --
 arch/arm/mach-exynos/pm.c|1 -
 arch/arm/mach-exynos/pm_domains.c|   94 +-
 arch/arm/mach-exynos/setup-fimc.c|   44 -
 arch/arm/mach-exynos/setup-fimd0.c   |   43 -
 arch/arm/mach-exynos/setup-i2c0.c|   29 -
 arch/arm/mach-exynos/setup-i2c1.c|   23 -
 arch/arm/mach-exynos/setup-i2c2.c|   23 -
 arch/arm/mach-exynos/setup-i2c3.c|   23 -
 arch/arm/mach-exynos/setup-i2c4.c|   23 -
 

[PATCH v2 24/38] ARM: EXYNOS: Remove mach/regs-gpio.h header

2013-06-17 Thread Tomasz Figa
Contents of this header are not used any more and can be safely removed.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/common.c |  1 -
 arch/arm/mach-exynos/include/mach/regs-gpio.h | 40 ---
 arch/arm/mach-exynos/pm.c |  1 -
 3 files changed, 42 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/regs-gpio.h

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index f81aa22..7b53e4c 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -40,7 +40,6 @@
 
 #include mach/regs-irq.h
 #include mach/regs-pmu.h
-#include mach/regs-gpio.h
 
 #include plat/cpu.h
 #include plat/pm.h
diff --git a/arch/arm/mach-exynos/include/mach/regs-gpio.h 
b/arch/arm/mach-exynos/include/mach/regs-gpio.h
deleted file mode 100644
index e4b5b60..000
--- a/arch/arm/mach-exynos/include/mach/regs-gpio.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/regs-gpio.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS4 - GPIO (including EINT) register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_GPIO_H
-#define __ASM_ARCH_REGS_GPIO_H __FILE__
-
-#include mach/map.h
-#include mach/irqs.h
-
-#define EINT_REG_NR(x) (EINT_OFFSET(x)  3)
-#define EINT_CON(b, x) (b + 0xE00 + (EINT_REG_NR(x) * 4))
-#define EINT_FLTCON(b, x)  (b + 0xE80 + (EINT_REG_NR(x) * 4))
-#define EINT_MASK(b, x)(b + 0xF00 + (EINT_REG_NR(x) * 
4))
-#define EINT_PEND(b, x)(b + 0xF40 + (EINT_REG_NR(x) * 
4))
-
-#define EINT_OFFSET_BIT(x) (1  (EINT_OFFSET(x)  0x7))
-
-/* compatibility for plat-s5p/irq-pm.c */
-#define EXYNOS4_EINT40CON  (S5P_VA_GPIO2 + 0xE00)
-#define S5P_EINT_CON(x)(EXYNOS4_EINT40CON + ((x) * 
0x4))
-
-#define EXYNOS4_EINT40FLTCON0  (S5P_VA_GPIO2 + 0xE80)
-#define S5P_EINT_FLTCON(x) (EXYNOS4_EINT40FLTCON0 + ((x) * 0x4))
-
-#define EXYNOS4_EINT40MASK (S5P_VA_GPIO2 + 0xF00)
-#define S5P_EINT_MASK(x)   (EXYNOS4_EINT40MASK + ((x) * 0x4))
-
-#define EXYNOS4_EINT40PEND (S5P_VA_GPIO2 + 0xF40)
-#define S5P_EINT_PEND(x)   (EXYNOS4_EINT40PEND + ((x) * 0x4))
-
-#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index e3faaa81..41c2069 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -30,7 +30,6 @@
 #include plat/regs-srom.h
 
 #include mach/regs-irq.h
-#include mach/regs-gpio.h
 #include mach/regs-clock.h
 #include mach/regs-pmu.h
 #include mach/pm-core.h
-- 
1.8.2.1

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[PATCH v2 23/38] ARM: EXYNOS: Remove mach/gpio.h

2013-06-17 Thread Tomasz Figa
This patch removes mach/gpio.h header that is not required any more on
Exynos.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/include/mach/gpio.h | 289 ---
 1 file changed, 289 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/gpio.h

diff --git a/arch/arm/mach-exynos/include/mach/gpio.h 
b/arch/arm/mach-exynos/include/mach/gpio.h
deleted file mode 100644
index eb24f1e..000
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H __FILE__
-
-/* Macro for EXYNOS GPIO numbering */
-
-#define EXYNOS_GPIO_NEXT(__gpio) \
-   ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
-
-/* EXYNOS4 GPIO bank sizes */
-
-#define EXYNOS4_GPIO_A0_NR (8)
-#define EXYNOS4_GPIO_A1_NR (6)
-#define EXYNOS4_GPIO_B_NR  (8)
-#define EXYNOS4_GPIO_C0_NR (5)
-#define EXYNOS4_GPIO_C1_NR (5)
-#define EXYNOS4_GPIO_D0_NR (4)
-#define EXYNOS4_GPIO_D1_NR (4)
-#define EXYNOS4_GPIO_E0_NR (5)
-#define EXYNOS4_GPIO_E1_NR (8)
-#define EXYNOS4_GPIO_E2_NR (6)
-#define EXYNOS4_GPIO_E3_NR (8)
-#define EXYNOS4_GPIO_E4_NR (8)
-#define EXYNOS4_GPIO_F0_NR (8)
-#define EXYNOS4_GPIO_F1_NR (8)
-#define EXYNOS4_GPIO_F2_NR (8)
-#define EXYNOS4_GPIO_F3_NR (6)
-#define EXYNOS4_GPIO_J0_NR (8)
-#define EXYNOS4_GPIO_J1_NR (5)
-#define EXYNOS4_GPIO_K0_NR (7)
-#define EXYNOS4_GPIO_K1_NR (7)
-#define EXYNOS4_GPIO_K2_NR (7)
-#define EXYNOS4_GPIO_K3_NR (7)
-#define EXYNOS4_GPIO_L0_NR (8)
-#define EXYNOS4_GPIO_L1_NR (3)
-#define EXYNOS4_GPIO_L2_NR (8)
-#define EXYNOS4_GPIO_X0_NR (8)
-#define EXYNOS4_GPIO_X1_NR (8)
-#define EXYNOS4_GPIO_X2_NR (8)
-#define EXYNOS4_GPIO_X3_NR (8)
-#define EXYNOS4_GPIO_Y0_NR (6)
-#define EXYNOS4_GPIO_Y1_NR (4)
-#define EXYNOS4_GPIO_Y2_NR (6)
-#define EXYNOS4_GPIO_Y3_NR (8)
-#define EXYNOS4_GPIO_Y4_NR (8)
-#define EXYNOS4_GPIO_Y5_NR (8)
-#define EXYNOS4_GPIO_Y6_NR (8)
-#define EXYNOS4_GPIO_Z_NR  (7)
-
-/* EXYNOS4 GPIO bank numbers */
-
-enum exynos4_gpio_number {
-   EXYNOS4_GPIO_A0_START   = 0,
-   EXYNOS4_GPIO_A1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A0),
-   EXYNOS4_GPIO_B_START= EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A1),
-   EXYNOS4_GPIO_C0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_B),
-   EXYNOS4_GPIO_C1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0),
-   EXYNOS4_GPIO_D0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1),
-   EXYNOS4_GPIO_D1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0),
-   EXYNOS4_GPIO_E0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
-   EXYNOS4_GPIO_E1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E0),
-   EXYNOS4_GPIO_E2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E1),
-   EXYNOS4_GPIO_E3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E2),
-   EXYNOS4_GPIO_E4_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E3),
-   EXYNOS4_GPIO_F0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E4),
-   EXYNOS4_GPIO_F1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0),
-   EXYNOS4_GPIO_F2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1),
-   EXYNOS4_GPIO_F3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2),
-   EXYNOS4_GPIO_J0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F3),
-   EXYNOS4_GPIO_J1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J0),
-   EXYNOS4_GPIO_K0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J1),
-   EXYNOS4_GPIO_K1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K0),
-   EXYNOS4_GPIO_K2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K1),
-   EXYNOS4_GPIO_K3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K2),
-   EXYNOS4_GPIO_L0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K3),
-   EXYNOS4_GPIO_L1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L0),
-   EXYNOS4_GPIO_L2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L1),
-   EXYNOS4_GPIO_X0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L2),
-   EXYNOS4_GPIO_X1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X0),
-   EXYNOS4_GPIO_X2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X1),
-   EXYNOS4_GPIO_X3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X2),
-   EXYNOS4_GPIO_Y0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X3),
-   EXYNOS4_GPIO_Y1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y0),
-   EXYNOS4_GPIO_Y2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y1),
-   EXYNOS4_GPIO_Y3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y2),
-   EXYNOS4_GPIO_Y4_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y3),
-   EXYNOS4_GPIO_Y5_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y4),
-   EXYNOS4_GPIO_Y6_START   = 

[PATCH v2 22/38] ARM: EXYNOS: Remove setup-i2c0.c

2013-06-17 Thread Tomasz Figa
Now since SAMSUNG_ATAGS is no longer selected for ARCH_EXYNOS, we can
safely remove the remaining setup code.

Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 arch/arm/mach-exynos/Makefile |  4 
 arch/arm/mach-exynos/setup-i2c0.c | 19 ---
 2 files changed, 23 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/setup-i2c0.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 5fc6cfd..e970a7a 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -34,7 +34,3 @@ AFLAGS_exynos-smc.o   :=-Wa,-march=armv7-a$(plus_sec)
 
 obj-$(CONFIG_MACH_EXYNOS4_DT)  += mach-exynos4-dt.o
 obj-$(CONFIG_MACH_EXYNOS5_DT)  += mach-exynos5-dt.o
-
-# device support
-
-obj-$(CONFIG_ARCH_EXYNOS)  += setup-i2c0.o
diff --git a/arch/arm/mach-exynos/setup-i2c0.c 
b/arch/arm/mach-exynos/setup-i2c0.c
deleted file mode 100644
index ede6ceb..000
--- a/arch/arm/mach-exynos/setup-i2c0.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (c) 2009-2012 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * I2C0 GPIO configuration.
- *
- * Based on plat-s3c64xx/setup-i2c0.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-struct platform_device; /* don't need the contents */
-
-void s3c_i2c0_cfg_gpio(struct platform_device *dev)
-{
-
-}
-- 
1.8.2.1

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