S5M8767 chip has 3 crystal oscillators which are operated in the same
as the crystal oscillators in S2MPS11. Extend s2mps11-clk driver to
support clocks in S5M8767.
The patches are based on next-20131030.
Tushar Behera (4):
clk: clk-s2mps11: Refactor for including support for other MFD clocks
The clocks in S2MPS11 and S5M8767 are managed in the same way, baring
a difference in the register offset. It would be better to update
existing S2MPS11 driver to support the clocks in S5M8767, rather than
creating an almost duplicate driver altogether.
Signed-off-by: Tushar Behera
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
CC: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos5250-arndale.dts |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index
S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
supported by s2mps11-clk driver.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
CC: Lee Jones lee.jo...@linaro.org
---
drivers/mfd/sec-core.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Since clock operation within S2MPS11 and S5M8767 are similar, we can
support both the devices within a single driver.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
CC: Yadwinder Singh Brar yadi.b...@samsung.com
CC: Mike Turquette mturque...@linaro.org
---
drivers/clk/Kconfig |6
Hi Leela,
On 31 October 2013 11:30, Leela Krishna Amudala l.kris...@samsung.com wrote:
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure
Add device tree nodes for DWC3 controller present on
Exynos 5420 SoC, to enable support for USB 3.0.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 38 +++-
1 files changed, 36 insertions(+), 2 deletions(-)
diff
Add device tree nodes for USB 3.0 PHY present alongwith
USB 3.0 controller Exynos 5420 SoC. This phy driver is
based on generic phy framework.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 16
1 files changed, 16 insertions(+), 0
Update device tree bindings for DWC3 controller and
USB 3.0 phy present on Exynos 5250 SoC, to start using
the phy driver based on generic phy framework.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi | 17 ++---
1 files changed, 6
Adding a phy driver for USB 3.0 PHY controller present on Exynos5
series of SoCs alongwith DWC3 controller for USB 3.0 operations.
This driver is inline with Kamil's USB 2.0 phy driver. [1]
Few functions used to translate ref clock rate are common to
Kamil's changes. So we can figure out how to
Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
The new driver uses the generic PHY framework and will interact
with DWC3 controller present on Exynos5 series of SoCs.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
.../devicetree/bindings/phy/samsung-phy.txt|
Enabled watchdog in Exynos4.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos4.dtsi |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index ce24edba7f6d..b7378154c0a1 100644
---
On 26 September 2013 10:20, Sachin Kamat sachin.ka...@linaro.org wrote:
From: Tushar Behera tushar.beh...@linaro.org
As per the timing information for supported panel, the value should
be between 47.2 MHz to 47.9 MHz for 60Hz refresh rate.
Total horizontal pixels = 1024 (x-res) + 80 (margin)
Hi Mark Brown ,
On Wed, Oct 30, 2013 at 10:36 PM, Tomasz Figa t.f...@samsung.com wrote:
On Wednesday 30 of October 2013 10:00:29 Mark Brown wrote:
On Wed, Oct 30, 2013 at 11:52:54AM +0530, Rajeshwari Birje wrote:
The following patch already sets bits_per_word_mask for
Hi Russell,
Em Mon, 30 Sep 2013 13:57:47 +0200
Hans Verkuil hverk...@xs4all.nl escreveu:
On 09/19/2013 11:44 PM, Russell King wrote:
Replace the following sequence:
dma_set_mask(dev, mask);
dma_set_coherent_mask(dev, mask);
with a call to the new helper
Hi Leela,
On Thursday 31 of October 2013 11:30:48 Leela Krishna Amudala wrote:
This patch adds pmusysreg node to Exynos5 dtsi file to handle PMU
register accesses in a centralized way using syscon driver
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
Hi Leela,
On Thursday 31 of October 2013 11:30:49 Leela Krishna Amudala wrote:
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
arch/arm/boot/dts/exynos5.dtsi|7 ---
Hi Leela,
On Thursday 31 of October 2013 11:30:50 Leela Krishna Amudala wrote:
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe and s2r scenarios.
Signed-off-by: Leela
Hi Rajeshwari,
On Thursday 31 of October 2013 16:17:15 Rajeshwari Birje wrote:
Hi Mark Brown ,
On Wed, Oct 30, 2013 at 10:36 PM, Tomasz Figa t.f...@samsung.com wrote:
On Wednesday 30 of October 2013 10:00:29 Mark Brown wrote:
On Wed, Oct 30, 2013 at 11:52:54AM +0530, Rajeshwari Birje
On Thursday 31 of October 2013 10:16:53 Sachin Kamat wrote:
Fix the name as per DT node naming convention.
- rename the node to syscon which is a more generic name.
- append the register value to the node name.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Changes since v1:
*
On 10/31/2013 05:29 AM, Tomasz Figa wrote:
Hi Leela,
On Thursday 31 of October 2013 11:30:50 Leela Krishna Amudala wrote:
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe
Em Sat, 19 Oct 2013 18:07:57 +0200
Ricardo Ribalda ricardo.riba...@gmail.com escreveu:
vb2_fop_relase does not held the lock although it is modifying the
queue-owner field.
This could lead to race conditions on the vb2_perform_io function
when multiple applications are accessing the video
Hi Sachin,
On Thursday 31 of October 2013 10:16:54 Sachin Kamat wrote:
Added a binding example for reference and updated the
node name.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
.../devicetree/bindings/arm/samsung/sysreg.txt |8 +++-
1 file changed, 7
On 31/10/13 14:42, Mauro Carvalho Chehab wrote:
Em Sat, 19 Oct 2013 18:07:57 +0200
Ricardo Ribalda ricardo.riba...@gmail.com escreveu:
vb2_fop_relase does not held the lock although it is modifying the
queue-owner field.
This could lead to race conditions on the vb2_perform_io function
On Thu, Oct 31, 2013 at 10:48:09AM +0530, Sachin Kamat wrote:
Use the recently introduced DMA_COMPLETE instead of DMA_SUCCESS.
Without this patch we get the following build error:
drivers/dma/s3c24xx-dma.c: In function ‘s3c24xx_dma_tx_status’:
drivers/dma/s3c24xx-dma.c:798:13: error:
On Thu, Oct 31, 2013 at 09:46:40AM -0200, Mauro Carvalho Chehab wrote:
Hi Russell,
Em Mon, 30 Sep 2013 13:57:47 +0200
Hans Verkuil hverk...@xs4all.nl escreveu:
On 09/19/2013 11:44 PM, Russell King wrote:
Replace the following sequence:
dma_set_mask(dev, mask);
Am Donnerstag, 31. Oktober 2013, 06:18:09 schrieb Sachin Kamat:
Use the recently introduced DMA_COMPLETE instead of DMA_SUCCESS.
Without this patch we get the following build error:
drivers/dma/s3c24xx-dma.c: In function ‘s3c24xx_dma_tx_status’:
drivers/dma/s3c24xx-dma.c:798:13: error:
On Thu, 31 Oct 2013, Tushar Behera wrote:
S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
supported by s2mps11-clk driver.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
CC: Lee Jones lee.jo...@linaro.org
---
drivers/mfd/sec-core.c |4 +++-
1 file changed,
From: Ricardo Ribalda ricardo.riba...@gmail.com
vb2_fop_relase does not held the lock although it is modifying the
queue-owner field.
This could lead to race conditions on the vb2_perform_io function
when multiple applications are accessing the video device via
read/write API:
[ 308.297741]
On Thursday, October 31, 2013 7:47 PM, Inki Dae wrote:
CCing Jingoo,
Is that ok to remove eDP driver from video/exynos? Isn't this driver really
used by Linux framebuffer driver, s3c-fb.c?
+cc Tomi Valkeinen, Jean-Christophe PLAGNIOL-VILLARD,
linux-fbdev list, linux-samsung-soc list
On Friday 01 of November 2013 08:06:00 Jingoo Han wrote:
On Thursday, October 31, 2013 7:47 PM, Inki Dae wrote:
CCing Jingoo,
Is that ok to remove eDP driver from video/exynos? Isn't this driver
really used by Linux framebuffer driver, s3c-fb.c?
+cc Tomi Valkeinen, Jean-Christophe
On Friday, November 01, 2013 8:12 AM, Tomasz Figa wrote:
On Friday 01 of November 2013 08:06:00 Jingoo Han wrote:
On Thursday, October 31, 2013 7:47 PM, Inki Dae wrote:
CCing Jingoo,
Is that ok to remove eDP driver from video/exynos? Isn't this driver
really used by Linux
On Friday 01 of November 2013 08:23:59 Jingoo Han wrote:
On Friday, November 01, 2013 8:12 AM, Tomasz Figa wrote:
On Friday 01 of November 2013 08:06:00 Jingoo Han wrote:
On Thursday, October 31, 2013 7:47 PM, Inki Dae wrote:
CCing Jingoo,
Is that ok to remove eDP driver from
On Friday, November 01, 2013 8:27 AM, Tomasz Figa wrote:
On Friday 01 of November 2013 08:23:59 Jingoo Han wrote:
On Friday, November 01, 2013 8:12 AM, Tomasz Figa wrote:
On Friday 01 of November 2013 08:06:00 Jingoo Han wrote:
On Thursday, October 31, 2013 7:47 PM, Inki Dae wrote:
On Friday 01 of November 2013 08:55:12 Jingoo Han wrote:
On Friday, November 01, 2013 8:27 AM, Tomasz Figa wrote:
On Friday 01 of November 2013 08:23:59 Jingoo Han wrote:
On Friday, November 01, 2013 8:12 AM, Tomasz Figa wrote:
On Friday 01 of November 2013 08:06:00 Jingoo Han wrote:
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