Hi Amit,
From: Amit Grover [mailto:amit.gro...@samsung.com]
Sent: Monday, December 30, 2013 11:43 AM
This patch adds Controls to set Horizontal and Vertical search range
for Motion Estimation block for Samsung MFC video Encoders.
Signed-off-by: Swami Nathan swaminat...@samsung.com
Hello All,
On 15 January 2014 14:47, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
This patch set adds use of clk_prepare/clk_unprepare as
required by generic clock framework.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Hello All,
On 15 January 2014 14:46, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
This patch adds the device tree node for SSS module
found on Exynos5420 and Exynos5250
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
TO:
Hello All,
On 15 January 2014 14:47, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
This patch adds code to validate iv buffer before trying to
memcpy the contents
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Changes since v3:
None
drivers/crypto/s5p-sss.c |
Hello All,
On 15 January 2014 14:44, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
From: Naveen Krishna Ch ch.nav...@samsung.com
This patch uses the platform_get_irq() instead of the
platform_get_irq_byname(). Making feeder control interrupt
as resource 0 and hash interrupt as 1.
Hello All,
On 15 January 2014 14:46, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
This patch adds gating clock for SSS(Security SubSystem)
module on Exynos5250/5420.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
TO: linux-samsung-soc@vger.kernel.org
TO: Tomasz Figa
Hello All,
On 15 January 2014 14:44, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
This patch adds device tree support to the s5p-sss.c crypto driver.
Also, Documentation under devicetree/bindings added.
Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com
CC: Herbert Xu
Hi,
On 23/01/14 11:11, Kamil Debski wrote:
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 4ff3b6c..a02e7b8 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@
Hi,
(Adding missing devicetre ML list at CC.)
On 15/01/14 10:14, Naveen Krishna Chatradhi wrote:
This patch adds device tree support to the s5p-sss.c crypto driver.
Also, Documentation under devicetree/bindings added.
Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com
CC: Herbert Xu
On Thu, Jan 23, 2014 at 05:47:25PM +, Sylwester Nawrocki wrote:
On 23/01/14 18:41, Mark Rutland wrote:
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 93cddeb..2da5617 100644
--- a/drivers/crypto/s5p-sss.c
+++ b/drivers/crypto/s5p-sss.c
@@ -22,6 +22,7
I had earlier submitted a patch [1] to remove the hard coded
major/minor number for Samsung UART driver, but that was rejected
because of userspace breakage. Without this patch, Samsung UART driver
can't bind to the hard-coded device node. Changing the default
major/minor will also not help
Hi Heiko,
On 06.01.2014 19:37, Heiko Stübner wrote:
The S3C2412/S3C2413 as well as the S3C2443 and following contain a special
register that restarts the system when written to. This adds a simple
binding, so that it gets accessible on dt systems too.
We distinguish between the two types
Hi Heiko,
On 06.01.2014 19:40, Heiko Stübner wrote:
This converts all boards to use the new common restart function instead
of SoC specific ones.
The mach-s3c2416-dt board now tries to setup either a swrst- or watchdog-
reset so that it will be able to handle more s3c24xx-SoCs later on.
Hi,
On 07.01.2014 09:53, Tushar Behera wrote:
For Exynos4 platform, L2 cache initialization is done only if
a device node for l2x0 device exists.
L2 cache initialization path is different when a board boots with
secure firmware. Since there are many Exynos4 based SoCs that boot
in secure mode,
On 07.01.2014 13:58, Rahul Sharma wrote:
Suspend/resume handling is already moved for all other Exynos
SoCs other than Exynos5420 which is addressed in this patch.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/clk/samsung/clk-exynos5410.c | 49
Hi Rahul,
The patch looks mostly fine now, but I still have one inline comment.
On 07.01.2014 13:59, Rahul Sharma wrote:
Samsung CCF helper functions do not provide support to
register multiple Clock Providers for a given SoC. Due to
this limitation SoC platforms are not able to use these
On Thu, Jan 23, 2014 at 07:47:56PM +0100, Tomasz Figa wrote:
On 23.01.2014 19:40, Mark Brown wrote:
We'd need to leave it user selectable rather than enabling it for ARM,
the whole reason this got noticed is that people are trying to build
kernels that support a wider range of devices for
On Thu, 23 Jan 2014 19:36:33 +
Mark Brown broo...@kernel.org wrote:
On Thu, Jan 23, 2014 at 07:47:56PM +0100, Tomasz Figa wrote:
On 23.01.2014 19:40, Mark Brown wrote:
We'd need to leave it user selectable rather than enabling it for ARM,
the whole reason this got noticed is that
On Thu, Jan 23, 2014 at 07:51:44PM +, Alan Cox wrote:
That strikes me as rather more risky. We can propogate it through the
drivers as we are sure it is safe to do so on that platform and encourage
driver authors to migrate. Better than a big bang and the inevitable
fallout.
I don't see
On Thu, 23 Jan 2014 20:05:09 +
Mark Brown broo...@kernel.org wrote:
On Thu, Jan 23, 2014 at 07:51:44PM +, Alan Cox wrote:
That strikes me as rather more risky. We can propogate it through the
drivers as we are sure it is safe to do so on that platform and encourage
driver authors
On 23.01.2014 20:02, Heiko Stübner wrote:
Am Donnerstag, 23. Januar 2014, 19:51:34 schrieb Tomasz Figa:
On 23.01.2014 19:36, Heiko Stübner wrote:
Am Donnerstag, 23. Januar 2014, 19:12:04 schrieb Tomasz Figa:
Hi Heiko,
On 06.01.2014 19:40, Heiko Stübner wrote:
This converts all boards to
On 23 January 2014 23:45, Tomasz Figa t.f...@samsung.com wrote:
Hi,
On 07.01.2014 09:53, Tushar Behera wrote:
For Exynos4 platform, L2 cache initialization is done only if
a device node for l2x0 device exists.
L2 cache initialization path is different when a board boots with
secure
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