This commit changes the function to get MMU version simpler.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 30 ++
1 file changed, 6 insertions(+), 24 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 6e716cc
Some redundant error message is removed and some error messages
are changed to error level from debug level.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/d
This commit introduces sysmmu_pte_t for page table entries and
sysmmu_iova_t vor I/O virtual address that is manipulated by
exynos-iommu driver. The purpose of the typedef is to remove
dependencies to the driver code from the change of CPU architecture
from 32 bit to 64 bit.
Signed-off-by: Cho Kyo
This patch contains 2 workaround for the System MMU v3.x.
System MMU v3.2 and v3.3 has FLPD cache that caches first level page
table entries to reduce page table walking latency. However, the
FLPD cache is filled with a first level page table entry even though
it is not accessed by a master H/W be
Use of __pa and __va macro is changed to virt_to_phys and phys_to_virt
which are recommended in driver code. printk formatting of physical
address is also fixed to %pa.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 45 +++---
1 file changed,
Patch written by Antonios Motakis :
IOMMU groups are expected by certain users of the IOMMU API,
e.g. VFIO. Since each device is behind its own System MMU, we
can allocate a new IOMMU group for each device.
Reviewd-by: Cho KyongHo
Signed-off-by: Antonios Motakis
---
drivers/iommu/exynos-iommu.
Since acquiring read_lock is not more frequent than write_lock, it is
not beneficial to use rwlock, this commit changes rwlock to spinlock.
Reviewed-by: Grant Grundler
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 39 ---
1 file changed, 20
Some master device descriptor like fimc-is which is an abstraction
of very complex H/W may have multiple System MMUs. For those devices,
the design of the link between System MMU and its master H/W is needed
to be reconsidered.
A link structure, sysmmu_list_data is introduced that provides a link
This adds support for Suspend to RAM and Runtime Power Management.
Since System MMU is located in the same local power domain of its
master H/W, System MMU must be initialized before it is working if
its power domain was ever turned off. TLB invalidation according to
unmapping on page tables must
This commit adds device tree support for System MMU.
Signed-off-by: Cho KyongHo
---
drivers/iommu/Kconfig|5 ++---
drivers/iommu/exynos-iommu.c | 21 +
2 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
This patch gates clocks of master H/W as well as clocks of System MMU
if master clocks are specified.
Some Exynos SoCs (i.e. GScalers in Exynos5250) have dependencies in
the gating clocks of master H/W and its System MMU. If a H/W is the
case, accessing control registers of System MMU is prohibite
exynos-iommu driver must care about master H/W's gate clock as well as
System MMU's gate clock. To enhance readability of the source code,
macros to gate/ungate those clocks are defined.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 34 ++
1 file
This turns on FLPD_CACHE, ACGEN and SYSSEL.
FLPD_CACHE is a cache of 1st level page table entries that contains
the address of a 2nd level page table to reduce latency of page table
walking.
ACGEN is architectural clock gating that gates clocks by System MMU
itself if it is not active. Note that
Runtime power management by exynos-iommu driver independently from
master H/W's runtime pm is not useful for power saving since attaching
master H/W in probing time turns on its local power endlessly.
Thus this removes runtime pm API calls.
Runtime PM support is added in the following commits to ex
This commit removes custom fault handler. The device drivers that
need to register fault handler can register
with iommu_set_fault_handler().
CC: Grant Grundler
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 80 +-
1 file changed, 24 inse
This patch adds dts entries for the System MMU devices found on
Exynos4 and Exynos5 SoC series and the System MMU binding
documentation.
CC: Rob Herring
CC: Sylwester Nawrocki
Signed-off-by: Cho KyongHo
---
.../bindings/iommu/samsung,exynos4210-sysmmu.txt | 86 +++
arch/arm/boot/dts/ex
This patch uses managed device helper functions in the probe().
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 64 +-
1 file changed, 26 insertions(+), 38 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu
This adds gate clocks of all System MMUs and their master IPs
that are not apeared in clk-exynos5250.c and clk-exynos5420.c
Also fixes GATE_IP_ACP to 0x18800 and changed GATE_DA to GATE
for System MMU clocks in clk-exynos4.c
Signed-off-by: Cho KyongHo
---
.../devicetree/bindings/clock/exynos5250
This patch removes dbgname member from sysmmu_drvdata structure.
Kernel message for debugging already has the name of a single
System MMU node.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 32 +---
1 file changed, 13 insertions(+), 19 deletions(-)
System MMU driver is changed to control only a single instance of
System MMU at a time. Since a single instance of System MMU has only
a single clock descriptor for its clock gating, there is no need to
obtain two or more clock descriptors.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iom
Checking if the probing device has a parent device was just to discover
if the probing device is involved in a power domain when the power
domain controlled by Samsung's custom implementation.
Since generic IO power domain is applied, it is required to remove
the condition to see if the probing dev
Since kmalloc() does not guarantee that the allignment of 1KiB when it
allocates 1KiB, it is required to allocate lv2 page table from own
slab that guarantees alignment of 1KiB
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 34 --
1 file changed,
L2TLB is 8-way set-associative TLB with 512 entries. The number of
sets is 64.
A single 4KB(small page) translation information is cached
only to a set whose index is the same with the lower 6 bits of the page
frame number.
A single 64KB(large page) translation information can be
cached to any 16 s
This patch changes not to panic on any error when updating page table.
Instead prints error messages with callstack.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 58 --
1 file changed, 44 insertions(+), 14 deletions(-)
diff --git a/driv
Prefetch buffer is a cache of System MMU 3.x and caches a block of
page table entries to make effect of larger page with small pages.
However, how to control prefetch buffers and the specifications of
prefetch buffers different from minor versions of System MMU v3.
Prefetch buffers must be controle
This commit adds cache flush for removed small and large page entries
in exynos_iommu_unmap(). Missing cache flush of removed page table
entries can cause missing page fault interrupt when a master IP
accesses an unmapped area.
Reviewed-by: Tomasz Figa
Tested-by: Grant Grundler
Signed-off-by: Ch
Commit 25e9d28d92 (ARM: EXYNOS: remove system mmu initialization from
exynos tree) removed arch/arm/mach-exynos/mach/sysmmu.h header without
removing remaining use of it from exynos-iommu driver, thus causing a
compilation error.
This patch fixes the error by removing respective include line
from
Sorry for the delayed posting the v11 patchset.
The current exynos-iommu(System MMU) driver does not work autonomously
since it is lack of support for power management of peripheral blocks.
For example, MFC device driver must ensure that its System MMU is disabled
before MFC block is power-down no
Hi,
On 03/14/2014 01:43 AM, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Thursday, March 13, 2014 05:17:21 PM Chanwoo Choi wrote:
>> This patchset support devicetree and use common ppmu driver instead of
>> individual code of exynos4_bus.c to remove duplicate code. Also this patchset
>> get t
Mark Rutland wrote:
>
[...]
> > > > +/memreserve/ 0x8000 0x0C40;
> > >
> > > Please have a comment as to what this memreserve is intended to protect.
> > > This is very large, and we don't want pointless memreserves.
> > >
> > Well, you mean I need to comment about each reserved memory a
Byungho An :
> From: Siva Reddy
>
> This patch adds support for Samsung 10Gb ethernet driver(sxgbe).
> - sxgbe core initialization
> - Tx and Rx support
> - MDIO support
> - ISRs for Tx and Rx
> - ifconfig support to driver
You'll find a partial review below.
[...]
> diff --git a/drivers/net/e
On Thu, Mar 13, 2014 at 11:25 AM, Jason Gunthorpe
wrote:
> On Thu, Mar 13, 2014 at 11:44:33AM -0600, Stephen Warren wrote:
>> On 03/13/2014 11:40 AM, Tim Harvey wrote:
>> > When using interrupt-maps, the size of a map entry is #address-cells +
>> > #interrupt-cells for the parent interrupt contro
From: Byungho An
Date: Thu, 13 Mar 2014 15:55:28 +0900
> This is 2nd posting for Samsung SXGbE driver and just re-sending because of
> line wrapping in previous posting.
>
> Changes since v1:
> - changed name of driver to SXGbE as per Ben's comment
> - squashed Joe's neatening for many stuff in
On 13.03.2014 06:01, Rahul Sharma wrote:
Thanks Pankaj,
On 13 March 2014 06:19, Pankaj Dubey wrote:
Hi Rahul,
On 03/13/2014 12:16 AM, Rahul Sharma wrote:
The patch adds the dts files for xyref5260 board which
is based on Exynos5260 Evt0 sample.
Signed-off-by: Rahul Sharma
---
arch/arm
On 13.03.2014 06:06, Rahul Sharma wrote:
On 13 March 2014 06:28, Pankaj Dubey wrote:
On 03/13/2014 12:16 AM, Rahul Sharma wrote:
[snip]
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cel
On Thu, Mar 13, 2014 at 11:44:33AM -0600, Stephen Warren wrote:
> On 03/13/2014 11:40 AM, Tim Harvey wrote:
> > When using interrupt-maps, the size of a map entry is #address-cells +
> > #interrupt-cells for the parent interrupt controller. For the ARM GIC
> > address-cells should be 0 as this is
On Thu, Mar 13, 2014 at 08:17:29AM +, Chanwoo Choi wrote:
> This patch add busfreq driver for Exynos4210/Exynos4x12 memory interface
> and bus to support DVFS(Dynamic Voltage Frequency Scaling) according to PPMU
> counters. PPMU (Performance Profiling Monitorings Units) of Exynos4 SoC
> provid
On 03/13/2014 11:40 AM, Tim Harvey wrote:
> When using interrupt-maps, the size of a map entry is #address-cells +
> #interrupt-cells for the parent interrupt controller. For the ARM GIC
> address-cells should be 0 as this is not used.
>
> This patch fixes the example by correctly specifying #ad
On Thu, Mar 6, 2014 at 7:33 AM, Marek Vasut wrote:
> On Thursday, March 06, 2014 at 03:47:03 AM, Jingoo Han wrote:
>> On Wednesday, March 05, 2014 10:26 PM, Lucas Stach wrote:
>> > This is the recommended method of doing the IRQ
>> > mapping. For old devicetrees we fall back to the
>> > previous p
The invalid value of #address-cells in the imx6 pcie host controller node
causes of_irq_parse_raw() to incorrectly advance through an interrupt-map
table of more than one interrupt.
This patch resolves this issue and allows proper interrupt mapping for an
imx6 pcie host connected to a P2P bridge w
When using interrupt-maps, the size of a map entry is #address-cells +
#interrupt-cells for the parent interrupt controller. For the ARM GIC
address-cells should be 0 as this is not used.
This patch fixes the example by correctly specifying #address-cells = 0.
Signed-off-by: Tim Harvey
Cc: Jas
On Thursday, March 13, 2014 05:17:29 PM Chanwoo Choi wrote:
> This patch add busfreq driver for Exynos4210/Exynos4x12 memory interface
This patch adds DT binding documentation not the driver itself.
Same comment for the patch summary line.
> and bus to support DVFS(Dynamic Voltage Frequency Sca
Hi,
On Thursday, March 13, 2014 05:17:21 PM Chanwoo Choi wrote:
> This patchset support devicetree and use common ppmu driver instead of
> individual code of exynos4_bus.c to remove duplicate code. Also this patchset
> get the resources for busfreq from dt data by using DT helper function.
> - PP
2014-03-13 22:41 GMT+09:00 Andrzej Hajda :
> On 03/13/2014 08:08 AM, Inki Dae wrote:
>> 2014-03-12 20:16 GMT+09:00 Tomasz Figa :
>>> On 12.03.2014 11:08, Inki Dae wrote:
2014-03-07 19:00 GMT+09:00 Andrzej Hajda :
> On 03/05/2014 03:56 AM, Inki Dae wrote:
>> Hi Andrzej,
>>
>> Th
Hi,
On 12.03.2014 16:16, Rahul Sharma wrote:
The patch adds the dts files for exynos5260.
Signed-off-by: Pankaj Dubey
Signed-off-by: Rahul Sharma
Signed-off-by: Arun Kumar K
Reviewed-by: Tomasz Figa
---
arch/arm/boot/dts/exynos5260-pinctrl.dtsi | 574 +
arch/
On 13 March 2014 17:23, Tomasz Figa wrote:
> Hi Sachin,
>
>
> On 13.03.2014 04:27, Sachin Kamat wrote:
>>
>> Set it as per the user manual.
>>
>> Signed-off-by: Sachin Kamat
>> ---
>
> Looks fine. Will queue for 3.15, since ATM there is no support for PLL rate
> setting on Exynos 5420 (no rate t
Hi Rahul,
On 12.03.2014 15:56, Rahul Sharma wrote:
Add support for pll2650xx in samsung pll file. This PLL variant
is close to pll36xx but uses CON2 registers instead of CON1.
Aud_pll in Exynos5260 is pll2650xx and uses this code.
Signed-off-by: Rahul Sharma
---
drivers/clk/samsung/clk-pll.
Hi Rahul,
On 12.03.2014 15:56, Rahul Sharma wrote:
From: Pankaj Dubey
exynos5260 use pll2550xx and it has different bit fields
for P,M,S values as compared to pll2550. Support for
pll2550xx is added here.
Signed-off-by: Pankaj Dubey
Signed-off-by: Rahul Sharma
Signed-off-by: Arun Kumar K
-
Hi Rahul,
On 12.03.2014 15:56, Rahul Sharma wrote:
Samsung CCF helper functions do not provide support to
register multiple Clock Providers for a given SoC. Due to
this limitation, SoC platforms are not able to use these
helpers for registering multiple clock providers and are
forced to bypass t
Hi Krzysztof,
On 13.03.2014 10:37, Krzysztof Kozlowski wrote:
This patch adds support for S2MPS14 PMIC clocks (BT and AP) to the
s2mps11 clock driver.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Yadwinder Singh Brar
---
drivers/clk/Kconfig |8 +++---
drivers/clk/clk-s2mps11.c
On 03/13/2014 08:08 AM, Inki Dae wrote:
> 2014-03-12 20:16 GMT+09:00 Tomasz Figa :
>> On 12.03.2014 11:08, Inki Dae wrote:
>>> 2014-03-07 19:00 GMT+09:00 Andrzej Hajda :
On 03/05/2014 03:56 AM, Inki Dae wrote:
> Hi Andrzej,
>
> Thanks for your contributions.
>
> 2014-02-12
On 12.03.2014 15:56, Rahul Sharma wrote:
Add support for exynos5260 clocks in clock driver.
Signed-off-by: Rahul Sharma
Signed-off-by: Pankaj Dubey
---
drivers/clk/samsung/Makefile |1 +
drivers/clk/samsung/clk-exynos5260.c | 1805 ++
drivers/clk
> > >> Are these compatible strings documented anywhere?
> > >
> > > The "-clk" compatible strings are (in next patch). The "-rtc" and
> > > "-regulators" are not.
> >
> > Hmm, this doesn't sound good.
> >
> > > Actually they aren't also used by child driver (each child driver parses
> > > from
On Thu, 2014-03-13 at 05:53 -0700, Joe Perches wrote:
> Maybe this was supposed to be something like
>
> ns = p->tstamp_lo
> ns |= ((u64)tstamp_hi) << 32;
>
> If not, maybe it warrants a comment around
> here or on the descriptor definition
[]
> > +struct sxgbe_rx_ctxt_desc {
> > +
On Thu, 2014-03-13 at 15:55 +0900, Byungho An wrote:
> This patch adds support for Samsung 10Gb ethernet driver(sxgbe).
> - sxgbe core initialization
> - Tx and Rx support
> - MDIO support
> - ISRs for Tx and Rx
> - ifconfig support to driver
[]
> diff --git a/drivers/net/ethernet/samsung/sxgbe_des
Hi Krzysztof,
On 13.03.2014 10:37, Krzysztof Kozlowski wrote:
Add bindings documentation for clocks on S5M8767 and S2MPS14 devices.
Signed-off-by: Krzysztof Kozlowski
Cc: Tomasz Figa
Cc: devicet...@vger.kernel.org
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar
On Thu, 2014-03-13 at 13:37 +0100, Tomasz Figa wrote:
> On 13.03.2014 13:16, Krzysztof Kozlowski wrote:
> > On Thu, 2014-03-13 at 13:07 +0100, Tomasz Figa wrote:
> >> Hi Krzysztof,
> >>
> >> On 13.03.2014 10:37, Krzysztof Kozlowski wrote:
> >>> Add of_compatible strings for MFD cells for regulator,
On 13.03.2014 13:16, Krzysztof Kozlowski wrote:
On Thu, 2014-03-13 at 13:07 +0100, Tomasz Figa wrote:
Hi Krzysztof,
On 13.03.2014 10:37, Krzysztof Kozlowski wrote:
Add of_compatible strings for MFD cells for regulator, clock and RTC
drivers in S5M8767, S2MPS11 and S2MPS14 PMIC-s.
Signed-off-b
Hi Rahul,
On 12.03.2014 15:56, Rahul Sharma wrote:
Add macros which are used as Clock IDs in DT and clock file.
It also adds the documentation for the exynos5260 clocks.
Signed-off-by: Rahul Sharma
---
.../devicetree/bindings/clock/exynos5260-clock.txt | 55 +
include/dt-bindings/cloc
On Thu, 2014-03-13 at 13:07 +0100, Tomasz Figa wrote:
> Hi Krzysztof,
>
> On 13.03.2014 10:37, Krzysztof Kozlowski wrote:
> > Add of_compatible strings for MFD cells for regulator, clock and RTC
> > drivers in S5M8767, S2MPS11 and S2MPS14 PMIC-s.
> >
> > Signed-off-by: Krzysztof Kozlowski
> > ---
Hi Krzysztof,
On 13.03.2014 10:37, Krzysztof Kozlowski wrote:
Add of_compatible strings for MFD cells for regulator, clock and RTC
drivers in S5M8767, S2MPS11 and S2MPS14 PMIC-s.
Signed-off-by: Krzysztof Kozlowski
---
drivers/mfd/sec-core.c |8
1 file changed, 8 insertions(+)
Hi Sachin,
On 13.03.2014 04:27, Sachin Kamat wrote:
Set it as per the user manual.
Signed-off-by: Sachin Kamat
---
drivers/clk/samsung/clk-exynos5420.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c
b/drivers/clk/samsung/clk-exyn
On 13-Mar-2014, at 3:57 pm, Andre Przywara wrote:
> Hi,
>
> sorry for the double post. Please don't use the Gmail address, this is
> just my ML catching account. I got a denial from our SMTP server
> regarding the u-boot ML recipient, so I had to send it again.
We are using google services gma
On Wed, Mar 12, 2014 at 04:31:56AM +, Kukjin Kim wrote:
> Mark Rutland wrote:
> >
> Hi Mark,
>
> > On Mon, Mar 10, 2014 at 10:51:17PM +, Kukjin Kim wrote:
> > > Signed-off-by: Kukjin Kim
> > > Reviewed-by: Thomas Abraham
> > > Cc: Catalin Marinas
> > > ---
> > > arch/arm64/boot/dts/sa
On Thu, Mar 13, 2014 at 10:28 AM, Pankaj Dubey wrote:
> Hi Rahul,
>
>
> On 03/12/2014 11:56 PM, Rahul Sharma wrote:
>>
>> Add support for pll2650xx in samsung pll file. This PLL variant
>> is close to pll36xx but uses CON2 registers instead of CON1.
>>
>> Aud_pll in Exynos5260 is pll2650xx and use
Hi,
sorry for the double post. Please don't use the Gmail address, this is
just my ML catching account. I got a denial from our SMTP server
regarding the u-boot ML recipient, so I had to send it again.
Thanks,
Andre.
On 13/03/14 09:29, Reinhard Moselbach wrote:
Hi,
> We are able to figure ou
Hi,
We are able to figure out the issue. PERIPHBASE returned on ARNDALE
board was 0x1050 and adding GIC offset was creating an incorrect
address.
please see:
https://github.com/apritzel/u-boot-hypmode/commit/5d9c4209907c6d67dadd033887a30c2f10efeb4c
Setting CONFIG_ARM_GIC_BASE_ADDRESS as
Add bindings documentation for clocks on S5M8767 and S2MPS14 devices.
Signed-off-by: Krzysztof Kozlowski
Cc: Tomasz Figa
Cc: devicet...@vger.kernel.org
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
Documentation/devicetree/bindings/mfd/s2mps11.txt |
Add of_compatible strings for MFD cells for regulator, clock and RTC
drivers in S5M8767, S2MPS11 and S2MPS14 PMIC-s.
Signed-off-by: Krzysztof Kozlowski
---
drivers/mfd/sec-core.c |8
1 file changed, 8 insertions(+)
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index
Hi,
This is second version of patchset adding support for the S2MPS14
device to the s2mps11 clock driver.
The patchset *depends on*:
==
1. Work done by Tushar Behera:
[PATCH V2 0/2] Add support for clocks in S5M8767
http://thread.gmane.org/gmane.linux.kernel.samsung
This patch adds support for S2MPS14 PMIC clocks (BT and AP) to the
s2mps11 clock driver.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Yadwinder Singh Brar
---
drivers/clk/Kconfig |8 +++---
drivers/clk/clk-s2mps11.c | 61 ++---
2 files chan
Hi,
> We are able to figure out the issue. PERIPHBASE returned on ARNDALE
> board was 0x1050 and adding GIC offset was creating an incorrect
> address.
please see:
https://github.com/apritzel/u-boot-hypmode/commit/5d9c4209907c6d67dadd033887a30c2f10efeb4c
Setting CONFIG_ARM_GIC_BASE_ADDRES
This patch add busfreq driver for Exynos4210/Exynos4x12 memory interface
and bus to support DVFS(Dynamic Voltage Frequency Scaling) according to PPMU
counters. PPMU (Performance Profiling Monitorings Units) of Exynos4 SoC provides
PPMU counters for DMC(Dynamic Memory Controller) to check memory bus
This patch use common ppmu driver of exynos_ppmu.c driver instead of individual
function related to PPC because PPMU is integrated module with both PPC and
Bus event generator. When using PPMU to get bus performance read/write event,
exynos4_bus.c don't need to consider memory type.
And get ppmu a
There are not the clock controller of ppmudmc0/1. This patch control the clock
of ppmudmc0/1 which is used for monitoring memory bus utilization.
Also, this patch code clean about regulator control and free resource
when calling exit/remove function.
For example,
busfreq@106A {
compat
This patch use SET_SYSTEM_SLEEP_PM_OPS macro instead of legacy method.
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/exynos/exynos4_bus.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/devfreq/exynos/exynos4_bus.c
b/drivers/devfreq/exynos/exynos4_bus.c
index 15
This patch disable ppmu clocks before entering suspend state to remove
power-leakage and enable ppmu clocks on resume function.
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/exynos/exynos4_bus.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drive
This patch add CONFIG_PM_OPP dependecy to exynos4_bus driver
to fix probe fail as following log:
[3.721389] exynos4-busfreq busfreq.3: Fail to add opp entries.
[3.721697] exynos4-busfreq: probe of busfreq.3 failed with error -22
If CONFIG_PM_OPP is disabled, dev_pm_opp_find_freq_floor() i
This patch support DT(DeviceTree) method to probe exynos4_bus and get device
id of each Exynos4 SoC by using dt helper function.
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/exynos/exynos4_bus.c | 26 +-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/dri
This patchset support devicetree and use common ppmu driver instead of
individual code of exynos4_bus.c to remove duplicate code. Also this patchset
get the resources for busfreq from dt data by using DT helper function.
- PPMU register address
- PPMU clock
- Regulator for INT/MIF block
This patch
This patch fix bug about resource leak when happening probe fail and code clean
to add debug message.
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/exynos/exynos4_bus.c | 32 ++--
1 file changed, 26 insertions(+), 6 deletions(-)
diff --git a/drivers/devfreq/exynos/
2014-03-12 20:16 GMT+09:00 Tomasz Figa :
> On 12.03.2014 11:08, Inki Dae wrote:
>>
>> 2014-03-07 19:00 GMT+09:00 Andrzej Hajda :
>>>
>>> On 03/05/2014 03:56 AM, Inki Dae wrote:
Hi Andrzej,
Thanks for your contributions.
2014-02-12 20:31 GMT+09:00 Andrzej Hajda :
>
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