On Thu, Apr 24, 2014 at 12:56:02AM +0530, Ajay kumar wrote:
Thierry,
On Wed, Apr 23, 2014 at 1:12 PM, Thierry Reding
thierry.red...@gmail.com wrote:
On Wed, Apr 23, 2014 at 09:29:15AM +0200, Daniel Vetter wrote:
[...]
Imo this makes sense, especially if we go through with the idea talked
Arun,
On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K arun...@samsung.com wrote:
Adds the google peach-pit board dts file which uses
exynos5420 SoC.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes from v1
---
-
Hi Kukjin,
Need this macro to enable build for clock driver.
Regards,
Rahul Sharma.
On 22 April 2014 15:36, Kukjin Kim kgene@samsung.com wrote:
Tomasz Figa wrote:
On 16.04.2014 10:08, Sachin Kamat wrote:
Hi Tomasz,
On 16 April 2014 13:27, Tomasz Figa tomasz.f...@gmail.com wrote:
This patch fix the offset of CPU boot address and don't need to send smc call
of SMC_CMD_CPU1BOOT command for secondary CPU boot because Exynos3250 removes
WFE in secure mode.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
This patchset support new Exynos3250 Samsung SoC based on Cortex-A7 dual core.
Exynos3250 is a System-On-Chip (SoC) that is based on 32-bit RISC processor
for Smartphone. It is desigend with the 28nm low-power high-K metal gate process
and provides the best performance features.
This patchset
From: Kyungmin Park kyungmin.p...@samsung.com
This patch fix the offset of CPU boot address and change parameter of smc call
of SMC_CMD_CPU1BOOT command for Exynos4212.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
---
From: Tomasz Figa t.f...@samsung.com
This patch add new exynos3250.dtsi to support Exynos3250 SoC based on Cortex-A7
dual core and includes following dt nodes:
- GIC interrupt controller
- Pinctrl to control GPIOs
- Clock controller
- CPU information (Cortex-A7 dual core)
- UART to support
This patch add Exynos3250's SoC ID. Exynos 3250 is System-On-Chip(SoC) that
is based on the 32-bit RISC processor for Smartphone. Exynos3250 uses Cortex-A7
dual cores and has a target speed of 1.0GHz.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park
From: Tomasz Figa t.f...@samsung.com
This patch add new the clock drvier of Exynos3250 SoC based on Cortex-A7
using common clock framework. The CMU (Clock Management Unit) of Exynos3250
control PLLs(Phase Locked Loops) and generate system clocks for CPU, buses,
and function clocks for individual
This patch decide proper lowpower mode of either a15 or a9 according to own ID
from Main ID register.
Cc: Arnd Bergmann a...@arndb.de
Cc: Marc Zynigier marc.zyng...@arm.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
The Exynos3250 clocks are statically listed and registered using the
Samsung specific common clock helper functions. Both device tree based
clock lookup and clkdev based clock lookups are supported.
Cc: Mike Turquette mturque...@linaro.org
Cc: Kukjin Kim kgene@samsung.com
Cc: Rob Herring
Hi Tomasz,
-Original Message-
From: linux-arm-kernel [mailto:linux-arm-kernel-
boun...@lists.infradead.org] On Behalf Of Tomasz Figa
Sent: Friday, April 25, 2014 2:04 AM
To: Chanho Park; kgene@samsung.com; linux-samsung-
s...@vger.kernel.org
Cc: Chanwoo Choi;
This patchset add some device node for exynos4412-trats2.
It is based on v3.15-next/dt-samsung-2 branch.
exynos4412-trats2.dts
- Fix incorrect compatible. Compatible of AK8975 are ak8975 or
asahi-kasei,ak8975.
- Add cm36651 light/proximity sensor device node.
- Change gpio-key device node. fix
This patch fixed incorrect compatible for ak8975 magnetic sensor.
ak8975 magnetic sensor use compatible ak8975 or asahi-kasei,ak8975.
Signed-off-by: Beomho Seo beomho@samsung.com
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
---
arch/arm/boot/dts/exynos4412-trats2.dts |2 +-
1
This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series
boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only
two pmu interrupts. Thus, we can define two interrupts in the
exynos4.dtsi and extends the interrupts only exynos4412.dtsi.
Cc: Chanwoo Choi
Exynos4412-trats2 board have light/proximity sensor.
This patch add cm36651 light/ proximity sensor node for exynos4412.
cm36651 is required properties as below.
- Use i2c-gpio for cm36651 sensor.
- Use fixed regulator for the IR LED.
It is a part of the cm36651 for proximity detection.
-
This patch fixed gpio key device node.
First, fix incorrect gpio property.
And then, add ok-key node where locate bottom center.
I have tested on exynos4412-trats2 board.
Signed-off-by: Beomho Seo beomho@samsung.com
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
---
Thanks Doug Tushar for the Reviewed-by.
On Fri, Apr 25, 2014 at 12:27 AM, Doug Anderson diand...@chromium.org wrote:
Arun,
On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K arun...@samsung.com wrote:
Adds the google peach-pit board dts file which uses
exynos5420 SoC.
Signed-off-by: Arun Kumar
On 04/24/2014 07:09 PM, Mark Brown wrote:
On Wed, Apr 23, 2014 at 02:31:45PM +0530, Tushar Behera wrote:
+Required properties:
+- compatible : Can be one of the following,
+google,snow-audio-max98090 or
+google,snow-audio-max98095
+-
On 04/25/2014 06:46 AM, Chanwoo Choi wrote:
This patch fix the offset of CPU boot address and don't need to send smc call
of SMC_CMD_CPU1BOOT command for secondary CPU boot because Exynos3250 removes
WFE in secure mode.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin
On 04/25/2014 06:46 AM, Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This patch add new exynos3250.dtsi to support Exynos3250 SoC based on
Cortex-A7
dual core and includes following dt nodes:
[ ... ]
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++
Hi Shaik,
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch adds missing clocks for ISP block
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c |
On 04/24/2014 09:55 PM, Mark Brown wrote:
On Thu, Apr 24, 2014 at 08:18:36PM +0530, Naveen Krishna Chatradhi wrote:
This patch moves initialization code to subsys_initcall() to ensure
that the i2c bus is available early so the regulators can be quickly
probed and available for other devices on
On 04/25/2014 01:38 PM, Tushar Behera wrote:
On 04/25/2014 06:46 AM, Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This patch add new exynos3250.dtsi to support Exynos3250 SoC based on
Cortex-A7
dual core and includes following dt nodes:
[ ... ]
---
On Thursday, April 24, 2014 1:02 AM, Steve Capper wrote:
On Fri, Apr 18, 2014 at 04:59:20PM +0900, Jungseok Lee wrote:
This patch implements 4 levels of translation tables since 3 levels of
page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the
On 24 April 2014 13:18, Chander Kashyap chander.kash...@linaro.org wrote:
On 22 April 2014 17:55, Chander Kashyap chander.kash...@linaro.org wrote:
Currently status/configuration power register values are hard-coded for cpu1.
Make it generic so that it is useful for SoC's with more than two
Hi,
On 04/25/2014 01:30 PM, Tushar Behera wrote:
On 04/25/2014 06:46 AM, Chanwoo Choi wrote:
This patch fix the offset of CPU boot address and don't need to send smc call
of SMC_CMD_CPU1BOOT command for secondary CPU boot because Exynos3250 removes
WFE in secure mode.
Signed-off-by: Chanwoo
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multicluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
Many changes/fixes have been identified for clock file for exynos5420.
These include correct parents, bit fields, new clocks etc. Existing
files needs some correction in terms of names of the clock and
On 04/25/2014 11:13 AM, Chanwoo Choi wrote:
Hi,
On 04/25/2014 01:30 PM, Tushar Behera wrote:
On 04/25/2014 06:46 AM, Chanwoo Choi wrote:
This patch fix the offset of CPU boot address and don't need to send smc
call
of SMC_CMD_CPU1BOOT command for secondary CPU boot because Exynos3250
Hi,
On 04/25/2014 02:54 PM, Tushar Behera wrote:
On 04/25/2014 11:13 AM, Chanwoo Choi wrote:
Hi,
On 04/25/2014 01:30 PM, Tushar Behera wrote:
On 04/25/2014 06:46 AM, Chanwoo Choi wrote:
This patch fix the offset of CPU boot address and don't need to send smc
call
of SMC_CMD_CPU1BOOT
The audio setup on Peach-pit board is similar to Snow board, hence the
sound-card driver used on Snow board can be reused on Peach-pit board.
Peach-pit board uses MAX98090 audio codec.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 31
The audio codec on Snow board, MAX98095 is connected on I2C7 bus.
Also it requires the GPX1-7 line to be pulled up.
Updated Snow DTS file to incorporate above changes and added a
sound node to instantiate the I2S-based sound card.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
Related sound card driver has been posted here.
1. [PATCH V2] ASoC: SAMSUNG: Add sound card driver for Snow board
https://lkml.org/lkml/2014/4/23/184
Patch 2 is dependent on Arun's following patch.
2. [PATCH v2] ARM: dts: Add peach-pit board support
Hi,
On Thu, Apr 24, 2014 at 6:08 AM, Anton Tikhomirov
av.tikhomi...@samsung.com wrote:
Hi,
Hi,
-Original Message-
From: linux-usb-ow...@vger.kernel.org [mailto:linux-usb-
ow...@vger.kernel.org] On Behalf Of Vivek Gautam
Sent: Monday, April 21, 2014 9:17 PM
Facilitate
Hi Jingoo,
On Thu, Apr 24, 2014 at 6:56 AM, Jingoo Han jg1@samsung.com wrote:
On Thursday, April 24, 2014 9:33 AM, Jingoo Han wrote:
On Thursday, April 24, 2014 9:18 AM, Anton Tikhomirov wrote:
On Monday, April 21, 2014 9:17 PM, Vivek Gautam wrote:
Facilitate getting required 3.3V
This finally removes all remaining SAMSUNG_CLOCK conditional code
from s3c24xx architectures.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
This is of course meant to go on top of the s3c2410 ccf conversion
arch/arm/mach-s3c24xx/Kconfig | 5 -
arch/arm/mach-s3c24xx/common.c
On Thursday, April 24, 2014 3:40 PM, Vivek Gautam wrote:
On Thu, Apr 24, 2014 at 6:56 AM, Jingoo Han jg1@samsung.com wrote:
On Thursday, April 24, 2014 9:33 AM, Jingoo Han wrote:
On Thursday, April 24, 2014 9:18 AM, Anton Tikhomirov wrote:
On Monday, April 21, 2014 9:17 PM, Vivek
On 23 April 2014 21:32, Lorenzo Pieralisi lorenzo.pieral...@arm.com wrote:
[added Nico in CC]
On Wed, Apr 23, 2014 at 10:25:54AM +0100, Chander Kashyap wrote:
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the
On 23 April 2014 22:02, Lorenzo Pieralisi lorenzo.pieral...@arm.com wrote:
On Wed, Apr 23, 2014 at 10:25:52AM +0100, Chander Kashyap wrote:
Add samsung,exynos5420 compatible string to initialize generic
big-little cpuidle driver for Exynos5420.
Signed-off-by: Chander Kashyap
On 22 April 2014 17:55, Chander Kashyap chander.kash...@linaro.org wrote:
Currently status/configuration power register values are hard-coded for cpu1.
Make it generic so that it is useful for SoC's with more than two cpus.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
On 03/04/2014 05:52 PM, Sachin Kamat wrote:
High speed I2C is used on Exynos5 based SoCs. Enable it.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
arch/arm/configs/exynos_defconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/exynos_defconfig
On 04/23/2014 03:43 PM, Kukjin Kim wrote:
Tushar Behera wrote:
On 22 April 2014 13:08, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Tushar
On Tue, Apr 22, 2014 at 11:09 AM, Tushar Behera
tushar.beh...@linaro.org wrote:
MAU powerdomain provides clocks for Audio sub-system block. This block
The status here could be useful information about the status
register, which is not considered while printing errors by the higher
levels. An option could be to print the error, but not when you
perform tuning.
No big deal though, just a thought.
Right, I could potentially put the driver
Use the clocksource mct-frc for sched_clock
Signed-off-by: Vincent Guittot vincent.guit...@linaro.org
---
drivers/clocksource/exynos_mct.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index a6ee6d7..61b0577 100644
Use generic exynos cpu power control functions to power up/down
and to know the status of the cpu.
Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org
---
arch/arm/mach-exynos/platsmp.c |9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git
Add generic cpu power control functions for exynos based SoCS
for cpu power up/down and to know the cpu status.
Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org
---
arch/arm/mach-exynos/common.h |3 +++
arch/arm/mach-exynos/pm.c | 36
This patchset adds the generic cpu power control functions for
exynos based SoCs to power up/down and to know the status of the cpu.
Note: This series has been rebased on 3.15-rc1 and tested on
Exynos based Origen(Cortex-A9) and Arndale-octa(Cortex A7,A15) boards.
Leela Krishna Amudala (2):
Hi Abhilash and Leela,
FYI I think you are working on similar patches.
On 04/24/2014 11:31 AM, Leela Krishna Amudala wrote:
This patchset adds the generic cpu power control functions for
exynos based SoCs to power up/down and to know the status of the cpu.
Note: This series has been rebased
On 24.04.2014 11:07, Tushar Behera wrote:
On 04/23/2014 03:43 PM, Kukjin Kim wrote:
Tushar Behera wrote:
On 22 April 2014 13:08, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Tushar
On Tue, Apr 22, 2014 at 11:09 AM, Tushar Behera
tushar.beh...@linaro.org wrote:
MAU powerdomain provides
This series tries to simplify the s3c24xx debug macro, removing dependencies
on mach/ includes, static mappings and finally moving it into include/debug.
The one slightly invasive change is the need for the developer to select
the uart type by himself, which gets rid of the debug macro trying to
addruart from the generic debug macro is doing exactly the same using
the common lowlevel uart definition, so there is no cause for this
special casing for s3c24xx.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/boot/compressed/head.S | 5 -
1 file changed, 5 deletions(-)
diff
Using the lowlevel debug uart is a corner case - even more so in a
multiplatform environment. So it seems reasonable to simply let the
developer set the appropriate uart type for the debugged SoC.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug
This removes the need for mach/-headers in the debug macro.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug | 19 +--
arch/arm/mach-s3c24xx/include/mach/debug-macro.S | 9 ++---
2 files changed, 19 insertions(+), 9
Move debug-macro.S from mach/include to include/debug where all other common
debug macros are.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug | 1 +
.../{mach-s3c24xx/include/mach/debug-macro.S = include/debug/s3c24xx.S}
Hi Abhilash,
If you are okay with this patchset you can rebase/merge it with your
mcpm patches.
Best Wishes,
Leela Krishna.
On Thu, Apr 24, 2014 at 3:24 PM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:
Hi Abhilash and Leela,
FYI I think you are working on similar patches.
On
On Thu, Apr 24, 2014 at 12:24:31PM +0200, Heiko Stübner wrote:
+choice
+ prompt S3C24XX low-level debugging port type
+ depends on DEBUG_LL ARCH_S3C24XX
+
+ config DEBUG_S3C24XX_UART_S3C2440
+ bool S3C2440 uart type
+ help
+ Select this if
On 04/24/2014 03:36 PM, Tomasz Figa wrote:
On 24.04.2014 11:07, Tushar Behera wrote:
On 04/23/2014 03:43 PM, Kukjin Kim wrote:
Tushar Behera wrote:
On 22 April 2014 13:08, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Tushar
On Tue, Apr 22, 2014 at 11:09 AM, Tushar Behera
Am Donnerstag, 24. April 2014, 11:34:55 schrieb Russell King - ARM Linux:
On Thu, Apr 24, 2014 at 12:24:31PM +0200, Heiko Stübner wrote:
+choice
+ prompt S3C24XX low-level debugging port type
+ depends on DEBUG_LL ARCH_S3C24XX
+
+ config DEBUG_S3C24XX_UART_S3C2440
+
+Tomasz
On Wed, Apr 2, 2014 at 1:32 PM, Pankaj Dubey pankaj.du...@samsung.com wrote:
This patch adds pmu regnode to exynos4210 dtsi to handle
PMU register access via DT.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
arch/arm/boot/dts/exynos4210.dtsi |5 +
1 file
Hi Vikas,
On 04/24/2014 08:59 PM, Vikas Sajjan wrote:
+Tomasz
On Wed, Apr 2, 2014 at 1:32 PM, Pankaj Dubey pankaj.du...@samsung.com wrote:
This patch adds pmu regnode to exynos4210 dtsi to handle
PMU register access via DT.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
Many changes/fixes have been identified for clock file for exynos5420.
These include correct parents, bit fields, new clocks etc. Existing
files needs some correction in terms of names of the clock and
indentation. These issues are addressed in this patch series. It also
replaces the usage of
This patch modifies the defined parent clock names as per the
exynos5420 datasheet.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c | 359 ++
1 file changed,
This patch corrects some child-parent clock relationships,
and updates the clocks according to the latest datasheet.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c | 44
This patch includes,
1] renaming of the HSI2C clocks
2] renaming of spi clocks according to the datasheet
3] fixes for child-parent relationships
4] adding of more clocks related to PERIC block
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha
This patch fixes some parent-child relationships according
to the latest datasheet and adds more clocks related to
PERIS and GEN blocks.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c | 70
This patch adds missing clocks from WCORE block.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c | 28
1 file changed, 28 insertions(+)
diff --git
This patch adds more clocks from FSYS and FSYS2 blocks
and uses GATE_IP_* registers for gating IPs.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c | 37 +++---
1 file changed, 25 insertions(+), 12 deletions(-)
diff
This patch corrects the wrong parent-child relationship
between sysmmu-mfc clocks.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c |9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git
This patch fixes the wrong register offset for sclk_bpll clock.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c |4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c
This patch renames some of the clocks according to the
datasheet. It also adds and updates some core and misc
clocks.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c | 29
This patch fixes the g3d parent clock.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c |7 +++
include/dt-bindings/clock/exynos5420.h |2 +-
2 files changed, 4 insertions(+), 5
This patch adds clock ID for mout_sclk_vpll clock
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c |2 +-
include/dt-bindings/clock/exynos5420.h |1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git
This patch adds more register offsets to the restore list.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos5420.c
This series tries to simplify the s3c24xx debug macro, removing dependencies
on mach/ includes, static mappings and finally moving it into include/debug.
The one slightly invasive change is the need for the developer to select
the uart type by himself, which gets rid of the debug macro trying to
addruart from the generic debug macro is doing exactly the same using
the common lowlevel uart definition, so there is no cause for this
special casing for s3c24xx.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/boot/compressed/head.S | 5 -
1 file changed, 5 deletions(-)
diff
Using the lowlevel debug uart is a corner case - even more so in a
multiplatform environment. So it seems reasonable to simply let the
developer set the appropriate uart type for the debugged SoC.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug
From: Doug Anderson diand...@chromium.org
Since many drivers rely on FETs that live behind this arbitrator, they
can't successfully probe until after the arbitrator comes up. They
ought to handle things properly with EPROBE_DEFER and still work, but
that has some downsides:
1. Those drivers
Hi Chanho,
On 14.04.2014 14:48, Chanho Park wrote:
This patch adds a PMU(Power Management Unit) syscon node. This
should be required for USB Phy syscon regmap I/F.
Cc: Tomasz Figa t.f...@samsung.com
Cc: Kamil Debski k.deb...@samsung.com
Signed-off-by: Chanho Park chanho61.p...@samsung.com
---
Hi Chanho,
On 14.04.2014 14:48, Chanho Park wrote:
This patch enables a exynos_usbphy node for exynos4 SoCs.
A exynos4x12 usb phy node is almost same with 4210's one
except compatible string and pmu syscon.
Cc: Tomasz Figa t.f...@samsung.com
Cc: Kamil Debski k.deb...@samsung.com
Signed-off-by:
On Wed, Apr 23, 2014 at 3:02 PM, Ajay kumar ajayn...@gmail.com wrote:
Sorry for the previous reply,
Here goes the full explaination:
Rob,
On Tue, Apr 22, 2014 at 5:04 PM, Rob Clark robdcl...@gmail.com wrote:
So what about, rather than adding drm_panel support to each bridge
individually,
Hi Tarek,
On 14.04.2014 13:59, Tarek Dakhran wrote:
On 04/14/2014 03:03 PM, Arnd Bergmann wrote:
On Monday 14 April 2014 11:17:38 Tarek Dakhran wrote:
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -159,6 +159,15 @@ static struct map_desc exynos5250_iodesc[]
Hi Chanho,
On 14.04.2014 14:48, Chanho Park wrote:
This patch adds a hsotg node for exynos4 USB2.0 device controller.
Cc: Tomasz Figa t.f...@samsung.com
Cc: Kamil Debski k.deb...@samsung.com
Cc: Marek Szyprowski m.szyprow...@samsung.com
Signed-off-by: Chanho Park chanho61.p...@samsung.com
---
On Thu, Apr 24, 2014 at 08:18:36PM +0530, Naveen Krishna Chatradhi wrote:
This patch moves initialization code to subsys_initcall() to ensure
that the i2c bus is available early so the regulators can be quickly
probed and available for other devices on their probe() call.
Such solution has
Rob,
On Thu, Apr 24, 2014 at 9:41 PM, Rob Clark robdcl...@gmail.com wrote:
On Wed, Apr 23, 2014 at 3:02 PM, Ajay kumar ajayn...@gmail.com wrote:
Sorry for the previous reply,
Here goes the full explaination:
Rob,
On Tue, Apr 22, 2014 at 5:04 PM, Rob Clark robdcl...@gmail.com wrote:
So
Hi Arun,
On 14.04.2014 08:35, Arun Kumar K wrote:
The newer versions of exynos5250 based Snow boards have
atmel trackpad. Updating relevant nodes for the same.
Signed-off-by: Arun Kumar K arun...@samsung.com
---
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 24
On 14.04.2014 11:01, Daniel Lezcano wrote:
Hi Kukjin,
I believe I addressed all the comments. Is it possible to take this
patchset for next ?
+1.
Also when applying you might add
Reviewed-by: Tomasz Figa t.f...@samsung.com
to any patches that don't have it yet.
Best regards,
Tomasz
--
To
Hi Chanho,
On 14.04.2014 15:03, Chanho Park wrote:
This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series
boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only
two pmu interrupts. Thus, we can define two interrupts in the
exynos4.dtsi and extends the
Hi Tomasz,
On 15.04.2014 16:25, Tomasz Stanislawski wrote:
The i2c_ak8975 controler uses label i2c8.
This alias is already used for I2C controller 8 defined
in file arch/arm/boot/dts/exynos4.dtsi.
This patch renames a label for i2c_ak8975 to i2c9.
Signed-off-by: Tomasz Stanislawski
On Thu, Apr 24, 2014 at 12:55 PM, Ajay kumar ajayn...@gmail.com wrote:
Rob,
On Thu, Apr 24, 2014 at 9:41 PM, Rob Clark robdcl...@gmail.com wrote:
On Wed, Apr 23, 2014 at 3:02 PM, Ajay kumar ajayn...@gmail.com wrote:
Sorry for the previous reply,
Here goes the full explaination:
Rob,
On
On Thu, Apr 24, 2014 at 10:55 PM, Rob Clark robdcl...@gmail.com wrote:
On Thu, Apr 24, 2014 at 12:55 PM, Ajay kumar ajayn...@gmail.com wrote:
Rob,
On Thu, Apr 24, 2014 at 9:41 PM, Rob Clark robdcl...@gmail.com wrote:
On Wed, Apr 23, 2014 at 3:02 PM, Ajay kumar ajayn...@gmail.com wrote:
Sorry
Hi Daniel,
Please see my comments inline.
Btw. Please fix your e-mail composer to properly wrap your messages
around 7xth column, as otherwise they're hard to read.
On 04.04.2014 11:48, Daniel Lezcano wrote:
The following driver is for exynos4210. I did not yet finished the other
boards,
On Fri, Mar 28, 2014 at 05:52:51PM +0100, Lucas Stach wrote:
While working on MSI support for the i.MX6 PCIe host driver
it has been discovered that the binding for this host controller
is broken in many ways (refer to the patch descriptions for more
info) and was introduced without proper
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