On 05/28/2014 06:50 AM, Inki Dae wrote:
> On 2014년 05월 28일 05:21, Thierry Reding wrote:
>> On Tue, May 27, 2014 at 11:24:49PM +0900, Inki Dae wrote:
>>> 2014-05-27 16:53 GMT+09:00 Thierry Reding :
On Tue, May 27, 2014 at 08:28:52AM +0200, Andrzej Hajda wrote:
> Hi Thierry,
>
> On 0
Thanks Inki,
I removed fimd_clear_win from fimd_probe and verified this change in chrome
setup. Not seeing any noticeable difference.
I have posted another patch at:
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg31629.html
Thanks everybody for your review effort.
Regards,
Rah
System hangs when FIMD registers are accessed to disable
hardware overlays. This is because of the clocks which are
not enabled before register access.
'Hardware overlay disable' is cleaned from the FIMD probe.
Signed-off-by: Rahul Sharma
---
Based on exynos-drm-next branch.
drivers/gpu/drm/ex
Removed the parser for "supports-highspeed".
It can be parsed with "cap-mmc-highsped" or "cap-sd-highspeed" at
mmc_of_parse().
Signed-off-by: Jaehoon Chung
---
drivers/mmc/host/dw_mmc.c |3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
dw-mmc controller can support the multiple slot.
So each slot's property can be difference.
And "support-highspeed" property in dw-mmc is deprecated.
"support-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
---
Changelog V3:
- Merge "[PATCH 2/5]
dw-mmc controller has the multiple slot.
Then it needs to parse the property for each slot.
Signed-off-by: Jaehoon Chung
---
Changelog V3:
- Fix typo.
- Maintained the dw_mci_of_quirks().
Changelog V2:
- None
drivers/mmc/host/dw_mmc.c | 15 ++-
1 file chang
From: Ludovic Desroches
Some hosts manage several slots. In these case information such as the
bus width, chip detect and others are into the slot node. So we have to
parse child node. If not NULL, slot node will be used instead of the
device node.
Signed-off-by: Ludovic Desroches
Signed-off-by
This patch-set is fixed the dw-mmc controller problem.
dw-mmc controller have the slot, but mmc_of_parse didn't parse the slot
sub-node.
So dw-mmc controller didn't work correctly.
Jaehoon Chung (3):
mmc: dw_mmc: use the __mmc_of_parse to parse the slot node
mmc: dw_mmc: remove the "supports-
On 2014년 05월 28일 05:21, Thierry Reding wrote:
> On Tue, May 27, 2014 at 11:24:49PM +0900, Inki Dae wrote:
>> 2014-05-27 16:53 GMT+09:00 Thierry Reding :
>>> On Tue, May 27, 2014 at 08:28:52AM +0200, Andrzej Hajda wrote:
Hi Thierry,
On 05/26/2014 03:41 PM, Thierry Reding wrote:
>
Mike Turquette wrote:
>
> Quoting Tarek Dakhran (2014-05-25 20:23:32)
> > The EXYNOS5410 clocks are statically listed and registered
> > using the Samsung specific common clock helper functions.
> >
> > Signed-off-by: Tarek Dakhran
> > Signed-off-by: Vyacheslav Tyrtov
> > ---
> > .../devicetree
Chander Kashyap wrote:
>
> On 26 May 2014 15:59, Tomasz Figa wrote:
> > Hi Chander,
> >
> > On 16.05.2014 10:03, Chander Kashyap wrote:
> >> Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7
> cores.
> >>
> >> This patchset adds cpuidle support for Exynos5420 SoC based on
> >> ge
On 26 May 2014 15:59, Tomasz Figa wrote:
> Hi Chander,
>
> On 16.05.2014 10:03, Chander Kashyap wrote:
>> Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
>>
>> This patchset adds cpuidle support for Exynos5420 SoC based on
>> generic big.little cpuidle driver.
>>
>> Teste
On 28 May 2014 09:23, Sachin Kamat wrote:
> Hi Kukjin,
>
> On 27 May 2014 21:09, Kukjin Kim wrote:
>> On 05/26/14 12:29, Sachin Kamat wrote:
>>>
>>> On 23 May 2014 11:38, Sachin Kamat wrote:
Enabled RTC node on Origen 4210 and 4412 boards.
Signed-off-by: Sachin Kamat
---
Almost all Exynos-series of SoCs that run in secure mode don't need
additional offset for every CPU, with Exynos4412 being the only
exception.
Tested on Origen-Quad (Exynos4412) and Arndale-Octa (Exynos5420).
While at it, fix the coding style (space around *).
Signed-off-by: Sachin Kamat
Signed
From: Tushar Behera
Arndale-Octa board is always configured to work with trustzone
firmware binary. Added DTS node entry to enable this support.
Signed-off-by: Tushar Behera
Signed-off-by: Sachin Kamat
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts |5 +
1 file changed, 5 insertion
Hi Kukjin,
On 27 May 2014 21:09, Kukjin Kim wrote:
> On 05/26/14 12:29, Sachin Kamat wrote:
>>
>> On 23 May 2014 11:38, Sachin Kamat wrote:
>>>
>>> Enabled RTC node on Origen 4210 and 4412 boards.
>>>
>>> Signed-off-by: Sachin Kamat
>>> ---
>>> arch/arm/boot/dts/exynos4210-origen.dts |4 ++
Hi Mike,
On Wed, May 28, 2014 at 4:41 AM, Mike Turquette wrote:
> Quoting Tarek Dakhran (2014-05-25 20:23:32)
>> The EXYNOS5410 clocks are statically listed and registered
>> using the Samsung specific common clock helper functions.
>>
>> Signed-off-by: Tarek Dakhran
>> Signed-off-by: Vyacheslav
Quoting Tarek Dakhran (2014-05-25 20:23:32)
> The EXYNOS5410 clocks are statically listed and registered
> using the Samsung specific common clock helper functions.
>
> Signed-off-by: Tarek Dakhran
> Signed-off-by: Vyacheslav Tyrtov
> ---
> .../devicetree/bindings/clock/exynos5410-clock.txt |
Hi,
I sorted out the branch as per Olof's suggestion and sending v2
pull-request for that (4th pull-request). Also sent multi_v7_defconfig
update patch to a...@kernel.org.
Please pull this for 3.16.
If any problems, please kindly let me know.
Thanks,
Kukjin
The following changes since commi
The following changes since commit f7b163d16d412e14be49f47240ffaba328aaab6c:
cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
(2014-05-27 23:52:50 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
tags/exyn
On 27.05.2014 22:17, Tarek Dakhran wrote:
> Hi,
>
> On Tue, May 27, 2014 at 9:44 PM, Kevin Hilman wrote:
>> Kevin Hilman writes:
>>
>>> Tarek Dakhran writes:
>>>
The series of patches represent support of Exynos 5410 SoC
The Exynos 5410 is the first Samsung SoC based on big.LITTL
On Mon, May 12, 2014 at 06:40:44PM +0900, Jungseok Lee wrote:
> This patch adds memory layout and translation lookup information
> about 48-bit address space with 4K pages. The description is based
> on 4 levels of translation tables.
>
> Cc: Catalin Marinas
> Cc: Steve Capper
> Signed-off-by: Ju
On Tue, May 27, 2014 at 11:24:49PM +0900, Inki Dae wrote:
> 2014-05-27 16:53 GMT+09:00 Thierry Reding :
> > On Tue, May 27, 2014 at 08:28:52AM +0200, Andrzej Hajda wrote:
> >> Hi Thierry,
> >>
> >> On 05/26/2014 03:41 PM, Thierry Reding wrote:
> >> > On Wed, May 21, 2014 at 01:43:05PM +0900, YoungJ
Hi,
On Tue, May 27, 2014 at 9:44 PM, Kevin Hilman wrote:
> Kevin Hilman writes:
>
>> Tarek Dakhran writes:
>>
>>> The series of patches represent support of Exynos 5410 SoC
>>>
>>> The Exynos 5410 is the first Samsung SoC based on big.LITTLE architecture
>>>
>>> Patches add new platform descrip
Kevin Hilman writes:
> Tarek Dakhran writes:
>
>> The series of patches represent support of Exynos 5410 SoC
>>
>> The Exynos 5410 is the first Samsung SoC based on big.LITTLE architecture
>>
>> Patches add new platform description, support of clock controller and device
>> tree for Exynos 5410.
Tarek Dakhran writes:
> The series of patches represent support of Exynos 5410 SoC
>
> The Exynos 5410 is the first Samsung SoC based on big.LITTLE architecture
>
> Patches add new platform description, support of clock controller and device
> tree for Exynos 5410.
>
> Has been build on Samsung L
On 27.05.2014 18:49, Kevin Hilman wrote:
> Tomasz Figa writes:
>
>> Hi Tobias,
>>
>> First of all, big thanks for investigating this issue. Hopefully we can
>> have it fixed in upstream soon.
>>
>> I've added Tomasz Stanislawski to CC list, as he's been doing some work
>> to enable HDMI support o
Tomasz Figa writes:
> Hi Tobias,
>
> First of all, big thanks for investigating this issue. Hopefully we can
> have it fixed in upstream soon.
>
> I've added Tomasz Stanislawski to CC list, as he's been doing some work
> to enable HDMI support on Exynos4 using Exynos DRM.
>
> On 24.05.2014 22:45,
On 05/26/14 12:29, Sachin Kamat wrote:
On 23 May 2014 11:38, Sachin Kamat wrote:
Enabled RTC node on Origen 4210 and 4412 boards.
Signed-off-by: Sachin Kamat
---
arch/arm/boot/dts/exynos4210-origen.dts |4
arch/arm/boot/dts/exynos4412-origen.dts |4
2 files changed, 8 ins
On 05/23/14 15:13, Leela Krishna Amudala wrote:
Hi Kgene,
Hi,
On Fri, May 23, 2014 at 12:31 AM, Daniel Lezcano
wrote:
On 05/22/2014 09:57 AM, Leela Krishna Amudala wrote:
This patch is originally based on commit b3377d186572 ("ARM: 7064/1:
vexpress: Use wfi macro in platform_do_lowpower
On 05/27/14 20:39, Kukjin Kim wrote:
Arnd Bergmann wrote:
On Monday 05 May 2014, Abhilash Kesavan wrote:
+static const struct mcpm_platform_ops exynos_power_ops = {
+ .power_up = exynos_power_up,
+ .power_down = exynos_power_down,
+ .power_down_finis
From: Sachin Kamat
Enable Exynos platform and its related IPs for multi_v7_defconfig.
Signed-off-by: Sachin Kamat
Acked-by: Arnd Bergmann
Signed-off-by: Kukjin Kim
---
arch/arm/configs/multi_v7_defconfig | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/configs/multi
2014-05-27 16:53 GMT+09:00 Thierry Reding :
> On Tue, May 27, 2014 at 08:28:52AM +0200, Andrzej Hajda wrote:
>> Hi Thierry,
>>
>> On 05/26/2014 03:41 PM, Thierry Reding wrote:
>> > On Wed, May 21, 2014 at 01:43:05PM +0900, YoungJun Cho wrote:
>> >> This patch adds DT bindings for s6e3fa0 panel.
>>
On Mon, May 12, 2014 at 06:56:00PM +0900, Jungseok Lee wrote:
> This patch adds 4 levels of translation tables implementation for both
> HYP and stage2.
>
> Both symmetric and asymmetric configurations for page size and translation
> levels are are validated on Fast Models:
>
> 1) 4KB + 3 level
On Tue, May 27, 2014 at 03:53:49PM +0200, Christoffer Dall wrote:
> On Mon, May 12, 2014 at 06:40:54PM +0900, Jungseok Lee wrote:
> > This patch sets TCR_EL2.PS, VTCR_EL2.T0SZ and vttbr_baddr_mask in runtime,
> > not compile time.
> >
> > In ARMv8, EL2 physical address size (TCR_EL2.PS) and stage2
Hi Bjorn,
On Mon, May 12, 2014 at 5:59 AM, Lucas Stach wrote:
> Hi Bjorn,
>
> just a friendly reminder. It would be nice if you could pull those in.
>
> Shawn already pulled the DT change and as it is a binding change this
> means PCIe on i.MX6 is broken in -next, as long as the remaining patches
On Mon, May 12, 2014 at 06:40:54PM +0900, Jungseok Lee wrote:
> This patch sets TCR_EL2.PS, VTCR_EL2.T0SZ and vttbr_baddr_mask in runtime,
> not compile time.
>
> In ARMv8, EL2 physical address size (TCR_EL2.PS) and stage2 input address
> size (VTCR_EL2.T0SZE) cannot be determined in compile time
On 2014년 05월 26일 14:39, Naveen Krishna Ch wrote:
> Hello Everyone,
>
> On 21 May 2014 21:16, Thierry Reding wrote:
>> On Wed, May 14, 2014 at 05:09:45PM +0530, Naveen Krishna Chatradhi wrote:
>>> exynos_drm_init() does probing of various drivers like dp_panel,
>>> hdmi, fimd, mixer, etc in an ord
On 2014년 05월 27일 18:55, Rahul Sharma wrote:
>
>
> On 26 May 2014 14:21, Rahul Sharma wrote:
>> Hi Daniel,
>>
>> On 26 May 2014 13:11, Daniel Kurtz wrote:
>>> On Mon, May 26, 2014 at 2:59 PM, Rahul Sharma
>>> wrote:
Hi Inki,
Please review this patch.
>> [snip]
> +
>
This patch makes sure that mipi dsi driver makes it re-probe
in case that panel driver isn't probed yet.
For this, it checks if panel driver is probed or not before
component_add() is called.
Signed-off-by: Inki Dae
Acked-by: Kyungmin Park
---
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 38 +++
This patch makes sure that exynos drm framework handles deferred
probe case correctly.
Sub drivers could be probed before resources, clock, regulator,
phy or panel, are ready for them so we should make sure that exynos
drm core waits until all resources are ready and sub drivers are
probed correct
This patch series includes the following two patches.
One makes sure that exynos drm framework handles deferred probe
case of sub drivers, and other makes sure that mipi dsi driver
considers deferred probe incurred by panel driver.
Inki Dae (2):
drm/exynos: consider deferred probe feature
drm
Arnd Bergmann wrote:
>
> On Monday 05 May 2014, Abhilash Kesavan wrote:
> > +static const struct mcpm_platform_ops exynos_power_ops = {
> > + .power_up = exynos_power_up,
> > + .power_down = exynos_power_down,
> > + .power_down_finish = exynos_power
Exynos4 has saveral PPMUs and each of them has operation clock which
can be gated through CMU's SFR control.
New clocks are listed below. All clocks are added as a gate-typed clock.
CLK_PPMULEFT, CLK_PPMURIGHT, CLK_PPMUCAMIF, CLK_PPMUTV, CLK_PPMUMFC_L,
CLK_PPMUMFC_R, CLK_G3D, CLK_PPMUIMAGE, CLK_P
Hi,
Any comments on this series?
On Sat, May 10, 2014 at 12:26 PM, Pankaj Dubey wrote:
> This patch series, does some minor cleanup of exynos machine files.
> It also modifies Exynos Power Management Unit (PMU) related code for
> converting it into a platform_driver. This is also preparation fo
On Monday 05 May 2014, Abhilash Kesavan wrote:
> +static const struct mcpm_platform_ops exynos_power_ops = {
> + .power_up = exynos_power_up,
> + .power_down = exynos_power_down,
> + .power_down_finish = exynos_power_down_finish,
> +};
I'm getting
Hi Jonghwa,
On 27.05.2014 10:35, Jonghwa Lee wrote:
> Exynos4 has saveral PPMUs and each of them has operation clock which
> can be gated through CMU's SFR control.
>
> New clocks are listed below. All clocks are added as a gate-typed clock.
>
> CLK_PPMULEFT, CLK_PPMURIGHT, CLK_PPMUG3D, CLK_PPMU
On 27 May 2014 11:49, Seungwon Jeon wrote:
> Can this be merged with your another patch, " [PATCH 2/5] mmc: dw_mmc: remove
> the "supports-highspeed" property."?
Normally devicetree people don't like us to remove DT bindings.
In principle you need to support them forever once added. Still you
s
On 05/27/2014 06:49 PM, Seungwon Jeon wrote:
> Can this be merged with your another patch, " [PATCH 2/5] mmc: dw_mmc: remove
> the "supports-highspeed" property."?
Sure..
>
> On Mon, May 26, 2014, Jaehoon Chung wrote:
>> dw-mmc controller can be support the multiple slot.
> can support, it woul
Hi, Seungwon
On 05/27/2014 06:49 PM, Seungwon Jeon wrote:
> Hi Jaehoon,
>
> On Mon, May 26, 2014, Jaehoon Chung wrote:
>> dw-mmc controller have the multiple slot.
> Have -> has?
Fix it.
>
>> Then it needs to parse the property for each slot.
>>
>> Signed-off-by: Jaehoon Chung
>> ---
>> Change
On 26 May 2014 14:21, Rahul Sharma wrote:
> Hi Daniel,
>
> On 26 May 2014 13:11, Daniel Kurtz wrote:
>> On Mon, May 26, 2014 at 2:59 PM, Rahul Sharma
>> wrote:
>>>
>>> Hi Inki,
>>>
>>> Please review this patch.
> [snip]
>>> > +
>>> > + ret = clk_prepare_enable(ctx->lcd_clk);
>>
>> Hi Ra
Can this be merged with your another patch, " [PATCH 2/5] mmc: dw_mmc: remove
the "supports-highspeed" property."?
On Mon, May 26, 2014, Jaehoon Chung wrote:
> dw-mmc controller can be support the multiple slot.
can support, it would be better to correct the above message.
Thanks,
Seungwon Jeon
Hi Jaehoon,
On Mon, May 26, 2014, Jaehoon Chung wrote:
> dw-mmc controller have the multiple slot.
Have -> has?
> Then it needs to parse the property for each slot.
>
> Signed-off-by: Jaehoon Chung
> ---
> Changelog V2:
> - None
>
> drivers/mmc/host/dw_mmc.c | 25 ++---
On Mon, May 26, 2014, Jaehoon Chung wrote:
> From: Ludovic Desroches
>
> Some hosts manage several slots. In these case information such as the
> bus width, chip detect and others are into the slot node. So we have to
> parse child node. If not NULL, slot node will be used instead of the
> device
On Tue, May 27, 2014 at 1:26 PM, Krzysztof Kozlowski
wrote:
> On wto, 2014-05-27 at 12:00 +0530, Yadwinder Singh Brar wrote:
>> On Mon, May 26, 2014 at 6:50 PM, Krzysztof Kozlowski
>> wrote:
>> > Add S2MPA01 support to the s2mps11 regulator driver. This obsoletes the
>> > s2mpa01 regulator driver
Exynos4 has saveral PPMUs and each of them has operation clock which
can be gated through CMU's SFR control.
New clocks are listed below. All clocks are added as a gate-typed clock.
CLK_PPMULEFT, CLK_PPMURIGHT, CLK_PPMUG3D, CLK_PPMUCAMIF, CLK_PPMUTV,
CLK_PPMUMFC_L, CLK_PPMUMFC_R, CLK_PPMUIMAGE, C
On wto, 2014-05-27 at 12:00 +0530, Yadwinder Singh Brar wrote:
> On Mon, May 26, 2014 at 6:50 PM, Krzysztof Kozlowski
> wrote:
> > Add S2MPA01 support to the s2mps11 regulator driver. This obsoletes the
> > s2mpa01 regulator driver.
> >
> > Signed-off-by: Krzysztof Kozlowski
>
> > @@ -216,30 +25
On Tue, May 27, 2014 at 08:28:52AM +0200, Andrzej Hajda wrote:
> Hi Thierry,
>
> On 05/26/2014 03:41 PM, Thierry Reding wrote:
> > On Wed, May 21, 2014 at 01:43:05PM +0900, YoungJun Cho wrote:
> >> This patch adds DT bindings for s6e3fa0 panel.
> >> The bindings describes panel resources, display
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