Hi Tomasz,
> Hi,
>
> On 10.05.2014 08:56, Pankaj Dubey wrote:
> > From: Young-Gun Jang
> >
> > Add support for mapping Samsung Power Management Unit (PMU) base
> > address from device tree. This patch also adds helper function as
> > "get_exynos_pmuregmap". This function can be used by other mac
Hi All,
Please review this patch.
Regards,
Rahul Sharma
On 9 June 2014 16:58, Rahul Sharma wrote:
> Display domain is removed due to instability issues. Explaining
> the problem below:
>
> exynos_init_late triggers the pm_genpd_poweroff_unused which
> powers off the unused power domains. This c
Hi Tomasz,
>
> Hi Pankaj,
>
> On 10.05.2014 09:20, Pankaj Dubey wrote:
> > Let's handle i2c interrupt re-configuration in i2c driver. This will
> > help us in removing some soc specific checks from machine files.
> > Since only Exynos5250, and Exynos5420 need to do this, added syscon
> > based p
Tushar,
On Mon, Jun 16, 2014 at 8:36 PM, Tushar Behera wrote:
> On Mon, Jun 16, 2014 at 10:19 PM, Doug Anderson wrote:
>> Tushar,
>>
>> On Mon, Jun 16, 2014 at 4:19 AM, Tushar Behera wrote:
>>> On 06/13/2014 10:33 PM, Doug Anderson wrote:
Tushar,
On Tue, Jun 10, 2014 at 10:32 PM,
Hi Tomasz,
> -Original Message-
>
> Hi Pankaj,
>
> On 10.05.2014 09:20, Pankaj Dubey wrote:
> > This patch removed "plat/cpu.h" inclusion from hotplug.c as it is not
> > required.
> >
> > Signed-off-by: Pankaj Dubey
> > ---
> > arch/arm/mach-exynos/hotplug.c |2 --
> > 1 file chan
Hi Tomasz,
> -Original Message-
>
> Hi Pankaj,
>
> On 10.05.2014 08:56, Pankaj Dubey wrote:
> > As exynos_cpuidle_init and exynos_cpufreq_init function have just one
> > lines of code for registering platform devices. We can move these
> > lines to exynos_dt_machine_init and delete exyno
On Mon, Jun 16, 2014 at 10:32 PM, Doug Anderson wrote:
> Mark,
>
> On Mon, Jun 16, 2014 at 9:51 AM, Mark Brown wrote:
>> On Mon, Jun 16, 2014 at 09:49:26AM -0700, Doug Anderson wrote:
>>
>>> Yes please. I think there's supposed to be some official ordering of
>>> things. If anyone reading this
Abhilash Kesavan wrote:
>
> We have an soc check to ensure that the scu and certain A9 specific
> registers are not accessed on Exynos5250 (which is A15 based).
> Rather than adding another soc specific check for 5420 let us test
> for the Cortex A9 primary part number.
>
> This resolves the belo
From: Simon Glass
Some commands take a while to execute. Use -EAGAIN to signal this to the
caller.
Signed-off-by: Simon Glass
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec_spi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_sp
From: Bill Richardson
This is some internal structure reorganization / renaming to prepare
for future patches that will add a userspace API to cros_ec. There
should be no visible changes.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec.c | 28 +++
From: Bill Richardson
When communicating with the EC, the cmd_xfer() function should return the
number of bytes it received from the EC, or negative on error.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/i2c/busses/i2c-cros-ec-tunnel.c | 2 +-
drivers/mfd/cros_ec_i2
From: Bill Richardson
Remove the three wrapper functions that talk to the EC without passing all
the desired arguments and just use the underlying communication function
that passes everything in a struct intead.
This is internal code refactoring only. Nothing should change.
Signed-off-by: Bill
From: Bill Richardson
Just because the host was able to talk to the EC doesn't mean that the EC
was happy with what it was told. Errors in communincation are not the same
as error messages from the EC itself.
This change lets the EC report its errors separately.
Signed-off-by: Bill Richardson
From: Bill Richardson
The lower-level driver may want to provide its own buffers. If so,
there's no need to allocate new ones. This already happens to work
just fine (since we check for size of 0 and use devm allocation), but
it's good to document it.
[dianders: Resolved conflicts; documented t
From: Bill Richardson
Preparing the way for the LPC device, which is just a plaform_device without
interrupts.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a
From: Bill Richardson
struct cros_ec_device has a superfluous "name" field. We can get all the
debugging info we need from the existing ec_name and phys_name fields, so
let's take out the extra field.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec.c
This is a batch of cleanup patches picked from the ChromeOS 3.8 kernel
tree and applied to ToT. Most of these patches were authored by Bill
Richardson (CCed). Where appropriate I've squashed patches together,
though I have erred on the side of keeping patches logically distinct
rather than squash
From: Bill Richardson
The members of struct cros_ec_device were improperly commented, and
intermixed the private and public sections. This is just cleanup to make it
more obvious what goes with what.
[dianders: left lock in the structure but gave it the name that will
eventually be used.]
Signe
From: Bill Richardson
This comment was incorrect, so update it.
Signed-off-by: Bill Richardson
Signed-off-by: Simon Glass
Signed-off-by: Doug Anderson
---
include/linux/mfd/cros_ec.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/linux/mfd/cros_ec.h b/include/l
From: Prathyush K
Set the device as wakeup capable and register the wakeup source.
Note: Though it makes more sense to have the SPI framework do this,
(either via device tree or by board_info)
this change is as per an existing mail chain:
https://lkml.org/lkml/2009/8/27/291
Signed-off-by: Prath
On Mon, Jun 16, 2014 at 08:02:34PM +0200, Javier Martinez Canillas wrote:
> +- max77802,pmic-buck-dvs-gpios: The DVS GPIOs. We'll try to set these GPIOs
> + to match pmic-buck-default-dvs-idx at probe time if they are defined. If
> + some or all of these GPIOs are not defined it's assumed that t
On Mon, Jun 16, 2014 at 08:02:35PM +0200, Javier Martinez Canillas wrote:
> --- a/drivers/mfd/max77802.c
> +++ b/drivers/mfd/max77802.c
> @@ -37,6 +37,7 @@
> #include
>
> static const struct mfd_cell max77802_devs[] = {
> + { .name = "max77802-pmic", },
> };
>
> static bool max77802_p
On 04/30/2014 11:44 AM, Doug Anderson wrote:
> This adds the EC i2c tunnel (and devices under it) to the
> tegra124-venice2 device tree.
I've applied this to Tegra's for-3.17/dt branch.
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majo
> -Original Message-
> From: Will Deacon [mailto:will.dea...@arm.com]
> Sent: Monday, June 16, 2014 12:04 PM
> To: Yoder Stuart-B08248
> Cc: Sethi Varun-B16395; Thierry Reding; Mark Rutland;
> devicet...@vger.kernel.org; linux-samsung-soc@vger.kernel.org; Pawel
> Moll; Arnd Bergmann; Ian
On Mon, 16 Jun 2014, Doug Anderson wrote:
> Nicolas,
>
> On Mon, Jun 9, 2014 at 1:55 PM, Nicolas Pitre
> wrote:
> > On Mon, 9 Jun 2014, Kevin Hilman wrote:
> >
> >> On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre
> >> wrote:
> >> > On Mon, 9 Jun 2014, Andrew Bresticker wrote:
> >> >
> >> >> > [
Nicolas,
On Mon, Jun 9, 2014 at 1:55 PM, Nicolas Pitre wrote:
> On Mon, 9 Jun 2014, Kevin Hilman wrote:
>
>> On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre
>> wrote:
>> > On Mon, 9 Jun 2014, Andrew Bresticker wrote:
>> >
>> >> > [1] While waiting for the forth-coming patch from Andrew to enable
Kukjin,
On Wed, Jun 11, 2014 at 8:28 AM, Kukjin Kim wrote:
> On 06/12/14 00:19, Doug Anderson wrote:
>>
>> Chander,
>>
>> On Tue, Jun 10, 2014 at 9:52 PM, Chander Kashyap
>> wrote:
>>>
>>> Hi Doug,
>>>
>>> On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre
>>> wrote:
On Tue, 10 Jun 2014, Do
The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with
Low Jitter Mode. This patch adds support for these two clocks.
Signed-off-by: Javier Martinez Canillas
---
Changes since v1:
- Use module_platform_driver() instead of having init/exit functions.
Suggested by Mark Brown.
- Use t
The MAX77802 PMIC has 10 high-efficiency Buck and 32 Low-dropout
(LDO) regulators. This patch adds support for all these regulators
found on the MAX77802 PMIC and is based on a driver added by Simon
Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
---
Changes since
Maxim MAX77802 is a power management chip that contains 10 high
efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
to power up application processors and peripherals, a 2-channel
32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface
to program the individual regulators, clo
Maxim Integrated Power Management ICs are very similar with
regard to their clock outputs. Most of the clock drivers for
these chips are duplicating code and are simpler enough that
can be converted to use a generic driver to consolidate code
and avoid duplication.
Signed-off-by: Javier Martinez C
This patch adds a dt-binding include for Maxim 77686
PMIC clock IDs that can be to be shared between the
clk-max77686 clock driver and DeviceTree source files.
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/clk-max77686.c | 7 +--
include/dt-bindings/clock/maxim,max
Like most clock drivers, the Maxim 77686 PMIC clock binding
follows the convention that the "#clock-cells" property is
used to specify the number of cells in a clock provider.
But the binding document is not clear enough that it shall
be set to 1 since the PMIC support multiple clocks outputs.
Al
Clocks drivers for Maxim PMIC are very similar so they can
be converted to use the generic Maxim clock driver.
Also, while being there use module_platform_driver() helper
macro to eliminate more boilerplate code.
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/Kconfig| 1 +
dr
Peach pit board uses a Maxim 77802 power management IC to
drive regulators and its Real Time Clock. This patch adds
support for this chip.
These are the device nodes and pinctrl configuration that
is present on the Peach pit DeviceTree source file in the
the Chrome OS kernel 3.8 tree.
Signed-off-
The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
This patch adds support for the RTC and is based on a driver
added by Simon Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/max77802.c | 1 +
drivers/rtc/Kconfig| 10 +
dr
MAX77802 is a PMIC that contains 10 high efficiency Buck regulators,
32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs,
a Real-Time-Clock (RTC) and a I2C interface to program the individual
regulators, clocks and the RTC.
This second version of the patch-set addresses several issue
By using the generic IRQ support in the Register map API, it
is possible to get rid of max77686-irq.c and simplify the code.
Suggested-by: Krzysztof Kozlowski
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/Kconfig | 1 +
drivers/mfd/Makefile | 2 +-
On Monday 16 June 2014 18:04:16 Will Deacon wrote:
>
> On Mon, Jun 16, 2014 at 05:56:32PM +0100, Stuart Yoder wrote:
> > > Do you have use-cases where you really need to change these mappings
> > > dynamically?
> >
> > Yes. In the case of a PCI bus-- you may not know in advance how many
> > PCI
Hi Stuart,
On Mon, Jun 16, 2014 at 05:56:32PM +0100, Stuart Yoder wrote:
> > Do you have use-cases where you really need to change these mappings
> > dynamically?
>
> Yes. In the case of a PCI bus-- you may not know in advance how many
> PCI devices there are until you probe the bus. We have a
Mark,
On Mon, Jun 16, 2014 at 9:51 AM, Mark Brown wrote:
> On Mon, Jun 16, 2014 at 09:49:26AM -0700, Doug Anderson wrote:
>
>> Yes please. I think there's supposed to be some official ordering of
>> things. If anyone reading this has a pointer to the official sort
>> order of things in the devi
> -Original Message-
> From: Will Deacon [mailto:will.dea...@arm.com]
> Sent: Monday, June 16, 2014 10:28 AM
> To: Sethi Varun-B16395
> Cc: Thierry Reding; Mark Rutland; devicet...@vger.kernel.org; linux-
> samsung-...@vger.kernel.org; Pawel Moll; Arnd Bergmann; Ian Campbell;
> Grant Grun
On Mon, Jun 16, 2014 at 09:49:26AM -0700, Doug Anderson wrote:
> Yes please. I think there's supposed to be some official ordering of
> things. If anyone reading this has a pointer to the official sort
> order of things in the device tree I'd love to see it! ;)
Most exact first I believe?
si
Tushar,
On Mon, Jun 16, 2014 at 4:19 AM, Tushar Behera wrote:
> On 06/13/2014 10:33 PM, Doug Anderson wrote:
>> Tushar,
>>
>> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera wrote:
>>> Peach-pi board has MAX98090 audio codec connected on HSI2C-7 bus.
>>
>> If you want to be a stickler about it,
Daniel,
On Mon, Jun 16, 2014 at 1:52 AM, Daniel Lezcano
wrote:
> Hi Dough,
>
> thanks for the explanation. I still don't get why it is important to keep
> others users of mct traceable because it is quite slow ? May be it is what
> you explained here, but I miss the connection between 'the other
Hi Varun,
On Thu, Jun 05, 2014 at 08:10:19PM +0100, Varun Sethi wrote:
> > The set of StreamIDs that can be generated by a master is fixed in the
> > hardware. The SMMU can then be programmed to map these incoming IDs onto
> > a context ID (or a set of context IDs), which are the IDs used internal
> cros_ec_spi makes the assumption that a 0-length message will put the
> spi chip select back to normal (non cs_toggle mode). This used to be
> the case back on kernel-3.8 on the spi-s3c64xx driver but doesn't
> appear to be true anymore. It seems like it was a pretty questionable
> assumption t
On Wed, Jun 04, 2014 at 10:12:38PM +0100, Thierry Reding wrote:
> On Fri, May 30, 2014 at 12:27:28PM +0100, Dave Martin wrote:
> > On Fri, May 30, 2014 at 08:30:08AM +0100, Thierry Reding wrote:
> [...]
> > > Arnd, can you take another look at this binding and see if there's
> > > anything else mis
Hi Tushar, Sylwester,
On 16.06.2014 14:03, Tushar Behera wrote:
> On Mon, Jun 16, 2014 at 5:20 PM, Sylwester Nawrocki
> wrote:
>> On 16/06/14 13:43, Tushar Behera wrote:
>>> On 06/09/2014 04:36 PM, Sylwester Nawrocki wrote:
> On 09/06/14 12:44, Tushar Behera wrote:
>>> IMHO, the clock ent
On Mon, Jun 16, 2014 at 5:20 PM, Sylwester Nawrocki
wrote:
> On 16/06/14 13:43, Tushar Behera wrote:
>> On 06/09/2014 04:36 PM, Sylwester Nawrocki wrote:
>>> > On 09/06/14 12:44, Tushar Behera wrote:
>> IMHO, the clock entries belong here as the audss clock provider
>> essentially remain
On 16/06/14 13:43, Tushar Behera wrote:
> On 06/09/2014 04:36 PM, Sylwester Nawrocki wrote:
>> > On 09/06/14 12:44, Tushar Behera wrote:
>>> >> IMHO, the clock entries belong here as the audss clock provider
>>> >> essentially remains same for all Exynos4 based systems.
>>> >>
>>> >> As for pin-con
On 06/09/2014 04:36 PM, Sylwester Nawrocki wrote:
> On 09/06/14 12:44, Tushar Behera wrote:
>> IMHO, the clock entries belong here as the audss clock provider
>> essentially remains same for all Exynos4 based systems.
>>
>> As for pin-control entry, I believe we can move them to respective SoC
>> d
On 06/11/2014 09:28 PM, Javier Martinez Canillas wrote:
> On Wed, Jun 11, 2014 at 7:32 AM, Tushar Behera wrote:
>> Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
>> As per the user manual, it should be CLK_MAU_EPLL.
>>
>> The problem surfaced when the bootloader in Peach-pit b
On 06/13/2014 10:33 PM, Doug Anderson wrote:
> Tushar,
>
> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera wrote:
>> Peach-pi board has MAX98090 audio codec connected on HSI2C-7 bus.
>
> If you want to be a stickler about it, peach-pi actually has a
> max98091. That requires code changes to the
Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
This patchset adds cpuidle support for Exynos5420 SoC based on
generic big.little cpuidle driver.
Tested on SMDK5420.
Rebased on 3.16-rc1
Changelog is in respective patches.
Chander Kashyap (5):
driver: cpuidle-big-littl
From: Chander Kashyap
This driver will be used by many big.Little Soc's. As of now it does
string matching of hardcoded compatible string to init the driver. This
comparison list will keep on growing with addition of new SoC's.
Hence add of_device_id structure to collect the compatible strings of
From: Chander Kashyap
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multi-cluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap
Signed-off-by: Chander Kashyap
Reviewed-by: Tomasz Figa
From: Chander Kashyap
Add support to select generic big-little cpuidle driver for Samsung Exynos
series SoC's. This is required for Exynos big-llittle SoC's eg, Exynos5420.
Signed-off-by: Chander Kashyap
Signed-off-by: Chander Kashyap
Reviewed-by: Tomasz Figa
Acked-by: Daniel Lezcano
---
Cha
From: Chander Kashyap
Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed-off-by: Chander Kashyap
Signed-off-by: Chander Kashyap
Reviewed-by: Tomasz Figa
Acked-by: Daniel Lezcano
---
Chan
From: Chander Kashyap
Add "samsung,exynos5420" compatible string to initialize generic
big-little cpuidle driver for Exynos5420.
Signed-off-by: Chander Kashyap
Signed-off-by: Chander Kashyap
Reviewed-by: Tomasz Figa
Acked-by: Daniel Lezcano
---
Changes in v5: None
Changes in v4: None
Changes
From: Chander Kashyap
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap
Signed-off-by: Chander Kashyap
Reviewed-by: Tomasz Figa
---
Changes in v6: None
Changes in v5:
Hello Lee,
On 06/16/2014 10:44 AM, Lee Jones wrote:
>> The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with
>> Low Jitter Mode. This patch adds support for these two clocks.
>>
>> Signed-off-by: Javier Martinez Canillas
>> ---
>> .../devicetree/bindings/clock/maxim,max77802.txt |
On 06/16/2014 06:40 AM, Doug Anderson wrote:
Daniel,
On Sun, Jun 15, 2014 at 2:18 PM, Daniel Lezcano
wrote:
On 06/04/2014 07:30 PM, Doug Anderson wrote:
In (93bfb76 clocksource: exynos_mct: register sched_clock callback) we
supported using the MCT as a scheduler clock. We properly marked
ex
> The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with
> Low Jitter Mode. This patch adds support for these two clocks.
>
> Signed-off-by: Javier Martinez Canillas
> ---
> .../devicetree/bindings/clock/maxim,max77802.txt | 40
> drivers/clk/Kconfig
Hi Doug,
On 13 June 2014 20:40, Doug Anderson wrote:
> Chander,
>
> On Fri, Jun 13, 2014 at 4:54 AM, Chander Kashyap
> wrote:
>> This patch is effectively changing the mcpm_entry_point address from
>> nsbase + 0x1c to nsbase + 0x8
>>
>> Hence while integrating with mainline u-boot we need to ta
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