RE: [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes
Tomasz Figa wrote:
Hi Kukjin,
Hi,
On 30.06.2014 23:32, Kukjin Kim wrote:
This patch removes supporting s5pc100 related pwm codes.
Signed-off-by: Kukjin Kim kgene@samsung.com
Cc: Thierry Reding thierry.red...@gmail.com
---
Documentation/devicetree/bindings/pwm/pwm-samsung.txt |2 --
drivers/clocksource/samsung_pwm_timer.c | 12
drivers/pwm/pwm-samsung.c |8
3 files changed, 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
index 43925d3..82c7f6b 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
@@ -11,8 +11,6 @@ Required properties:
- compatible : should be one of following:
samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
- Exynos4210 rev0 SoCs
As you can see here, this variant is used for more than S5PC100. It is
needed for S5PV210 and Exynos4210 rev0 SoCs as well. So this patch
should be dropped.
Oh, I just now checked its datasheets and s5pv210 and early exynos4210 are
using BIT(5) for tclk_mask. You're right. But I couldn't its usage in mainline
when I created the patch. Anyway it can be used for s5pv210 so how about
following?
pwm: samsung: change s5pc100-pwm to s5pv210-pwm for support s5pv210 SoC
Reported-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
Cc: Thierry Reding thierry.red...@gmail.com
---
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
index 43925d3..ce005c0 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
@@ -11,8 +11,8 @@ Required properties:
- compatible : should be one of following:
samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
- Exynos4210 rev0 SoCs
+samsung,s5pv210-pwm - for 32-bit timers present on S5PV210 and
+ Exynos4210 rev0 SoCs
samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
Exynos4x12, Exynos5250 and Exynos5420 SoCs
- reg: base address and size of register area
diff --git a/drivers/clocksource/samsung_pwm_timer.c
b/drivers/clocksource/samsung_pwm_timer.c
index e35a9b7..f0a5918 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -480,16 +480,16 @@ static void __init s3c64xx_pwm_clocksource_init(struct
device_node *np)
}
CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, samsung,s3c6400-pwm,
s3c64xx_pwm_clocksource_init);
-static const struct samsung_pwm_variant s5p_variant = {
+static const struct samsung_pwm_variant s5pv210_variant = {
.bits = 32,
.div_base = 0,
.has_tint_cstat = true,
.tclk_mask = (1 5),
};
-static void __init s5p_pwm_clocksource_init(struct device_node *np)
+static void __init s5pv210_pwm_clocksource_init(struct device_node *np)
{
- samsung_pwm_alloc(np, s5p_variant);
+ samsung_pwm_alloc(np, s5pv210_variant);
}
-CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, samsung,s5pc100-pwm,
s5p_pwm_clocksource_init);
+CLOCKSOURCE_OF_DECLARE(s5pv210_pwm, samsung,s5pv210-pwm,
s5pv210_pwm_clocksource_init);
#endif
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
index 68f3471..a2bafc9 100644
--- a/drivers/pwm/pwm-samsung.c
+++ b/drivers/pwm/pwm-samsung.c
@@ -404,24 +404,24 @@ static const struct samsung_pwm_variant s3c64xx_variant =
{
.tclk_mask = BIT(7) | BIT(6) | BIT(5),
};
-static const struct samsung_pwm_variant exynos4210_variant = {
+static const struct samsung_pwm_variant s5pv210_variant = {
.bits = 32,
.div_base = 0,
.has_tint_cstat = true,
- .tclk_mask = 0,
+ .tclk_mask = BIT(5),
};
-static const struct samsung_pwm_variant s5pc100_variant = {
+static const struct samsung_pwm_variant exynos4210_variant = {
.bits = 32,
.div_base = 0,
.has_tint_cstat = true,
- .tclk_mask = BIT(5),
+ .tclk_mask = 0,
};
static const struct of_device_id samsung_pwm_matches[] = {
{ .compatible = samsung,s3c2410-pwm, .data = s3c24xx_variant },
{ .compatible = samsung,s3c6400-pwm, .data = s3c64xx_variant },
- { .compatible = samsung,s5pc100-pwm, .data = s5pc100_variant },
+ { .compatible = samsung,s5pv210-pwm, .data = s5pv210_variant },
{ .compatible =
RE: [PATCH] ARM: dts: Add I2S dt node for Exynos3250
Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This patch add I2S (Inter-IC Sound) dt node which supports 1-port stereo
(1 channels) IIS-bus for audio interface with DMA-based operation.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Inha Song ideal.s...@samsung.com
Tested-by: Inha Song ideal.s...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 1f8384f..e9017ef 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -644,6 +644,19 @@
status = disabled;
};
+ i2s: i2s@1397 {
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x1397 0x100;
+ interrupts = 0 126 0;
+ clocks = cmu CLK_I2S, cmu CLK_SCLK_I2S;
+ clock-names = iis, i2s_opclk0;
+ dmas = pdma0 14, pdma0 13;
+ dma-names = tx, rx;
+ pinctrl-0 = i2s2_bus;
+ pinctrl-name = default;
To put 'pinctrl-name' and then 'pinctrl-0' is better? :-)
+ status = disabled;
+ };
+
pwm: pwm@139D {
compatible = samsung,exynos4210-pwm;
reg = 0x139D 0x1000;
--
1.8.0
Will apply.
Thanks,
Kukjin
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Re: [PATCH] ARM: dts: Add I2S dt node for Exynos3250
On 07/04/2014 04:43 PM, Kukjin Kim wrote:
Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This patch add I2S (Inter-IC Sound) dt node which supports 1-port stereo
(1 channels) IIS-bus for audio interface with DMA-based operation.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Inha Song ideal.s...@samsung.com
Tested-by: Inha Song ideal.s...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 1f8384f..e9017ef 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -644,6 +644,19 @@
status = disabled;
};
+i2s: i2s@1397 {
+compatible = samsung,s3c6410-i2s;
+reg = 0x1397 0x100;
+interrupts = 0 126 0;
+clocks = cmu CLK_I2S, cmu CLK_SCLK_I2S;
+clock-names = iis, i2s_opclk0;
+dmas = pdma0 14, pdma0 13;
+dma-names = tx, rx;
+pinctrl-0 = i2s2_bus;
+pinctrl-name = default;
To put 'pinctrl-name' and then 'pinctrl-0' is better? :-)
The i2s dt node can drop pinctrl-0/pinctrl-name properties.
I will re-send this patchset (v2) after fixing it.
Best Regards,
Chanwoo Choi
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Re: [PATCH] ARM: dts: Add I2S dt node for Exynos3250
Hi Chanwoo,
On 03.07.2014 09:52, Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This patch add I2S (Inter-IC Sound) dt node which supports 1-port stereo
(1 channels) IIS-bus for audio interface with DMA-based operation.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Inha Song ideal.s...@samsung.com
Tested-by: Inha Song ideal.s...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 1f8384f..e9017ef 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -644,6 +644,19 @@
status = disabled;
};
+ i2s: i2s@1397 {
Shouldn't the label be rather called i2s2 as the pinctrl entry below
suggests?
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x1397 0x100;
+ interrupts = 0 126 0;
+ clocks = cmu CLK_I2S, cmu CLK_SCLK_I2S;
+ clock-names = iis, i2s_opclk0;
+ dmas = pdma0 14, pdma0 13;
+ dma-names = tx, rx;
+ pinctrl-0 = i2s2_bus;
+ pinctrl-name = default;
pinctrl-name is not a valid property. I suppose it should be
pinctrl-names.
Best regards,
Tomasz
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Re: [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes
On 04.07.2014 09:32, Kukjin Kim wrote: Tomasz Figa wrote: Hi Kukjin, Hi, On 30.06.2014 23:32, Kukjin Kim wrote: This patch removes supporting s5pc100 related pwm codes. Signed-off-by: Kukjin Kim kgene@samsung.com Cc: Thierry Reding thierry.red...@gmail.com --- Documentation/devicetree/bindings/pwm/pwm-samsung.txt |2 -- drivers/clocksource/samsung_pwm_timer.c | 12 drivers/pwm/pwm-samsung.c |8 3 files changed, 22 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt index 43925d3..82c7f6b 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt @@ -11,8 +11,6 @@ Required properties: - compatible : should be one of following: samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs -samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210, - Exynos4210 rev0 SoCs As you can see here, this variant is used for more than S5PC100. It is needed for S5PV210 and Exynos4210 rev0 SoCs as well. So this patch should be dropped. Oh, I just now checked its datasheets and s5pv210 and early exynos4210 are using BIT(5) for tclk_mask. You're right. But I couldn't its usage in mainline when I created the patch. Anyway it can be used for s5pv210 so how about following? Hmm, sorry for the confusion, but actually this seems to be a mistake in the binding documentation. On Exynos4210 rev0, samsung,s5p6440-pwm is supposed to be used and samsung,s5pc100 supports both S5PC100 and S5PV210. However I'm not sure why you want to change existing DT bindings. The rule is to name the compatible string after first existing SoC for which it can be used, so removing support for this SoC doesn't imply removing this compatible string because it can be used for future SoCs as well, if they turn out to be compatible. My suggestion is to keep this as it was. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes
Hi Kukjin,
On 30.06.2014 23:32, Kukjin Kim wrote:
This patch removes supporting s5p64x0 related pwm codes because of
no more support for S5P6440 and S5P6450 SoCs. And this patch changes
the name of s5p6440-pwm to exynos-pwm instead.
Signed-off-by: Kukjin Kim kgene@samsung.com
Cc: Thierry Reding thierry.red...@gmail.com
---
Documentation/devicetree/bindings/pwm/pwm-samsung.txt |1 -
arch/arm/boot/dts/exynos4210-universal_c210.dts |2 +-
drivers/clocksource/samsung_pwm_timer.c | 13 -
drivers/pwm/pwm-samsung.c |5 ++---
4 files changed, 3 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
index 5538de9..43925d3 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
@@ -11,7 +11,6 @@ Required properties:
- compatible : should be one of following:
samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
-samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
Exynos4210 rev0 SoCs
samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d50eb3a..0ca26e0 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -461,7 +461,7 @@
};
pwm@139D {
- compatible = samsung,s5p6440-pwm;
+ compatible = samsung,exynos4210-pwm;
There is a reason to use a different compatible string for Exynos4210
rev0. The PWM block is used as a timer there, while on newer revs MCT is
used. Sorry, but I have to NAK this patch.
As I explained in my reply to patch 11/17, I'd suggest keeping the PWM
drivers as is, because there is no need to remove support for DT
compatible strings.
Best regards,
Tomasz
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Re: [PATCH 1/1] ARM: EXYNOS: Remove unused code in common.h
On Mon, Jun 23, 2014 at 5:30 PM, Sachin Kamat sachin.ka...@samsung.com wrote:
PINCTRL_EXYNOS is always selected by Exynos platform in its
machine Kconfig. Thus the code in the else part is never used.
Remove it.
Signed-off-by: Sachin Kamat sachin.ka...@samsung.com
---
arch/arm/mach-exynos/common.h |4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 1ee91763fa7c..3371669dabc6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -125,11 +125,7 @@ void exynos_init_late(void);
void exynos_firmware_init(void);
-#ifdef CONFIG_PINCTRL_EXYNOS
extern u32 exynos_get_eint_wake_mask(void);
-#else
-static inline u32 exynos_get_eint_wake_mask(void) { return 0x; }
-#endif
#ifdef CONFIG_PM_SLEEP
extern void __init exynos_pm_init(void);
--
1.7.9.5
Ping..
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RE: [PATCH] ARM: EXYNOS: Fix the check for non-smp configuration
Abhilash Kesavan wrote: Commit 1754c42e3db5(ARM: exynos: move sysram info to exynos.c) missed out the CONFIG_ prefix causing exynos_sysram_init() to get called twice for SMP configurations. Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com --- arch/arm/mach-exynos/exynos.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index f38cf7c..95cad25 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -297,7 +297,7 @@ static void __init exynos_dt_machine_init(void) * This is called from smp_prepare_cpus if we've built for SMP, but * we still need to set it up for PM and firmware ops if not. */ - if (!IS_ENABLED(SMP)) + if (!IS_ENABLED(CONFIG_SMP)) exynos_sysram_init(); exynos_cpuidle_init(); -- 1.7.9.5 Oh, OK. will apply into fixes. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] ARM: EXYNOS: Remove unused code in common.h
Hi Sachin,
On 04.07.2014 10:29, Sachin Kamat wrote:
On Mon, Jun 23, 2014 at 5:30 PM, Sachin Kamat sachin.ka...@samsung.com
wrote:
PINCTRL_EXYNOS is always selected by Exynos platform in its
machine Kconfig. Thus the code in the else part is never used.
Remove it.
Signed-off-by: Sachin Kamat sachin.ka...@samsung.com
---
arch/arm/mach-exynos/common.h |4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 1ee91763fa7c..3371669dabc6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -125,11 +125,7 @@ void exynos_init_late(void);
void exynos_firmware_init(void);
-#ifdef CONFIG_PINCTRL_EXYNOS
extern u32 exynos_get_eint_wake_mask(void);
-#else
-static inline u32 exynos_get_eint_wake_mask(void) { return 0x; }
-#endif
#ifdef CONFIG_PM_SLEEP
extern void __init exynos_pm_init(void);
--
1.7.9.5
Ping..
For this change alone:
Reviewed-by: Tomasz Figa t.f...@samsung.com
However I can see much more unused code in that header, more
specifically prototypes of mct_init() (replaced with DT-based init) and
most of other *init*() functions (which are now all in one file). Do you
plan to remove them as well?
Best regards,
Tomasz
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RE: [PATCH RESEND] ARM: EXYNOS: Do not calculate boot address twice
Krzysztof Kozlowski wrote: Commit b3205dea8fbf (ARM: EXYNOS: Map SYSRAM through generic DT bindings) introduced local variable boot_reg where boot address from cpu_boot_reg() call is stored. Re-use it instead calling cpu_boot_reg() again. Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com --- arch/arm/mach-exynos/platsmp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 1c8d31e39520..55ed2e6729c5 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -155,7 +155,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) ret = PTR_ERR(boot_reg); goto fail; } - __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + __raw_writel(boot_addr, boot_reg); } call_firmware_op(cpu_boot, phys_cpu); @@ -242,7 +242,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) if (IS_ERR(boot_reg)) break; - __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + __raw_writel(boot_addr, boot_reg); } } } -- 1.9.1 Oh, good catch. will apply :-) Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 00/17] ARM: S5P64X0, S5PC100: no more support in mainline
Sachin Kamat wrote: Hi Kukjin, Hi, On Thu, Jul 3, 2014 at 4:16 AM, Kukjin Kim kgene@samsung.com wrote: On 07/03/14 03:02, Tomasz Figa wrote: Hi Kukjin, Hi, On 30.06.2014 23:32, Kukjin Kim wrote: This series removes S5P64X0 and S5PC100 related codes in mainline, because no more user now. And if its supporting is required later, it will be done with using device tree. [PATCH 01/17] ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs [PATCH 02/17] gpio: samsung: remove s5p64x0 related gpio codes [PATCH 03/17] spi: s3c64xx: remove s5p64x0 related spi codes [PATCH 04/17] ASoC: samsung: no more support for S5P6440 and S5P6450 [PATCH 05/17] pwm: samsung: remove s5p64x0 related pwm codes [PATCH 06/17] video: fbdev: s3c-fb: remove s5p64x0 related fimd [PATCH 07/17] serial: samsung: no more support for S5P6440 and [PATCH 08/17] ARM: S5PC100: no more support S5PC100 SoC [PATCH 09/17] gpio: samsung: remov s5pc100 related gpio codes [PATCH 10/17] spi: s3c64xx: remove s5pc100 related spi codes [PATCH 11/17] pwm: samsung: remove s5pc100 related pwm codes [PATCH 12/17] serial: samsung: no more support for S5PC100 SoC [PATCH 13/17] ata: pata_samsung_cf: removes s5pc100 related ata [PATCH 14/17] mtd: onenand: remove s5pc100 related onenand codes [PATCH 15/17] video: fbdev: s3c-fb: remove s5pc100 related fimd and [PATCH 16/17] [media] exynos4-is: removes s5pc100 related fimc codes [PATCH 17/17] ASoC: Samsung: remove s5pc100 related codes Thanks for this series. Just letting you know that I have rebased my s5pv210 DT migration series on top of this and will be sending the patches after some more testing. Just note since I've missed one more change in the series, I amended it just now but it should be fine with your series I think. Please see v3.17-next/cleanup-s5p branch. Can you please push out the other patches that you applied last week? You mean whole patches in this series? OK, I will in this weekend. Note, as you know, missing patches in my tree are handled by other maintainer. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] ARM: EXYNOS: Remove unused code in common.h
Hi Tomasz,
On Fri, Jul 4, 2014 at 2:03 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin,
On 04.07.2014 10:29, Sachin Kamat wrote:
On Mon, Jun 23, 2014 at 5:30 PM, Sachin Kamat sachin.ka...@samsung.com
wrote:
PINCTRL_EXYNOS is always selected by Exynos platform in its
machine Kconfig. Thus the code in the else part is never used.
Remove it.
Signed-off-by: Sachin Kamat sachin.ka...@samsung.com
---
arch/arm/mach-exynos/common.h |4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 1ee91763fa7c..3371669dabc6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -125,11 +125,7 @@ void exynos_init_late(void);
void exynos_firmware_init(void);
-#ifdef CONFIG_PINCTRL_EXYNOS
extern u32 exynos_get_eint_wake_mask(void);
-#else
-static inline u32 exynos_get_eint_wake_mask(void) { return 0x; }
-#endif
#ifdef CONFIG_PM_SLEEP
extern void __init exynos_pm_init(void);
--
1.7.9.5
Ping..
For this change alone:
Reviewed-by: Tomasz Figa t.f...@samsung.com
Thanks.
However I can see much more unused code in that header, more
specifically prototypes of mct_init() (replaced with DT-based init) and
most of other *init*() functions (which are now all in one file). Do you
plan to remove them as well?
Sure. I will remove those too.
Regards,
Sachin.
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Re: [PATCH 1/1] ARM: EXYNOS: Remove unused code in common.h
Hi Tomasz,
On Fri, Jul 4, 2014 at 2:13 PM, Sachin Kamat sachin.ka...@samsung.com wrote:
Hi Tomasz,
On Fri, Jul 4, 2014 at 2:03 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Sachin,
On 04.07.2014 10:29, Sachin Kamat wrote:
On Mon, Jun 23, 2014 at 5:30 PM, Sachin Kamat sachin.ka...@samsung.com
wrote:
PINCTRL_EXYNOS is always selected by Exynos platform in its
machine Kconfig. Thus the code in the else part is never used.
Remove it.
Signed-off-by: Sachin Kamat sachin.ka...@samsung.com
---
arch/arm/mach-exynos/common.h |4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 1ee91763fa7c..3371669dabc6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -125,11 +125,7 @@ void exynos_init_late(void);
void exynos_firmware_init(void);
-#ifdef CONFIG_PINCTRL_EXYNOS
extern u32 exynos_get_eint_wake_mask(void);
-#else
-static inline u32 exynos_get_eint_wake_mask(void) { return 0x; }
-#endif
#ifdef CONFIG_PM_SLEEP
extern void __init exynos_pm_init(void);
--
1.7.9.5
Ping..
For this change alone:
Reviewed-by: Tomasz Figa t.f...@samsung.com
Thanks.
However I can see much more unused code in that header, more
specifically prototypes of mct_init() (replaced with DT-based init) and
most of other *init*() functions (which are now all in one file). Do you
plan to remove them as well?
Sure. I will remove those too.
Some of the things that you suggested are already taken care of in the
patch at [1].
So will keep my patch in the current format and later if something else is
needed will send separate patch to avoid merge conflicts. What say?
[1] https://lkml.org/lkml/2014/6/25/375
Regards,
Sachin.
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[PATCH 1/2] ASoC: samsung: Update sound-card name for Snow
Snow sound-card driver supports multiple boards with different
audio codecs. Updating the sound card name per board basis would provide
some more information to the end-user.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
Documentation/devicetree/bindings/sound/snow.txt |4
sound/soc/samsung/snow.c |3 +++
2 files changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/snow.txt
b/Documentation/devicetree/bindings/sound/snow.txt
index e0b7a82..6df74f1 100644
--- a/Documentation/devicetree/bindings/sound/snow.txt
+++ b/Documentation/devicetree/bindings/sound/snow.txt
@@ -8,11 +8,15 @@ Required properties:
- samsung,i2s-controller: The phandle of the Samsung I2S controller
- samsung,audio-codec: The phandle of the audio codec
+Optional:
+- samsung,model: The name of the sound-card
+
Example:
sound {
compatible = google,snow-audio-max98095;
+ samsung,model = Snow-I2S-MAX98095;
samsung,i2s-controller = i2s0;
samsung,audio-codec = max98095;
};
diff --git a/sound/soc/samsung/snow.c b/sound/soc/samsung/snow.c
index 8bbd348..0acf5d0 100644
--- a/sound/soc/samsung/snow.c
+++ b/sound/soc/samsung/snow.c
@@ -92,6 +92,9 @@ static int snow_probe(struct platform_device *pdev)
card-dev = pdev-dev;
+ /* Update card-name if provided through DT, else use default name */
+ snd_soc_of_parse_card_name(card, samsung,model);
+
ret = devm_snd_soc_register_card(pdev-dev, card);
if (ret) {
dev_err(pdev-dev, snd_soc_register_card failed (%d)\n, ret);
--
1.7.9.5
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[PATCH 2/2] ASoC: core: Fix possible NULL pointer dereference
snd_soc_of_parse_card_name() may be called before card-dev has been
set, which results in a kernel panic.
Unable to handle kernel NULL pointer dereference at virtual address 0210
PC is at snd_soc_of_parse_card_name+0x18/0x54
LR is at snow_probe+0x5c/0xd4
Add an error check in snd_soc_of_parse_card_name() to take care of this
case and print out a message in case of error.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
sound/soc/soc-core.c |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index c4db07f..2e4bdc0 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -4391,9 +4391,16 @@ EXPORT_SYMBOL_GPL(snd_soc_unregister_codec);
int snd_soc_of_parse_card_name(struct snd_soc_card *card,
const char *propname)
{
- struct device_node *np = card-dev-of_node;
+ struct device_node *np;
int ret;
+ if (!card-dev) {
+ pr_err(card-dev is not set before calling %s\n, __func__);
+ return -EINVAL;
+ }
+
+ np = card-dev-of_node;
+
ret = of_property_read_string_index(np, propname, 0, card-name);
/*
* EINVAL means the property does not exist. This is fine providing
--
1.7.9.5
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Re: [PATCH] ARM: EXYNOS: Fix the check for non-smp configuration
On Thu, Jul 3, 2014 at 10:33 AM, Abhilash Kesavan a.kesa...@samsung.com wrote: Commit 1754c42e3db5(ARM: exynos: move sysram info to exynos.c) missed out the CONFIG_ prefix causing exynos_sysram_init() to get called twice for SMP configurations. Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com --- arch/arm/mach-exynos/exynos.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index f38cf7c..95cad25 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -297,7 +297,7 @@ static void __init exynos_dt_machine_init(void) * This is called from smp_prepare_cpus if we've built for SMP, but * we still need to set it up for PM and firmware ops if not. */ - if (!IS_ENABLED(SMP)) + if (!IS_ENABLED(CONFIG_SMP)) exynos_sysram_init(); exynos_cpuidle_init(); If it's not too late Reviewed-by: Sachin Kamat sachin.ka...@samsug.com -- Regards, Sachin. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: ASoC: samsung: MACH_SMDK6450
On Thursday 03 July 2014 20:39:41 Olof Johansson wrote: On Thu, Jul 3, 2014 at 5:39 PM, Kukjin Kim kgene@samsung.com wrote: Mark Brown wrote: On Thu, Jul 03, 2014 at 07:37:07AM +0900, Kukjin Kim wrote: On 07/02/14 18:23, Mark Brown wrote: This also wasn't sent to me for review, please always send patches to maintainers. Mark, I always send patches to regarding maintainers and in this case the patch missed the change. I'm resending new patch and if any problems, please let me know. Just note, I just wanted to check whether there is no problem with other maintainers' tree early in -next tree. It looks like you've sent it to broo...@linaro.org not broo...@kernel.org which is listed in MAINTAINERS and what I use for e-mail - upstream mail that goes to my work address often just gets dropped on the floor (and generally ends up at the bottom of my queue to look at) since it ends up in a completely different place to my personal mail. Mark, oh, I see. But I checked your e-mail address from recent your sign-off in git commit so, just thought it should be fine. I will use kernel.org for your e-mail address next time Mark is the _only_ linux developer in the world who will give you crap for sending him patches to the very same email that he signs off all his work with. I really wish Linaro would just let him sign off with his long-standing kernel.org email address instead so the rest of us wouldn't have to keep track of this. FWIW David Miller has a similar policy: he only applies networking patches that are sent to the netdev mailing list. This seems like a good idea in general (to ensure they are getting exposed to the public). Mark, any chance we could convince to pick up patches from alsa-devel in the future even if they are sent to the wrong personal email account of yours? I would assume that would only require a small change in your filter rules, not a change in your workflow. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: Add I2S dt node for Exynos3250
Dear Kukjin and Tomasz,
On 07/04/2014 05:05 PM, Tomasz Figa wrote:
Hi Chanwoo,
On 03.07.2014 09:52, Chanwoo Choi wrote:
From: Tomasz Figa t.f...@samsung.com
This patch add I2S (Inter-IC Sound) dt node which supports 1-port stereo
(1 channels) IIS-bus for audio interface with DMA-based operation.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Inha Song ideal.s...@samsung.com
Tested-by: Inha Song ideal.s...@samsung.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 1f8384f..e9017ef 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -644,6 +644,19 @@
status = disabled;
};
+i2s: i2s@1397 {
Shouldn't the label be rather called i2s2 as the pinctrl entry below
suggests?
+compatible = samsung,s3c6410-i2s;
+reg = 0x1397 0x100;
+interrupts = 0 126 0;
+clocks = cmu CLK_I2S, cmu CLK_SCLK_I2S;
+clock-names = iis, i2s_opclk0;
+dmas = pdma0 14, pdma0 13;
+dma-names = tx, rx;
+pinctrl-0 = i2s2_bus;
+pinctrl-name = default;
pinctrl-name is not a valid property. I suppose it should be
pinctrl-names.
I modify this patch as following. If you confirm following patch, I'll re-send
patchset(v2).
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 3e678fa..77a06df 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -425,6 +425,19 @@
status = disabled;
};
+ i2s2: i2s@1397 {
+ compatible = samsung,s3c6410-i2s;
+ reg = 0x1397 0x100;
+ interrupts = 0 126 0;
+ clocks = cmu CLK_I2S, cmu CLK_SCLK_I2S;
+ clock-names = iis, i2s_opclk0;
+ dmas = pdma0 14, pdma0 13;
+ dma-names = tx, rx;
+ pinctrl-0 = i2s2_bus;
+ pinctrl-names = default;
+ status = disabled;
+ };
+
pwm: pwm@139D {
compatible = samsung,exynos4210-pwm;
reg = 0x139D 0x1000;
--
1.8.0
Best Regards,
Chanwoo Choi
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[PATCH] ARM: dts: Add sound-card name for Snow/Peach-Pit/Peach-Pi
Add sound-card name property to Snow/Peach-Pit/Peach-Pi boards.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
Patch to update driver is submitted here[1].
[1] ASoC: samsung: Update sound-card name for Snow
https://lkml.org/lkml/2014/7/4/125
arch/arm/boot/dts/exynos5250-snow.dts |1 +
arch/arm/boot/dts/exynos5420-peach-pit.dts |1 +
arch/arm/boot/dts/exynos5800-peach-pi.dts |1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index 7bd2df1..c682c88 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -262,6 +262,7 @@
sound {
compatible = google,snow-audio-max98095;
+ samsung,model = Snow-I2S-MAX98095;
samsung,i2s-controller = i2s0;
samsung,audio-codec = max98095;
};
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 7649982..6c7cab0 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -62,6 +62,7 @@
sound {
compatible = google,snow-audio-max98090;
+ samsung,model = Peach-Pit-I2S-MAX98090;
samsung,i2s-controller = i2s0;
samsung,audio-codec = max98090;
};
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 2c2c137..28f2a25 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -60,6 +60,7 @@
sound {
compatible = google,snow-audio-max98091;
+ samsung,model = Peach-Pi-I2S-MAX98091;
samsung,i2s-controller = i2s0;
samsung,audio-codec = max98091;
};
--
1.7.9.5
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Re: [PATCH 2/6] pinctrl: samsung: Handle GPIO request and free using pinctrl helpers
Hi Tomasz, On Wed, Jul 2, 2014 at 9:11 PM, Tomasz Figa t.f...@samsung.com wrote: This patch adds .request() and .free() operations to gpio_chip of pinctrl-samsung driver, which call pinctrl request and free helpers to request and free pinctrl pin along with GPIO pin. Signed-off-by: Tomasz Figa t.f...@samsung.com --- drivers/pinctrl/pinctrl-samsung.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index 779c8bc..6e099d6 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -779,7 +779,8 @@ static int samsung_pinctrl_register(struct platform_device *pdev, pin_bank = drvdata-ctrl-pin_banks[bank]; pin_bank-grange.name = pin_bank-name; pin_bank-grange.id = bank; - pin_bank-grange.pin_base = pin_bank-pin_base; + pin_bank-grange.pin_base = drvdata-ctrl-base + + pin_bank-pin_base; Is this a fix? -- Regards, Sachin. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v6 06/23] mfd: max77686: Make error checking consistent
Error checking across the driver is mostly consistent besides
a few exceptions, so change these exceptions for consistency.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index ada4976..87fe52e 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -134,7 +134,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
max77686 = devm_kzalloc(i2c-dev,
sizeof(struct max77686_dev), GFP_KERNEL);
- if (max77686 == NULL)
+ if (!max77686)
return -ENOMEM;
i2c_set_clientdata(i2c, max77686);
@@ -153,8 +153,8 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
return ret;
}
- if (regmap_read(max77686-regmap,
-MAX77686_REG_DEVICE_ID, data) 0) {
+ ret = regmap_read(max77686-regmap, MAX77686_REG_DEVICE_ID, data);
+ if (ret 0) {
dev_err(max77686-dev,
device not found on this channel (this is not an
error)\n);
return -ENODEV;
@@ -180,7 +180,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
IRQF_SHARED, 0, max77686_irq_chip,
max77686-irq_data);
- if (ret != 0) {
+ if (ret) {
dev_err(i2c-dev, failed to add PMIC irq chip: %d\n, ret);
goto err_unregister_i2c;
}
@@ -188,7 +188,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
IRQF_SHARED, 0, max77686_rtc_irq_chip,
max77686-rtc_irq_data);
- if (ret != 0) {
+ if (ret) {
dev_err(i2c-dev, failed to add RTC irq chip: %d\n, ret);
goto err_del_irqc;
}
--
2.0.0.rc2
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[PATCH v6 21/23] clk: max77802: Add DT binding documentation
Add Device Tree binding documentation for the clocks
outputs in the Maxim 77802 Power Management IC.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
Changes since v5:
- Fix typo error in DT binding. Suggested by Andreas Farber.
- Add clock-output-names as an optional property since now is supported.
Changes since v4: None
Changes since v3:
- Don't use the same clock driver name in clock-names since it's a consumer
concept and most probably will be different. Suggested by Doug Anderson.
Changes since v2:
- Split the DT binding documentation in a separate patch
---
.../devicetree/bindings/clock/maxim,max77802.txt | 44 ++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/maxim,max77802.txt
diff --git a/Documentation/devicetree/bindings/clock/maxim,max77802.txt
b/Documentation/devicetree/bindings/clock/maxim,max77802.txt
new file mode 100644
index 000..c6dc783
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/maxim,max77802.txt
@@ -0,0 +1,44 @@
+Binding for Maxim MAX77802 32k clock generator block
+
+This is a part of device tree bindings of MAX77802 multi-function device.
+More information can be found in bindings/mfd/max77802.txt file.
+
+The MAX77802 contains two 32.768khz clock outputs that can be controlled
+(gated/ungated) over I2C.
+
+Following properties should be present in main device node of the MFD chip.
+
+Required properties:
+- #clock-cells: From common clock binding; shall be set to 1.
+
+Optional properties:
+- clock-output-names: From common clock binding.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. Following indices are allowed:
+ - 0: 32khz_ap clock,
+ - 1: 32khz_cp clock.
+
+Clocks are defined as preprocessor macros in dt-bindings/clock/maxim,max77802.h
+header and can be used in device tree sources.
+
+Example: Node of the MFD chip
+
+ max77802: max77802@09 {
+ compatible = maxim,max77802;
+ interrupt-parent = wakeup_eint;
+ interrupts = 26 0;
+ reg = 0x09;
+ #clock-cells = 1;
+
+ /* ... */
+ };
+
+Example: Clock consumer node
+
+ foo@0 {
+ compatible = bar,foo;
+ /* ... */
+ clock-names = my-clock;
+ clocks = max77802 MAX77802_CLK_32K_AP;
+ };
--
2.0.0.rc2
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[PATCH v6 19/23] regulator: Add driver for Maxim 77802 PMIC regulators
The MAX77802 PMIC has 10 high-efficiency Buck and 32 Low-dropout
(LDO) regulators. This patch adds support for all these regulators
found on the MAX77802 PMIC and is based on a driver added by Simon
Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Changes since v5:
- Take out the mfd changes from v4 that were squashed by mistake.
Suggested by Lee Jones.
Changes since v4: None
Changes since v3:
- Set the supply_name for regulators to lookup their parent supply node.
Suggested by Mark Brown.
- Change Exyno5 for Exynos5420/Exynos5800 in regulator driver Kconfig.
Suggested by Doug Anderson.
---
drivers/regulator/Kconfig| 9 +
drivers/regulator/Makefile | 1 +
drivers/regulator/max77802.c | 609 +++
3 files changed, 619 insertions(+)
create mode 100644 drivers/regulator/max77802.c
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 789eb46..96d1c68 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -377,6 +377,15 @@ config REGULATOR_MAX77693
and one current regulator 'CHARGER'. This is suitable for
Exynos-4x12 chips.
+config REGULATOR_MAX77802
+ tristate Maxim 77802 regulator
+ depends on MFD_MAX77686
+ help
+ This driver controls a Maxim 77802 regulator
+ via I2C bus. The provided regulator is suitable for
+ Exynos5420/Exynos5800 SoCs to control various voltages.
+ It includes support for control of voltage and ramp speed.
+
config REGULATOR_MC13XXX_CORE
tristate
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index d461110..2aea4b6 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_REGULATOR_MAX8997) += max8997.o
obj-$(CONFIG_REGULATOR_MAX8998) += max8998.o
obj-$(CONFIG_REGULATOR_MAX77686) += max77686.o
obj-$(CONFIG_REGULATOR_MAX77693) += max77693.o
+obj-$(CONFIG_REGULATOR_MAX77802) += max77802.o
obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o
obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o
obj-$(CONFIG_REGULATOR_MC13XXX_CORE) += mc13xxx-regulator-core.o
diff --git a/drivers/regulator/max77802.c b/drivers/regulator/max77802.c
new file mode 100644
index 000..23b2488
--- /dev/null
+++ b/drivers/regulator/max77802.c
@@ -0,0 +1,609 @@
+/*
+ * max77802.c - Regulator driver for the Maxim 77802
+ *
+ * Copyright (C) 2013-2014 Google, Inc
+ * Simon Glass s...@chromium.org
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * Chiwoong Byun woong.b...@smasung.com
+ * Jonghwa Lee jonghwa3@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * This driver is based on max8997.c
+ */
+
+#include linux/kernel.h
+#include linux/bug.h
+#include linux/err.h
+#include linux/gpio.h
+#include linux/slab.h
+#include linux/gpio/consumer.h
+#include linux/platform_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/of_regulator.h
+#include linux/mfd/max77686.h
+#include linux/mfd/max77686-private.h
+
+/* Default ramp delay in case it is not manually set */
+#define MAX77802_RAMP_DELAY10 /* uV/us */
+
+#define MAX77802_OPMODE_SHIFT_LDO 6
+#define MAX77802_OPMODE_BUCK234_SHIFT 4
+#define MAX77802_OPMODE_MASK 0x3
+
+#define MAX77802_VSEL_MASK 0x3F
+#define MAX77802_DVS_VSEL_MASK 0xFF
+
+#define MAX77802_RAMP_RATE_MASK_2BIT 0xC0
+#define MAX77802_RAMP_RATE_SHIFT_2BIT 6
+#define MAX77802_RAMP_RATE_MASK_4BIT 0xF0
+#define MAX77802_RAMP_RATE_SHIFT_4BIT 4
+
+/* MAX77802 has two register formats: 2-bit and 4-bit */
+static const unsigned int ramp_table_77802_2bit[] = {
+ 12500,
+ 25000,
+ 5,
+ 10,
+};
+
+static unsigned int ramp_table_77802_4bit[] = {
+ 1000, 2000, 3030, 4000,
+ 5000, 5880, 7140, 8330,
+ 9090, 1, 0, 12500,
+ 16670, 25000, 5, 10,
+};
+
+struct max77802_regulator_prv {
+ int num_regulators;
+ struct regulator_dev *rdev[MAX77802_REG_MAX];
+ unsigned int opmode[MAX77802_REG_MAX];
+};
+
+static int max77802_get_opmode_shift(int id)
+{
+ if (id = MAX77802_LDO1 id = MAX77802_LDO35)
+ return MAX77802_OPMODE_SHIFT_LDO;
+ else if (id == MAX77802_BUCK1 || (id = MAX77802_BUCK5
+
[PATCH v6 18/23] mfd: max77802: Add DT binding documentation
Add Device Tree binding documentation for Maxim 77802 PMIC.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
Changes since v5:
- Use max77686,* properties instead of max77802,* since the support is
now in the max77686 driver and that IP defined the properties first.
- Fix issues in DT binding documentation. Suggested by Andreas Farber.
Changes since v4: None
Changes since v3: None
Changes since v2:
- Explain better the Dynamic Voltage Scaling (DVS) support in some Buck
regulators and the max77802,pmic-buck-{dvs,selb}-gpios properties.
Suggested by Mark Brown.
---
Documentation/devicetree/bindings/mfd/max77802.txt | 95 ++
1 file changed, 95 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/max77802.txt
diff --git a/Documentation/devicetree/bindings/mfd/max77802.txt
b/Documentation/devicetree/bindings/mfd/max77802.txt
new file mode 100644
index 000..5460e20
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/max77802.txt
@@ -0,0 +1,95 @@
+Maxim MAX77802 multi-function device
+
+MAX77802 is a Multifunction device with PMIC, RTC and Charger on chip. It is
+interfaced to host controller using i2c interface. PMIC, Charger and RTC
+submodules are addressed using same i2c slave address.
+
+Buck regulators 1, 2, 3, 4 and 6 include Dynamic Voltage Scaling (DVS) that
+allows each output voltage to change dynamically. Each Buck output voltage
+is selected using a set of external inputs: DVS1-3 and SELB1, 2, 3, 4 and 6.
+
+There are 8 DVS registers that can be used to configure the output voltage
+for each Buck regulator and which one is active is controled by DVSx lines.
+
+SELBx lines are used to control if individual Buck lines are ON or OFF.
+
+This document describes the binding for mfd device and PMIC submodule.
+
+Binding for the built-in 32k clock generator block is defined separately
+in bindings/clk/maxim,max77802.txt file.
+
+Required properties:
+- compatible : Must be maxim,max77802;
+- reg : Specifies the i2c slave address of PMIC block.
+- interrupts : This i2c device has an IRQ line connected to the main SoC.
+- interrupt-parent : The parent interrupt controller.
+
+Optional properties:
+- max77686,pmic-buck-default-dvs-idx: We'll always write this DVS index in the
+ PMIC for Bucks with DVS.
+ NOTE: at the moment these bindings don't include enough details for actual
+ GPIO-DVS--this just lets you choose which single slot to use.
+
+- max77686,pmic-buck-dvs-gpios: A GPIO array where each GPIO is connected to a
+ DVS line. We'll try to set these GPIOs to match pmic-buck-default-dvs-idx at
+ probe time if they are defined. If some or all of these GPIOs are not defined
+ it's assumed that the board has any missing GPIOs hardwired to match
+ pmic-buck-default-dvs-idx.
+
+- max77686,pmic-buck-selb-gpios: A GPIO array where each GPIO is connected to a
+ SELBx line. Should be five values: 1, 2, 3, 4, 6. It is strongly suggested to
+ include these GPIOs if there's any chance that changing DVS GPIOs one line at
+ a time might glitch your DVS values.
+
+Optional node:
+- regulators : The regulators of max77802 have to be instantiated
+ under subnode named regulators using the following format.
+
+ regulator-name {
+ standard regulator constraints
+ };
+ refer Documentation/devicetree/bindings/regulator/regulator.txt
+
+ The regulator node name should be initialized with a string
+to get matched with their hardware counterparts as follow. The valid names are:
+
+ -LDOn : for LDOs, where n can lie in range 1 to 35.
+ example: LDO1, LDO2, LDO35.
+ -BUCKn : for BUCKs, where n can lie in range 1 to 10.
+ example: BUCK1, BUCK5, BUCK10.
+Example:
+
+ max77802@09 {
+ compatible = maxim,max77802;
+ interrupt-parent = wakeup_eint;
+ interrupts = 26 0;
+ reg = 0x09;
+ #address-cells = 1;
+ #size-cells = 0;
+
+ max77686,pmic-buck-default-dvs-idx = 1;
+ max77686,pmic-buck-dvs-gpios = gpy7 6 0,
+ gpj4 2 0,
+ gpj4 3 0;
+ max77686,pmic-buck-selb-gpios = gph0 2 0,
+ gph0 3 0,
+ gph0 4 0,
+ gph0 5 0,
+ gph0 6 0;
+
+ regulators {
+ ldo11_reg: LDO11 {
+ regulator-name = vdd_ldo11;
+ regulator-min-microvolt = 190;
+ regulator-max-microvolt = 190;
+ regulator-always-on;
+ };
+
+ buck1_reg: BUCK1 {
+
[PATCH v6 20/23] clk: Add driver for Maxim 77802 PMIC clocks
The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with
Low Jitter Mode. This patch adds support for these two clocks.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes since v5: None
Changes since v4: None
Changes since v3: None
Changes since v2: None
Changes since v1:
- Use module_platform_driver() instead of having init/exit functions.
Suggested by Mark Brown.
- Use the generic maxim clock driver to reduce code duplication with
clk-max77686.c driver.
---
drivers/clk/Kconfig| 7 +++
drivers/clk/Makefile | 1 +
drivers/clk/clk-max77802.c | 98 ++
include/dt-bindings/clock/maxim,max77802.h | 22 +++
4 files changed, 128 insertions(+)
create mode 100644 drivers/clk/clk-max77802.c
create mode 100644 include/dt-bindings/clock/maxim,max77802.h
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 3fd4270..8808f2a 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -42,6 +42,13 @@ config COMMON_CLK_MAX77686
---help---
This driver supports Maxim 77686 crystal oscillator clock.
+config COMMON_CLK_MAX77802
+ tristate Clock driver for Maxim 77802 PMIC
+ depends on MFD_MAX77686
+ select COMMON_CLK_MAX_GEN
+ ---help---
+ This driver supports Maxim 77802 crystal oscillator clock.
+
config COMMON_CLK_SI5351
tristate Clock driver for SiLabs 5351A/B/C
depends on I2C
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 6c1aff6..520ff76 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
obj-$(CONFIG_COMMON_CLK_MAX_GEN) += clk-max-gen.o
obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
+obj-$(CONFIG_COMMON_CLK_MAX77802) += clk-max77802.o
obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
diff --git a/drivers/clk/clk-max77802.c b/drivers/clk/clk-max77802.c
new file mode 100644
index 000..8e480c5
--- /dev/null
+++ b/drivers/clk/clk-max77802.c
@@ -0,0 +1,98 @@
+/*
+ * clk-max77802.c - Clock driver for Maxim 77802
+ *
+ * Copyright (C) 2014 Google, Inc
+ *
+ * Copyright (C) 2012 Samsung Electornics
+ * Jonghwa Lee jonghwa3@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * This driver is based on clk-max77686.c
+ */
+
+#include linux/kernel.h
+#include linux/slab.h
+#include linux/err.h
+#include linux/platform_device.h
+#include linux/mfd/max77686-private.h
+#include linux/clk-provider.h
+#include linux/mutex.h
+#include linux/clkdev.h
+
+#include dt-bindings/clock/maxim,max77802.h
+#include clk-max-gen.h
+
+#define MAX77802_CLOCK_OPMODE_MASK 0x1
+#define MAX77802_CLOCK_LOW_JITTER_SHIFT 0x3
+
+static struct clk_init_data max77802_clks_init[MAX77802_CLKS_NUM] = {
+ [MAX77802_CLK_32K_AP] = {
+ .name = 32khz_ap,
+ .ops = max_gen_clk_ops,
+ .flags = CLK_IS_ROOT,
+ },
+ [MAX77802_CLK_32K_CP] = {
+ .name = 32khz_cp,
+ .ops = max_gen_clk_ops,
+ .flags = CLK_IS_ROOT,
+ },
+};
+
+static int max77802_clk_probe(struct platform_device *pdev)
+{
+ struct max77686_dev *iodev = dev_get_drvdata(pdev-dev.parent);
+ int ret;
+
+ ret = max_gen_clk_probe(pdev, iodev-regmap, MAX77802_REG_32KHZ,
+ max77802_clks_init, MAX77802_CLKS_NUM);
+
+ if (ret) {
+ dev_err(pdev-dev, generic probe failed %d\n, ret);
+ return ret;
+ }
+
+ /* Enable low-jitter mode on the 32khz clocks. */
+ ret = regmap_update_bits(iodev-regmap, MAX77802_REG_32KHZ,
+1 MAX77802_CLOCK_LOW_JITTER_SHIFT,
+1 MAX77802_CLOCK_LOW_JITTER_SHIFT);
+ if (ret 0)
+ dev_err(pdev-dev, failed to enable low-jitter mode\n);
+
+ return ret;
+}
+
+static int max77802_clk_remove(struct platform_device *pdev)
+{
+ return max_gen_clk_remove(pdev, MAX77802_CLKS_NUM);
+}
+
+static const struct platform_device_id max77802_clk_id[] = {
+ { max77802-clk, 0},
+ { },
+};
+MODULE_DEVICE_TABLE(platform, max77802_clk_id);
+
+static
[PATCH v6 17/23] mfd: max77686: Add Maxim 77802 PMIC support
Maxim MAX77802 is a power management chip that contains 10 high
efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
to power up application processors and peripherals, a 2-channel
32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface
to program the individual regulators, clocks outputs and the RTC.
This patch adds support for MAX77802 to the MAX77686 driver and is
based on a driver added to the Chrome OS kernel 3.8 by Simon Glass.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
NOTE: I didn't carry previous {Review,Acked,Tested}-by tags since
this patch extending MAX77686 is quite different than the old one
adding a new mfd driver. So review and test is highly appreciated.
Changes since v5:
- Extend the 77686 driver to support 77802 instead of adding a new driver.
Suggested by Lee Jones.
Changes since v4:
- Use consistent expressions when checking for NULL values.
Suggested by Krzysztof Kozlowski.
- Remove unused defines. Suggested by Krzysztof Kozlowski.
- Explain why IRQ is disabled on suspend. Suggested by Krzysztof Kozlowski.
Changes since v3:
- Remove unnecessary OOM error message since the mm subsystem already logs
it.
Changes since v2:
- Split the DT binding docs in a separate patch and improve the
documentation.
Suggested by Mark Brown.
- Add all the devices in the MFD driver instead of doing in separate
patches.
Suggested by Mark Brown.
Changes since v1:
- Convert max77{686,802} to regmap irq API and get rid of
max77{686,802}-irq.c
Suggested by Krzysztof Kozlowski.
- Don't protect max77802 mfd_cells using Kconfig options since mfd core
omits
devices that don't match. Suggested by Lee Jones.
- Change mfd driver to be tristate instead of boolean. Suggested by Mark
Brown.
- Change binding voltage-regulators property to regulators to be
consistent
with other PMIC drivers. Suggested by Mark Brown.
- Use regulators node names instead of the deprecated
regulator-compatible
property. Suggested by Mark Brown.
- Use the new descriptor-based GPIO interface instead of the deprecated
---
drivers/mfd/Kconfig | 6 +-
drivers/mfd/max77686.c | 187 ++-
include/linux/mfd/max77686-private.h | 208 ++-
include/linux/mfd/max77686.h | 60 +-
4 files changed, 428 insertions(+), 33 deletions(-)
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 3010204..de5abf2 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -380,15 +380,15 @@ config MFD_MAX14577
of the device.
config MFD_MAX77686
- bool Maxim Semiconductor MAX77686 PMIC Support
+ bool Maxim Semiconductor MAX77686/802 PMIC Support
depends on I2C=y
select MFD_CORE
select REGMAP_I2C
select REGMAP_IRQ
select IRQ_DOMAIN
help
- Say yes here to add support for Maxim Semiconductor MAX77686.
- This is a Power Management IC with RTC on chip.
+ Say yes here to add support for Maxim Semiconductor MAX77686 and
+ MAX77802 which are Power Management IC with an RTC on chip.
This driver provides common support for accessing the device;
additional drivers must be enabled in order to use the functionality
of the device.
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 648d564..c0db750 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -1,5 +1,5 @@
/*
- * max77686.c - mfd core driver for the Maxim 77686
+ * max77686.c - mfd core driver for the Maxim 77686/802
*
* Copyright (C) 2012 Samsung Electronics
* Chiwoong Byun woong.b...@smasung.com
@@ -45,6 +45,74 @@ static const struct mfd_cell max77686_devs[] = {
{ .name = max77686-clk, },
};
+static const struct mfd_cell max77802_devs[] = {
+ { .name = max77802-pmic, },
+ { .name = max77802-clk, },
+ { .name = max77802-rtc, },
+};
+
+static bool max77802_pmic_is_accessible_reg(struct device *dev,
+ unsigned int reg)
+{
+ return (reg = MAX77802_REG_DEVICE_ID reg MAX77802_REG_PMIC_END);
+}
+
+static bool max77802_rtc_is_accessible_reg(struct device *dev,
+ unsigned int reg)
+{
+ return (reg = MAX77802_RTC_INT reg MAX77802_RTC_END);
+}
+
+static bool max77802_is_accessible_reg(struct device *dev, unsigned int reg)
+{
+ return (max77802_pmic_is_accessible_reg(dev, reg) ||
+ max77802_rtc_is_accessible_reg(dev, reg));
+}
+
+static bool max77802_pmic_is_precious_reg(struct device *dev, unsigned int reg)
+{
+ return (reg == MAX77802_REG_INTSRC || reg == MAX77802_REG_INT1 ||
+ reg == MAX77802_REG_INT2);
+}
+
+static bool max77802_rtc_is_precious_reg(struct device
[PATCH v6 16/23] mfd: max77686: Add documentation for DVS bindings
The MAX77686 PMIC submodule has Dynamic Voltage Scaling (DVS)
support on some regulators. Now that the regulator driver has
bindings to configure it, these bindings have to be documented.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
Documentation/devicetree/bindings/mfd/max77686.txt | 34 ++
1 file changed, 34 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/max77686.txt
b/Documentation/devicetree/bindings/mfd/max77686.txt
index 678f3cf..daf1c07 100644
--- a/Documentation/devicetree/bindings/mfd/max77686.txt
+++ b/Documentation/devicetree/bindings/mfd/max77686.txt
@@ -10,12 +10,38 @@ PMIC submodule.
Binding for the built-in 32k clock generator block is defined separately
in bindings/clk/maxim,max77686.txt file.
+Buck regulators 2, 3 and 4 include Dynamic Voltage Scaling (DVS) that allows
+each output voltage to change dynamically. Each Buck output voltage is selected
+using a set of external inputs: DVS1-3 and SELB2, 3 and 4.
+
+There are 8 DVS registers that can be used to configure the output voltage
+for each Buck regulator and which one is active is controled by DVSx lines.
+
+SELBx lines are used to control if individual Buck lines are ON or OFF.
+
Required properties:
- compatible : Must be maxim,max77686;
- reg : Specifies the i2c slave address of PMIC block.
- interrupts : This i2c device has an IRQ line connected to the main SoC.
- interrupt-parent : The parent interrupt controller.
+Optional properties:
+- max77686,pmic-buck-default-dvs-idx: We'll always write this DVS index in the
+ PMIC for Bucks with DVS.
+ NOTE: at the moment these bindings don't include enough details for actual
+ GPIO-DVS--this just lets you choose which single slot to use.
+
+- max77686,pmic-buck-dvs-gpios: A GPIO array where each GPIO is connected to a
+ DVS line. We'll try to set these GPIOs to match pmic-buck-default-dvs-idx at
+ probe time if they are defined. If some or all of these GPIOs are not defined
+ it's assumed that the board has any missing GPIOs hardwired to match
+ pmic-buck-default-dvs-idx.
+
+- max77686,pmic-buck-selb-gpios: A GPIO array where each GPIO is connected to a
+ SELBx line. Should be three values: 2, 3 and 4. It is strongly suggested to
+ include these GPIOs if there's any chance that changing DVS GPIOs one line at
+ a time might glitch your DVS values.
+
Optional node:
- voltage-regulators : The regulators of max77686 have to be instantiated
under subnode named voltage-regulators using the following format.
@@ -42,6 +68,14 @@ Example:
interrupts = 26 0;
reg = 0x09;
+ max77686,pmic-buck-default-dvs-idx = 1;
+ max77686,pmic-buck-dvs-gpios = gpy7 6 0,
+ gpj4 2 0,
+ gpj4 3 0;
+ max77686,pmic-buck-selb-gpios = gph0 1 0,
+ gph0 2 0,
+ gph0 3 0,
+
voltage-regulators {
ldo11_reg {
regulator-compatible = LDO11;
--
2.0.0.rc2
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[PATCH v6 22/23] rtc: Add driver for Maxim 77802 PMIC Real-Time-Clock
The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
This patch adds support for the RTC and is based on a driver
added by Simon Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
Changes since v5: None
Changes since v4: None
Changes since v3: None
---
drivers/rtc/Kconfig| 10 +
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-max77802.c | 637 +
3 files changed, 648 insertions(+)
create mode 100644 drivers/rtc/rtc-max77802.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index a672dd1..243ac72 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -288,6 +288,16 @@ config RTC_DRV_MAX77686
This driver can also be built as a module. If so, the module
will be called rtc-max77686.
+config RTC_DRV_MAX77802
+ tristate Maxim 77802 RTC
+ depends on MFD_MAX77686
+ help
+ If you say yes here you will get support for the
+ RTC of Maxim MAX77802 PMIC.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-max77802.
+
config RTC_DRV_RS5C372
tristate Ricoh R2025S/D, RS5C372A/B, RV5C386, RV5C387A
help
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 70347d0..247de78 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -81,6 +81,7 @@ obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o
obj-$(CONFIG_RTC_DRV_MAX8997) += rtc-max8997.o
obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o
+obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o
obj-$(CONFIG_RTC_DRV_MC13XXX) += rtc-mc13xxx.o
obj-$(CONFIG_RTC_DRV_MCP795) += rtc-mcp795.o
obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
diff --git a/drivers/rtc/rtc-max77802.c b/drivers/rtc/rtc-max77802.c
new file mode 100644
index 000..2f4fc2e
--- /dev/null
+++ b/drivers/rtc/rtc-max77802.c
@@ -0,0 +1,637 @@
+/*
+ * RTC driver for Maxim MAX77802
+ *
+ * Copyright (C) 2013 Google, Inc
+ *
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ *
+ * based on rtc-max8997.c
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include linux/slab.h
+#include linux/rtc.h
+#include linux/delay.h
+#include linux/mutex.h
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/mfd/max77686-private.h
+#include linux/irqdomain.h
+#include linux/regmap.h
+
+/* RTC Control Register */
+#define BCD_EN_SHIFT 0
+#define BCD_EN_MASK(1 BCD_EN_SHIFT)
+#define MODEL24_SHIFT 1
+#define MODEL24_MASK (1 MODEL24_SHIFT)
+/* RTC Update Register1 */
+#define RTC_UDR_SHIFT 0
+#define RTC_UDR_MASK (1 RTC_UDR_SHIFT)
+#define RTC_RBUDR_SHIFT4
+#define RTC_RBUDR_MASK (1 RTC_RBUDR_SHIFT)
+/* WTSR and SMPL Register */
+#define WTSRT_SHIFT0
+#define SMPLT_SHIFT2
+#define WTSR_EN_SHIFT 6
+#define SMPL_EN_SHIFT 7
+#define WTSRT_MASK (3 WTSRT_SHIFT)
+#define SMPLT_MASK (3 SMPLT_SHIFT)
+#define WTSR_EN_MASK (1 WTSR_EN_SHIFT)
+#define SMPL_EN_MASK (1 SMPL_EN_SHIFT)
+/* RTC Hour register */
+#define HOUR_PM_SHIFT 6
+#define HOUR_PM_MASK (1 HOUR_PM_SHIFT)
+/* RTC Alarm Enable */
+#define ALARM_ENABLE_SHIFT 7
+#define ALARM_ENABLE_MASK (1 ALARM_ENABLE_SHIFT)
+
+/* For the RTCAE1 register, we write this value to enable the alarm */
+#define ALARM_ENABLE_VALUE 0x77
+
+#define MAX77802_RTC_UPDATE_DELAY_US 200
+#undef MAX77802_RTC_WTSR_SMPL
+
+enum {
+ RTC_SEC = 0,
+ RTC_MIN,
+ RTC_HOUR,
+ RTC_WEEKDAY,
+ RTC_MONTH,
+ RTC_YEAR,
+ RTC_DATE,
+ RTC_NR_TIME
+};
+
+struct max77802_rtc_info {
+ struct device *dev;
+ struct max77686_dev *max77802;
+ struct i2c_client *rtc;
+ struct rtc_device *rtc_dev;
+ struct mutexlock;
+
+ struct regmap *regmap;
+
+ int virq;
+ int rtc_24hr_mode;
+};
+
+enum MAX77802_RTC_OP {
+ MAX77802_RTC_WRITE,
+ MAX77802_RTC_READ,
+};
+
+static inline int max77802_rtc_calculate_wday(u8 shifted)
+{
+ int counter = -1;
+
+ while (shifted) {
+ shifted = 1;
+ counter++;
+ }
+
+ return counter;
+}
+
+static void max77802_rtc_data_to_tm(u8 *data, struct rtc_time *tm,
+ int rtc_24hr_mode)
+{
+ tm-tm_sec = data[RTC_SEC]
[PATCH v6 23/23] ARM: dts: Add max77802 to exynos5420-peach-pit and exynos5800-peach-pi
Peach pit and pi boards uses a Maxim 77802 power management
IC to drive regulators and its Real Time Clock. This patch
adds support for this chip.
These are the device nodes and pinctrl configuration that
are present on the Peach pit DeviceTree source file in the
the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Changes since v5:
- Fix style issues and a typo on peach pit and pi DTS.
Suggested by Tushar Behera.
Changes since v4: None
Changes since v3:
- Add support for Exynos5800 based Peach pi board. Suggested by Doug Anderson.
- Model the actual regulators relationship instead of a simplistic model.
Suggested by Mark Brown.
Changes since v2: None
Changes since v1:
- Use regulators for child node instead of voltage-regulators to be
consistent with other PMIC. Suggested by Mark Brown.
- Use regulators node names instead of the deprecated regulator-compatible
property. Suggested by Mark Brown.
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 382 +
arch/arm/boot/dts/exynos5800-peach-pi.dts | 382 +
2 files changed, 764 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index b2f1237..99768d7 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -143,6 +143,350 @@
ddc = i2c_2;
};
+hsi2c_4 {
+ status = okay;
+ clock-frequency = 40;
+
+ max77802-pmic@9 {
+ compatible = maxim,max77802;
+ interrupt-parent = gpx3;
+ interrupts = 1 0;
+ pinctrl-names = default;
+ pinctrl-0 = max77802_irq, pmic_selb,
+ pmic_dvs_1, pmic_dvs_2, pmic_dvs_3;
+ wakeup-source;
+ reg = 0x9;
+ #clock-cells = 1;
+
+ /* Using idx 1 means warm reset will get good voltage */
+ max77686,pmic-buck-default-dvs-idx = 1;
+ max77686,pmic-buck-dvs-gpios = gpy7 6 GPIO_ACTIVE_HIGH,
+ gpj4 2 GPIO_ACTIVE_HIGH,
+ gpj4 3 GPIO_ACTIVE_HIGH;
+ max77686,pmic-buck-selb-gpios = gph0 2 GPIO_ACTIVE_HIGH,
+ gph0 3 GPIO_ACTIVE_HIGH,
+ gph0 4 GPIO_ACTIVE_HIGH,
+ gph0 5 GPIO_ACTIVE_HIGH,
+ gph0 6 GPIO_ACTIVE_HIGH;
+
+ inb1-supply = tps65090_dcdc2;
+ inb2-supply = tps65090_dcdc1;
+ inb3-supply = tps65090_dcdc2;
+ inb4-supply = tps65090_dcdc2;
+ inb5-supply = tps65090_dcdc1;
+ inb6-supply = tps65090_dcdc2;
+ inb7-supply = tps65090_dcdc1;
+ inb8-supply = tps65090_dcdc1;
+ inb9-supply = tps65090_dcdc1;
+ inb10-supply = tps65090_dcdc1;
+
+ inl1-supply = buck5_reg;
+ inl2-supply = buck7_reg;
+ inl3-supply = buck9_reg;
+ inl4-supply = buck9_reg;
+ inl5-supply = buck9_reg;
+ inl6-supply = tps65090_dcdc2;
+ inl7-supply = buck9_reg;
+ inl9-supply = tps65090_dcdc2;
+ inl10-supply = buck7_reg;
+
+ regulators {
+ buck1_reg: BUCK1 {
+ regulator-name = vdd_mif;
+ regulator-min-microvolt = 80;
+ regulator-max-microvolt = 130;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = 12500;
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = vdd_arm_real;
+ regulator-min-microvolt = 80;
+ regulator-max-microvolt = 150;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = 12500;
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = vdd_int_real;
+ regulator-min-microvolt = 80;
+ regulator-max-microvolt = 140;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = 12500;
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = vdd_g3d;
+
[PATCH v6 15/23] regulator: max77686: Setup DVS-related GPIOs on probe
MAX77686 PMIC support Dyamic Voltage Scaling (DVS) on a set
of Buck regulators. A number of GPIO are connected to these
lines and are requested by the mfd driver. Setup the GPIO
pins from the regulator driver.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/regulator/max77686.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/regulator/max77686.c b/drivers/regulator/max77686.c
index ef1af2d..ecce77a 100644
--- a/drivers/regulator/max77686.c
+++ b/drivers/regulator/max77686.c
@@ -435,6 +435,12 @@ static int max77686_pmic_dt_parse_pdata(struct
platform_device *pdev,
}
#endif /* CONFIG_OF */
+static inline bool max77686_is_dvs_buck(int id)
+{
+ /* BUCK 2,3 and 4 support DVS */
+ return (id = MAX77686_BUCK2 id = MAX77686_BUCK4);
+}
+
static int max77686_pmic_probe(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev-dev.parent);
@@ -442,6 +448,9 @@ static int max77686_pmic_probe(struct platform_device *pdev)
struct max77686_data *max77686;
int i, ret = 0;
struct regulator_config config = { };
+ unsigned int reg;
+ int buck_default_idx;
+ int buck_old_idx;
dev_dbg(pdev-dev, %s\n, __func__);
@@ -472,13 +481,34 @@ static int max77686_pmic_probe(struct platform_device
*pdev)
config.driver_data = max77686;
platform_set_drvdata(pdev, max77686);
+ buck_default_idx = pdata-buck_default_idx;
+ buck_old_idx = max77686_read_gpios(pdata);
+
for (i = 0; i MAX77686_REGULATORS; i++) {
struct regulator_dev *rdev;
+ int id = pdata-regulators[i].id;
config.init_data = pdata-regulators[i].initdata;
config.of_node = pdata-regulators[i].of_node;
max77686-opmode[i] = regulators[i].enable_mask;
+
+ if (max77686_is_dvs_buck(id)) {
+ /* Try to copy over data so we keep firmware settings */
+ reg = regulators[i].vsel_reg;
+
+ ret = regmap_reg_copy(iodev-regmap,
+ reg + buck_default_idx,
+ reg + buck_old_idx);
+
+ if (ret)
+ dev_warn(pdev-dev, Copy err %d = %d (%d)\n,
+reg + buck_old_idx,
+reg + buck_default_idx, ret);
+
+ regulators[i].vsel_reg += buck_default_idx;
+ }
+
rdev = devm_regulator_register(pdev-dev,
regulators[i], config);
if (IS_ERR(rdev)) {
@@ -488,6 +518,10 @@ static int max77686_pmic_probe(struct platform_device
*pdev)
}
}
+ ret = max77686_setup_gpios(iodev-dev);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.0.0.rc2
--
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[PATCH v6 14/23] regmap: Add regmap_reg_copy function
Some device drivers using the register map API need to copy the
value from one register to another. Even though it can be done
with a combination of regmap_read() and regmap_write(), it is
better to have a function to avoid code duplication and also it
sanity check and do it atomically by holding the regmap lock.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
Changes since v5: None
Changes since v4: None
Changes since v3: None
---
drivers/base/regmap/regmap.c | 34 ++
include/linux/regmap.h | 9 +
2 files changed, 43 insertions(+)
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index 74d8c06..a2e0b04 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -2555,6 +2555,40 @@ int regmap_parse_val(struct regmap *map, const void *buf,
}
EXPORT_SYMBOL_GPL(regmap_parse_val);
+/**
+ * regmap_reg_copy(): Copy a value from a single register to another one
+ *
+ * @map: Register map to operate on
+ * @dest: Register to copy the value to
+ * @src: Register to copy the value from
+ *
+ * A value of zero will be returned on success, a negative errno will
+ * be returned in error cases.
+ */
+int regmap_reg_copy(struct regmap *map, unsigned int dest, unsigned int src)
+{
+ int val;
+ int ret = 0;
+
+ if (dest == src)
+ return ret;
+
+ if (dest % map-reg_stride ||
+ src % map-reg_stride)
+ return -EINVAL;
+
+ map-lock(map-lock_arg);
+
+ ret = _regmap_read(map, src, val);
+ if (!ret)
+ ret = _regmap_write(map, dest, val);
+
+ map-unlock(map-lock_arg);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(regmap_reg_copy);
+
static int __init regmap_initcall(void)
{
regmap_debugfs_initcall();
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index 7b0e4b4..116c22b 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -445,6 +445,8 @@ int regmap_register_patch(struct regmap *map, const struct
reg_default *regs,
int regmap_parse_val(struct regmap *map, const void *buf,
unsigned int *val);
+int regmap_reg_copy(struct regmap *map, unsigned int dest, unsigned int src);
+
static inline bool regmap_reg_in_range(unsigned int reg,
const struct regmap_range *range)
{
@@ -723,6 +725,13 @@ static inline int regmap_parse_val(struct regmap *map,
const void *buf,
return -EINVAL;
}
+static inline int regmap_reg_copy(struct regmap *map, unsigned int dest,
+ unsigned int src)
+{
+ WARN_ONCE(1, regmap API is disabled);
+ return -EINVAL;
+}
+
static inline struct regmap *dev_get_regmap(struct device *dev,
const char *name)
{
--
2.0.0.rc2
--
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[PATCH v6 13/23] clk: max77686: Improve Maxim 77686 PMIC clocks binding
Like most clock drivers, the Maxim 77686 PMIC clock binding
follows the convention that the #clock-cells property is
used to specify the number of cells in a clock provider.
But the binding document is not clear enough that it shall
be set to 1 since the PMIC support multiple clocks outputs.
Also, explain that the clocks identifiers are defined in a
header file that can be included by Device Tree source with
client nodes to avoid using magic numbers.
Finally, add clock-output-names as an optional property
since now is supported by the clock driver.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Reviewed-by: Mike Turquette mturque...@linaro.org
---
Changes since v5:
- Add clock-output-names as an optional property now that is supported.
Changes since v4: None
Changes since v3:
- Don't change clock-names property to make clear that it's
the consumer clock name and should not match the producer clock.
Suggested by Doug Anderson.
---
.../devicetree/bindings/clock/maxim,max77686.txt | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/maxim,max77686.txt
b/Documentation/devicetree/bindings/clock/maxim,max77686.txt
index 96ce71b..9c40739 100644
--- a/Documentation/devicetree/bindings/clock/maxim,max77686.txt
+++ b/Documentation/devicetree/bindings/clock/maxim,max77686.txt
@@ -9,13 +9,21 @@ The MAX77686 contains three 32.768khz clock outputs that can
be controlled
Following properties should be presend in main device node of the MFD chip.
Required properties:
-- #clock-cells: simple one-cell clock specifier format is used, where the
- only cell is used as an index of the clock inside the provider. Following
- indices are allowed:
+
+- #clock-cells: from common clock binding; shall be set to 1.
+
+Optional properties:
+- clock-output-names: From common clock binding.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. Following indices are allowed:
- 0: 32khz_ap clock,
- 1: 32khz_cp clock,
- 2: 32khz_pmic clock.
+Clocks are defined as preprocessor macros in dt-bindings/clock/maxim,max77686.h
+header and can be used in device tree sources.
+
Example: Node of the MFD chip
max77686: max77686@09 {
@@ -34,5 +42,5 @@ Example: Clock consumer node
compatible = bar,foo;
/* ... */
clock-names = my-clock;
- clocks = max77686 2;
+ clocks = max77686 MAX77686_CLK_PMIC;
};
--
2.0.0.rc2
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[PATCH v6 12/23] clk: max77686: Convert to the generic max clock driver
Clocks drivers for Maxim PMIC are very similar so they can
be converted to use the generic Maxim clock driver.
Also, while being there use module_platform_driver() helper
macro to eliminate more boilerplate code.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes since v5: None
Changes since v4: None
Changes since v3: None
---
drivers/clk/Kconfig| 1 +
drivers/clk/clk-max77686.c | 176 +++--
2 files changed, 9 insertions(+), 168 deletions(-)
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 73f78e8..3fd4270 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -38,6 +38,7 @@ config COMMON_CLK_MAX_GEN
config COMMON_CLK_MAX77686
tristate Clock driver for Maxim 77686 MFD
depends on MFD_MAX77686
+ select COMMON_CLK_MAX_GEN
---help---
This driver supports Maxim 77686 crystal oscillator clock.
diff --git a/drivers/clk/clk-max77686.c b/drivers/clk/clk-max77686.c
index 185b611..ed0beb4 100644
--- a/drivers/clk/clk-max77686.c
+++ b/drivers/clk/clk-max77686.c
@@ -31,187 +31,37 @@
#include linux/clkdev.h
#include dt-bindings/clock/maxim,max77686.h
-
-struct max77686_clk {
- struct max77686_dev *iodev;
- u32 mask;
- struct clk_hw hw;
- struct clk_lookup *lookup;
-};
-
-static struct max77686_clk *to_max77686_clk(struct clk_hw *hw)
-{
- return container_of(hw, struct max77686_clk, hw);
-}
-
-static int max77686_clk_prepare(struct clk_hw *hw)
-{
- struct max77686_clk *max77686 = to_max77686_clk(hw);
-
- return regmap_update_bits(max77686-iodev-regmap,
- MAX77686_REG_32KHZ, max77686-mask,
- max77686-mask);
-}
-
-static void max77686_clk_unprepare(struct clk_hw *hw)
-{
- struct max77686_clk *max77686 = to_max77686_clk(hw);
-
- regmap_update_bits(max77686-iodev-regmap,
- MAX77686_REG_32KHZ, max77686-mask, ~max77686-mask);
-}
-
-static int max77686_clk_is_prepared(struct clk_hw *hw)
-{
- struct max77686_clk *max77686 = to_max77686_clk(hw);
- int ret;
- u32 val;
-
- ret = regmap_read(max77686-iodev-regmap,
- MAX77686_REG_32KHZ, val);
-
- if (ret 0)
- return -EINVAL;
-
- return val max77686-mask;
-}
-
-static unsigned long max77686_recalc_rate(struct clk_hw *hw,
- unsigned long parent_rate)
-{
- return 32768;
-}
-
-static struct clk_ops max77686_clk_ops = {
- .prepare= max77686_clk_prepare,
- .unprepare = max77686_clk_unprepare,
- .is_prepared= max77686_clk_is_prepared,
- .recalc_rate= max77686_recalc_rate,
-};
+#include clk-max-gen.h
static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
[MAX77686_CLK_AP] = {
.name = 32khz_ap,
- .ops = max77686_clk_ops,
+ .ops = max_gen_clk_ops,
.flags = CLK_IS_ROOT,
},
[MAX77686_CLK_CP] = {
.name = 32khz_cp,
- .ops = max77686_clk_ops,
+ .ops = max_gen_clk_ops,
.flags = CLK_IS_ROOT,
},
[MAX77686_CLK_PMIC] = {
.name = 32khz_pmic,
- .ops = max77686_clk_ops,
+ .ops = max_gen_clk_ops,
.flags = CLK_IS_ROOT,
},
};
-static struct clk *max77686_clk_register(struct device *dev,
- struct max77686_clk *max77686)
-{
- struct clk *clk;
- struct clk_hw *hw = max77686-hw;
-
- clk = clk_register(dev, hw);
- if (IS_ERR(clk))
- return clk;
-
- max77686-lookup = kzalloc(sizeof(struct clk_lookup), GFP_KERNEL);
- if (!max77686-lookup)
- return ERR_PTR(-ENOMEM);
-
- max77686-lookup-con_id = hw-init-name;
- max77686-lookup-clk = clk;
-
- clkdev_add(max77686-lookup);
-
- return clk;
-}
-
static int max77686_clk_probe(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev-dev.parent);
- struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM];
- struct clk **clocks;
- int i, ret;
-
- clocks = devm_kzalloc(pdev-dev, sizeof(struct clk *)
- * MAX77686_CLKS_NUM, GFP_KERNEL);
- if (!clocks)
- return -ENOMEM;
-
- for (i = 0; i MAX77686_CLKS_NUM; i++) {
- max77686_clks[i] = devm_kzalloc(pdev-dev,
- sizeof(struct max77686_clk),
GFP_KERNEL);
- if (!max77686_clks[i])
- return -ENOMEM;
- }
-
- for (i = 0; i MAX77686_CLKS_NUM; i++) {
- max77686_clks[i]-iodev = iodev;
- max77686_clks[i]-mask = 1 i;
-
[PATCH v6 10/23] clk: max77686: Add DT include for MAX77686 PMIC clock
This patch adds a dt-binding include for Maxim 77686
PMIC clock IDs that can be used by both the max77686
clock driver and Device Tree source files.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Reviewed-by: Mike Turquette mturque...@linaro.org
---
Changes since v5:
- Improve wording in commit message. Suggested by Andreas Farber.
Changes since v4: None
Changes since v3:
- Keep the note that this patch needs another change due wakeup
ordering problems.
---
drivers/clk/clk-max77686.c | 7 +--
include/dt-bindings/clock/maxim,max77686.h | 23 +++
2 files changed, 24 insertions(+), 6 deletions(-)
create mode 100644 include/dt-bindings/clock/maxim,max77686.h
diff --git a/drivers/clk/clk-max77686.c b/drivers/clk/clk-max77686.c
index 3d7e8dd..185b611 100644
--- a/drivers/clk/clk-max77686.c
+++ b/drivers/clk/clk-max77686.c
@@ -30,12 +30,7 @@
#include linux/mutex.h
#include linux/clkdev.h
-enum {
- MAX77686_CLK_AP = 0,
- MAX77686_CLK_CP,
- MAX77686_CLK_PMIC,
- MAX77686_CLKS_NUM,
-};
+#include dt-bindings/clock/maxim,max77686.h
struct max77686_clk {
struct max77686_dev *iodev;
diff --git a/include/dt-bindings/clock/maxim,max77686.h
b/include/dt-bindings/clock/maxim,max77686.h
new file mode 100644
index 000..7b28b09
--- /dev/null
+++ b/include/dt-bindings/clock/maxim,max77686.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clocks for the Maxim 77686 PMIC.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H
+#define _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H
+
+/* Fixed rate clocks. */
+
+#define MAX77686_CLK_AP0
+#define MAX77686_CLK_CP1
+#define MAX77686_CLK_PMIC 2
+
+/* Total number of clocks. */
+#define MAX77686_CLKS_NUM (MAX77686_CLK_PMIC + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H */
--
2.0.0.rc2
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[PATCH v6 11/23] clk: Add generic driver for Maxim PMIC clocks
Maxim Integrated Power Management ICs are very similar with
regard to their clock outputs. Most of the clock drivers for
these chips are duplicating code and are simpler enough that
can be converted to use a generic driver to consolidate code
and avoid duplication.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes since v5:
- Fix generic driver changes merged into max77802 clock patch by mistake.
Suggested by Yadwinder Singh Brar.
- Register clock lookups using clk_register_clkdev() instead of doing manually.
- Use the managed devm_clk_register() function and remove clk un-registration.
- Add clock-output-names property support. Suggested by Yadwinder Singh Brar.
- Return the rate unconditionally in recalc_rate. Suggested by Mike Turquette.
Changes since v4: None
Changes since v3:
- Don't change clock-names property to make clear that it's
the consumer clock name and should not match the producer clock.
Suggested by Doug Anderson.
---
drivers/clk/Kconfig | 3 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-max-gen.c | 192 ++
drivers/clk/clk-max-gen.h | 32
4 files changed, 228 insertions(+)
create mode 100644 drivers/clk/clk-max-gen.c
create mode 100644 drivers/clk/clk-max-gen.h
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 9f9c5ae..73f78e8 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -32,6 +32,9 @@ config COMMON_CLK_WM831X
source drivers/clk/versatile/Kconfig
+config COMMON_CLK_MAX_GEN
+bool
+
config COMMON_CLK_MAX77686
tristate Clock driver for Maxim 77686 MFD
depends on MFD_MAX77686
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 567f102..6c1aff6 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_ARCH_BCM2835)+= clk-bcm2835.o
obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o
obj-$(CONFIG_ARCH_HIGHBANK)+= clk-highbank.o
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
+obj-$(CONFIG_COMMON_CLK_MAX_GEN) += clk-max-gen.o
obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
diff --git a/drivers/clk/clk-max-gen.c b/drivers/clk/clk-max-gen.c
new file mode 100644
index 000..6505049
--- /dev/null
+++ b/drivers/clk/clk-max-gen.c
@@ -0,0 +1,192 @@
+/*
+ * clk-max-gen.c - Generic clock driver for Maxim PMICs clocks
+ *
+ * Copyright (C) 2014 Google, Inc
+ *
+ * Copyright (C) 2012 Samsung Electornics
+ * Jonghwa Lee jonghwa3@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * This driver is based on clk-max77686.c
+ *
+ */
+
+#include linux/kernel.h
+#include linux/slab.h
+#include linux/err.h
+#include linux/regmap.h
+#include linux/platform_device.h
+#include linux/clk-provider.h
+#include linux/mutex.h
+#include linux/clkdev.h
+#include linux/of.h
+#include linux/export.h
+
+struct max_gen_clk {
+ struct regmap *regmap;
+ u32 mask;
+ u32 reg;
+ struct clk_hw hw;
+};
+
+static struct max_gen_clk *to_max_gen_clk(struct clk_hw *hw)
+{
+ return container_of(hw, struct max_gen_clk, hw);
+}
+
+static int max_gen_clk_prepare(struct clk_hw *hw)
+{
+ struct max_gen_clk *max_gen = to_max_gen_clk(hw);
+
+ return regmap_update_bits(max_gen-regmap, max_gen-reg,
+ max_gen-mask, max_gen-mask);
+}
+
+static void max_gen_clk_unprepare(struct clk_hw *hw)
+{
+ struct max_gen_clk *max_gen = to_max_gen_clk(hw);
+
+ regmap_update_bits(max_gen-regmap, max_gen-reg,
+ max_gen-mask, ~max_gen-mask);
+}
+
+static int max_gen_clk_is_prepared(struct clk_hw *hw)
+{
+ struct max_gen_clk *max_gen = to_max_gen_clk(hw);
+ int ret;
+ u32 val;
+
+ ret = regmap_read(max_gen-regmap, max_gen-reg, val);
+
+ if (ret 0)
+ return -EINVAL;
+
+ return val max_gen-mask;
+}
+
+static unsigned long max_gen_recalc_rate(struct clk_hw *hw,
+unsigned long parent_rate)
+{
+ return 32768;
+}
+
+struct clk_ops max_gen_clk_ops = {
+ .prepare= max_gen_clk_prepare,
+ .unprepare = max_gen_clk_unprepare,
+ .is_prepared= max_gen_clk_is_prepared,
+ .recalc_rate= max_gen_recalc_rate,
+};
[PATCH v6 09/23] rtc: max77686: Allow the max77686 rtc to wakeup the system
From: Doug Anderson diand...@chromium.org
The max77686 includes an RTC that keeps power during suspend. It's
convenient to be able to use it as a wakeup source.
NOTE: due to wakeup ordering problems this patch alone doesn't work so
well on exynos5250-snow. You also need something that brings the i2c
bus up before the max77686 wakeup runs.
Signed-off-by: Doug Anderson diand...@chromium.org
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes since v5:
- Fix $SUBJECT since the patch does not actually touch the mfd subsys.
Suggested by Lee Jones.
Changes since v4: None
Changes since v3:
- Keep the note that this patch needs another change due wakeup
ordering problems.
---
drivers/rtc/rtc-max77686.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/rtc/rtc-max77686.c b/drivers/rtc/rtc-max77686.c
index d20a7f0..c1c6055 100644
--- a/drivers/rtc/rtc-max77686.c
+++ b/drivers/rtc/rtc-max77686.c
@@ -583,6 +583,33 @@ static void max77686_rtc_shutdown(struct platform_device
*pdev)
#endif /* MAX77686_RTC_WTSR_SMPL */
}
+#ifdef CONFIG_PM_SLEEP
+static int max77686_rtc_suspend(struct device *dev)
+{
+ if (device_may_wakeup(dev)) {
+ struct max77686_rtc_info *info = dev_get_drvdata(dev);
+
+ return enable_irq_wake(info-virq);
+ }
+
+ return 0;
+}
+
+static int max77686_rtc_resume(struct device *dev)
+{
+ if (device_may_wakeup(dev)) {
+ struct max77686_rtc_info *info = dev_get_drvdata(dev);
+
+ return disable_irq_wake(info-virq);
+ }
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(max77686_rtc_pm_ops,
+max77686_rtc_suspend, max77686_rtc_resume);
+
static const struct platform_device_id rtc_id[] = {
{ max77686-rtc, 0 },
{},
@@ -592,6 +619,7 @@ static struct platform_driver max77686_rtc_driver = {
.driver = {
.name = max77686-rtc,
.owner = THIS_MODULE,
+ .pm = max77686_rtc_pm_ops,
},
.probe = max77686_rtc_probe,
.shutdown = max77686_rtc_shutdown,
--
2.0.0.rc2
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[PATCH v6 08/23] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support
Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
(DVS) support that allows output voltage to change dynamically.
For MAX77686, these regulators are Buck regulators 2, 3 and 4.
Each Buck output voltage is selected using a set of external
inputs: DVS1-3 and SELB2-4.
DVS registers can be used to configure the output voltages for each
Buck regulator and which one is active is controled by DVSx lines.
SELBx lines are used to control if individual Buck lines are ON or OFF.
This patch adds support to configure the DVSx and SELBx lines
from DT and to setup and read the GPIO lines connected to them.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 115 +++
include/linux/mfd/max77686.h | 18 ---
2 files changed, 125 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 8650832..648d564 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -32,8 +32,10 @@
#include linux/mfd/core.h
#include linux/mfd/max77686.h
#include linux/mfd/max77686-private.h
+#include linux/gpio/consumer.h
#include linux/err.h
#include linux/of.h
+#include linux/export.h
#define I2C_ADDR_RTC (0x0C 1)
@@ -101,9 +103,115 @@ static const struct of_device_id max77686_pmic_dt_match[]
= {
{},
};
+static void max77686_dt_parse_dvs_gpio(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int i;
+
+ /*
+* NOTE: we don't consider GPIO errors fatal; board may have some lines
+* directly pulled high or low and thus doesn't specify them.
+*/
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++)
+ pd-buck_gpio_dvs[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-dvs, i);
+
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++)
+ pd-buck_gpio_selb[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-selb, i);
+}
+
+/**
+ * max77686_setup_gpios - init DVS-related GPIOs
+ *
+ * This function claims / initalizations GPIOs related to DVS if they are
+ * defined. This may have the effect of switching voltages if the
+ * pdata-buck_default_idx does not match the boot time state of pins.
+ */
+int max77686_setup_gpios(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int buck_default_idx = pd-buck_default_idx;
+ int ret;
+ int i;
+
+ /* Set all SELB high to avoid glitching while DVS is changing */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ ret = gpiod_direction_output_raw(gpio, 1);
+ if (ret) {
+ dev_err(dev, can't set gpio[%d] dir: %d\n, i, ret);
+ return ret;
+ }
+ }
+
+ /* Set our initial setting */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_dvs[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ /* If a GPIO is valid, set it */
+ gpiod_direction_output(gpio, (buck_default_idx i) 1);
+ if (ret) {
+ dev_err(dev, can't set gpio[%d]: dir %d\n, i, ret);
+ return ret;
+ }
+ }
+
+ /* Now set SELB low to take effect */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ if (!IS_ERR(gpio))
+ gpiod_set_value(gpio, 0);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(max77686_setup_gpios);
+
+/**
+ * max77686_read_gpios - read the current state of the dvs GPIOs
+ *
+ * We call this function at bootup to detect what slot the firmware was
+ * using for the DVS GPIOs. That way we can properly preserve the firmware's
+ * voltage settings
+ */
+int max77686_read_gpios(struct max77686_platform_data *pdata)
+{
+ int buck_default_idx = pdata-buck_default_idx;
+ int result = 0;
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(pdata-buck_gpio_dvs); i++) {
+ struct gpio_desc *gpio = pdata-buck_gpio_dvs[i];
+
+ /* OK if some GPIOs aren't defined; we'll use default */
+ if (IS_ERR(gpio)) {
+ result |= buck_default_idx (1 i);
+ continue;
+ }
+
+ if (gpiod_get_value_cansleep(gpio))
+ result |= 1 i;
+ }
+
+ return result;
+}
+EXPORT_SYMBOL_GPL(max77686_read_gpios);
+
static struct max77686_platform_data
[PATCH v6 07/23] mfd: max77686: Remove unneeded OOM error message
There is no need to print out-of-memory errors since this is already
done by the memory management subsystem which even calls dump_stack().
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 87fe52e..8650832 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -107,10 +107,8 @@ static struct max77686_platform_data
*max77686_i2c_parse_dt_pdata(struct device
struct max77686_platform_data *pd;
pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
- if (!pd) {
- dev_err(dev, could not allocate memory for pdata\n);
+ if (!pd)
return NULL;
- }
dev-platform_data = pd;
return pd;
--
2.0.0.rc2
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[PATCH v6 05/23] mfd: max77686: Return correct error when pdata isn't found
When platform data is not found an -EIO (I/O error) code is returned.
This doesn't seem to be the correct error so better return -EINVAL
(Invalid argument) which is what most drivers do in this case.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 12d4c17..ada4976 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -129,7 +129,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
if (!pdata) {
dev_err(i2c-dev, No platform data found.\n);
- return -EIO;
+ return -EINVAL;
}
max77686 = devm_kzalloc(i2c-dev,
--
2.0.0.rc2
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[PATCH v6 03/23] mfd: max77686: Don't define dummy function if OF isn't enabled
When the CONFIG_OF option was not enabled, a dummy function
max77686_i2c_parse_dt_pdata() was defined since this is called
unconditionally on probe(). Just always define the real function
and conditionally call it if CONFIG_OF is enabled instead.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index a38e9ee..d1f9d04 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -96,7 +96,6 @@ static const struct regmap_irq_chip max77686_rtc_irq_chip = {
.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
};
-#ifdef CONFIG_OF
static const struct of_device_id max77686_pmic_dt_match[] = {
{.compatible = maxim,max77686, .data = NULL},
{},
@@ -116,13 +115,6 @@ static struct max77686_platform_data
*max77686_i2c_parse_dt_pdata(struct device
dev-platform_data = pd;
return pd;
}
-#else
-static struct max77686_platform_data *max77686_i2c_parse_dt_pdata(struct device
- *dev)
-{
- return 0;
-}
-#endif
static int max77686_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
@@ -132,7 +124,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
unsigned int data;
int ret = 0;
- if (i2c-dev.of_node)
+ if (IS_ENABLED(CONFIG_OF) i2c-dev.of_node)
pdata = max77686_i2c_parse_dt_pdata(i2c-dev);
if (!pdata) {
--
2.0.0.rc2
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[PATCH v6 04/23] mfd: max77686: Make platform data over-rule DT
The function max77802_i2c_parse_dt_pdata() should only be called
if there isn't already platform data for the device.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index d1f9d04..12d4c17 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -124,7 +124,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
unsigned int data;
int ret = 0;
- if (IS_ENABLED(CONFIG_OF) i2c-dev.of_node)
+ if (IS_ENABLED(CONFIG_OF) i2c-dev.of_node !pdata)
pdata = max77686_i2c_parse_dt_pdata(i2c-dev);
if (!pdata) {
--
2.0.0.rc2
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[PATCH v6 01/23] mfd: max77686: Convert to use regmap_irq
By using the generic IRQ support in the Register map API, it
is possible to get rid max77686-irq.c and simplify the code.
Suggested-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Acked-by: Lee Jones lee.jo...@linaro.org
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
Changes since v5: None
Changes since v4:
- Remove left over defines not used anymore. Suggested by Krzysztof Kozlowski.
Changes since v3: None
Changes since v2:
- Cleanup regmap irqchips on i2c_driver .remove function.
Suggested by Doug Anderson.
- Remove unused MAX77686_IRQ_NR enum. Suggested by Doug Anderson.
---
drivers/mfd/Kconfig | 1 +
drivers/mfd/Makefile | 2 +-
drivers/mfd/max77686-irq.c | 319 ---
drivers/mfd/max77686.c | 97 ++-
drivers/rtc/rtc-max77686.c | 27 +--
include/linux/mfd/max77686-private.h | 31 +++-
include/linux/mfd/max77686.h | 2 -
7 files changed, 123 insertions(+), 356 deletions(-)
delete mode 100644 drivers/mfd/max77686-irq.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index b8d9ca0..3010204 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -384,6 +384,7 @@ config MFD_MAX77686
depends on I2C=y
select MFD_CORE
select REGMAP_I2C
+ select REGMAP_IRQ
select IRQ_DOMAIN
help
Say yes here to add support for Maxim Semiconductor MAX77686.
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 4e2bc25..f001487 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -115,7 +115,7 @@ da9063-objs := da9063-core.o da9063-irq.o
da9063-i2c.o
obj-$(CONFIG_MFD_DA9063) += da9063.o
obj-$(CONFIG_MFD_MAX14577) += max14577.o
-obj-$(CONFIG_MFD_MAX77686) += max77686.o max77686-irq.o
+obj-$(CONFIG_MFD_MAX77686) += max77686.o
obj-$(CONFIG_MFD_MAX77693) += max77693.o
obj-$(CONFIG_MFD_MAX8907) += max8907.o
max8925-objs := max8925-core.o max8925-i2c.o
diff --git a/drivers/mfd/max77686-irq.c b/drivers/mfd/max77686-irq.c
deleted file mode 100644
index cdc3280..000
--- a/drivers/mfd/max77686-irq.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/*
- * max77686-irq.c - Interrupt controller support for MAX77686
- *
- * Copyright (C) 2012 Samsung Electronics Co.Ltd
- * Chiwoong Byun woong.b...@samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * This driver is based on max8997-irq.c
- */
-
-#include linux/err.h
-#include linux/irq.h
-#include linux/interrupt.h
-#include linux/gpio.h
-#include linux/mfd/max77686.h
-#include linux/mfd/max77686-private.h
-#include linux/irqdomain.h
-#include linux/regmap.h
-
-enum {
- MAX77686_DEBUG_IRQ_INFO = 1 0,
- MAX77686_DEBUG_IRQ_MASK = 1 1,
- MAX77686_DEBUG_IRQ_INT = 1 2,
-};
-
-static int debug_mask = 0;
-module_param(debug_mask, int, 0);
-MODULE_PARM_DESC(debug_mask, Set debug_mask : 0x0=off 0x1=IRQ_INFO
0x2=IRQ_MASK 0x4=IRQ_INI));
-
-static const u8 max77686_mask_reg[] = {
- [PMIC_INT1] = MAX77686_REG_INT1MSK,
- [PMIC_INT2] = MAX77686_REG_INT2MSK,
- [RTC_INT] = MAX77686_RTC_INTM,
-};
-
-static struct regmap *max77686_get_regmap(struct max77686_dev *max77686,
- enum max77686_irq_source src)
-{
- switch (src) {
- case PMIC_INT1 ... PMIC_INT2:
- return max77686-regmap;
- case RTC_INT:
- return max77686-rtc_regmap;
- default:
- return ERR_PTR(-EINVAL);
- }
-}
-
-struct max77686_irq_data {
- int mask;
- enum max77686_irq_source group;
-};
-
-#define DECLARE_IRQ(idx, _group, _mask)\
- [(idx)] = { .group = (_group), .mask = (_mask) }
-static const struct max77686_irq_data max77686_irqs[] = {
- DECLARE_IRQ(MAX77686_PMICIRQ_PWRONF,PMIC_INT1, 1 0),
- DECLARE_IRQ(MAX77686_PMICIRQ_PWRONR,PMIC_INT1, 1 1),
- DECLARE_IRQ(MAX77686_PMICIRQ_JIGONBF, PMIC_INT1, 1 2),
- DECLARE_IRQ(MAX77686_PMICIRQ_JIGONBR, PMIC_INT1, 1 3),
- DECLARE_IRQ(MAX77686_PMICIRQ_ACOKBF,PMIC_INT1, 1 4),
-
[PATCH v6 00/23] Add Maxim 77802 PMIC support
MAX77802 is a PMIC that contains 10 high efficiency Buck regulators, 32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs, a Real-Time-Clock (RTC) and a I2C interface to program the individual regulators, clocks and the RTC. This series are based on drivers added by Simon Glass to the Chrome OS kernel and adds support for the Maxim 77802 Power Management IC, their regulators, clocks, RTC and I2C interface and depend on patch: [PATCH v3] ARM: dts: Add cros_ec to exynos5420-peach-pit and exynos5800-peach-pi https://patchwork.kernel.org/patch/4411351/ which adds tps65090 support to Peach boards since regulators from this PMIC supply power to a set of MAX77802 regulators. This is a sixth version of the patch-set that addresses several issues pointed out in v5. Individual changes are added on each patch change log. The biggest change is that now the MAX77686 mfd driver is extended to also support the MAX77802 PMIC instead of having a separate mfd driver as was suggested by Lee Jones. Patches 1-16 are cleanups and improvements to the MAX77686 PMIC driver as a preparation to also support the MAX77802 PMIC. Patch 17 adds support for MAX77802 to the MAX77686 mfd driver and Patch 18 adds the DT binding doc for this PMIC. Patch 19 adds support for the regulators in the PMIC, Patch 20 adds support for the clocks in the PMIC and Patch 21 adds its DT binding. Patch 22 adds support for the Real-Time-Clock found in the PMIC and Patch 23 adds the needed device nodes for the max77802 to the Exynos5 base Peach Pit and Pi boards device tree source files. The patch-set has been tested on both Daisy/Snow (max77686) and Peach Pit (max77802) Chromebooks and it's composed of the following patches: Doug Anderson (1): rtc: max77686: Allow the max77686 rtc to wakeup the system Javier Martinez Canillas (22): mfd: max77686: Convert to use regmap_irq mfd: max77686: Add power management support mfd: max77686: don't define dummy function if OF isn't enabled mfd: max77686: make platform data over-rule DT mfd: max77686: Return correct error when pdata isn't found mfd: max77686: Make error checking consistent mfd: max77686: Remove unneeded OOM error message mfd: max77686: Add Dynamic Voltage Scaling (DVS) support clk: max77686: Add DT include for MAX77686 PMIC clock clk: Add generic driver for Maxim PMIC clocks clk: max77686: Convert to the generic max clock driver clk: max77686: Improve Maxim 77686 PMIC clocks binding regmap: Add regmap_reg_copy function regulator: max77686: Setup DVS-related GPIOs on probe mfd: max77686: Add documentation for DVS bindings mfd: max77686: Add Maxim 77802 PMIC support mfd: max77802: Add DT binding documentation regulator: Add driver for Maxim 77802 PMIC regulators clk: Add driver for Maxim 77802 PMIC clocks clk: max77802: Add DT binding documentation rtc: Add driver for Maxim 77802 PMIC Real-Time-Clock ARM: dts: Add max77802 to exynos5420-peach-pit and exynos5800-peach-pi .../devicetree/bindings/clock/maxim,max77686.txt | 16 +- .../devicetree/bindings/clock/maxim,max77802.txt | 44 ++ Documentation/devicetree/bindings/mfd/max77686.txt | 34 ++ Documentation/devicetree/bindings/mfd/max77802.txt | 95 +++ arch/arm/boot/dts/exynos5420-peach-pit.dts | 382 arch/arm/boot/dts/exynos5800-peach-pi.dts | 382 drivers/base/regmap/regmap.c | 34 ++ drivers/clk/Kconfig| 11 + drivers/clk/Makefile | 2 + drivers/clk/clk-max-gen.c | 192 +++ drivers/clk/clk-max-gen.h | 32 ++ drivers/clk/clk-max77686.c | 183 +- drivers/clk/clk-max77802.c | 98 drivers/mfd/Kconfig| 1 + drivers/mfd/Makefile | 2 +- drivers/mfd/max77686-irq.c | 319 --- drivers/mfd/max77686.c | 435 -- drivers/regulator/Kconfig | 9 + drivers/regulator/Makefile | 1 + drivers/regulator/max77686.c | 34 ++ drivers/regulator/max77802.c | 609 drivers/rtc/Kconfig| 10 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-max77686.c | 55 +- drivers/rtc/rtc-max77802.c | 637 + include/dt-bindings/clock/maxim,max77686.h | 23 + include/dt-bindings/clock/maxim,max77802.h | 22 + include/linux/mfd/max77686-private.h | 237 +++- include/linux/mfd/max77686.h | 78 ++- include/linux/regmap.h | 9 + 30 files changed, 3414 insertions(+), 573 deletions(-) create mode 100644
RE: [PATCH 3/3] mmc: dw_mmc: Support voltage changes
On Tue, July 01, 2014. Yuvaraj Kumar wrote:
On Fri, Jun 27, 2014 at 4:48 PM, Seungwon Jeon tgih@samsung.com wrote:
Hi Yuvaraj,
On Fri, June 27, 2014, Yuvaraj Kumar wrote:
On Thu, Jun 26, 2014 at 10:20 PM, Doug Anderson diand...@chromium.org
wrote:
Seungwon,
On Thu, Jun 26, 2014 at 3:41 AM, Seungwon Jeon tgih@samsung.com
wrote:
On Thu, June 26, 2014, Doug Anderson wrote:
Seungwon,
On Wed, Jun 25, 2014 at 6:08 AM, Seungwon Jeon tgih@samsung.com
wrote:
On Mon, June 23, 2014, Yuvaraj Kumar C D wrote:
Subject: [PATCH 3/3] mmc: dw_mmc: Support voltage changes
From: Doug Anderson diand...@chromium.org
For UHS cards we need the ability to switch voltages from 3.3V to
1.8V. Add support to the dw_mmc driver to handle this. Note that
dw_mmc needs a little bit of extra code since the interface needs a
special bit programmed to the CMD register while CMD11 is
progressing.
This means adding a few extra states to the state machine to track.
Overall new additional states makes it complicated.
Can we do that in other way?
That was the best I was able to figure out when I thought this
through. If you have ideas for doing it another way I'd imagine that
Yuvaraj would be happy to take your feedback.
Let's clean up SDMMC_CMD_VOLT_SWITCH.
In turn, we may remove state-handling simply.
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
drivers/mmc/host/dw_mmc.c | 145
+---
drivers/mmc/host/dw_mmc.h |5 +-
include/linux/mmc/dw_mmc.h |2 +
3 files changed, 142 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index e034bce..38eb548 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -29,6 +29,7 @@
#include linux/irq.h
#include linux/mmc/host.h
#include linux/mmc/mmc.h
+#include linux/mmc/sd.h
#include linux/mmc/sdio.h
#include linux/mmc/dw_mmc.h
#include linux/bitops.h
@@ -235,10 +236,13 @@ err:
}
#endif /* defined(CONFIG_DEBUG_FS) */
+static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32
arg);
+
static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct
mmc_command *cmd)
{
struct mmc_data *data;
struct dw_mci_slot *slot = mmc_priv(mmc);
+ struct dw_mci *host = slot-host;
const struct dw_mci_drv_data *drv_data = slot-host-drv_data;
u32 cmdr;
cmd-error = -EINPROGRESS;
@@ -254,6 +258,32 @@ static u32 dw_mci_prepare_command(struct
mmc_host *mmc, struct
mmc_command
*cmd)
else if (cmd-opcode != MMC_SEND_STATUS cmd-data)
cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
+ if (cmd-opcode == SD_SWITCH_VOLTAGE) {
+ u32 clk_en_a;
+
+ /* Special bit makes CMD11 not die */
+ cmdr |= SDMMC_CMD_VOLT_SWITCH;
+
+ /* Change state to continue to handle CMD11 weirdness
*/
+ WARN_ON(slot-host-state != STATE_SENDING_CMD);
+ slot-host-state = STATE_SENDING_CMD11;
+
+ /*
+ * We need to disable clock stop while doing voltage
switch
+ * according to 7.4.1.2 Voltage Switch Normal
Scenario.
+ *
+ * It's assumed that by the next time the CLKENA is
updated
+ * (when we set the clock next) that the voltage
change will
+ * be over, so we don't bother setting any bits to
synchronize
+ * with dw_mci_setup_bus().
+ */
+ clk_en_a = mci_readl(host, CLKENA);
+ clk_en_a = ~(SDMMC_CLKEN_LOW_PWR slot-id);
+ mci_writel(host, CLKENA, clk_en_a);
+ mci_send_cmd(slot, SDMMC_CMD_UPD_CLK |
+ SDMMC_CMD_PRV_DAT_WAIT, 0);
dw_mci_disable_low_power() can be used here.
Ah. I guess we don't have that locally anymore. Locally we have
variants on:
I'm checking on cjb/mmc branch.
* https://patchwork.kernel.org/patch/3070311/
* https://patchwork.kernel.org/patch/3070251/
* https://patchwork.kernel.org/patch/3070221/
...which removed that function. ...but I guess upstream never picked
up those patches, huh? Looking back it looks like you had some
feedback and it needed another spin but somehow fell off my plate. :(
Maybe this is something Yuvaraj would like to pick up?
It's long ago. I remember that there is no progress since my last
comment.
In case of patch 3070221, I want to pick up for next Kernel.
Sounds like Yuvaraj has agreed to look at addressing your comments.
Thanks!
[PATCH] thermal: Add missing cpumask_clear
Cpumasks should be cleared before using.
Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com
---
drivers/thermal/db8500_cpufreq_cooling.c|1 +
drivers/thermal/imx_thermal.c |1 +
drivers/thermal/samsung/exynos_thermal_common.c |1 +
3 files changed, 3 insertions(+)
diff --git a/drivers/thermal/db8500_cpufreq_cooling.c
b/drivers/thermal/db8500_cpufreq_cooling.c
index 786d192..1fa46ff 100644
--- a/drivers/thermal/db8500_cpufreq_cooling.c
+++ b/drivers/thermal/db8500_cpufreq_cooling.c
@@ -34,6 +34,7 @@ static int db8500_cpufreq_cooling_probe(struct
platform_device *pdev)
if (!cpufreq_frequency_get_table(0))
return -EPROBE_DEFER;
+ cpumask_clear(mask_val);
cpumask_set_cpu(0, mask_val);
cdev = cpufreq_cooling_register(mask_val);
diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c
index a99c631..a21acf8 100644
--- a/drivers/thermal/imx_thermal.c
+++ b/drivers/thermal/imx_thermal.c
@@ -449,6 +449,7 @@ static int imx_thermal_probe(struct platform_device *pdev)
regmap_write(map, MISC0 + REG_SET, MISC0_REFTOP_SELBIASOFF);
regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_POWER_DOWN);
+ cpumask_clear(clip_cpus);
cpumask_set_cpu(0, clip_cpus);
data-cdev = cpufreq_cooling_register(clip_cpus);
if (IS_ERR(data-cdev)) {
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 3f5ad25..47efa4c 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -361,6 +361,7 @@ int exynos_register_thermal(struct thermal_sensor_conf
*sensor_conf)
return -ENOMEM;
th_zone-sensor_conf = sensor_conf;
+ cpumask_clear(mask_val);
/*
* TODO: 1) Handle multiple cooling devices in a thermal zone
* 2) Add a flag/name in cooling info to map to specific
--
1.7.10.4
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[PATCH] drm/exynos: fimd: Keep power enabled during fimd_bind
Under some conditions (when IOMMU is enabled), fimd_bind() accesses hardware registers and power-domain should be enabled during that time. fimd_bind -- fimd_mgr_initialize -- fimd_clear_channel If the power-domain is disabled by that time, we get a boot-time crash. It would be better to keep power-domain enabled explicitly. Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0180034 Internal error: : 1008 [#1] PREEMPT SMP ARM ... PC is at fimd_bind+0x84/0x134 LR is at component_bind_all+0xb4/0x1d8 Signed-off-by: Tushar Behera tusha...@samsung.com --- drivers/gpu/drm/exynos/exynos_drm_fimd.c |4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 33161ad..34275fb 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -888,11 +888,15 @@ static int fimd_bind(struct device *dev, struct device *master, void *data) struct fimd_context *ctx = fimd_manager.ctx; struct drm_device *drm_dev = data; + pm_runtime_get_sync(dev); + fimd_mgr_initialize(fimd_manager, drm_dev); exynos_drm_crtc_create(fimd_manager); if (ctx-display) exynos_drm_create_enc_conn(drm_dev, ctx-display); + pm_runtime_put_sync(dev); + return 0; } -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 02/23] mfd: max77686: Add power management support
On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote:
The driver doesn't have PM operations defined so add a suspend
and resume function handlers to allow the PMIC IRQ to wakeup
the system when it is put into a sleep state.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 40
1 file changed, 40 insertions(+)
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Best regards,
Krzysztof
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 3cb41d0..a38e9ee 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -240,10 +240,50 @@ static const struct i2c_device_id max77686_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, max77686_i2c_id);
+#ifdef CONFIG_PM_SLEEP
+static int max77686_suspend(struct device *dev)
+{
+ struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
+ struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
+
+ if (device_may_wakeup(dev))
+ enable_irq_wake(max77686-irq);
+
+ /*
+ * IRQ must be disabled during suspend because if it happens
+ * while suspended it will be handled before resuming I2C.
+ *
+ * When device is woken up from suspend (e.g. by RTC wake alarm),
+ * an interrupt occurs before resuming I2C bus controller.
+ * Interrupt handler tries to read registers but this read
+ * will fail because I2C is still suspended.
+ */
+ disable_irq(max77686-irq);
+
+ return 0;
+}
+
+static int max77686_resume(struct device *dev)
+{
+ struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
+ struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
+
+ if (device_may_wakeup(dev))
+ disable_irq_wake(max77686-irq);
+
+ enable_irq(max77686-irq);
+
+ return 0;
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static SIMPLE_DEV_PM_OPS(max77686_pm, max77686_suspend, max77686_resume);
+
static struct i2c_driver max77686_i2c_driver = {
.driver = {
.name = max77686,
.owner = THIS_MODULE,
+.pm = max77686_pm,
.of_match_table = of_match_ptr(max77686_pmic_dt_match),
},
.probe = max77686_i2c_probe,
--
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Re: [PATCH v6 06/23] mfd: max77686: Make error checking consistent
On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote:
Error checking across the driver is mostly consistent besides
a few exceptions, so change these exceptions for consistency.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Best regards,
Krzysztof
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index ada4976..87fe52e 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -134,7 +134,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
max77686 = devm_kzalloc(i2c-dev,
sizeof(struct max77686_dev), GFP_KERNEL);
- if (max77686 == NULL)
+ if (!max77686)
return -ENOMEM;
i2c_set_clientdata(i2c, max77686);
@@ -153,8 +153,8 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
return ret;
}
- if (regmap_read(max77686-regmap,
- MAX77686_REG_DEVICE_ID, data) 0) {
+ ret = regmap_read(max77686-regmap, MAX77686_REG_DEVICE_ID, data);
+ if (ret 0) {
dev_err(max77686-dev,
device not found on this channel (this is not an
error)\n);
return -ENODEV;
@@ -180,7 +180,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
IRQF_SHARED, 0, max77686_irq_chip,
max77686-irq_data);
- if (ret != 0) {
+ if (ret) {
dev_err(i2c-dev, failed to add PMIC irq chip: %d\n, ret);
goto err_unregister_i2c;
}
@@ -188,7 +188,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
IRQF_SHARED, 0, max77686_rtc_irq_chip,
max77686-rtc_irq_data);
- if (ret != 0) {
+ if (ret) {
dev_err(i2c-dev, failed to add RTC irq chip: %d\n, ret);
goto err_del_irqc;
}
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Re: [PATCH 2/6] pinctrl: samsung: Handle GPIO request and free using pinctrl helpers
On 04.07.2014 11:41, Sachin Kamat wrote: Hi Tomasz, On Wed, Jul 2, 2014 at 9:11 PM, Tomasz Figa t.f...@samsung.com wrote: This patch adds .request() and .free() operations to gpio_chip of pinctrl-samsung driver, which call pinctrl request and free helpers to request and free pinctrl pin along with GPIO pin. Signed-off-by: Tomasz Figa t.f...@samsung.com --- drivers/pinctrl/pinctrl-samsung.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index 779c8bc..6e099d6 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -779,7 +779,8 @@ static int samsung_pinctrl_register(struct platform_device *pdev, pin_bank = drvdata-ctrl-pin_banks[bank]; pin_bank-grange.name = pin_bank-name; pin_bank-grange.id = bank; - pin_bank-grange.pin_base = pin_bank-pin_base; + pin_bank-grange.pin_base = drvdata-ctrl-base + + pin_bank-pin_base; Is this a fix? Hmm, could be. I haven't observed any issues due to this without further patches from this series, so I'm not sure if this needs to be sent as a separate fix, but I might split this patch into two if necessary. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] ASoC: samsung: Add machine driver for odroidx2
On 22/05/14 20:53, Mark Brown wrote: +ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret 0) + return ret; + + ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret 0) + return ret; These are constant, set these in the dai_link. set_fmt also sets master/slave mode of the I2S DAI, after I moved this into the cpu_dai link data structure after suspend/resume cycle the I2S IP block is not being properly re-configured. Should the format setting be added in resume_post callback, or is there any other preferred way ? Similarly the syclk settings are being lost over suspend/resume cycle and nothing restores them. -- Thanks, Sylwester -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 0/5] ARM: remove the sub-node and deprecated supports-highspeed property for dwmmc.
Hi, All. Any other comment or review? I hope that these are merged. Best Regards, Jaehoon Chung On 07/01/2014 05:26 PM, Sachin Kamat wrote: Hi Jaehoon, On Mon, Jun 30, 2014 at 5:19 PM, Jaehoon Chung jh80.ch...@samsung.com wrote: Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced to cap-mmc/sd-highspeed property. Jaehoon Chung (5): mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc mmc: dw_mmc: replace disable-wp from slot's quirk to host's quirk It is a good practice to include revision history for subsequent versions. Tested on Exynos 5250 based Snow and Arndale boards. Works fine now. Tested-by: Sachin Kamat sachin.ka...@samsung.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [alsa-devel] [PATCH 2/2] ASoC: samsung: Add machine driver for odroidx2
On 07/04/2014 01:04 PM, Sylwester Nawrocki wrote: On 22/05/14 20:53, Mark Brown wrote: + ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret 0) + return ret; + + ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret 0) + return ret; These are constant, set these in the dai_link. set_fmt also sets master/slave mode of the I2S DAI, after I moved this into the cpu_dai link data structure after suspend/resume cycle the I2S IP block is not being properly re-configured. Should the format setting be added in resume_post callback, or is there any other preferred way ? Similarly the syclk settings are being lost over suspend/resume cycle and nothing restores them. The I2S driver should save and restore it's register during suspend/resume. - Lars -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 08/23] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support
On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote:
Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
(DVS) support that allows output voltage to change dynamically.
For MAX77686, these regulators are Buck regulators 2, 3 and 4.
Each Buck output voltage is selected using a set of external
inputs: DVS1-3 and SELB2-4.
DVS registers can be used to configure the output voltages for each
Buck regulator and which one is active is controled by DVSx lines.
SELBx lines are used to control if individual Buck lines are ON or OFF.
This patch adds support to configure the DVSx and SELBx lines
from DT and to setup and read the GPIO lines connected to them.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 115
+++
include/linux/mfd/max77686.h | 18 ---
2 files changed, 125 insertions(+), 8 deletions(-)
One minor comment below, but overall looks good to me:
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 8650832..648d564 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -32,8 +32,10 @@
#include linux/mfd/core.h
#include linux/mfd/max77686.h
#include linux/mfd/max77686-private.h
+#include linux/gpio/consumer.h
#include linux/err.h
#include linux/of.h
+#include linux/export.h
#define I2C_ADDR_RTC (0x0C 1)
@@ -101,9 +103,115 @@ static const struct of_device_id
max77686_pmic_dt_match[] = {
{},
};
+static void max77686_dt_parse_dvs_gpio(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int i;
+
+ /*
+ * NOTE: we don't consider GPIO errors fatal; board may have some lines
+ * directly pulled high or low and thus doesn't specify them.
+ */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++)
+ pd-buck_gpio_dvs[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-dvs, i);
+
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++)
+ pd-buck_gpio_selb[i] =
+ devm_gpiod_get_index(dev, max77686,pmic-buck-selb, i);
+}
+
+/**
+ * max77686_setup_gpios - init DVS-related GPIOs
+ *
+ * This function claims / initalizations GPIOs related to DVS if they are
+ * defined. This may have the effect of switching voltages if the
+ * pdata-buck_default_idx does not match the boot time state of pins.
+ */
+int max77686_setup_gpios(struct device *dev)
+{
+ struct max77686_platform_data *pd = dev_get_platdata(dev);
+ int buck_default_idx = pd-buck_default_idx;
+ int ret;
+ int i;
+
+ /* Set all SELB high to avoid glitching while DVS is changing */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ ret = gpiod_direction_output_raw(gpio, 1);
+ if (ret) {
+ dev_err(dev, can't set gpio[%d] dir: %d\n, i, ret);
+ return ret;
+ }
+ }
+
+ /* Set our initial setting */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_dvs[i];
+
+ /* OK if some GPIOs aren't defined */
+ if (IS_ERR(gpio))
+ continue;
+
+ /* If a GPIO is valid, set it */
+ gpiod_direction_output(gpio, (buck_default_idx i) 1);
+ if (ret) {
+ dev_err(dev, can't set gpio[%d]: dir %d\n, i, ret);
+ return ret;
+ }
+ }
+
+ /* Now set SELB low to take effect */
+ for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+ struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+ if (!IS_ERR(gpio))
+ gpiod_set_value(gpio, 0);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(max77686_setup_gpios);
+
+/**
+ * max77686_read_gpios - read the current state of the dvs GPIOs
+ *
+ * We call this function at bootup to detect what slot the firmware was
+ * using for the DVS GPIOs. That way we can properly preserve the firmware's
+ * voltage settings
+ */
+int max77686_read_gpios(struct max77686_platform_data *pdata)
+{
Can you document that this function can sleep? It is quite obvious but
the function is exported so maybe it is worth noting.
Best regards,
Krzysztof
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Re: [PATCHv2 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
Am Montag, 30. Juni 2014, 20:49:18 schrieb Jaehoon Chung:
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property can be replaced to cap-sd/mmc-highspeed.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Reviewed-by: Tushar Behera trbli...@gmail.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Reviewed-by: Heiko Stuebner he...@sntech.de
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = default;
pinctrl-0 = sd0_clk sd0_cmd sd0_cd sd0_bus4;
vmmc-supply = vcc_sd0;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- };
+ bus-width = 4;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = default;
pinctrl-0 = sd1_clk sd1_cmd sd1_bus4;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- disable-wp;
- };
+ bus-width = 4;
+ disable-wp;
};
gpio-keys {
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Re: [PATCH] thermal: Add missing cpumask_clear
Hi Jonghwan, On Fri, Jul 4, 2014 at 3:52 PM, Jonghwan Choi jhbird.c...@samsung.com wrote: Cpumasks should be cleared before using. Please explain why and what is issue observed without this. Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com --- -- Regards, Sachin. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [alsa-devel] [PATCH 2/2] ASoC: samsung: Add machine driver for odroidx2
On 04/07/14 13:10, Lars-Peter Clausen wrote: On 07/04/2014 01:04 PM, Sylwester Nawrocki wrote: On 22/05/14 20:53, Mark Brown wrote: + ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret 0) + return ret; + + ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret 0) + return ret; These are constant, set these in the dai_link. set_fmt also sets master/slave mode of the I2S DAI, after I moved this into the cpu_dai link data structure after suspend/resume cycle the I2S IP block is not being properly re-configured. Should the format setting be added in resume_post callback, or is there any other preferred way ? Similarly the syclk settings are being lost over suspend/resume cycle and nothing restores them. The I2S driver should save and restore it's register during suspend/resume. OK, thanks. I checked the I2S driver does it, but only when dai-active flags is set [1]. However, during system resume this flag is not set (in situation where playback or capture wasn't active right before system suspend). Is the dai-active test wrong in that driver then ? I'm not sure if it could just be removed. [1] http://lxr.free-electrons.com/source/sound/soc/samsung/i2s.c#L913 -- Regards, Sylwester -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [alsa-devel] [PATCH 2/2] ASoC: samsung: Add machine driver for odroidx2
On 07/04/2014 01:24 PM, Sylwester Nawrocki wrote: On 04/07/14 13:10, Lars-Peter Clausen wrote: On 07/04/2014 01:04 PM, Sylwester Nawrocki wrote: On 22/05/14 20:53, Mark Brown wrote: + ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret 0) + return ret; + + ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S + | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM); + if (ret 0) + return ret; These are constant, set these in the dai_link. set_fmt also sets master/slave mode of the I2S DAI, after I moved this into the cpu_dai link data structure after suspend/resume cycle the I2S IP block is not being properly re-configured. Should the format setting be added in resume_post callback, or is there any other preferred way ? Similarly the syclk settings are being lost over suspend/resume cycle and nothing restores them. The I2S driver should save and restore it's register during suspend/resume. OK, thanks. I checked the I2S driver does it, but only when dai-active flags is set [1]. However, during system resume this flag is not set (in situation where playback or capture wasn't active right before system suspend). Is the dai-active test wrong in that driver then ? I'm not sure if it could just be removed. Yes, just remove the check. - Lars -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: exynos5410: Fill in CPU clock-frequency
Am 23.06.2014 09:53, schrieb Tarek Dakhran: On 06/22/2014 11:49 PM, Andreas Färber wrote: It's 1.6 GHz for the Cortex-A15. Avoids warnings like /cpus/cpu@0 missing clock-frequency property. Signed-off-by: Andreas Färber afaer...@suse.de --- arch/arm/boot/dts/exynos5410.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index 3839c26..9d0b8cc 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -28,24 +28,28 @@ device_type = cpu; compatible = arm,cortex-a15; reg = 0x0; +clock-frequency = 16; Reviewed-by: Tarek Dakhrant.dakh...@samsung.com Ping? Seems really trivial... Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 08/23] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support
Hello Krzysztof,
Again, thanks a lot for taking the time to review the series.
On 07/04/2014 01:15 PM, Krzysztof Kozlowski wrote:
On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote:
Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
(DVS) support that allows output voltage to change dynamically.
For MAX77686, these regulators are Buck regulators 2, 3 and 4.
Each Buck output voltage is selected using a set of external
inputs: DVS1-3 and SELB2-4.
DVS registers can be used to configure the output voltages for each
Buck regulator and which one is active is controled by DVSx lines.
SELBx lines are used to control if individual Buck lines are ON or OFF.
This patch adds support to configure the DVSx and SELBx lines
from DT and to setup and read the GPIO lines connected to them.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 115
+++
include/linux/mfd/max77686.h | 18 ---
2 files changed, 125 insertions(+), 8 deletions(-)
One minor comment below, but overall looks good to me:
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 8650832..648d564 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -32,8 +32,10 @@
#include linux/mfd/core.h
#include linux/mfd/max77686.h
#include linux/mfd/max77686-private.h
+#include linux/gpio/consumer.h
#include linux/err.h
#include linux/of.h
+#include linux/export.h
#define I2C_ADDR_RTC(0x0C 1)
@@ -101,9 +103,115 @@ static const struct of_device_id
max77686_pmic_dt_match[] = {
{},
};
+static void max77686_dt_parse_dvs_gpio(struct device *dev)
+{
+struct max77686_platform_data *pd = dev_get_platdata(dev);
+int i;
+
+/*
+ * NOTE: we don't consider GPIO errors fatal; board may have some lines
+ * directly pulled high or low and thus doesn't specify them.
+ */
+for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++)
+pd-buck_gpio_dvs[i] =
+devm_gpiod_get_index(dev, max77686,pmic-buck-dvs, i);
+
+for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++)
+pd-buck_gpio_selb[i] =
+devm_gpiod_get_index(dev, max77686,pmic-buck-selb, i);
+}
+
+/**
+ * max77686_setup_gpios - init DVS-related GPIOs
+ *
+ * This function claims / initalizations GPIOs related to DVS if they are
+ * defined. This may have the effect of switching voltages if the
+ * pdata-buck_default_idx does not match the boot time state of pins.
+ */
+int max77686_setup_gpios(struct device *dev)
+{
+struct max77686_platform_data *pd = dev_get_platdata(dev);
+int buck_default_idx = pd-buck_default_idx;
+int ret;
+int i;
+
+/* Set all SELB high to avoid glitching while DVS is changing */
+for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+/* OK if some GPIOs aren't defined */
+if (IS_ERR(gpio))
+continue;
+
+ret = gpiod_direction_output_raw(gpio, 1);
+if (ret) {
+dev_err(dev, can't set gpio[%d] dir: %d\n, i, ret);
+return ret;
+}
+}
+
+/* Set our initial setting */
+for (i = 0; i ARRAY_SIZE(pd-buck_gpio_dvs); i++) {
+struct gpio_desc *gpio = pd-buck_gpio_dvs[i];
+
+/* OK if some GPIOs aren't defined */
+if (IS_ERR(gpio))
+continue;
+
+/* If a GPIO is valid, set it */
+gpiod_direction_output(gpio, (buck_default_idx i) 1);
+if (ret) {
+dev_err(dev, can't set gpio[%d]: dir %d\n, i, ret);
+return ret;
+}
+}
+
+/* Now set SELB low to take effect */
+for (i = 0; i ARRAY_SIZE(pd-buck_gpio_selb); i++) {
+struct gpio_desc *gpio = pd-buck_gpio_selb[i];
+
+if (!IS_ERR(gpio))
+gpiod_set_value(gpio, 0);
+}
+
+return 0;
+}
+EXPORT_SYMBOL_GPL(max77686_setup_gpios);
+
+/**
+ * max77686_read_gpios - read the current state of the dvs GPIOs
+ *
+ * We call this function at bootup to detect what slot the firmware was
+ * using for the DVS GPIOs. That way we can properly preserve the
firmware's
+ * voltage settings
+ */
+int max77686_read_gpios(struct max77686_platform_data *pdata)
+{
Can you document that this function can sleep? It is quite obvious but
the function is exported so maybe it is worth noting.
Sure, I'll add that to the comment.
Best regards,
Krzysztof
Best regards,
Javier
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Re: [PATCH v6 17/23] mfd: max77686: Add Maxim 77802 PMIC support
Hello Krzysztof,
On 07/04/2014 01:30 PM, Krzysztof Kozlowski wrote:
On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote:
Maxim MAX77802 is a power management chip that contains 10 high
efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
to power up application processors and peripherals, a 2-channel
32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface
to program the individual regulators, clocks outputs and the RTC.
This patch adds support for MAX77802 to the MAX77686 driver and is
based on a driver added to the Chrome OS kernel 3.8 by Simon Glass.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
NOTE: I didn't carry previous {Review,Acked,Tested}-by tags since
this patch extending MAX77686 is quite different than the old one
adding a new mfd driver. So review and test is highly appreciated.
Changes since v5:
- Extend the 77686 driver to support 77802 instead of adding a new
driver.
Suggested by Lee Jones.
Changes since v4:
- Use consistent expressions when checking for NULL values.
Suggested by Krzysztof Kozlowski.
- Remove unused defines. Suggested by Krzysztof Kozlowski.
- Explain why IRQ is disabled on suspend. Suggested by Krzysztof
Kozlowski.
Changes since v3:
- Remove unnecessary OOM error message since the mm subsystem already
logs it.
Changes since v2:
- Split the DT binding docs in a separate patch and improve the
documentation.
Suggested by Mark Brown.
- Add all the devices in the MFD driver instead of doing in separate
patches.
Suggested by Mark Brown.
Changes since v1:
- Convert max77{686,802} to regmap irq API and get rid of
max77{686,802}-irq.c
Suggested by Krzysztof Kozlowski.
- Don't protect max77802 mfd_cells using Kconfig options since mfd core
omits
devices that don't match. Suggested by Lee Jones.
- Change mfd driver to be tristate instead of boolean. Suggested by
Mark Brown.
- Change binding voltage-regulators property to regulators to be
consistent
with other PMIC drivers. Suggested by Mark Brown.
- Use regulators node names instead of the deprecated
regulator-compatible
property. Suggested by Mark Brown.
- Use the new descriptor-based GPIO interface instead of the deprecated
---
drivers/mfd/Kconfig | 6 +-
drivers/mfd/max77686.c | 187 ++-
include/linux/mfd/max77686-private.h | 208
++-
include/linux/mfd/max77686.h | 60 +-
4 files changed, 428 insertions(+), 33 deletions(-)
Three comments below, after fixing:
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
(...)
@@ -55,6 +123,17 @@ static struct regmap_config max77686_rtc_regmap_config =
{
.val_bits = 8,
};
+static struct regmap_config max77802_regmap_config = {
+.reg_bits = 8,
+.val_bits = 8,
+.writeable_reg = max77802_is_accessible_reg,
+.readable_reg = max77802_is_accessible_reg,
+.precious_reg = max77802_is_precious_reg,
+.volatile_reg = max77802_is_volatile_reg,
+.name = max77802-pmic,
+.cache_type = REGCACHE_RBTREE,
+};
+
static const struct regmap_irq max77686_irqs[] = {
/* INT1 interrupts */
{ .reg_offset = 0, .mask = MAX77686_INT1_PWRONF_MSK, },
@@ -98,9 +177,34 @@ static const struct regmap_irq_chip
max77686_rtc_irq_chip = {
.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
};
+static const struct regmap_irq_chip max77802_irq_chip = {
+.name = max77802-pmic,
+.status_base= MAX77802_REG_INT1,
+.mask_base = MAX77802_REG_INT1MSK,
+.num_regs = 2,
+.irqs = max77686_irqs, /* same masks than 77686 */
same masks as 77686
Ok
+.num_irqs = ARRAY_SIZE(max77686_irqs),
+};
+
+static const struct regmap_irq_chip max77802_rtc_irq_chip = {
+.name = max77802-rtc,
+.status_base= MAX77802_RTC_INT,
+.mask_base = MAX77802_RTC_INTM,
+.num_regs = 1,
+.irqs = max77686_rtc_irqs, /* same masks than 77686 */
Ditto
Ok
+.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
+};
+
static const struct of_device_id max77686_pmic_dt_match[] = {
-{.compatible = maxim,max77686, .data = NULL},
-{},
+{
+.compatible = maxim,max77686,
+.data = (void *)TYPE_MAX77686,
+},
+{
+.compatible = maxim,max77802,
+.data = (void *)TYPE_MAX77802,
+},
+{ },
};
static void max77686_dt_parse_dvs_gpio(struct device *dev)
@@ -236,6 +340,12 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
struct
Re: ASoC: samsung: MACH_SMDK6450
On Fri, Jul 04, 2014 at 11:01:52AM +0200, Arnd Bergmann wrote: On Thursday 03 July 2014 20:39:41 Olof Johansson wrote: On Thu, Jul 3, 2014 at 5:39 PM, Kukjin Kim kgene@samsung.com wrote: Mark is the _only_ linux developer in the world who will give you crap for sending him patches to the very same email that he signs off all his work with. I really wish Linaro would just let him sign off with his long-standing kernel.org email address instead so the rest of us wouldn't have to keep track of this. Me too, it's a constant source of aggrivation. FWIW David Miller has a similar policy: he only applies networking patches that are sent to the netdev mailing list. This seems like a good idea in general (to ensure they are getting exposed to the public). Right, I do tend to insist on this as well (I also think some other patchwork users do this as well as davem, things need to hit the list to go into patchwork), plus including comaintainers where that's relevant. For the most part anything that ends up going to the work address also has one of those problems. Mark, any chance we could convince to pick up patches from alsa-devel in the future even if they are sent to the wrong personal email account of yours? I would assume that would only require a small change in your filter rules, not a change in your workflow. I do look at the lists but it's very easy for things that only go there to get missed and it's fairly low priority, the volume is very high and obviously there's a lot of duplication from things that do land in my inbox. Copying things into my inbox causes duplication problems due to things going to lkml, lakml and subsystem specific lists and alsa-devel being moderated for non-subscribers and subject mangling doesn't help anything. What's more likely to happen is that I just start ignoring the work policy which is something I've been considering anyway. signature.asc Description: Digital signature
Re: [PATCH v6 22/23] rtc: Add driver for Maxim 77802 PMIC Real-Time-Clock
On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote:
The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
This patch adds support for the RTC and is based on a driver
added by Simon Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
Changes since v5: None
Changes since v4: None
Changes since v3: None
---
drivers/rtc/Kconfig| 10 +
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-max77802.c | 637
+
3 files changed, 648 insertions(+)
create mode 100644 drivers/rtc/rtc-max77802.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index a672dd1..243ac72 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -288,6 +288,16 @@ config RTC_DRV_MAX77686
This driver can also be built as a module. If so, the module
will be called rtc-max77686.
+config RTC_DRV_MAX77802
+ tristate Maxim 77802 RTC
+ depends on MFD_MAX77686
+ help
+ If you say yes here you will get support for the
+ RTC of Maxim MAX77802 PMIC.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-max77802.
+
config RTC_DRV_RS5C372
tristate Ricoh R2025S/D, RS5C372A/B, RV5C386, RV5C387A
help
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 70347d0..247de78 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -81,6 +81,7 @@ obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o
obj-$(CONFIG_RTC_DRV_MAX8997)+= rtc-max8997.o
obj-$(CONFIG_RTC_DRV_MAX6902)+= rtc-max6902.o
obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o
+obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o
obj-$(CONFIG_RTC_DRV_MC13XXX)+= rtc-mc13xxx.o
obj-$(CONFIG_RTC_DRV_MCP795) += rtc-mcp795.o
obj-$(CONFIG_RTC_DRV_MSM6242)+= rtc-msm6242.o
diff --git a/drivers/rtc/rtc-max77802.c b/drivers/rtc/rtc-max77802.c
new file mode 100644
index 000..2f4fc2e
--- /dev/null
+++ b/drivers/rtc/rtc-max77802.c
@@ -0,0 +1,637 @@
+/*
+ * RTC driver for Maxim MAX77802
+ *
+ * Copyright (C) 2013 Google, Inc
+ *
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ *
+ * based on rtc-max8997.c
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include linux/slab.h
+#include linux/rtc.h
+#include linux/delay.h
+#include linux/mutex.h
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/mfd/max77686-private.h
+#include linux/irqdomain.h
+#include linux/regmap.h
+
+/* RTC Control Register */
+#define BCD_EN_SHIFT 0
+#define BCD_EN_MASK (1 BCD_EN_SHIFT)
+#define MODEL24_SHIFT1
+#define MODEL24_MASK (1 MODEL24_SHIFT)
+/* RTC Update Register1 */
+#define RTC_UDR_SHIFT0
+#define RTC_UDR_MASK (1 RTC_UDR_SHIFT)
+#define RTC_RBUDR_SHIFT 4
+#define RTC_RBUDR_MASK (1 RTC_RBUDR_SHIFT)
+/* WTSR and SMPL Register */
+#define WTSRT_SHIFT 0
+#define SMPLT_SHIFT 2
+#define WTSR_EN_SHIFT6
+#define SMPL_EN_SHIFT7
+#define WTSRT_MASK (3 WTSRT_SHIFT)
+#define SMPLT_MASK (3 SMPLT_SHIFT)
+#define WTSR_EN_MASK (1 WTSR_EN_SHIFT)
+#define SMPL_EN_MASK (1 SMPL_EN_SHIFT)
+/* RTC Hour register */
+#define HOUR_PM_SHIFT6
+#define HOUR_PM_MASK (1 HOUR_PM_SHIFT)
+/* RTC Alarm Enable */
+#define ALARM_ENABLE_SHIFT 7
+#define ALARM_ENABLE_MASK(1 ALARM_ENABLE_SHIFT)
+
+/* For the RTCAE1 register, we write this value to enable the alarm */
+#define ALARM_ENABLE_VALUE 0x77
+
+#define MAX77802_RTC_UPDATE_DELAY_US 200
+#undef MAX77802_RTC_WTSR_SMPL
Hmmm... I am not sure what is the purpose of this undef. It disables
some functions below. I saw same code in 77686 RTC driver but this does
not help me :).
If this is on purpose can you add a comment explaining the
purpose/cause?
+
+enum {
+ RTC_SEC = 0,
+ RTC_MIN,
+ RTC_HOUR,
+ RTC_WEEKDAY,
+ RTC_MONTH,
+ RTC_YEAR,
+ RTC_DATE,
+ RTC_NR_TIME
+};
+
+struct max77802_rtc_info {
+ struct device *dev;
+ struct max77686_dev *max77802;
+ struct i2c_client *rtc;
+ struct rtc_device *rtc_dev;
+ struct mutexlock;
+
+ struct regmap *regmap;
+
+ int virq;
+ int rtc_24hr_mode;
+};
+
+enum MAX77802_RTC_OP {
+
[PATCH] drivers: phy: exynos-usb2: add support for Exynos 3250
This patch adds support for Exynos3250 SoC to Exynos2USB PHY driver.
Although Exynos3250 has only one device phy interface, the register
layout and all operations that are required to get it enabled are almost
same as on Exynos4x12. The only different is one more register
(REFCLKSEL) which need to be set.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/phy/Kconfig | 12 ++--
drivers/phy/phy-exynos4x12-usb2.c | 18 ++
drivers/phy/phy-samsung-usb2.c| 6 ++
drivers/phy/phy-samsung-usb2.h| 2 ++
4 files changed, 32 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 16a2f067c242..58737b9eaa6e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -141,14 +141,14 @@ config PHY_EXYNOS4210_USB2
phys are available - device, host, HSIC0 and HSIC1.
config PHY_EXYNOS4X12_USB2
- bool Support for Exynos 4x12
+ bool Support for Exynos 3250/4x12
depends on PHY_SAMSUNG_USB2
- depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412)
+ depends on (SOC_EXYNOS3250 || SOC_EXYNOS4212 || SOC_EXYNOS4412)
help
- Enable USB PHY support for Exynos 4x12. This option requires that
- Samsung USB 2.0 PHY driver is enabled and means that support for this
- particular SoC is compiled in the driver. In case of Exynos 4x12 four
- phys are available - device, host, HSIC0 and HSIC1.
+ Enable USB PHY support for Exynos 3250/4x12. This option requires
+ that Samsung USB 2.0 PHY driver is enabled and means that support for
+ this particular SoC is compiled in the driver. In case of Exynos 4x12
+ four phys are available - device, host, HSIC0 and HSIC1.
config PHY_EXYNOS5250_USB2
bool Support for Exynos 5250
diff --git a/drivers/phy/phy-exynos4x12-usb2.c
b/drivers/phy/phy-exynos4x12-usb2.c
index 59d8dd3ff390..b29bbfacd4b5 100644
--- a/drivers/phy/phy-exynos4x12-usb2.c
+++ b/drivers/phy/phy-exynos4x12-usb2.c
@@ -67,6 +67,12 @@
#define EXYNOS_4x12_UPHYCLK_PHYFSEL_24MHZ (0x5 0)
#define EXYNOS_4x12_UPHYCLK_PHYFSEL_50MHZ (0x7 0)
+#define EXYNOS_4212_UPHYCLK_PHY0_ID_PULLUP (0x1 3)
+#define EXYNOS_4212_UPHYCLK_PHY0_COMMON_ON (0x1 4)
+#define EXYNOS_4212_UPHYCLK_PHY1_COMMON_ON (0x1 7)
+
+#define EXYNOS_3250_UPHYCLK_REFCLKSEL (0x2 8)
+
#define EXYNOS_4x12_UPHYCLK_PHY0_ID_PULLUP BIT(3)
#define EXYNOS_4x12_UPHYCLK_PHY0_COMMON_ON BIT(4)
#define EXYNOS_4x12_UPHYCLK_PHY1_COMMON_ON BIT(7)
@@ -197,6 +203,10 @@ static void exynos4x12_setup_clk(struct
samsung_usb2_phy_instance *inst)
clk = readl(drv-reg_phy + EXYNOS_4x12_UPHYCLK);
clk = ~EXYNOS_4x12_UPHYCLK_PHYFSEL_MASK;
+
+ if (drv-cfg-has_refclk_sel)
+ clk = EXYNOS_3250_UPHYCLK_REFCLKSEL;
+
clk |= drv-ref_reg_val EXYNOS_4x12_UPHYCLK_PHYFSEL_OFFSET;
clk |= EXYNOS_4x12_UPHYCLK_PHY1_COMMON_ON;
writel(clk, drv-reg_phy + EXYNOS_4x12_UPHYCLK);
@@ -358,6 +368,14 @@ static const struct samsung_usb2_common_phy
exynos4x12_phys[] = {
{},
};
+const struct samsung_usb2_phy_config exynos3250_usb2_phy_config = {
+ .has_mode_switch= 1,
+ .has_refclk_sel = 1,
+ .num_phys = 1,
+ .phys = exynos4x12_phys,
+ .rate_to_clk= exynos4x12_rate_to_clk,
+};
+
const struct samsung_usb2_phy_config exynos4x12_usb2_phy_config = {
.has_mode_switch= 1,
.num_phys = EXYNOS4x12_NUM_PHYS,
diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-samsung-usb2.c
index 8a8c6bc8709a..36db8eb8c5f4 100644
--- a/drivers/phy/phy-samsung-usb2.c
+++ b/drivers/phy/phy-samsung-usb2.c
@@ -87,6 +87,12 @@ static struct phy *samsung_usb2_phy_xlate(struct device *dev,
}
static const struct of_device_id samsung_usb2_phy_of_match[] = {
+#ifdef CONFIG_PHY_EXYNOS4X12_USB2
+ {
+ .compatible = samsung,exynos3250-usb2-phy,
+ .data = exynos3250_usb2_phy_config,
+ },
+#endif
#ifdef CONFIG_PHY_EXYNOS4210_USB2
{
.compatible = samsung,exynos4210-usb2-phy,
diff --git a/drivers/phy/phy-samsung-usb2.h b/drivers/phy/phy-samsung-usb2.h
index 918847843a95..b03da0ef39ac 100644
--- a/drivers/phy/phy-samsung-usb2.h
+++ b/drivers/phy/phy-samsung-usb2.h
@@ -60,8 +60,10 @@ struct samsung_usb2_phy_config {
int (*rate_to_clk)(unsigned long, u32 *);
unsigned int num_phys;
bool has_mode_switch;
+ bool has_refclk_sel;
};
+extern const struct samsung_usb2_phy_config exynos3250_usb2_phy_config;
extern const struct samsung_usb2_phy_config exynos4210_usb2_phy_config;
extern const struct samsung_usb2_phy_config exynos4x12_usb2_phy_config;
extern const struct samsung_usb2_phy_config exynos5250_usb2_phy_config;
--
1.9.2
--
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[PATCH] ARM: dts: exynos 3250: add hsotg and usb2phy device nodes
This patch adds device tree nodes required to enable support for USB
device controller.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index eb457620975b..3deb08463b9f 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -309,6 +309,28 @@
status = disabled;
};
+ hsotg: hsotg@1248 {
+ compatible = samsung,s3c6400-hsotg;
+ reg = 0x1248 0x2;
+ interrupts = 0 141 0;
+ clocks = cmu CLK_USBOTG;
+ clock-names = otg;
+ phys = exynos_usbphy 0;
+ phy-names = usb2-phy;
+ status = disabled;
+ };
+
+ exynos_usbphy: exynos-usbphy@125B {
+ compatible = samsung,exynos3250-usb2-phy;
+ reg = 0x125B 0x100;
+ samsung,pmureg-phandle = pmu_system_controller;
+ samsung,sysreg-phandle = sys_reg;
+ clocks = cmu CLK_USBOTG, xusbxti;
+ clock-names = phy, ref;
+ #phy-cells = 1;
+ status = disabled;
+ };
+
serial_0: serial@1380 {
compatible = samsung,exynos4210-uart;
reg = 0x1380 0x100;
--
1.9.2
--
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Re: [PATCH v6 22/23] rtc: Add driver for Maxim 77802 PMIC Real-Time-Clock
Hello Krzysztof, Thanks a lot for your feedback. On 07/04/2014 01:56 PM, Krzysztof Kozlowski wrote: On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote: The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms. This patch adds support for the RTC and is based on a driver added by Simon Glass to the Chrome OS kernel 3.8 tree. Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk --- Changes since v5: None Changes since v4: None Changes since v3: None --- drivers/rtc/Kconfig| 10 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-max77802.c | 637 + 3 files changed, 648 insertions(+) create mode 100644 drivers/rtc/rtc-max77802.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index a672dd1..243ac72 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -288,6 +288,16 @@ config RTC_DRV_MAX77686 This driver can also be built as a module. If so, the module will be called rtc-max77686. +config RTC_DRV_MAX77802 +tristate Maxim 77802 RTC +depends on MFD_MAX77686 +help + If you say yes here you will get support for the + RTC of Maxim MAX77802 PMIC. + + This driver can also be built as a module. If so, the module + will be called rtc-max77802. + config RTC_DRV_RS5C372 tristate Ricoh R2025S/D, RS5C372A/B, RV5C386, RV5C387A help diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 70347d0..247de78 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -81,6 +81,7 @@ obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o obj-$(CONFIG_RTC_DRV_MAX8997) += rtc-max8997.o obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o +obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o obj-$(CONFIG_RTC_DRV_MC13XXX) += rtc-mc13xxx.o obj-$(CONFIG_RTC_DRV_MCP795)+= rtc-mcp795.o obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o diff --git a/drivers/rtc/rtc-max77802.c b/drivers/rtc/rtc-max77802.c new file mode 100644 index 000..2f4fc2e --- /dev/null +++ b/drivers/rtc/rtc-max77802.c @@ -0,0 +1,637 @@ +/* + * RTC driver for Maxim MAX77802 + * + * Copyright (C) 2013 Google, Inc + * + * Copyright (C) 2012 Samsung Electronics Co.Ltd + * + * based on rtc-max8997.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include linux/slab.h +#include linux/rtc.h +#include linux/delay.h +#include linux/mutex.h +#include linux/module.h +#include linux/platform_device.h +#include linux/mfd/max77686-private.h +#include linux/irqdomain.h +#include linux/regmap.h + +/* RTC Control Register */ +#define BCD_EN_SHIFT0 +#define BCD_EN_MASK (1 BCD_EN_SHIFT) +#define MODEL24_SHIFT 1 +#define MODEL24_MASK(1 MODEL24_SHIFT) +/* RTC Update Register1 */ +#define RTC_UDR_SHIFT 0 +#define RTC_UDR_MASK(1 RTC_UDR_SHIFT) +#define RTC_RBUDR_SHIFT 4 +#define RTC_RBUDR_MASK (1 RTC_RBUDR_SHIFT) +/* WTSR and SMPL Register */ +#define WTSRT_SHIFT 0 +#define SMPLT_SHIFT 2 +#define WTSR_EN_SHIFT 6 +#define SMPL_EN_SHIFT 7 +#define WTSRT_MASK (3 WTSRT_SHIFT) +#define SMPLT_MASK (3 SMPLT_SHIFT) +#define WTSR_EN_MASK(1 WTSR_EN_SHIFT) +#define SMPL_EN_MASK(1 SMPL_EN_SHIFT) +/* RTC Hour register */ +#define HOUR_PM_SHIFT 6 +#define HOUR_PM_MASK(1 HOUR_PM_SHIFT) +/* RTC Alarm Enable */ +#define ALARM_ENABLE_SHIFT 7 +#define ALARM_ENABLE_MASK (1 ALARM_ENABLE_SHIFT) + +/* For the RTCAE1 register, we write this value to enable the alarm */ +#define ALARM_ENABLE_VALUE 0x77 + +#define MAX77802_RTC_UPDATE_DELAY_US200 +#undef MAX77802_RTC_WTSR_SMPL Hmmm... I am not sure what is the purpose of this undef. It disables some functions below. I saw same code in 77686 RTC driver but this does not help me :). If this is on purpose can you add a comment explaining the purpose/cause? This is a left over from when a combined 77686/802 driver was attempted since as you said the 77686 RTC driver does the same. I just checked MAX77802 data sheet and the MAX77802_RTC_WTSR_SMPL register is to control the SMPL (Sudden Momentary Power Loss) and WTSR (Watchdog Timeout and Software Resets) features. Now, I wanted to figure out why the 77686 driver unset that register
Re: [PATCH v6 22/23] rtc: Add driver for Maxim 77802 PMIC Real-Time-Clock
On pią, 2014-07-04 at 14:52 +0200, Javier Martinez Canillas wrote: Hello Krzysztof, Thanks a lot for your feedback. On 07/04/2014 01:56 PM, Krzysztof Kozlowski wrote: On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote: The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms. This patch adds support for the RTC and is based on a driver added by Simon Glass to the Chrome OS kernel 3.8 tree. Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk --- Changes since v5: None Changes since v4: None Changes since v3: None --- drivers/rtc/Kconfig| 10 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-max77802.c | 637 + 3 files changed, 648 insertions(+) create mode 100644 drivers/rtc/rtc-max77802.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index a672dd1..243ac72 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -288,6 +288,16 @@ config RTC_DRV_MAX77686 This driver can also be built as a module. If so, the module will be called rtc-max77686. +config RTC_DRV_MAX77802 + tristate Maxim 77802 RTC + depends on MFD_MAX77686 + help +If you say yes here you will get support for the +RTC of Maxim MAX77802 PMIC. + +This driver can also be built as a module. If so, the module +will be called rtc-max77802. + config RTC_DRV_RS5C372 tristate Ricoh R2025S/D, RS5C372A/B, RV5C386, RV5C387A help diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 70347d0..247de78 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -81,6 +81,7 @@ obj-$(CONFIG_RTC_DRV_MAX8998)+= rtc-max8998.o obj-$(CONFIG_RTC_DRV_MAX8997) += rtc-max8997.o obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o obj-$(CONFIG_RTC_DRV_MAX77686)+= rtc-max77686.o +obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o obj-$(CONFIG_RTC_DRV_MC13XXX) += rtc-mc13xxx.o obj-$(CONFIG_RTC_DRV_MCP795) += rtc-mcp795.o obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o diff --git a/drivers/rtc/rtc-max77802.c b/drivers/rtc/rtc-max77802.c new file mode 100644 index 000..2f4fc2e --- /dev/null +++ b/drivers/rtc/rtc-max77802.c @@ -0,0 +1,637 @@ +/* + * RTC driver for Maxim MAX77802 + * + * Copyright (C) 2013 Google, Inc + * + * Copyright (C) 2012 Samsung Electronics Co.Ltd + * + * based on rtc-max8997.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include linux/slab.h +#include linux/rtc.h +#include linux/delay.h +#include linux/mutex.h +#include linux/module.h +#include linux/platform_device.h +#include linux/mfd/max77686-private.h +#include linux/irqdomain.h +#include linux/regmap.h + +/* RTC Control Register */ +#define BCD_EN_SHIFT 0 +#define BCD_EN_MASK (1 BCD_EN_SHIFT) +#define MODEL24_SHIFT 1 +#define MODEL24_MASK (1 MODEL24_SHIFT) +/* RTC Update Register1 */ +#define RTC_UDR_SHIFT 0 +#define RTC_UDR_MASK (1 RTC_UDR_SHIFT) +#define RTC_RBUDR_SHIFT 4 +#define RTC_RBUDR_MASK(1 RTC_RBUDR_SHIFT) +/* WTSR and SMPL Register */ +#define WTSRT_SHIFT 0 +#define SMPLT_SHIFT 2 +#define WTSR_EN_SHIFT 6 +#define SMPL_EN_SHIFT 7 +#define WTSRT_MASK(3 WTSRT_SHIFT) +#define SMPLT_MASK(3 SMPLT_SHIFT) +#define WTSR_EN_MASK (1 WTSR_EN_SHIFT) +#define SMPL_EN_MASK (1 SMPL_EN_SHIFT) +/* RTC Hour register */ +#define HOUR_PM_SHIFT 6 +#define HOUR_PM_MASK (1 HOUR_PM_SHIFT) +/* RTC Alarm Enable */ +#define ALARM_ENABLE_SHIFT7 +#define ALARM_ENABLE_MASK (1 ALARM_ENABLE_SHIFT) + +/* For the RTCAE1 register, we write this value to enable the alarm */ +#define ALARM_ENABLE_VALUE0x77 + +#define MAX77802_RTC_UPDATE_DELAY_US 200 +#undef MAX77802_RTC_WTSR_SMPL Hmmm... I am not sure what is the purpose of this undef. It disables some functions below. I saw same code in 77686 RTC driver but this does not help me :). If this is on purpose can you add a comment explaining the purpose/cause? This is a left over from when a combined 77686/802 driver was attempted since as you said the 77686 RTC driver does the same. I just checked MAX77802 data sheet and the MAX77802_RTC_WTSR_SMPL
[PATCH V3 1/2] doc: dt bindings: Document Odroid X2/U3 audio subsystem bindings
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
Changes since v2:
- none.
---
.../bindings/sound/samsung,odroidx2-max98090.txt | 35
1 file changed, 35 insertions(+)
create mode 100644
Documentation/devicetree/bindings/sound/samsung,odroidx2-max98090.txt
diff --git
a/Documentation/devicetree/bindings/sound/samsung,odroidx2-max98090.txt
b/Documentation/devicetree/bindings/sound/samsung,odroidx2-max98090.txt
new file mode 100644
index 000..9148f72
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/samsung,odroidx2-max98090.txt
@@ -0,0 +1,35 @@
+Samsung Exynos Odroid X2/U3 audio complex with MAX98090 codec
+
+Required properties:
+ - compatible : samsung,odroidx2-audio - for Odroid X2 board,
+ samsung,odroidu3-audio - for Odroid U3 board
+ - samsung,model : the user-visible name of this sound complex
+ - samsung,i2s-controller : the phandle of the I2S controller
+ - samsung,audio-codec : the phandle of the MAX98090 audio codec
+ - samsung,audio-routing : a list of the connections between audio
+ components; each entry is a pair of strings, the first being the
+ connection's sink, the second being the connection's source;
+ valid names for sources and sinks are the MAX98090's pins (as
+ documented in its binding), and the jacks on the board
+ For Odroid X2:
+ * Headphone Jack
+ * Mic Jack
+ * DMIC
+
+ For Odroid U3:
+ * Headphone Jack
+ * Speakers
+
+Example:
+
+sound {
+ compatible = samsung,odroidu3-audio;
+ samsung,i2s-controller = i2s0;
+ samsung,audio-codec = max98090;
+ samsung,model = Odroid-X2;
+ samsung,audio-routing =
+ Headphone Jack, HPL,
+ Headphone Jack, HPR,
+ IN1, Mic Jack,
+ Mic Jack, MICBIAS;
+};
--
1.7.9.5
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[PATCH V3 2/2] ASoC: samsung: Add machine driver for Odroid X2/U3
This patch adds the sound subsystem driver for Odroid-X2 and
Odroid-U3 boards. The codec works in I2S master mode; there
are two separate audio routing paths defined, as there are
differences in the signal routing between the X2 and U3 boards,
i.e. U3 uses single jack for headphones and microphone.
Signed-off-by: Chen Zhen zhen1.c...@samsung.com
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
Changes since v2:
- clock settings moved to late_probe, odroidx2_ops removed;
- added missing driver.pm ops initialization;
- minor cleanups.
---
sound/soc/samsung/Kconfig |8 ++
sound/soc/samsung/Makefile|2 +
sound/soc/samsung/odroidx2_max98090.c | 177 +
3 files changed, 187 insertions(+)
create mode 100644 sound/soc/samsung/odroidx2_max98090.c
diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig
index 3be49cd..333d645 100644
--- a/sound/soc/samsung/Kconfig
+++ b/sound/soc/samsung/Kconfig
@@ -237,3 +237,11 @@ config SND_SOC_SNOW
help
Say Y if you want to add audio support for various Snow
boards based on Exynos5 series of SoCs.
+
+config SND_SOC_ODROIDX2
+ tristate Audio support for Odroid-X2 and Odroid-U3
+ depends on SND_SOC_SAMSUNG
+ select SND_SOC_MAX98090
+ select SND_SAMSUNG_I2S
+ help
+ Say Y here to enable audio support for the Odroid-X2/U3.
diff --git a/sound/soc/samsung/Makefile b/sound/soc/samsung/Makefile
index 6469199..e8d9ccd 100644
--- a/sound/soc/samsung/Makefile
+++ b/sound/soc/samsung/Makefile
@@ -44,6 +44,7 @@ snd-soc-tobermory-objs := tobermory.o
snd-soc-lowland-objs := lowland.o
snd-soc-littlemill-objs := littlemill.o
snd-soc-bells-objs := bells.o
+snd-soc-odroidx2-max98090-objs := odroidx2_max98090.o
obj-$(CONFIG_SND_SOC_SAMSUNG_JIVE_WM8750) += snd-soc-jive-wm8750.o
obj-$(CONFIG_SND_SOC_SAMSUNG_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o
@@ -69,3 +70,4 @@ obj-$(CONFIG_SND_SOC_TOBERMORY) += snd-soc-tobermory.o
obj-$(CONFIG_SND_SOC_LOWLAND) += snd-soc-lowland.o
obj-$(CONFIG_SND_SOC_LITTLEMILL) += snd-soc-littlemill.o
obj-$(CONFIG_SND_SOC_BELLS) += snd-soc-bells.o
+obj-$(CONFIG_SND_SOC_ODROIDX2) += snd-soc-odroidx2-max98090.o
diff --git a/sound/soc/samsung/odroidx2_max98090.c
b/sound/soc/samsung/odroidx2_max98090.c
new file mode 100644
index 000..278edf9
--- /dev/null
+++ b/sound/soc/samsung/odroidx2_max98090.c
@@ -0,0 +1,177 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include linux/of.h
+#include linux/module.h
+#include sound/soc.h
+#include sound/pcm_params.h
+#include i2s.h
+
+struct odroidx2_drv_data {
+ const struct snd_soc_dapm_widget *dapm_widgets;
+ unsigned int num_dapm_widgets;
+};
+
+/* The I2S CDCLK output clock frequency for the MAX98090 codec */
+#define MAX98090_MCLK 1920
+
+static int odroidx2_late_probe(struct snd_soc_card *card)
+{
+ struct snd_soc_dai *codec_dai = card-rtd[0].codec_dai;
+ struct snd_soc_dai *cpu_dai = card-rtd[0].cpu_dai;
+ int ret;
+
+ ret = snd_soc_dai_set_sysclk(codec_dai, 0, MAX98090_MCLK,
+ SND_SOC_CLOCK_IN);
+ if (ret 0)
+ return ret;
+
+ /* Set the cpu DAI configuration in order to use CDCLK */
+ return snd_soc_dai_set_sysclk(cpu_dai, SAMSUNG_I2S_CDCLK,
+ 0, SND_SOC_CLOCK_OUT);
+}
+
+static const struct snd_soc_dapm_widget odroidx2_dapm_widgets[] = {
+ SND_SOC_DAPM_HP(Headphone Jack, NULL),
+ SND_SOC_DAPM_MIC(Mic Jack, NULL),
+ SND_SOC_DAPM_MIC(DMIC, NULL),
+};
+
+static const struct snd_soc_dapm_widget odroidu3_dapm_widgets[] = {
+ SND_SOC_DAPM_HP(Headphone Jack, NULL),
+ SND_SOC_DAPM_SPK(Speakers, NULL),
+};
+
+static struct snd_soc_dai_link odroidx2_dai[] = {
+ {
+ .name = MAX98090,
+ .stream_name= MAX98090 PCM,
+ .codec_dai_name = HiFi,
+ .dai_fmt= SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
+ SND_SOC_DAIFMT_CBM_CFM,
+ }
+};
+
+static struct snd_soc_card odroidx2 = {
+ .owner = THIS_MODULE,
+ .dai_link = odroidx2_dai,
+ .num_links = ARRAY_SIZE(odroidx2_dai),
+ .fully_routed = true,
+ .late_probe = odroidx2_late_probe,
+};
+
+struct odroidx2_drv_data odroidx2_drvdata = {
+ .dapm_widgets = odroidx2_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(odroidx2_dapm_widgets),
+};
+
+struct odroidx2_drv_data odroidu3_drvdata = {
+ .dapm_widgets =
Re: [PATCH v6 22/23] rtc: Add driver for Maxim 77802 PMIC Real-Time-Clock
Hello Krzysztof, On 07/04/2014 03:11 PM, Krzysztof Kozlowski wrote: On pią, 2014-07-04 at 14:52 +0200, Javier Martinez Canillas wrote: Hello Krzysztof, Thanks a lot for your feedback. On 07/04/2014 01:56 PM, Krzysztof Kozlowski wrote: On pią, 2014-07-04 at 11:55 +0200, Javier Martinez Canillas wrote: The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms. This patch adds support for the RTC and is based on a driver added by Simon Glass to the Chrome OS kernel 3.8 tree. Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk --- Changes since v5: None Changes since v4: None Changes since v3: None --- drivers/rtc/Kconfig| 10 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-max77802.c | 637 + 3 files changed, 648 insertions(+) create mode 100644 drivers/rtc/rtc-max77802.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index a672dd1..243ac72 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -288,6 +288,16 @@ config RTC_DRV_MAX77686 This driver can also be built as a module. If so, the module will be called rtc-max77686. +config RTC_DRV_MAX77802 + tristate Maxim 77802 RTC + depends on MFD_MAX77686 + help + If you say yes here you will get support for the + RTC of Maxim MAX77802 PMIC. + + This driver can also be built as a module. If so, the module + will be called rtc-max77802. + config RTC_DRV_RS5C372 tristate Ricoh R2025S/D, RS5C372A/B, RV5C386, RV5C387A help diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 70347d0..247de78 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -81,6 +81,7 @@ obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o obj-$(CONFIG_RTC_DRV_MAX8997)+= rtc-max8997.o obj-$(CONFIG_RTC_DRV_MAX6902)+= rtc-max6902.o obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o +obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o obj-$(CONFIG_RTC_DRV_MC13XXX)+= rtc-mc13xxx.o obj-$(CONFIG_RTC_DRV_MCP795) += rtc-mcp795.o obj-$(CONFIG_RTC_DRV_MSM6242)+= rtc-msm6242.o diff --git a/drivers/rtc/rtc-max77802.c b/drivers/rtc/rtc-max77802.c new file mode 100644 index 000..2f4fc2e --- /dev/null +++ b/drivers/rtc/rtc-max77802.c @@ -0,0 +1,637 @@ +/* + * RTC driver for Maxim MAX77802 + * + * Copyright (C) 2013 Google, Inc + * + * Copyright (C) 2012 Samsung Electronics Co.Ltd + * + * based on rtc-max8997.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include linux/slab.h +#include linux/rtc.h +#include linux/delay.h +#include linux/mutex.h +#include linux/module.h +#include linux/platform_device.h +#include linux/mfd/max77686-private.h +#include linux/irqdomain.h +#include linux/regmap.h + +/* RTC Control Register */ +#define BCD_EN_SHIFT 0 +#define BCD_EN_MASK (1 BCD_EN_SHIFT) +#define MODEL24_SHIFT1 +#define MODEL24_MASK (1 MODEL24_SHIFT) +/* RTC Update Register1 */ +#define RTC_UDR_SHIFT0 +#define RTC_UDR_MASK (1 RTC_UDR_SHIFT) +#define RTC_RBUDR_SHIFT 4 +#define RTC_RBUDR_MASK (1 RTC_RBUDR_SHIFT) +/* WTSR and SMPL Register */ +#define WTSRT_SHIFT 0 +#define SMPLT_SHIFT 2 +#define WTSR_EN_SHIFT6 +#define SMPL_EN_SHIFT7 +#define WTSRT_MASK (3 WTSRT_SHIFT) +#define SMPLT_MASK (3 SMPLT_SHIFT) +#define WTSR_EN_MASK (1 WTSR_EN_SHIFT) +#define SMPL_EN_MASK (1 SMPL_EN_SHIFT) +/* RTC Hour register */ +#define HOUR_PM_SHIFT6 +#define HOUR_PM_MASK (1 HOUR_PM_SHIFT) +/* RTC Alarm Enable */ +#define ALARM_ENABLE_SHIFT 7 +#define ALARM_ENABLE_MASK(1 ALARM_ENABLE_SHIFT) + +/* For the RTCAE1 register, we write this value to enable the alarm */ +#define ALARM_ENABLE_VALUE 0x77 + +#define MAX77802_RTC_UPDATE_DELAY_US 200 +#undef MAX77802_RTC_WTSR_SMPL Hmmm... I am not sure what is the purpose of this undef. It disables some functions below. I saw same code in 77686 RTC driver but this does not help me :). If this is on purpose can you add a comment explaining the purpose/cause? This is a left over from when a combined 77686/802 driver was attempted since as you said the 77686 RTC driver does the same. I just checked MAX77802 data
[PATCH] ASoC: samsung: Correct I2S DAI suspend/resume ops
We should save/restore relevant I2S registers regardless of
the dai-active flag, otherwise some settings are being lost
after system suspend/resume cycle. E.g. I2S slave mode set only
during dai initialization is not preserved and the device ends
up in master mode after system resume.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
sound/soc/samsung/i2s.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 2ac76fa..5f9b255 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -920,11 +920,9 @@ static int i2s_suspend(struct snd_soc_dai *dai)
{
struct i2s_dai *i2s = to_info(dai);
- if (dai-active) {
- i2s-suspend_i2smod = readl(i2s-addr + I2SMOD);
- i2s-suspend_i2scon = readl(i2s-addr + I2SCON);
- i2s-suspend_i2spsr = readl(i2s-addr + I2SPSR);
- }
+ i2s-suspend_i2smod = readl(i2s-addr + I2SMOD);
+ i2s-suspend_i2scon = readl(i2s-addr + I2SCON);
+ i2s-suspend_i2spsr = readl(i2s-addr + I2SPSR);
return 0;
}
@@ -933,11 +931,9 @@ static int i2s_resume(struct snd_soc_dai *dai)
{
struct i2s_dai *i2s = to_info(dai);
- if (dai-active) {
- writel(i2s-suspend_i2scon, i2s-addr + I2SCON);
- writel(i2s-suspend_i2smod, i2s-addr + I2SMOD);
- writel(i2s-suspend_i2spsr, i2s-addr + I2SPSR);
- }
+ writel(i2s-suspend_i2scon, i2s-addr + I2SCON);
+ writel(i2s-suspend_i2smod, i2s-addr + I2SMOD);
+ writel(i2s-suspend_i2spsr, i2s-addr + I2SPSR);
return 0;
}
--
1.7.9.5
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Hello dear,
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[RFC PATCH 1/2] phy: core: Fix of_phy_provider_lookup to return PHY provider for sub node
Fixed of_phy_provider_lookup to return 'phy_provider' if _of_phy_get
passes the node pointer of the sub-node of phy provider node. This is
needed when phy provider implements multiple PHYs and each PHY is
modelled as the sub-node of PHY provider device node.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/phy/phy-core.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index c64a2f3..a4a1f783 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -86,10 +86,18 @@ static struct phy *phy_lookup(struct device *device, const
char *port)
static struct phy_provider *of_phy_provider_lookup(struct device_node *node)
{
struct phy_provider *phy_provider;
+ struct device_node *child;
list_for_each_entry(phy_provider, phy_provider_list, list) {
- if (phy_provider-dev-of_node == node)
+ if (phy_provider-dev-of_node != node) {
+ for_each_child_of_node(phy_provider-dev-of_node,
+ child) {
+ if (child == node)
+ return phy_provider;
+ }
+ } else {
return phy_provider;
+ }
}
return ERR_PTR(-EPROBE_DEFER);
--
1.7.9.5
--
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[RFC PATCH 2/2] phy: core: the node pointer of PHY need not be the same as that of PHY provider
In case of multi-phy PHY providers, each PHY should be modeled as a sub
node of the PHY provider. Then each PHY will have a different node pointer
(node pointer of sub node) than that of PHY provider. Added this provision
in the PHY core.
Also fixed all drivers to use the updated API.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/phy.txt | 10 ++
drivers/phy/phy-bcm-kona-usb2.c |2 +-
drivers/phy/phy-core.c | 25 ++---
drivers/phy/phy-exynos-dp-video.c |2 +-
drivers/phy/phy-exynos-mipi-video.c |2 +-
drivers/phy/phy-exynos5-usbdrd.c|3 ++-
drivers/phy/phy-exynos5250-sata.c |2 +-
drivers/phy/phy-mvebu-sata.c|2 +-
drivers/phy/phy-omap-usb2.c |2 +-
drivers/phy/phy-samsung-usb2.c |3 ++-
drivers/phy/phy-sun4i-usb.c |2 +-
drivers/phy/phy-ti-pipe3.c |2 +-
drivers/phy/phy-twl4030-usb.c |2 +-
drivers/phy/phy-xgene.c |2 +-
include/linux/phy/phy.h | 15 ++-
15 files changed, 48 insertions(+), 28 deletions(-)
diff --git a/Documentation/phy.txt b/Documentation/phy.txt
index ebff6ee..c6594af 100644
--- a/Documentation/phy.txt
+++ b/Documentation/phy.txt
@@ -53,10 +53,12 @@ unregister the PHY.
The PHY driver should create the PHY in order for other peripheral controllers
to make use of it. The PHY framework provides 2 APIs to create the PHY.
-struct phy *phy_create(struct device *dev, const struct phy_ops *ops,
-struct phy_init_data *init_data);
-struct phy *devm_phy_create(struct device *dev, const struct phy_ops *ops,
- struct phy_init_data *init_data);
+struct phy *phy_create(struct device *dev, struct device_node *node,
+ const struct phy_ops *ops,
+ struct phy_init_data *init_data);
+struct phy *devm_phy_create(struct device *dev, struct device_node *node,
+ const struct phy_ops *ops,
+ struct phy_init_data *init_data);
The PHY drivers can use one of the above 2 APIs to create the PHY by passing
the device pointer, phy ops and init_data.
diff --git a/drivers/phy/phy-bcm-kona-usb2.c b/drivers/phy/phy-bcm-kona-usb2.c
index e94f5a6..894fe74 100644
--- a/drivers/phy/phy-bcm-kona-usb2.c
+++ b/drivers/phy/phy-bcm-kona-usb2.c
@@ -117,7 +117,7 @@ static int bcm_kona_usb2_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, phy);
- gphy = devm_phy_create(dev, ops, NULL);
+ gphy = devm_phy_create(dev, NULL, ops, NULL);
if (IS_ERR(gphy))
return PTR_ERR(gphy);
diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index a4a1f783..9ad6691 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -406,13 +406,20 @@ struct phy *of_phy_simple_xlate(struct device *dev,
struct of_phandle_args
struct phy *phy;
struct class_dev_iter iter;
struct device_node *node = dev-of_node;
+ struct device_node *child;
class_dev_iter_init(iter, phy_class, NULL, NULL);
while ((dev = class_dev_iter_next(iter))) {
phy = to_phy(dev);
- if (node != phy-dev.of_node)
+ if (node != phy-dev.of_node) {
+ for_each_child_of_node(node, child) {
+ if (child == phy-dev.of_node)
+ goto phy_found;
+ }
continue;
+ }
+phy_found:
class_dev_iter_exit(iter);
return phy;
}
@@ -570,13 +577,15 @@ EXPORT_SYMBOL_GPL(devm_of_phy_get);
/**
* phy_create() - create a new phy
* @dev: device that is creating the new phy
+ * @node: device node of the phy
* @ops: function pointers for performing phy operations
* @init_data: contains the list of PHY consumers or NULL
*
* Called to create a phy using phy framework.
*/
-struct phy *phy_create(struct device *dev, const struct phy_ops *ops,
- struct phy_init_data *init_data)
+struct phy *phy_create(struct device *dev, struct device_node *node,
+ const struct phy_ops *ops,
+ struct phy_init_data *init_data)
{
int ret;
int id;
@@ -601,7 +610,7 @@ struct phy *phy_create(struct device *dev, const struct
phy_ops *ops,
phy-dev.class = phy_class;
phy-dev.parent = dev;
- phy-dev.of_node = dev-of_node;
+ phy-dev.of_node = node?node:dev-of_node;
phy-id = id;
phy-ops = ops;
phy-init_data = init_data;
@@ -633,6 +642,7 @@ EXPORT_SYMBOL_GPL(phy_create);
/**
* devm_phy_create() - create a new phy
* @dev: device that is creating the new phy
+ * @node: device node of the phy
* @ops: function pointers for performing phy operations
* @init_data: contains the list of PHY consumers or NULL
*
@@ -641,8 +651,9 @@
[RFC PATCH 0/2] phy: core: better support for multi-phy in phy-core
In multi-phy PHY providers, each PHY should be modeled as sub-node of PHY provider. So it makes sense for the controller node to have the phandle for the sub-node instead of the PHY-provider node in the 'phy' property. This patch series added support so that the controller node can have the phandle to the sub-node. So if the phy specifier does not have any other fields other than the phandle (and the PHY driver uses the default xlate), phy_get will return the correct PHY. However if the phy_sepcifier has other fields and the PHY driver provides its own xlate, the PHY driver can use the *phy-dev.of_node*. (note that now phy-dev.of_node will have the node pointer of the sub-node). Kishon Vijay Abraham I (2): phy: core: Fix of_phy_provider_lookup to return PHY provider for sub node phy: core: the node pointer of PHY need not be the same as that of PHY provider Documentation/phy.txt | 10 ++ drivers/phy/phy-bcm-kona-usb2.c |2 +- drivers/phy/phy-core.c | 35 +++ drivers/phy/phy-exynos-dp-video.c |2 +- drivers/phy/phy-exynos-mipi-video.c |2 +- drivers/phy/phy-exynos5-usbdrd.c|3 ++- drivers/phy/phy-exynos5250-sata.c |2 +- drivers/phy/phy-mvebu-sata.c|2 +- drivers/phy/phy-omap-usb2.c |2 +- drivers/phy/phy-samsung-usb2.c |3 ++- drivers/phy/phy-sun4i-usb.c |2 +- drivers/phy/phy-ti-pipe3.c |2 +- drivers/phy/phy-twl4030-usb.c |2 +- drivers/phy/phy-xgene.c |2 +- include/linux/phy/phy.h | 15 ++- 15 files changed, 57 insertions(+), 29 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/19] ARM: SAMSUNG: S5PV210 platform clean-up
This huge series is a (hopefully final) attempt to convert Samsung S5PV210 into a DT-only and multiplatform-aware platform. It consists of several steps to gradually replace legacy code with one meeting current standards and then finally remove unused remnants. Patches 1-6 migrate the platform to fully use the Common Clock Framework and get rid of legacy private clock code, of which s5pv210 was the last user. Then patch 7 adds generic PHY driver for USB PHY on S5PV210 to allow USB to be supported when using DT. Further three patches (8-10) add DT support for mach-s5pv210 and necessary DT sources for currently supported boards. Patch 11 removes board files and code directly related to them, effectively making s5pv210 a DT-only platform. In next step, patches 12-15 prepare remaining code for multiplatform enablement, which is finally done in patch 16. Patches 17-19 are a final clean-up, which remove a lot of unused code left after making the last S5P platform DT-only. Build tested patch by patch on following configs: - s3c2410_defconfig (with DT support enabled), - s3c6400_defconfig (with DT support enabled), - s5pv210_defconfig (with DT support enabled after patches adding it), - exynos_defconfig, - exynos_defconfig with S5PV210 enabled in multiplatform configuration. Boot tested on s5pv210-goni board. Note that support for smdkc110, smdkv210 and torbreck boards is provided by moving data from existing board files to new device tree sources. No testing was performed due to mentioned board not being available anymore. However I believe we agreed on this approach, because apparently there are no active users of them. See the RFC from August 2013 asking for removal of the whole platform [1]. [1] http://www.mail-archive.com/linux-samsung-soc%40vger.kernel.org/msg21882.html Mateusz Krawczuk (6): clk: samsung: Add clock driver for S5PV210 and compatible SoCs ARM: s5pv210: Migrate clock handling to Common Clock Framework phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver ARM: s5pv210: Add board file for boot using Device Tree ARM: Samsung: DT: Add Device tree for s5pv210 ARM: Samsung: DT: Add Device tree for S5PC110/S5PV210 Boards Tomasz Figa (13): cpufreq: s3c24xx: Remove some dead code serial: samsung: Remove support for legacy clock code ARM: SAMSUNG: Remove legacy clock code clk: samsung: Add S5PV210 Audio Subsystem clock driver ARM: S5PV210: Remove support for board files ARM: S5PV210: Untie PM support from legacy code ARM: s5pv210: move debug-macro.S into the common space ARM: s5pv210: Register cpufreq platform device cpufreq: s5pv210: Make the driver multiplatform aware ARM: s5pv210: Enable multi-platform build support gpio: samsung: Remove legacy support of S5PV210 ARM: SAMSUNG: Remove remaining legacy code clk: samsung: s5pv210: Remove legacy board support .../bindings/clock/clk-s5pv210-audss.txt | 53 + .../bindings/clock/samsung,s5pv210-clock.txt | 78 ++ .../devicetree/bindings/phy/samsung-phy.txt|1 + arch/arm/Kconfig | 22 +- arch/arm/Kconfig.debug | 12 +- arch/arm/Makefile |4 +- arch/arm/boot/dts/Makefile |5 + arch/arm/boot/dts/s5pv210-aquila.dts | 392 ++ arch/arm/boot/dts/s5pv210-goni.dts | 449 +++ arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 839 arch/arm/boot/dts/s5pv210-smdkc110.dts | 78 ++ arch/arm/boot/dts/s5pv210-smdkv210.dts | 238 arch/arm/boot/dts/s5pv210-torbreck.dts | 92 ++ arch/arm/boot/dts/s5pv210.dtsi | 633 + arch/arm/include/debug/s5pv210.S | 34 + arch/arm/mach-exynos/pm.c |1 - arch/arm/mach-s3c24xx/common.c |2 - arch/arm/mach-s3c24xx/iotiming-s3c2412.c |1 - arch/arm/mach-s3c24xx/mach-h1940.c |5 +- arch/arm/mach-s3c24xx/mach-jive.c |1 - arch/arm/mach-s3c24xx/mach-smdk2413.c |1 - arch/arm/mach-s3c24xx/mach-smdk2416.c |1 - arch/arm/mach-s3c24xx/mach-smdk2443.c |1 - arch/arm/mach-s3c24xx/mach-vstms.c |1 - arch/arm/mach-s3c24xx/s3c2410.c|6 - arch/arm/mach-s3c24xx/s3c2412.c|6 - arch/arm/mach-s3c24xx/s3c2442.c|1 - arch/arm/mach-s3c24xx/s3c244x.c|6 - arch/arm/mach-s3c64xx/mach-anw6410.c |1 - arch/arm/mach-s3c64xx/mach-crag6410.c |1 - arch/arm/mach-s3c64xx/mach-hmt.c |1 - arch/arm/mach-s3c64xx/mach-ncp.c |1 - arch/arm/mach-s3c64xx/mach-smartq.c|1 - arch/arm/mach-s3c64xx/mach-smdk6400.c |1 -
Re: several messages
Hi Nicolas,
On Fri, Jul 4, 2014 at 9:43 AM, Nicolas Pitre nicolas.pi...@linaro.org wrote:
On Fri, 4 Jul 2014, Abhilash Kesavan wrote:
Hi Nicolas,
On Fri, Jul 4, 2014 at 12:30 AM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Thu, 3 Jul 2014, Abhilash Kesavan wrote:
Hi Nicolas,
On Thu, Jul 3, 2014 at 9:15 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Thu, 3 Jul 2014, Abhilash Kesavan wrote:
On Thu, Jul 3, 2014 at 6:59 PM, Nicolas Pitre
nicolas.pi...@linaro.org wrote:
Please, let's avoid going that route. There is no such special
handling
needed if the API is sufficient. And the provided API allows you to
suspend a CPU or shut it down. It shouldn't matter at that level if
this is due to a cluster switch or a hotplug event. Do you really
need
something else?
No, just one local flag for suspend should be enough for me. Will
remove these.
[...]
Changes in v5:
- Removed the MCPM flags and just used a local flag to
indicate that we are suspending.
[...]
-static void exynos_power_down(void)
+static void exynos_mcpm_power_down(u64 residency)
{
unsigned int mpidr, cpu, cluster;
bool last_man = false, skip_wfi = false;
@@ -150,7 +153,12 @@ static void exynos_power_down(void)
BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
cpu_use_count[cpu][cluster]--;
if (cpu_use_count[cpu][cluster] == 0) {
- exynos_cpu_power_down(cpunr);
+ /*
+ * Bypass power down for CPU0 during suspend. This is
being
+ * taken care by the SYS_PWR_CFG bit in
CORE0_SYS_PWR_REG.
+ */
+ if ((cpunr != 0) || (residency != S5P_CHECK_SLEEP))
+ exynos_cpu_power_down(cpunr);
if (exynos_cluster_unused(cluster)) {
exynos_cluster_power_down(cluster);
@@ -209,6 +217,11 @@ static void exynos_power_down(void)
/* Not dead at this point? Let our caller cope. */
}
+static void exynos_power_down(void)
+{
+ exynos_mcpm_power_down(0);
+}
[...]
+static int notrace exynos_mcpm_cpu_suspend(unsigned long arg)
+{
+ /* MCPM works with HW CPU identifiers */
+ unsigned int mpidr = read_cpuid_mpidr();
+ unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
+ unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+
+ __raw_writel(0x0, sysram_base_addr + EXYNOS5420_CPU_STATE);
+
+ mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume);
+
+ /*
+ * Pass S5P_CHECK_SLEEP flag to the MCPM back-end to indicate
that
+ * we are suspending the system and need to skip CPU0 power down.
+ */
+ mcpm_cpu_suspend(S5P_CHECK_SLEEP);
NAK.
When I say local flag with local meaning, I don't want you to smuggle
that flag through a public interface either. I find it rather inelegant
to have the notion of special handling for CPU0 being spread around like
that.
If CPU0 is special, then it should be dealth with in one place only,
ideally in the MCPM backend, so the rest of the kernel doesn't have to
care.
Again, here's what I mean:
static void exynos_mcpm_down_handler(int flags)
{
[...]
if ((cpunr != 0) || !(flags SKIP_CPU_POWERDOWN_IF_CPU0))
exynos_cpu_power_down(cpunr);
[...]
}
static void exynos_mcpm_power_down()
{
exynos_mcpm_down_handler(0);
}
static void exynos_mcpm_suspend(u64 residency)
{
/*
* Theresidency argument is ignored for now.
* However, in the CPU suspend case, we bypass power down for
* CPU0 as this is being taken care by the SYS_PWR_CFG bit in
* CORE0_SYS_PWR_REG.
*/
exynos_mcpm_down_handler(SKIP_CPU_POWERDOWN_IF_CPU0);
}
And SKIP_CPU_POWERDOWN_IF_CPU0 is defined in and visible to
mcpm-exynos.c only.
Sorry if I am being dense, but the exynos_mcpm_suspend function would
get called from both the bL cpuidle driver as well the exynos pm code.
What is that exynos pm code actually doing?
exynos pm code is shared across Exynos4 and 5 SoCs. It primarily does
a series of register configurations which are required to put the
system to sleep (some parts of these are SoC specific and others
common). It also populates the suspend_ops for exynos. In the current
patch, exynos_suspend_enter() is where I have plugged in the
mcpm_cpu_suspend call.
This patch is based on the S2R series for 5420
(http://comments.gmane.org/gmane.linux.kernel.samsung-soc/33898), you
may also have a look at that for a clearer picture.
We want to skip CPU0 only in case of the S2R case i.e. the pm code and
keep the CPU0 power down code for all other cases including CPUIdle.
OK. If so
[PATCH 00/19] ARM: SAMSUNG: S5PV210 platform clean-up
This huge series is a (hopefully final) attempt to convert Samsung S5PV210 into a DT-only and multiplatform-aware platform. It consists of several steps to gradually replace legacy code with one meeting current standards and then finally remove unused remnants. Patches 1-6 migrate the platform to fully use the Common Clock Framework and get rid of legacy private clock code, of which s5pv210 was the last user. Then patch 7 adds generic PHY driver for USB PHY on S5PV210 to allow USB to be supported when using DT. Further three patches (8-10) add DT support for mach-s5pv210 and necessary DT sources for currently supported boards. Patch 11 removes board files and code directly related to them, effectively making s5pv210 a DT-only platform. In next step, patches 12-15 prepare remaining code for multiplatform enablement, which is finally done in patch 16. Patches 17-19 are a final clean-up, which remove a lot of unused code left after making the last S5P platform DT-only. Build tested patch by patch on following configs: - s3c2410_defconfig (with DT support enabled), - s3c6400_defconfig (with DT support enabled), - s5pv210_defconfig (with DT support enabled after patches adding it), - exynos_defconfig, - exynos_defconfig with S5PV210 enabled in multiplatform configuration. Boot tested on s5pv210-goni board. Note that support for smdkc110, smdkv210 and torbreck boards is provided by moving data from existing board files to new device tree sources. No testing was performed due to mentioned board not being available anymore. However I believe we agreed on this approach, because apparently there are no active users of them. See the RFC from August 2013 asking for removal of the whole platform [1]. [1] http://www.mail-archive.com/linux-samsung-soc%40vger.kernel.org/msg21882.html Mateusz Krawczuk (6): clk: samsung: Add clock driver for S5PV210 and compatible SoCs ARM: s5pv210: Migrate clock handling to Common Clock Framework phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver ARM: s5pv210: Add board file for boot using Device Tree ARM: Samsung: DT: Add Device tree for s5pv210 ARM: Samsung: DT: Add Device tree for S5PC110/S5PV210 Boards Tomasz Figa (13): cpufreq: s3c24xx: Remove some dead code serial: samsung: Remove support for legacy clock code ARM: SAMSUNG: Remove legacy clock code clk: samsung: Add S5PV210 Audio Subsystem clock driver ARM: S5PV210: Remove support for board files ARM: S5PV210: Untie PM support from legacy code ARM: s5pv210: move debug-macro.S into the common space ARM: s5pv210: Register cpufreq platform device cpufreq: s5pv210: Make the driver multiplatform aware ARM: s5pv210: Enable multi-platform build support gpio: samsung: Remove legacy support of S5PV210 ARM: SAMSUNG: Remove remaining legacy code clk: samsung: s5pv210: Remove legacy board support .../bindings/clock/clk-s5pv210-audss.txt | 53 + .../bindings/clock/samsung,s5pv210-clock.txt | 78 ++ .../devicetree/bindings/phy/samsung-phy.txt|1 + arch/arm/Kconfig | 22 +- arch/arm/Kconfig.debug | 12 +- arch/arm/Makefile |4 +- arch/arm/boot/dts/Makefile |5 + arch/arm/boot/dts/s5pv210-aquila.dts | 392 ++ arch/arm/boot/dts/s5pv210-goni.dts | 449 +++ arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 839 arch/arm/boot/dts/s5pv210-smdkc110.dts | 78 ++ arch/arm/boot/dts/s5pv210-smdkv210.dts | 238 arch/arm/boot/dts/s5pv210-torbreck.dts | 92 ++ arch/arm/boot/dts/s5pv210.dtsi | 633 + arch/arm/include/debug/s5pv210.S | 34 + arch/arm/mach-exynos/pm.c |1 - arch/arm/mach-s3c24xx/common.c |2 - arch/arm/mach-s3c24xx/iotiming-s3c2412.c |1 - arch/arm/mach-s3c24xx/mach-h1940.c |5 +- arch/arm/mach-s3c24xx/mach-jive.c |1 - arch/arm/mach-s3c24xx/mach-smdk2413.c |1 - arch/arm/mach-s3c24xx/mach-smdk2416.c |1 - arch/arm/mach-s3c24xx/mach-smdk2443.c |1 - arch/arm/mach-s3c24xx/mach-vstms.c |1 - arch/arm/mach-s3c24xx/s3c2410.c|6 - arch/arm/mach-s3c24xx/s3c2412.c|6 - arch/arm/mach-s3c24xx/s3c2442.c|1 - arch/arm/mach-s3c24xx/s3c244x.c|6 - arch/arm/mach-s3c64xx/mach-anw6410.c |1 - arch/arm/mach-s3c64xx/mach-crag6410.c |1 - arch/arm/mach-s3c64xx/mach-hmt.c |1 - arch/arm/mach-s3c64xx/mach-ncp.c |1 - arch/arm/mach-s3c64xx/mach-smartq.c|1 - arch/arm/mach-s3c64xx/mach-smdk6400.c |1 -
[PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
Changes in v2:
- Made use of the MCPM suspend/powered_up call-backs
Changes in v3:
- Used the residency value to indicate the entered state
Changes in v4:
- Checked if MCPM has been enabled to prevent build error
Changes in v5:
- Removed the MCPM flags and just used a local flag to
indicate that we are suspending.
Changes in v6:
- Read the SYS_PWR_REG value to decide if we are suspending
the system.
- Restore the SYS_PWR_REG value post-resume.
- Modified the comments to reflect the first change.
This has been tested both on an SMDK5420 and Peach Pit Chromebook on
next-20140704. Nicolas' boot cluster CCI enablement patches are in
linux-next now.
Here are the dependencies (some of these patches did not apply cleanly):
1) Cleanup patches for mach-exynos
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/33772
2) PMU cleanup and refactoring for using DT
https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg671625.html
3) Exynos5420 PMU/S2R Series
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/33898
4) Exynos5420 CPUIdle Series which populates MCPM suspend/powered_up
call-backs.
www.gossamer-threads.com/lists/linux/kernel/1945347
https://patchwork.kernel.org/patch/4357461/
5) Exynos5420 MCPM cluster power down support
http://www.spinics.net/lists/arm-kernel/msg339988.html
6) TPM reset mask patch
http://www.spinics.net/lists/arm-kernel/msg341884.html
arch/arm/mach-exynos/mcpm-exynos.c | 55 ++--
arch/arm/mach-exynos/pm.c | 42 +--
2 files changed, 80 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c
b/arch/arm/mach-exynos/mcpm-exynos.c
index 2dd51cc..26670e7 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -15,6 +15,7 @@
#include linux/delay.h
#include linux/io.h
#include linux/of_address.h
+#include linux/syscore_ops.h
#include asm/cputype.h
#include asm/cp15.h
@@ -30,6 +31,8 @@
#define EXYNOS5420_USE_ARM_CORE_DOWN_STATE BIT(29)
#define EXYNOS5420_USE_L2_COMMON_UP_STATE BIT(30)
+static void __iomem *ns_sram_base_addr;
+
/*
* The common v7_exit_coherency_flush API could not be used because of the
* Erratum 799270 workaround. This macro is the same as the common one (in
@@ -129,11 +132,11 @@ static int exynos_power_up(unsigned int cpu, unsigned int
cluster)
* and can only be executed on processors like A15 and A7 that hit the cache
* with the C bit clear in the SCTLR register.
*/
-static void exynos_power_down(void)
+static void exynos_mcpm_power_down(u64 residency)
{
unsigned int mpidr, cpu, cluster;
bool last_man = false, skip_wfi = false;
- unsigned int cpunr;
+ unsigned int cpunr, temp;
mpidr = read_cpuid_mpidr();
cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
@@ -150,7 +153,15 @@ static void exynos_power_down(void)
BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
cpu_use_count[cpu][cluster]--;
if (cpu_use_count[cpu][cluster] == 0) {
- exynos_cpu_power_down(cpunr);
+ /*
+* Bypass power down for CPU0 during suspend. Check for
+* the SYS_PWR_REG value to decide if we are suspending
+* the system.
+*/
+ temp = __raw_readl(pmu_base_addr +
+ EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+ if ((cpu != 0) || ((temp S5P_CORE_LOCAL_PWR_EN) != 0))
+ exynos_cpu_power_down(cpunr);
if (exynos_cluster_unused(cluster)) {
exynos_cluster_power_down(cluster);
@@ -209,6 +220,11 @@ static void exynos_power_down(void)
/* Not dead at this point? Let our caller cope. */
}
+static void exynos_power_down(void)
+{
+ exynos_mcpm_power_down(0);
+}
+
static int exynos_wait_for_powerdown(unsigned int cpu, unsigned int cluster)
{
unsigned int tries = 100;
@@ -250,11 +266,11 @@ static void exynos_suspend(u64 residency)
{
unsigned int mpidr, cpunr;
- exynos_power_down();
+ exynos_mcpm_power_down(residency);
/*
* Execution reaches here only if cpu did not power down.
-* Hence roll back the changes done in exynos_power_down function.
+* Hence roll back the changes done in exynos_mcpm_power_down function.
*
* CAUTION: This function requires the stack data to be visible through
* power down and can only be executed on processors like A15 and A7
@@ -319,10 +335,26 @@ static const struct of_device_id exynos_dt_mcpm_match[] =
{
{},
};
+static void exynos_mcpm_setup_entry_point(void)
+{
+ /*
+* U-Boot SPL
[PATCH 00/19] ARM: SAMSUNG: S5PV210 platform clean-up
This huge series is a (hopefully final) attempt to convert Samsung S5PV210 into a DT-only and multiplatform-aware platform. It consists of several steps to gradually replace legacy code with one meeting current standards and then finally remove unused remnants. Patches 1-6 migrate the platform to fully use the Common Clock Framework and get rid of legacy private clock code, of which s5pv210 was the last user. Then patch 7 adds generic PHY driver for USB PHY on S5PV210 to allow USB to be supported when using DT. Further three patches (8-10) add DT support for mach-s5pv210 and necessary DT sources for currently supported boards. Patch 11 removes board files and code directly related to them, effectively making s5pv210 a DT-only platform. In next step, patches 12-15 prepare remaining code for multiplatform enablement, which is finally done in patch 16. Patches 17-19 are a final clean-up, which remove a lot of unused code left after making the last S5P platform DT-only. Build tested patch by patch on following configs: - s3c2410_defconfig (with DT support enabled), - s3c6400_defconfig (with DT support enabled), - s5pv210_defconfig (with DT support enabled after patches adding it), - exynos_defconfig, - exynos_defconfig with S5PV210 enabled in multiplatform configuration. Boot tested on s5pv210-goni board. Note that support for smdkc110, smdkv210 and torbreck boards is provided by moving data from existing board files to new device tree sources. No testing was performed due to mentioned board not being available anymore. However I believe we agreed on this approach, because apparently there are no active users of them. See the RFC from August 2013 asking for removal of the whole platform [1]. [1] http://www.mail-archive.com/linux-samsung-soc%40vger.kernel.org/msg21882.html Mateusz Krawczuk (6): clk: samsung: Add clock driver for S5PV210 and compatible SoCs ARM: s5pv210: Migrate clock handling to Common Clock Framework phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver ARM: s5pv210: Add board file for boot using Device Tree ARM: Samsung: DT: Add Device tree for s5pv210 ARM: Samsung: DT: Add Device tree for S5PC110/S5PV210 Boards Tomasz Figa (13): cpufreq: s3c24xx: Remove some dead code serial: samsung: Remove support for legacy clock code ARM: SAMSUNG: Remove legacy clock code clk: samsung: Add S5PV210 Audio Subsystem clock driver ARM: S5PV210: Remove support for board files ARM: S5PV210: Untie PM support from legacy code ARM: s5pv210: move debug-macro.S into the common space ARM: s5pv210: Register cpufreq platform device cpufreq: s5pv210: Make the driver multiplatform aware ARM: s5pv210: Enable multi-platform build support gpio: samsung: Remove legacy support of S5PV210 ARM: SAMSUNG: Remove remaining legacy code clk: samsung: s5pv210: Remove legacy board support .../bindings/clock/clk-s5pv210-audss.txt | 53 + .../bindings/clock/samsung,s5pv210-clock.txt | 78 ++ .../devicetree/bindings/phy/samsung-phy.txt|1 + arch/arm/Kconfig | 22 +- arch/arm/Kconfig.debug | 12 +- arch/arm/Makefile |4 +- arch/arm/boot/dts/Makefile |5 + arch/arm/boot/dts/s5pv210-aquila.dts | 392 ++ arch/arm/boot/dts/s5pv210-goni.dts | 449 +++ arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 839 arch/arm/boot/dts/s5pv210-smdkc110.dts | 78 ++ arch/arm/boot/dts/s5pv210-smdkv210.dts | 238 arch/arm/boot/dts/s5pv210-torbreck.dts | 92 ++ arch/arm/boot/dts/s5pv210.dtsi | 633 + arch/arm/include/debug/s5pv210.S | 34 + arch/arm/mach-exynos/pm.c |1 - arch/arm/mach-s3c24xx/common.c |2 - arch/arm/mach-s3c24xx/iotiming-s3c2412.c |1 - arch/arm/mach-s3c24xx/mach-h1940.c |5 +- arch/arm/mach-s3c24xx/mach-jive.c |1 - arch/arm/mach-s3c24xx/mach-smdk2413.c |1 - arch/arm/mach-s3c24xx/mach-smdk2416.c |1 - arch/arm/mach-s3c24xx/mach-smdk2443.c |1 - arch/arm/mach-s3c24xx/mach-vstms.c |1 - arch/arm/mach-s3c24xx/s3c2410.c|6 - arch/arm/mach-s3c24xx/s3c2412.c|6 - arch/arm/mach-s3c24xx/s3c2442.c|1 - arch/arm/mach-s3c24xx/s3c244x.c|6 - arch/arm/mach-s3c64xx/mach-anw6410.c |1 - arch/arm/mach-s3c64xx/mach-crag6410.c |1 - arch/arm/mach-s3c64xx/mach-hmt.c |1 - arch/arm/mach-s3c64xx/mach-ncp.c |1 - arch/arm/mach-s3c64xx/mach-smartq.c|1 - arch/arm/mach-s3c64xx/mach-smdk6400.c |1 -
[PATCH 17/19] gpio: samsung: Remove legacy support of S5PV210
GPIO support of S5PV210 SoC is now fully handled by pinctrl-samsung
driver making the old code in gpio-samsung driver unused. This patch
removes it which will also let us remove more code from arch subtree.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Alexandre Courbot gnu...@gmail.com
Cc: linux-g...@vger.kernel.org
---
drivers/gpio/gpio-samsung.c | 240
1 file changed, 240 deletions(-)
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index 7d4281e..27298fd 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -1169,234 +1169,9 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = {
#endif
};
-/*
- * Followings are the gpio banks in S5PV210/S5PC110
- *
- * The 'config' member when left to NULL, is initialized to the default
- * structure samsung_gpio_cfgs[3] in the init function below.
- *
- * The 'base' member is also initialized in the init function below.
- * Note: The initialization of 'base' member of samsung_gpio_chip structure
- * uses the above macro and depends on the banks being listed in order here.
- */
-
-static struct samsung_gpio_chip s5pv210_gpios_4bit[] = {
-#ifdef CONFIG_CPU_S5PV210
- {
- .chip = {
- .base = S5PV210_GPA0(0),
- .ngpio = S5PV210_GPIO_A0_NR,
- .label = GPA0,
- },
- }, {
- .chip = {
- .base = S5PV210_GPA1(0),
- .ngpio = S5PV210_GPIO_A1_NR,
- .label = GPA1,
- },
- }, {
- .chip = {
- .base = S5PV210_GPB(0),
- .ngpio = S5PV210_GPIO_B_NR,
- .label = GPB,
- },
- }, {
- .chip = {
- .base = S5PV210_GPC0(0),
- .ngpio = S5PV210_GPIO_C0_NR,
- .label = GPC0,
- },
- }, {
- .chip = {
- .base = S5PV210_GPC1(0),
- .ngpio = S5PV210_GPIO_C1_NR,
- .label = GPC1,
- },
- }, {
- .chip = {
- .base = S5PV210_GPD0(0),
- .ngpio = S5PV210_GPIO_D0_NR,
- .label = GPD0,
- },
- }, {
- .chip = {
- .base = S5PV210_GPD1(0),
- .ngpio = S5PV210_GPIO_D1_NR,
- .label = GPD1,
- },
- }, {
- .chip = {
- .base = S5PV210_GPE0(0),
- .ngpio = S5PV210_GPIO_E0_NR,
- .label = GPE0,
- },
- }, {
- .chip = {
- .base = S5PV210_GPE1(0),
- .ngpio = S5PV210_GPIO_E1_NR,
- .label = GPE1,
- },
- }, {
- .chip = {
- .base = S5PV210_GPF0(0),
- .ngpio = S5PV210_GPIO_F0_NR,
- .label = GPF0,
- },
- }, {
- .chip = {
- .base = S5PV210_GPF1(0),
- .ngpio = S5PV210_GPIO_F1_NR,
- .label = GPF1,
- },
- }, {
- .chip = {
- .base = S5PV210_GPF2(0),
- .ngpio = S5PV210_GPIO_F2_NR,
- .label = GPF2,
- },
- }, {
- .chip = {
- .base = S5PV210_GPF3(0),
- .ngpio = S5PV210_GPIO_F3_NR,
- .label = GPF3,
- },
- }, {
- .chip = {
- .base = S5PV210_GPG0(0),
- .ngpio = S5PV210_GPIO_G0_NR,
- .label = GPG0,
- },
- }, {
- .chip = {
- .base = S5PV210_GPG1(0),
- .ngpio = S5PV210_GPIO_G1_NR,
- .label = GPG1,
- },
- }, {
- .chip = {
- .base = S5PV210_GPG2(0),
- .ngpio = S5PV210_GPIO_G2_NR,
- .label = GPG2,
- },
- }, {
- .chip = {
- .base = S5PV210_GPG3(0),
- .ngpio = S5PV210_GPIO_G3_NR,
- .label = GPG3,
- },
- }, {
- .chip = {
- .base = S5PV210_GPI(0),
- .ngpio = S5PV210_GPIO_I_NR,
- .label = GPI,
- },
- }, {
- .chip = {
-
[PATCH 04/19] serial: samsung: Remove support for legacy clock code
All Samsung platforms are now using the Common Clock Framework and the legacy clock code is being removed, so remove related dead code from samsung-serial driver as well. Reported-by: Arnd Bergmann a...@arndb.de Signed-off-by: Tomasz Figa t.f...@samsung.com Cc: Greg Kroah-Hartman gre...@linuxfoundation.org (maintainer:SERIAL DRIVERS) Cc: Jiri Slaby jsl...@suse.cz (supporter:TTY LAYER) Cc: linux-ser...@vger.kernel.org (open list:SERIAL DRIVERS) --- drivers/tty/serial/samsung.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index 36c7747..cae8ebd 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c @@ -47,10 +47,6 @@ #include asm/irq.h -#ifdef CONFIG_SAMSUNG_CLOCK -#include plat/clock.h -#endif - #include samsung.h #ifdefined(CONFIG_SERIAL_SAMSUNG_DEBUG) \ -- 1.9.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 16/19] ARM: s5pv210: Enable multi-platform build support
This makes it possible to enable the s5pv210 platform as part of a multiplatform kernel. Also redundant Kconfig options are removed. Signed-off-by: Tomasz Figa t.f...@samsung.com --- arch/arm/Kconfig| 23 ++- arch/arm/Makefile | 4 ++-- arch/arm/mach-s5pv210/Kconfig | 36 arch/arm/mach-s5pv210/Makefile | 7 +++ arch/arm/mach-s5pv210/Makefile.boot | 2 -- arch/arm/plat-samsung/Makefile | 1 - arch/arm/plat-samsung/cpu.c | 2 +- 7 files changed, 24 insertions(+), 51 deletions(-) delete mode 100644 arch/arm/mach-s5pv210/Makefile.boot diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c0c1c3f..756711f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -758,26 +758,6 @@ config ARCH_S3C64XX help Samsung S3C64XX series based systems -config ARCH_S5PV210 - bool Samsung S5PV210/S5PC110 - select ARCH_HAS_HOLES_MEMORYMODEL - select ARCH_SPARSEMEM_ENABLE - select ATAGS - select CLKDEV_LOOKUP - select CLKSRC_SAMSUNG_PWM - select COMMON_CLK_SAMSUNG - select CPU_V7 - select GENERIC_CLOCKEVENTS - select GPIO_SAMSUNG - select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG - select HAVE_S3C_RTC if RTC_CLASS - select NEED_MACH_GPIO_H - select NEED_MACH_MEMORY_H - select SAMSUNG_ATAGS - help - Samsung S5PV210/S5PC110 series based systems - config ARCH_DAVINCI bool TI DaVinci select ARCH_HAS_HOLES_MEMORYMODEL @@ -1515,7 +1495,8 @@ config ARM_PSCI config ARCH_NR_GPIO int default 1024 if ARCH_SHMOBILE || ARCH_TEGRA - default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX + default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \ + SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 default 416 if ARCH_SUNXI default 392 if ARCH_U8500 default 352 if ARCH_VT8500 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index d3f470c..c133061 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -210,11 +210,11 @@ machine-$(CONFIG_PLAT_SPEAR) += spear plat-$(CONFIG_ARCH_EXYNOS) += samsung plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_ARCH_S3C64XX)+= samsung +plat-$(CONFIG_ARCH_S5PV210)+= samsung plat-$(CONFIG_PLAT_IOP)+= iop plat-$(CONFIG_PLAT_ORION) += orion plat-$(CONFIG_PLAT_PXA)+= pxa plat-$(CONFIG_PLAT_S3C24XX)+= samsung -plat-$(CONFIG_PLAT_S5P)+= samsung plat-$(CONFIG_PLAT_VERSATILE) += versatile ifeq ($(CONFIG_ARCH_EBSA110),y) @@ -238,7 +238,7 @@ MACHINE := endif machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) -platdirs := $(patsubst %,arch/arm/plat-%/,$(plat-y)) +platdirs := $(patsubst %,arch/arm/plat-%/,$(sort $(plat-y))) ifneq ($(CONFIG_ARCH_MULTIPLATFORM),y) ifeq ($(KBUILD_SRC),) diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index ffc777d..330bfc8 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -7,32 +7,28 @@ # Configuration options for the S5PV210/S5PC110 +config ARCH_S5PV210 + bool Samsung S5PV210/S5PC110 if ARCH_MULTI_V7 + select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_REQUIRE_GPIOLIB + select ARM_VIC + select CLKSRC_SAMSUNG_PWM + select COMMON_CLK_SAMSUNG + select HAVE_S3C2410_I2C if I2C + select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS + select PINCTRL + select PINCTRL_EXYNOS + help + Samsung S5PV210/S5PC110 series based systems + if ARCH_S5PV210 config CPU_S5PV210 - bool + def_bool y select ARM_AMBA select PL330_DMA if DMADEVICES - select S5P_EXT_INT help Enable S5PV210 CPU support -menu S5PV210 Machines - -config MACH_S5PV210_DT - bool Samsung S5PV210/S5PC110 machine using Device Tree - select CLKSRC_OF - select CPU_S5PV210 - select PINCTRL - select PINCTRL_EXYNOS - select USE_OF - help - Machine support for Samsung S5PV210/S5PC110 machines with Device Tree - enabled. - Select this if a fdt blob is available for your S5PV210 SoC based - board. - Note: This is under development and not all peripherals can be - supported with this machine file. -endmenu - endif diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 5308225..7dc2d0e 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -5,6 +5,8 @@ # # Licensed under GPLv2 +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include + obj-y := obj-m
[PATCH 14/19] ARM: s5pv210: Register cpufreq platform device
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-s5pv210/s5pv210.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-s5pv210/s5pv210.c b/arch/arm/mach-s5pv210/s5pv210.c
index 35db1ce..53feff3 100644
--- a/arch/arm/mach-s5pv210/s5pv210.c
+++ b/arch/arm/mach-s5pv210/s5pv210.c
@@ -59,6 +59,7 @@ static void s5pv210_dt_restart(enum reboot_mode mode, const
char *cmd)
static void __init s5pv210_dt_init_late(void)
{
+ platform_device_register_simple(s5pv210-cpufreq, -1, NULL, 0);
s5pv210_pm_init();
}
--
1.9.3
--
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[PATCH 07/19] phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver
From: Mateusz Krawczuk mat.krawc...@gmail.com Add support for the Samsung's S5PV210 SoC to the Exynos USB 2.0 PHY driver. Signed-off-by: Mateusz Krawczuk m.krawc...@partner.samsung.com [k.deb...@samsung.com: cleanup and commit description] [k.deb...@samsung.com: make changes accordingly to the mailing list comments] Signed-off-by: Kamil Debski k.deb...@samsung.com Signed-off-by: Mateusz Krawczuk mat.krawc...@gmail.com [t.figa: rebased, fixed merge errors, neatened] Signed-off-by: Tomasz Figa t.f...@samsung.com Cc: Kishon Vijay Abraham I kis...@ti.com Cc: Mark Rutland mark.rutl...@arm.com Cc: Rob Herring robh...@kernel.org Cc: devicet...@vger.kernel.org --- .../devicetree/bindings/phy/samsung-phy.txt| 1 + drivers/phy/Kconfig| 10 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-s5pv210-usb2.c | 187 + drivers/phy/phy-samsung-usb2.c | 6 + drivers/phy/phy-samsung-usb2.h | 1 + 6 files changed, 206 insertions(+) create mode 100644 drivers/phy/phy-s5pv210-usb2.c diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index 2049261..7dce043 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -26,6 +26,7 @@ Samsung S5P/EXYNOS SoC series USB PHY Required properties: - compatible : should be one of the listed compatibles: + - samsung,s5pv210-usb2-phy - samsung,exynos4210-usb2-phy - samsung,exynos4x12-usb2-phy - samsung,exynos5250-usb2-phy diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 16a2f06..7153361 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -130,6 +130,16 @@ config PHY_SAMSUNG_USB2 particular SoCs has to be enabled in addition to this driver. Number and type of supported phys depends on the SoC. +config PHY_S5PV210_USB2 + bool Support for S5PV210 + depends on PHY_SAMSUNG_USB2 + depends on ARCH_S5PV210 + help + Enable USB PHY support for S5PV210. This option requires that Samsung + USB 2.0 PHY driver is enabled and means that support for this + particular SoC is compiled in the driver. In case of S5PV210 two phys + are available - device and host. + config PHY_EXYNOS4210_USB2 bool Support for Exynos 4210 depends on PHY_SAMSUNG_USB2 diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index b4f1d57..2983808 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -18,5 +18,6 @@ phy-exynos-usb2-y += phy-samsung-usb2.o phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4X12_USB2) += phy-exynos4x12-usb2.o phy-exynos-usb2-$(CONFIG_PHY_EXYNOS5250_USB2) += phy-exynos5250-usb2.o +phy-exynos-usb2-$(CONFIG_PHY_S5PV210_USB2) += phy-s5pv210-usb2.o obj-$(CONFIG_PHY_EXYNOS5_USBDRD) += phy-exynos5-usbdrd.o obj-$(CONFIG_PHY_XGENE)+= phy-xgene.o diff --git a/drivers/phy/phy-s5pv210-usb2.c b/drivers/phy/phy-s5pv210-usb2.c new file mode 100644 index 000..004d320 --- /dev/null +++ b/drivers/phy/phy-s5pv210-usb2.c @@ -0,0 +1,187 @@ +/* + * Samsung SoC USB 1.1/2.0 PHY driver - S5PV210 support + * + * Copyright (C) 2013 Samsung Electronics Co., Ltd. + * Authors: Kamil Debski k.deb...@samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include linux/delay.h +#include linux/io.h +#include linux/phy/phy.h +#include phy-samsung-usb2.h + +/* Exynos USB PHY registers */ + +/* PHY power control */ +#define S5PV210_UPHYPWR0x0 + +#define S5PV210_UPHYPWR_PHY0_SUSPEND BIT(0) +#define S5PV210_UPHYPWR_PHY0_PWR BIT(3) +#define S5PV210_UPHYPWR_PHY0_OTG_PWR BIT(4) +#define S5PV210_UPHYPWR_PHY0 ( \ + S5PV210_UPHYPWR_PHY0_SUSPEND | \ + S5PV210_UPHYPWR_PHY0_PWR | \ + S5PV210_UPHYPWR_PHY0_OTG_PWR) + +#define S5PV210_UPHYPWR_PHY1_SUSPEND BIT(6) +#define S5PV210_UPHYPWR_PHY1_PWR BIT(7) +#define S5PV210_UPHYPWR_PHY1 ( \ + S5PV210_UPHYPWR_PHY1_SUSPEND | \ + S5PV210_UPHYPWR_PHY1_PWR) + +/* PHY clock control */ +#define S5PV210_UPHYCLK0x4 + +#define S5PV210_UPHYCLK_PHYFSEL_MASK (0x3 0) +#define S5PV210_UPHYCLK_PHYFSEL_48MHZ (0x0 0) +#define S5PV210_UPHYCLK_PHYFSEL_24MHZ (0x3 0) +#define S5PV210_UPHYCLK_PHYFSEL_12MHZ (0x2 0) + +#define S5PV210_UPHYCLK_PHY0_ID_PULLUP BIT(2) +#define S5PV210_UPHYCLK_PHY0_COMMON_ON BIT(4) +#define S5PV210_UPHYCLK_PHY1_COMMON_ON BIT(7) + +/* PHY reset control */ +#define S5PV210_UPHYRST0x8 + +#define S5PV210_URSTCON_PHY0 BIT(0) +#define
[PATCH 09/19] ARM: Samsung: DT: Add Device tree for s5pv210
From: Mateusz Krawczuk m.krawc...@partner.samsung.com
Add generic device tree for s5pv210 and s5pv210-pinctrl
Signed-off-by: Mateusz Krawczuk m.krawc...@partner.samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 839 +
arch/arm/boot/dts/s5pv210.dtsi | 633 +
2 files changed, 1472 insertions(+)
create mode 100644 arch/arm/boot/dts/s5pv210-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/s5pv210.dtsi
diff --git a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
new file mode 100644
index 000..8c71408
--- /dev/null
+++ b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
@@ -0,0 +1,839 @@
+/*
+ * Samsung's S5PV210 SoC device tree source
+ *
+ * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
+ *
+ * Mateusz Krawczuk m.krawc...@partner.samsung.com
+ * Tomasz Figa t.f...@samsung.com
+ *
+ * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+pinctrl0 {
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpb: gpb {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd0: gpd0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd1: gpd1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpe0: gpe0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpe1: gpe1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpf0: gpf0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpf1: gpf1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpf2: gpf2 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpf3: gpf3 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpg0: gpg0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpg1: gpg1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpg2: gpg2 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpg3: gpg3 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpj0: gpj0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpj1: gpj1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpj2: gpj2 {
+
[PATCH 18/19] ARM: SAMSUNG: Remove remaining legacy code
After refactoring suspend/resume, which was last part with dependencies on legacy code, all Kconfig symbols related to Samsung ATAGS support can be deselected and more unused code removed. This includes most of s5p-* code as well, as s5pv210 was their last user. Signed-off-by: Tomasz Figa t.f...@samsung.com --- arch/arm/mach-s5pv210/include/mach/dma.h| 26 -- arch/arm/mach-s5pv210/include/mach/gpio.h | 140 -- arch/arm/mach-s5pv210/include/mach/hardware.h | 18 -- arch/arm/mach-s5pv210/include/mach/irqs.h | 137 -- arch/arm/mach-s5pv210/include/mach/map.h| 158 arch/arm/mach-s5pv210/include/mach/memory.h | 27 -- arch/arm/mach-s5pv210/include/mach/pm-core.h| 46 arch/arm/mach-s5pv210/include/mach/regs-clock.h | 2 +- arch/arm/mach-s5pv210/include/mach/regs-gpio.h | 41 --- arch/arm/mach-s5pv210/include/mach/regs-irq.h | 18 -- arch/arm/mach-s5pv210/setup-i2c0.c | 30 --- arch/arm/plat-samsung/Kconfig | 125 + arch/arm/plat-samsung/Makefile | 9 - arch/arm/plat-samsung/cpu.c | 1 - arch/arm/plat-samsung/devs.c| 330 arch/arm/plat-samsung/include/plat/camport.h| 28 -- arch/arm/plat-samsung/include/plat/cpu.h| 12 - arch/arm/plat-samsung/include/plat/devs.h | 42 --- arch/arm/plat-samsung/include/plat/fb-core.h| 15 -- arch/arm/plat-samsung/include/plat/fb.h | 22 -- arch/arm/plat-samsung/include/plat/fimc-core.h | 51 arch/arm/plat-samsung/include/plat/gpio-cfg.h | 64 - arch/arm/plat-samsung/include/plat/hdmi.h | 16 -- arch/arm/plat-samsung/include/plat/irqs.h | 72 -- arch/arm/plat-samsung/include/plat/mfc.h| 35 --- arch/arm/plat-samsung/include/plat/sdhci.h | 47 arch/arm/plat-samsung/include/plat/tv-core.h| 44 arch/arm/plat-samsung/pm-gpio.c | 4 +- arch/arm/plat-samsung/s5p-dev-mfc.c | 81 +- arch/arm/plat-samsung/s5p-dev-uart.c| 88 --- arch/arm/plat-samsung/s5p-irq-eint.c| 221 arch/arm/plat-samsung/s5p-irq-gpioint.c | 218 arch/arm/plat-samsung/s5p-irq-pm.c | 92 --- arch/arm/plat-samsung/s5p-irq.c | 31 --- arch/arm/plat-samsung/s5p-pm.c | 40 --- arch/arm/plat-samsung/s5p-sleep.S | 45 36 files changed, 14 insertions(+), 2362 deletions(-) delete mode 100644 arch/arm/mach-s5pv210/include/mach/dma.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/gpio.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/hardware.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/irqs.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/map.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/memory.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/pm-core.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/regs-gpio.h delete mode 100644 arch/arm/mach-s5pv210/include/mach/regs-irq.h delete mode 100644 arch/arm/mach-s5pv210/setup-i2c0.c delete mode 100644 arch/arm/plat-samsung/include/plat/camport.h delete mode 100644 arch/arm/plat-samsung/include/plat/fimc-core.h delete mode 100644 arch/arm/plat-samsung/include/plat/hdmi.h delete mode 100644 arch/arm/plat-samsung/include/plat/irqs.h delete mode 100644 arch/arm/plat-samsung/include/plat/mfc.h delete mode 100644 arch/arm/plat-samsung/include/plat/tv-core.h delete mode 100644 arch/arm/plat-samsung/s5p-dev-uart.c delete mode 100644 arch/arm/plat-samsung/s5p-irq-eint.c delete mode 100644 arch/arm/plat-samsung/s5p-irq-gpioint.c delete mode 100644 arch/arm/plat-samsung/s5p-irq-pm.c delete mode 100644 arch/arm/plat-samsung/s5p-irq.c delete mode 100644 arch/arm/plat-samsung/s5p-pm.c delete mode 100644 arch/arm/plat-samsung/s5p-sleep.S diff --git a/arch/arm/mach-s5pv210/include/mach/dma.h b/arch/arm/mach-s5pv210/include/mach/dma.h deleted file mode 100644 index 201842a..000 diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h deleted file mode 100644 index 6c8b903..000 diff --git a/arch/arm/mach-s5pv210/include/mach/hardware.h b/arch/arm/mach-s5pv210/include/mach/hardware.h deleted file mode 100644 index fada7a3..000 diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h deleted file mode 100644 index 5e0de3a..000 diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h deleted file mode 100644 index 763929a..000 diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h deleted file mode 100644 index 2d3cfa2..000 diff --git a/arch/arm/mach-s5pv210/include/mach/pm-core.h b/arch/arm/mach-s5pv210/include/mach/pm-core.h deleted file mode 100644
[PATCH 08/19] ARM: s5pv210: Add board file for boot using Device Tree
From: Mateusz Krawczuk m.krawc...@partner.samsung.com
This patch adds board file that will be used to boot S5PV210/S5PC110-based
boards using Device Tree.
Signed-off-by: Mateusz Krawczuk m.krawc...@partner.samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
[t.figa: Rebased and cleaned-up a bit.]
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-s5pv210/Kconfig | 14 +
arch/arm/mach-s5pv210/Makefile | 2 +-
arch/arm/mach-s5pv210/s5pv210.c | 68 +
3 files changed, 83 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-s5pv210/s5pv210.c
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index f60f286..ed492cf 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -194,6 +194,20 @@ config MACH_TORBRECK
help
Machine support for aESOP Torbreck
+config MACH_S5PV210_DT
+ bool Samsung S5PV210/S5PC110 machine using Device Tree
+ select CLKSRC_OF
+ select CPU_S5PV210
+ select PINCTRL
+ select PINCTRL_EXYNOS
+ select USE_OF
+ help
+ Machine support for Samsung S5PV210/S5PC110 machines with Device Tree
+ enabled.
+ Select this if a fdt blob is available for your S5PV210 SoC based
+ board.
+ Note: This is under development and not all peripherals can be
+ supported with this machine file.
endmenu
endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 08358bb..8d87b10 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_GONI) += mach-goni.o
obj-$(CONFIG_MACH_SMDKC110)+= mach-smdkc110.o
obj-$(CONFIG_MACH_SMDKV210)+= mach-smdkv210.o
obj-$(CONFIG_MACH_TORBRECK)+= mach-torbreck.o
-
+obj-$(CONFIG_MACH_S5PV210_DT) += s5pv210.o
# device support
obj-y += dev-audio.o
diff --git a/arch/arm/mach-s5pv210/s5pv210.c b/arch/arm/mach-s5pv210/s5pv210.c
new file mode 100644
index 000..c244ccb
--- /dev/null
+++ b/arch/arm/mach-s5pv210/s5pv210.c
@@ -0,0 +1,68 @@
+/*
+ * Samsung's S5PC110/S5PV210 flattened device tree enabled machine.
+ *
+ * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd.
+ * Mateusz Krawczuk m.krawc...@partner.samsung.com
+ * Tomasz Figa t.f...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/of_fdt.h
+#include linux/of_platform.h
+
+#include asm/mach/arch.h
+#include asm/mach/map.h
+#include asm/system_misc.h
+
+#include plat/map-base.h
+#include mach/regs-clock.h
+
+static int __init s5pv210_fdt_map_sys(unsigned long node, const char *uname,
+ int depth, void *data)
+{
+ struct map_desc iodesc;
+ const __be32 *reg;
+ int len;
+
+ if (!of_flat_dt_is_compatible(node, samsung,s5pv210-clock))
+ return 0;
+
+ reg = of_get_flat_dt_prop(node, reg, len);
+ if (reg == NULL || len != (sizeof(unsigned long) * 2))
+ return 0;
+
+ iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
+ iodesc.length = be32_to_cpu(reg[1]) - 1;
+ iodesc.virtual = (unsigned long)S3C_VA_SYS;
+ iodesc.type = MT_DEVICE;
+ iotable_init(iodesc, 1);
+
+ return 1;
+}
+
+static void __init s5pv210_dt_map_io(void)
+{
+ debug_ll_io_init();
+
+ of_scan_flat_dt(s5pv210_fdt_map_sys, NULL);
+}
+
+static void s5pv210_dt_restart(enum reboot_mode mode, const char *cmd)
+{
+ __raw_writel(0x1, S5P_SWRESET);
+}
+
+static char const *s5pv210_dt_compat[] __initconst = {
+ samsung,s5pc110,
+ samsung,s5pv210,
+ NULL
+};
+
+DT_MACHINE_START(S5PV210_DT, Samsung S5PC110/S5PV210-based board)
+ .dt_compat = s5pv210_dt_compat,
+ .map_io = s5pv210_dt_map_io,
+ .restart = s5pv210_dt_restart,
+MACHINE_END
--
1.9.3
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[PATCH 15/19] cpufreq: s5pv210: Make the driver multiplatform aware
Signed-off-by: Tomasz Figa t.f...@samsung.com
Cc: Rafael J. Wysocki r...@rjwysocki.net
Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: linux...@vger.kernel.org
---
drivers/cpufreq/s5pv210-cpufreq.c | 131 +++---
1 file changed, 122 insertions(+), 9 deletions(-)
diff --git a/drivers/cpufreq/s5pv210-cpufreq.c
b/drivers/cpufreq/s5pv210-cpufreq.c
index 19a10b8..9a68225 100644
--- a/drivers/cpufreq/s5pv210-cpufreq.c
+++ b/drivers/cpufreq/s5pv210-cpufreq.c
@@ -16,11 +16,70 @@
#include linux/clk.h
#include linux/io.h
#include linux/cpufreq.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/platform_device.h
#include linux/reboot.h
#include linux/regulator/consumer.h
-#include mach/map.h
-#include mach/regs-clock.h
+static void __iomem *clk_base;
+static void __iomem *dmc_base[2];
+
+#define S5P_CLKREG(x) (clk_base + (x))
+
+#define S5P_APLL_LOCK S5P_CLKREG(0x00)
+#define S5P_APLL_CON S5P_CLKREG(0x100)
+#define S5P_CLK_SRC0 S5P_CLKREG(0x200)
+#define S5P_CLK_SRC2 S5P_CLKREG(0x208)
+#define S5P_CLK_DIV0 S5P_CLKREG(0x300)
+#define S5P_CLK_DIV2 S5P_CLKREG(0x308)
+#define S5P_CLK_DIV6 S5P_CLKREG(0x318)
+#define S5P_CLKDIV_STAT0 S5P_CLKREG(0x1000)
+#define S5P_CLKDIV_STAT1 S5P_CLKREG(0x1004)
+#define S5P_CLKMUX_STAT0 S5P_CLKREG(0x1100)
+#define S5P_CLKMUX_STAT1 S5P_CLKREG(0x1104)
+
+#define S5P_ARM_MCS_CONS5P_CLKREG(0x6100)
+
+/* CLKSRC0 */
+#define S5P_CLKSRC0_MUX200_SHIFT (16)
+#define S5P_CLKSRC0_MUX200_MASK(0x1
S5P_CLKSRC0_MUX200_SHIFT)
+#define S5P_CLKSRC0_MUX166_MASK(0x120)
+#define S5P_CLKSRC0_MUX133_MASK(0x124)
+
+/* CLKSRC2 */
+#define S5P_CLKSRC2_G3D_SHIFT (0)
+#define S5P_CLKSRC2_G3D_MASK(0x3 S5P_CLKSRC2_G3D_SHIFT)
+#define S5P_CLKSRC2_MFC_SHIFT (4)
+#define S5P_CLKSRC2_MFC_MASK(0x3 S5P_CLKSRC2_MFC_SHIFT)
+
+/* CLKDIV0 */
+#define S5P_CLKDIV0_APLL_SHIFT (0)
+#define S5P_CLKDIV0_APLL_MASK (0x7 S5P_CLKDIV0_APLL_SHIFT)
+#define S5P_CLKDIV0_A2M_SHIFT (4)
+#define S5P_CLKDIV0_A2M_MASK (0x7 S5P_CLKDIV0_A2M_SHIFT)
+#define S5P_CLKDIV0_HCLK200_SHIFT (8)
+#define S5P_CLKDIV0_HCLK200_MASK (0x7 S5P_CLKDIV0_HCLK200_SHIFT)
+#define S5P_CLKDIV0_PCLK100_SHIFT (12)
+#define S5P_CLKDIV0_PCLK100_MASK (0x7 S5P_CLKDIV0_PCLK100_SHIFT)
+#define S5P_CLKDIV0_HCLK166_SHIFT (16)
+#define S5P_CLKDIV0_HCLK166_MASK (0xF S5P_CLKDIV0_HCLK166_SHIFT)
+#define S5P_CLKDIV0_PCLK83_SHIFT (20)
+#define S5P_CLKDIV0_PCLK83_MASK(0x7
S5P_CLKDIV0_PCLK83_SHIFT)
+#define S5P_CLKDIV0_HCLK133_SHIFT (24)
+#define S5P_CLKDIV0_HCLK133_MASK (0xF S5P_CLKDIV0_HCLK133_SHIFT)
+#define S5P_CLKDIV0_PCLK66_SHIFT (28)
+#define S5P_CLKDIV0_PCLK66_MASK(0x7
S5P_CLKDIV0_PCLK66_SHIFT)
+
+/* CLKDIV2 */
+#define S5P_CLKDIV2_G3D_SHIFT (0)
+#define S5P_CLKDIV2_G3D_MASK(0xF S5P_CLKDIV2_G3D_SHIFT)
+#define S5P_CLKDIV2_MFC_SHIFT (4)
+#define S5P_CLKDIV2_MFC_MASK(0xF S5P_CLKDIV2_MFC_SHIFT)
+
+/* CLKDIV6 */
+#define S5P_CLKDIV6_ONEDRAM_SHIFT (28)
+#define S5P_CLKDIV6_ONEDRAM_MASK(0xF S5P_CLKDIV6_ONEDRAM_SHIFT)
static struct clk *dmc0_clk;
static struct clk *dmc1_clk;
@@ -142,9 +201,9 @@ static void s5pv210_set_refresh(enum s5pv210_dmc_port ch,
unsigned long freq)
void __iomem *reg = NULL;
if (ch == DMC0) {
- reg = (S5P_VA_DMC0 + 0x30);
+ reg = (dmc_base[0] + 0x30);
} else if (ch == DMC1) {
- reg = (S5P_VA_DMC1 + 0x30);
+ reg = (dmc_base[1] + 0x30);
} else {
printk(KERN_ERR Cannot find DMC port\n);
return;
@@ -472,7 +531,7 @@ static int __init s5pv210_cpu_init(struct cpufreq_policy
*policy)
* check_mem_type : This driver only support LPDDR LPDDR2.
* other memory type is not supported.
*/
- mem_type = check_mem_type(S5P_VA_DMC0);
+ mem_type = check_mem_type(dmc_base[0]);
if ((mem_type != LPDDR) (mem_type != LPDDR2)) {
printk(KERN_ERR CPUFreq doesn't support this memory type\n);
@@ -481,10 +540,10 @@ static int __init s5pv210_cpu_init(struct cpufreq_policy
*policy)
}
/* Find current refresh counter and frequency each DMC */
- s5pv210_dram_conf[0].refresh = (__raw_readl(S5P_VA_DMC0 + 0x30) * 1000);
+ s5pv210_dram_conf[0].refresh = (__raw_readl(dmc_base[0] + 0x30) * 1000);
s5pv210_dram_conf[0].freq = clk_get_rate(dmc0_clk);
- s5pv210_dram_conf[1].refresh = (__raw_readl(S5P_VA_DMC1 + 0x30) * 1000);
+ s5pv210_dram_conf[1].refresh = (__raw_readl(dmc_base[1] + 0x30) * 1000);
s5pv210_dram_conf[1].freq = clk_get_rate(dmc1_clk);
policy-suspend_freq = SLEEP_FREQ;
@@
[PATCH 02/19] ARM: s5pv210: Migrate clock handling to Common Clock Framework
From: Mateusz Krawczuk m.krawc...@partner.samsung.com
This patch migrates the s5pv210 platform to use new clock driver
using Common Clock Framework.
Signed-off-by: Mateusz Krawczuk m.krawc...@partner.samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
[t.figa: Rebased and fixed merge conflicts.]
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-s5pv210/Kconfig | 9 +
arch/arm/mach-s5pv210/Makefile| 4 ++--
arch/arm/mach-s5pv210/common.c| 16
arch/arm/mach-s5pv210/common.h| 9 +
arch/arm/mach-s5pv210/mach-goni.c | 2 +-
arch/arm/mach-s5pv210/mach-smdkv210.c | 2 +-
arch/arm/plat-samsung/Kconfig | 2 +-
7 files changed, 39 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index f60f286..60785ce 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -13,6 +13,7 @@ config CPU_S5PV210
bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
+ select S5P_CLOCK if !COMMON_CLK
select S5P_EXT_INT
select S5P_PM if PM
select S5P_SLEEP if PM
@@ -70,6 +71,14 @@ config S5PV210_SETUP_USB_PHY
help
Common setup code for USB PHY controller
+config COMMON_CLK_S5PV210
+ bool Common Clock Framework support
+ default y
+ select COMMON_CLK_SAMSUNG
+ help
+ Enable this option to use new clock driver
+ based on Common Clock Framework.
+
menu S5PC110 Machines
config MACH_AQUILA
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 1c4e419..d1a493a 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -12,8 +12,8 @@ obj- :=
# Core
-obj-y += common.o clock.o
-
+obj-y += common.o
+obj-$(CONFIG_S5P_CLOCK)+= clock.o
obj-$(CONFIG_PM) += pm.o
obj-y += dma.o
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 7024dcd..2e2202a 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -25,6 +25,7 @@
#include linux/dma-mapping.h
#include linux/serial_core.h
#include linux/serial_s3c.h
+#include linux/of.h
#include asm/proc-fns.h
#include asm/mach/arch.h
@@ -35,7 +36,13 @@
#include mach/regs-clock.h
#include plat/cpu.h
+
+#ifdef CONFIG_S5P_CLOCK
#include plat/clock.h
+#else
+#include linux/clk-provider.h
+#endif
+
#include plat/devs.h
#include plat/sdhci.h
#include plat/adc-core.h
@@ -50,6 +57,9 @@
#include common.h
+/* External clock frequency */
+static unsigned long xusbxti_f;
+
static const char name_s5pv210[] = S5PV210/S5PC110;
static struct cpu_table cpu_ids[] __initdata = {
@@ -229,18 +239,24 @@ void __init s5pv210_map_io(void)
void __init s5pv210_init_clocks(int xtal)
{
+#ifdef CONFIG_S5P_CLOCK
printk(KERN_DEBUG %s: initializing clocks\n, __func__);
s3c24xx_register_baseclocks(xtal);
s5p_register_clocks(xtal);
s5pv210_register_clocks();
s5pv210_setup_clocks();
+#else
+ xusbxti_f = xtal;
+#endif
}
void __init s5pv210_init_irq(void)
{
u32 vic[4]; /* S5PV210 supports 4 VIC */
+ s5pv210_clk_init(0, xusbxti_f, S3C_VA_SYS);
+
/* All the VICs are fully populated. */
vic[0] = ~0;
vic[1] = ~0;
diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h
index fe1beb5..a2e85cb 100644
--- a/arch/arm/mach-s5pv210/common.h
+++ b/arch/arm/mach-s5pv210/common.h
@@ -14,6 +14,15 @@
#include linux/reboot.h
+#ifdef CONFIG_COMMON_CLK_S5PV210
+void s5pv210_clk_init(unsigned long xxti_f, unsigned long xusbxti_f,
+ void __iomem *reg_base);
+#else
+static inline void s5pv210_clk_init(unsigned long xxti_f,
+ unsigned long xusbxti_f,
+ void __iomem *reg_base) {}
+#endif
+
void s5pv210_init_io(struct map_desc *mach_desc, int size);
void s5pv210_init_irq(void);
diff --git a/arch/arm/mach-s5pv210/mach-goni.c
b/arch/arm/mach-s5pv210/mach-goni.c
index c1ce921..0fc71be 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -849,7 +849,7 @@ static void __init goni_sound_init(void)
static void __init goni_map_io(void)
{
s5pv210_init_io(NULL, 0);
- s3c24xx_init_clocks(clk_xusbxti.rate);
+ s3c24xx_init_clocks(2400);
s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
}
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c
b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 2a6655f..1bde3a3 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -285,7 +285,7 @@ static struct platform_pwm_backlight_data
[PATCH 13/19] ARM: s5pv210: move debug-macro.S into the common space
Move debug-macro.S from mach/include to include/debug where all other common debug macros are. Signed-off-by: Tomasz Figa t.f...@samsung.com --- arch/arm/Kconfig.debug | 12 +-- arch/arm/include/debug/s5pv210.S | 34 arch/arm/mach-s5pv210/include/mach/debug-macro.S | 41 3 files changed, 44 insertions(+), 43 deletions(-) create mode 100644 arch/arm/include/debug/s5pv210.S delete mode 100644 arch/arm/mach-s5pv210/include/mach/debug-macro.S diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 8f90595..c2bcfcf 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -617,6 +617,7 @@ choice depends on PLAT_SAMSUNG select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_S3C24XX_UART if ARCH_S3C24XX + select DEBUG_S5PV210_UART if ARCH_S5PV210 bool Use S3C UART 0 for low-level debug help Say Y here if you want the debug print routines to direct @@ -630,6 +631,7 @@ choice depends on PLAT_SAMSUNG select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_S3C24XX_UART if ARCH_S3C24XX + select DEBUG_S5PV210_UART if ARCH_S5PV210 bool Use S3C UART 1 for low-level debug help Say Y here if you want the debug print routines to direct @@ -643,6 +645,7 @@ choice depends on PLAT_SAMSUNG select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_S3C24XX_UART if ARCH_S3C24XX + select DEBUG_S5PV210_UART if ARCH_S5PV210 bool Use S3C UART 2 for low-level debug help Say Y here if you want the debug print routines to direct @@ -653,8 +656,9 @@ choice by CONFIG_S3C_LOWLEVEL_UART_PORT. config DEBUG_S3C_UART3 - depends on PLAT_SAMSUNG ARCH_EXYNOS - select DEBUG_EXYNOS_UART + depends on PLAT_SAMSUNG (ARCH_EXYNOS || ARCH_S5PV210) + select DEBUG_EXYNOS_UART if ARCH_EXYNOS + select DEBUG_S5PV210_UART if ARCH_S5PV210 bool Use S3C UART 3 for low-level debug help Say Y here if you want the debug print routines to direct @@ -949,6 +953,9 @@ config DEBUG_S3C2410_UART config DEBUG_S3C24XX_UART bool +config DEBUG_S5PV210_UART + bool + config DEBUG_OMAP2PLUS_UART bool depends on ARCH_OMAP2PLUS @@ -1009,6 +1016,7 @@ config DEBUG_LL_INCLUDE default debug/msm.S if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM default debug/omap2plus.S if DEBUG_OMAP2PLUS_UART default debug/s3c24xx.S if DEBUG_S3C24XX_UART + default debug/s5pv210.S if DEBUG_S5PV210_UART default debug/sirf.S if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 default debug/sti.S if DEBUG_STI_UART default debug/tegra.S if DEBUG_TEGRA_UART diff --git a/arch/arm/include/debug/s5pv210.S b/arch/arm/include/debug/s5pv210.S new file mode 100644 index 000..4f1a73e --- /dev/null +++ b/arch/arm/include/debug/s5pv210.S @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* pull in the relevant register and map files. */ + +#define S3C_ADDR_BASE 0xF600 +#define S3C_VA_UARTS3C_ADDR_BASE + 0x0100 +#define S5PV210_PA_UART0xe290 + + /* note, for the boot process to work we have to keep the UART +* virtual address aligned to an 1MiB boundary for the L1 +* mapping the head code makes. We keep the UART virtual address +* aligned and add in the offset when we load the value here. +*/ + + .macro addruart, rp, rv, tmp + ldr \rp, =S5PV210_PA_UART + ldr \rv, =S3C_VA_UART +#if CONFIG_DEBUG_S3C_UART != 0 + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) +#endif + .endm + +#define fifo_full fifo_full_s5pv210 +#define fifo_level fifo_level_s5pv210 + +#include debug/samsung.S diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S deleted file mode 100644 index 30b511a..000 -- 1.9.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 11/19] ARM: S5PV210: Remove support for board files
Since all in-tree boards have been moved to device tree, we can now drop legacy code and make mach-s5pv210 DT-only. This patch does it. Signed-off-by: Tomasz Figa t.f...@samsung.com --- arch/arm/mach-s5pv210/Kconfig| 173 -- arch/arm/mach-s5pv210/Makefile | 19 - arch/arm/mach-s5pv210/common.c | 281 -- arch/arm/mach-s5pv210/common.h | 17 - arch/arm/mach-s5pv210/dev-audio.c| 246 - arch/arm/mach-s5pv210/dma.c | 130 - arch/arm/mach-s5pv210/mach-aquila.c | 687 --- arch/arm/mach-s5pv210/mach-goni.c| 915 --- arch/arm/mach-s5pv210/mach-smdkc110.c| 159 -- arch/arm/mach-s5pv210/mach-smdkv210.c| 336 arch/arm/mach-s5pv210/mach-torbreck.c| 135 - arch/arm/mach-s5pv210/pm.c | 24 +- arch/arm/mach-s5pv210/setup-fb-24bpp.c | 49 -- arch/arm/mach-s5pv210/setup-fimc.c | 43 -- arch/arm/mach-s5pv210/setup-i2c0.c | 6 +- arch/arm/mach-s5pv210/setup-i2c1.c | 28 - arch/arm/mach-s5pv210/setup-i2c2.c | 28 - arch/arm/mach-s5pv210/setup-ide.c| 39 -- arch/arm/mach-s5pv210/setup-keypad.c | 24 - arch/arm/mach-s5pv210/setup-sdhci-gpio.c | 103 arch/arm/mach-s5pv210/setup-spi.c| 34 -- arch/arm/mach-s5pv210/setup-usb-phy.c| 95 arch/arm/plat-samsung/include/plat/cpu.h | 1 - 23 files changed, 8 insertions(+), 3564 deletions(-) delete mode 100644 arch/arm/mach-s5pv210/common.c delete mode 100644 arch/arm/mach-s5pv210/dev-audio.c delete mode 100644 arch/arm/mach-s5pv210/dma.c delete mode 100644 arch/arm/mach-s5pv210/mach-aquila.c delete mode 100644 arch/arm/mach-s5pv210/mach-goni.c delete mode 100644 arch/arm/mach-s5pv210/mach-smdkc110.c delete mode 100644 arch/arm/mach-s5pv210/mach-smdkv210.c delete mode 100644 arch/arm/mach-s5pv210/mach-torbreck.c delete mode 100644 arch/arm/mach-s5pv210/setup-fb-24bpp.c delete mode 100644 arch/arm/mach-s5pv210/setup-fimc.c delete mode 100644 arch/arm/mach-s5pv210/setup-i2c1.c delete mode 100644 arch/arm/mach-s5pv210/setup-i2c2.c delete mode 100644 arch/arm/mach-s5pv210/setup-ide.c delete mode 100644 arch/arm/mach-s5pv210/setup-keypad.c delete mode 100644 arch/arm/mach-s5pv210/setup-sdhci-gpio.c delete mode 100644 arch/arm/mach-s5pv210/setup-spi.c delete mode 100644 arch/arm/mach-s5pv210/setup-usb-phy.c diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index ed492cf..d6d0f92 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -19,181 +19,8 @@ config CPU_S5PV210 help Enable S5PV210 CPU support -config S5PV210_SETUP_I2C1 - bool - help - Common setup code for i2c bus 1. - -config S5PV210_SETUP_I2C2 - bool - help - Common setup code for i2c bus 2. - -config S5PV210_SETUP_IDE - bool - help - Common setup code for S5PV210 IDE GPIO configurations - -config S5PV210_SETUP_FB_24BPP - bool - help - Common setup code for S5PV210 with an 24bpp RGB display helper. - -config S5PV210_SETUP_KEYPAD - bool - help - Common setup code for keypad. - -config S5PV210_SETUP_SDHCI -bool -select S5PV210_SETUP_SDHCI_GPIO -help - Internal helper functions for S5PV210 based SDHCI systems - -config S5PV210_SETUP_SDHCI_GPIO - bool - help - Common setup code for SDHCI gpio. - -config S5PV210_SETUP_FIMC - bool - help - Common setup code for the camera interfaces. - -config S5PV210_SETUP_SPI - bool - help - Common setup code for SPI GPIO configurations. - -config S5PV210_SETUP_USB_PHY - bool - help - Common setup code for USB PHY controller - -menu S5PC110 Machines - -config MACH_AQUILA - bool Aquila - select CPU_S5PV210 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_SDHCI - select S5PV210_SETUP_USB_PHY - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_ONENAND - help - Machine support for the Samsung Aquila target based on S5PC110 SoC - -config MACH_GONI - bool GONI - select CPU_S5PV210 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S3C_DEV_USB_HSOTG - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_FIMC - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_KEYPAD - select S5PV210_SETUP_SDHCI - select S5PV210_SETUP_USB_PHY - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 -
[PATCH 19/19] clk: samsung: s5pv210: Remove legacy board support
Since there is no more support for board files, this patch removes
legacy non-DT support from the clock driver as well, including
unnecessary clkdev aliases.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Cc: Mike Turquette mturque...@linaro.org
---
drivers/clk/samsung/clk-s5pv210.c | 122 +-
1 file changed, 1 insertion(+), 121 deletions(-)
diff --git a/drivers/clk/samsung/clk-s5pv210.c
b/drivers/clk/samsung/clk-s5pv210.c
index 509779a..d270a20 100644
--- a/drivers/clk/samsung/clk-s5pv210.c
+++ b/drivers/clk/samsung/clk-s5pv210.c
@@ -503,15 +503,6 @@ static struct samsung_mux_clock s5p6442_mux_clks[]
__initdata = {
MUX(MOUT_CLKSEL, mout_clksel, mout_clksel_6442_p, CLK_OUT, 12, 5),
};
-/*
- * Common fixed rate clocks generated outside the SoC.
- * NOTE: Needed only to support legacy board files.
- */
-static struct samsung_fixed_rate_clock ext_clks[] __initdata = {
- [xxti] = FRATE(0, xxti, NULL, CLK_IS_ROOT, 0),
- [xusbxti] = FRATE(0, xusbxti, NULL, CLK_IS_ROOT, 0),
-};
-
/* S5PV210-specific fixed rate clocks generated inside the SoC. */
static struct samsung_fixed_rate_clock s5pv210_frate_clks[] __initdata = {
FRATE(SCLK_HDMI27M, sclk_hdmi27m, NULL, CLK_IS_ROOT, 2700),
@@ -758,103 +749,10 @@ static struct samsung_gate_clock s5p6442_gate_clks[]
__initdata = {
* NOTE: Needed only to support legacy board files.
*/
static struct samsung_clock_alias s5pv210_aliases[] = {
- ALIAS(CLK_FIMC0, s5pv210-fimc.0, fimc),
- ALIAS(CLK_FIMC1, s5pv210-fimc.1, fimc),
- ALIAS(CLK_FIMC2, s5pv210-fimc.2, fimc),
- ALIAS(SCLK_FIMC0, s5pv210-fimc.0, sclk_fimc),
- ALIAS(SCLK_FIMC1, s5pv210-fimc.1, sclk_fimc),
- ALIAS(SCLK_FIMC2, s5pv210-fimc.2, sclk_fimc),
ALIAS(DOUT_APLL, NULL, armclk),
ALIAS(DOUT_HCLKM, NULL, hclk_msys),
ALIAS(MOUT_DMC0, NULL, sclk_dmc0),
- ALIAS(CLK_UART0, s5pv210-uart.0, uart),
- ALIAS(CLK_UART1, s5pv210-uart.1, uart),
- ALIAS(CLK_UART2, s5pv210-uart.2, uart),
- ALIAS(CLK_UART3, s5pv210-uart.3, uart),
- ALIAS(CLK_UART0, s5pv210-uart.0, clk_uart_baud0),
- ALIAS(CLK_UART1, s5pv210-uart.1, clk_uart_baud0),
- ALIAS(CLK_UART2, s5pv210-uart.2, clk_uart_baud0),
- ALIAS(CLK_UART3, s5pv210-uart.3, clk_uart_baud0),
- ALIAS(SCLK_UART0, s5pv210-uart.0, clk_uart_baud1),
- ALIAS(SCLK_UART1, s5pv210-uart.1, clk_uart_baud1),
- ALIAS(SCLK_UART2, s5pv210-uart.2, clk_uart_baud1),
- ALIAS(SCLK_UART3, s5pv210-uart.3, clk_uart_baud1),
- ALIAS(CLK_HSMMC0, s3c-sdhci.0, hsmmc),
- ALIAS(CLK_HSMMC1, s3c-sdhci.1, hsmmc),
- ALIAS(CLK_HSMMC2, s3c-sdhci.2, hsmmc),
- ALIAS(CLK_HSMMC3, s3c-sdhci.3, hsmmc),
- ALIAS(CLK_HSMMC0, s3c-sdhci.0, mmc_busclk.0),
- ALIAS(CLK_HSMMC1, s3c-sdhci.1, mmc_busclk.0),
- ALIAS(CLK_HSMMC2, s3c-sdhci.2, mmc_busclk.0),
- ALIAS(CLK_HSMMC3, s3c-sdhci.3, mmc_busclk.0),
- ALIAS(SCLK_MMC0, s3c-sdhci.0, mmc_busclk.2),
- ALIAS(SCLK_MMC1, s3c-sdhci.1, mmc_busclk.2),
- ALIAS(SCLK_MMC2, s3c-sdhci.2, mmc_busclk.2),
- ALIAS(SCLK_MMC3, s3c-sdhci.3, mmc_busclk.2),
- ALIAS(CLK_SPI0, s5pv210-spi.0, spi_busclk0),
- ALIAS(CLK_SPI1, s5pv210-spi.1, spi_busclk0),
- ALIAS(SCLK_SPI0, s5pv210-spi.0, spi_busclk1),
- ALIAS(SCLK_SPI1, s5pv210-spi.1, spi_busclk1),
- ALIAS(CLK_PDMA0, dma-pl330.0, apb_pclk),
- ALIAS(CLK_PDMA1, dma-pl330.1, apb_pclk),
- ALIAS(CLK_PWM, NULL, timers),
- ALIAS(CLK_NANDXL, s5pc110-onenand, gate),
- ALIAS(CLK_JPEG, NULL, jpeg),
- ALIAS(CLK_MFC, s5p-mfc, mfc),
- ALIAS(CLK_TVENC, s5p-sdo, dac),
- ALIAS(CLK_MIXER, s5p-mixer, mixer),
- ALIAS(CLK_VP, s5p-mixer, vp),
- ALIAS(CLK_HDMI, s5p-hdmi, hdmi),
- ALIAS(SCLK_HDMI, s5p-hdmi, hdmiphy),
- ALIAS(SCLK_DAC, NULL, sclk_dac),
- ALIAS(CLK_USB_OTG, NULL, usbotg),
- ALIAS(CLK_USB_OTG, NULL, otg),
- ALIAS(CLK_USB_HOST, NULL, usb-host),
- ALIAS(CLK_USB_HOST, NULL, usbhost),
- ALIAS(CLK_FIMD, s5pv210-fb, lcd),
- ALIAS(CLK_CFCON, s5pv210-pata.0, cfcon),
- ALIAS(CLK_WDT, NULL, watchdog),
- ALIAS(CLK_RTC, NULL, rtc),
- ALIAS(CLK_I2C0, s3c2440-i2c.0, i2c),
- ALIAS(CLK_I2C1, s3c2440-i2c.1, i2c),
- ALIAS(CLK_I2C2, s3c2440-i2c.2, i2c),
- ALIAS(CLK_I2C_HDMI_PHY, s3c2440-hdmiphy-i2c, i2c),
- ALIAS(CLK_TSADC, NULL, adc),
- ALIAS(CLK_KEYIF, s5pv210-keypad, keypad),
- ALIAS(CLK_I2S0, samsung-i2s.0, iis),
- ALIAS(CLK_I2S1, samsung-i2s.1, iis),
- ALIAS(CLK_I2S2, samsung-i2s.2, iis),
- ALIAS(CLK_SPDIF, NULL, spdif),
- ALIAS(SCLK_AUDIO0, soc-audio.0, sclk_audio),
- ALIAS(SCLK_AUDIO1, soc-audio.1, sclk_audio),
- ALIAS(SCLK_AUDIO2, soc-audio.2, sclk_audio),
- ALIAS(CLK_MFC, s5p-mfc, sclk_mfc),
- ALIAS(SCLK_CAM0, sclk_cam0, sclk_cam0),
- ALIAS(SCLK_CAM1, sclk_cam1, sclk_cam1),
-
[PATCH 12/19] ARM: S5PV210: Untie PM support from legacy code
This patch makes S5PV210 not rely on legacy suspend helpers in
plat-samsung and implements platform suspend logic locally, similarly to
Exynos.
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/mach-s5pv210/Kconfig | 2 -
arch/arm/mach-s5pv210/Makefile | 2 +-
arch/arm/mach-s5pv210/common.h | 7 +++
arch/arm/mach-s5pv210/pm.c | 101 +++-
arch/arm/mach-s5pv210/s5pv210.c | 8
arch/arm/mach-s5pv210/sleep.S | 36 ++
6 files changed, 141 insertions(+), 15 deletions(-)
create mode 100644 arch/arm/mach-s5pv210/sleep.S
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index d6d0f92..ffc777d 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -14,8 +14,6 @@ config CPU_S5PV210
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_EXT_INT
- select S5P_PM if PM
- select S5P_SLEEP if PM
help
Enable S5PV210 CPU support
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 83993fc..5308225 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -12,7 +12,7 @@ obj- :=
# Core
-obj-$(CONFIG_PM) += pm.o
+obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o
# machine support
diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h
index 0b694c7..2ad387c 100644
--- a/arch/arm/mach-s5pv210/common.h
+++ b/arch/arm/mach-s5pv210/common.h
@@ -12,5 +12,12 @@
#ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H
#define __ARCH_ARM_MACH_S5PV210_COMMON_H
+#ifdef CONFIG_PM_SLEEP
+u32 exynos_get_eint_wake_mask(void);
+void s5pv210_cpu_resume(void);
+void s5pv210_pm_init(void);
+#else
+static inline void s5pv210_pm_init(void) {}
+#endif
#endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index 00d1523..123163d 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -1,6 +1,6 @@
/* linux/arch/arm/mach-s5pv210/pm.c
*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* S5PV210 - Power Management support
@@ -19,17 +19,28 @@
#include linux/syscore_ops.h
#include linux/io.h
-#include plat/cpu.h
-#include plat/pm.h
+#include asm/cacheflush.h
+#include asm/suspend.h
+
+#include plat/pm-common.h
-#include mach/regs-irq.h
#include mach/regs-clock.h
+#include common.h
+
static struct sleep_save s5pv210_core_save[] = {
/* Clock ETC */
SAVE_ITEM(S5P_MDNIE_SEL),
};
+/*
+ * VIC wake-up support (TODO)
+ */
+static u32 s5pv210_irqwake_intmask = 0x;
+
+/*
+ * Suspend helpers.
+ */
static int s5pv210_cpu_suspend(unsigned long arg)
{
unsigned long tmp;
@@ -54,8 +65,12 @@ static void s5pv210_pm_prepare(void)
{
unsigned int tmp;
+ /* Set wake-up mask registers */
+ __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
+ __raw_writel(s5pv210_irqwake_intmask, S5P_WAKEUP_MASK);
+
/* ensure at least INFORM0 has the resume address */
- __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
+ __raw_writel(virt_to_phys(s5pv210_cpu_resume), S5P_INFORM0);
tmp = __raw_readl(S5P_SLEEP_CFG);
tmp = ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
@@ -75,6 +90,70 @@ static void s5pv210_pm_prepare(void)
s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
}
+/*
+ * Suspend operations.
+ */
+static int s5pv210_suspend_enter(suspend_state_t state)
+{
+ int ret;
+
+ s3c_pm_debug_init();
+
+ S3C_PMDBG(%s: suspending the system...\n, __func__);
+
+ S3C_PMDBG(%s: wakeup masks: %08x,%08x\n, __func__,
+ s5pv210_irqwake_intmask, exynos_get_eint_wake_mask());
+
+ if (s5pv210_irqwake_intmask == -1U
+exynos_get_eint_wake_mask() == -1U) {
+ pr_err(%s: No wake-up sources!\n, __func__);
+ pr_err(%s: Aborting sleep\n, __func__);
+ return -EINVAL;
+ }
+
+ s3c_pm_save_uarts();
+ s5pv210_pm_prepare();
+ flush_cache_all();
+ s3c_pm_check_store();
+
+ ret = cpu_suspend(0, s5pv210_cpu_suspend);
+ if (ret)
+ return ret;
+
+ s3c_pm_restore_uarts();
+
+ S3C_PMDBG(%s: wakeup stat: %08x\n, __func__,
+ __raw_readl(S5P_WAKEUP_STAT));
+
+ s3c_pm_check_restore();
+
+ S3C_PMDBG(%s: resuming the system...\n, __func__);
+
+ return 0;
+}
+
+static int s5pv210_suspend_prepare(void)
+{
+ s3c_pm_check_prepare();
+
+ return 0;
+}
+
+static void s5pv210_suspend_finish(void)
+{
+ s3c_pm_check_cleanup();
+}
+
+static const struct platform_suspend_ops s5pv210_suspend_ops = {
+ .enter = s5pv210_suspend_enter,
+ .prepare
[PATCH 05/19] ARM: SAMSUNG: Remove legacy clock code
Since S5PV210 now has a complete clock driver using Common Clock Framework, there is no reason to keep the old code. Remove it together with the whole legacy Samsung-specific clock framework which no longer has any users. Signed-off-by: Tomasz Figa t.f...@samsung.com --- arch/arm/Kconfig |1 + arch/arm/mach-exynos/pm.c |1 - arch/arm/mach-s3c24xx/common.c |2 - arch/arm/mach-s3c24xx/iotiming-s3c2412.c |1 - arch/arm/mach-s3c24xx/mach-h1940.c |5 +- arch/arm/mach-s3c24xx/mach-jive.c |1 - arch/arm/mach-s3c24xx/mach-smdk2413.c |1 - arch/arm/mach-s3c24xx/mach-smdk2416.c |1 - arch/arm/mach-s3c24xx/mach-smdk2443.c |1 - arch/arm/mach-s3c24xx/mach-vstms.c |1 - arch/arm/mach-s3c24xx/s3c2410.c|6 - arch/arm/mach-s3c24xx/s3c2412.c|6 - arch/arm/mach-s3c24xx/s3c2442.c|1 - arch/arm/mach-s3c24xx/s3c244x.c|6 - arch/arm/mach-s3c64xx/mach-anw6410.c |1 - arch/arm/mach-s3c64xx/mach-crag6410.c |1 - arch/arm/mach-s3c64xx/mach-hmt.c |1 - arch/arm/mach-s3c64xx/mach-ncp.c |1 - arch/arm/mach-s3c64xx/mach-smartq.c|1 - arch/arm/mach-s3c64xx/mach-smdk6400.c |1 - arch/arm/mach-s3c64xx/mach-smdk6410.c |1 - arch/arm/mach-s3c64xx/s3c6400.c|1 - arch/arm/mach-s3c64xx/s3c6410.c|1 - arch/arm/mach-s5pv210/Kconfig |9 - arch/arm/mach-s5pv210/Makefile |1 - arch/arm/mach-s5pv210/clock.c | 1365 arch/arm/mach-s5pv210/common.c | 16 +- arch/arm/mach-s5pv210/common.h |6 - arch/arm/mach-s5pv210/mach-goni.c |1 - arch/arm/mach-s5pv210/mach-smdkv210.c |1 - arch/arm/mach-s5pv210/pm.c | 48 - arch/arm/plat-samsung/Kconfig | 18 - arch/arm/plat-samsung/Makefile |5 - arch/arm/plat-samsung/clock-clksrc.c | 212 --- arch/arm/plat-samsung/clock.c | 539 arch/arm/plat-samsung/include/plat/clock-clksrc.h | 83 -- arch/arm/plat-samsung/include/plat/clock.h | 152 --- arch/arm/plat-samsung/include/plat/cpu-freq-core.h |3 - arch/arm/plat-samsung/include/plat/pll.h | 323 - arch/arm/plat-samsung/include/plat/s5p-clock.h | 65 - arch/arm/plat-samsung/init.c |1 - arch/arm/plat-samsung/s5p-clock.c | 294 - 42 files changed, 6 insertions(+), 3179 deletions(-) delete mode 100644 arch/arm/mach-s5pv210/clock.c delete mode 100644 arch/arm/plat-samsung/clock-clksrc.c delete mode 100644 arch/arm/plat-samsung/clock.c delete mode 100644 arch/arm/plat-samsung/include/plat/clock-clksrc.h delete mode 100644 arch/arm/plat-samsung/include/plat/clock.h delete mode 100644 arch/arm/plat-samsung/include/plat/pll.h delete mode 100644 arch/arm/plat-samsung/include/plat/s5p-clock.h delete mode 100644 arch/arm/plat-samsung/s5p-clock.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f4396fd..c0c1c3f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -765,6 +765,7 @@ config ARCH_S5PV210 select ATAGS select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM + select COMMON_CLK_SAMSUNG select CPU_V7 select GENERIC_CLOCKEVENTS select GPIO_SAMSUNG diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 87c0d34..6035973 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -28,7 +28,6 @@ #include asm/suspend.h #include plat/pm-common.h -#include plat/pll.h #include plat/regs-srom.h #include mach/map.h diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index c0763b8..44fa95d 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -49,9 +49,7 @@ #include plat/cpu.h #include plat/devs.h -#include plat/clock.h #include plat/cpu-freq.h -#include plat/pll.h #include plat/pwm-core.h #include plat/watchdog-reset.h diff --git a/arch/arm/mach-s3c24xx/iotiming-s3c2412.c b/arch/arm/mach-s3c24xx/iotiming-s3c2412.c index bd064c0..28b1395 100644 --- a/arch/arm/mach-s3c24xx/iotiming-s3c2412.c +++ b/arch/arm/mach-s3c24xx/iotiming-s3c2412.c @@ -29,7 +29,6 @@ #include plat/cpu.h #include plat/cpu-freq-core.h -#include plat/clock.h #include mach/s3c2412.h diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index fbf5487..c9a99bb 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c @@
[PATCH 06/19] clk: samsung: Add S5PV210 Audio Subsystem clock driver
This patch adds a driver for clock controller being a part of Audio
Subsystem present on S5PV210 and compatible SoCs. It is used to provide
clocks for other IP blocks of this subsystem.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Cc: Mike Turquette mturque...@linaro.org
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Rob Herring robh...@kernel.org
Cc: devicet...@vger.kernel.org
---
.../bindings/clock/clk-s5pv210-audss.txt | 53 +
drivers/clk/samsung/Makefile | 2 +-
drivers/clk/samsung/clk-s5pv210-audss.c| 241 +
include/dt-bindings/clock/s5pv210-audss.h | 34 +++
4 files changed, 329 insertions(+), 1 deletion(-)
create mode 100644
Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt
create mode 100644 drivers/clk/samsung/clk-s5pv210-audss.c
create mode 100644 include/dt-bindings/clock/s5pv210-audss.h
diff --git a/Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt
b/Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt
new file mode 100644
index 000..4fc869b
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt
@@ -0,0 +1,53 @@
+* Samsung Audio Subsystem Clock Controller
+
+The Samsung Audio Subsystem clock controller generates and supplies clocks
+to Audio Subsystem block available in the S5PV210 and compatible SoCs.
+
+Required Properties:
+
+- compatible: should be samsung,s5pv210-audss-clock.
+- reg: physical base address and length of the controller's register set.
+
+- #clock-cells: should be 1.
+
+- clocks:
+ - hclk: AHB bus clock of the Audio Subsystem.
+ - xxti: Optional fixed rate PLL reference clock, parent of mout_audss. If
+not specified (i.e. xusbxti is used for PLL reference), it is fixed to
+a clock named xxti.
+ - fout_epll: Input PLL to the AudioSS block, parent of mout_audss.
+ - iiscdclk0: Optional external i2s clock, parent of mout_i2s. If not
+specified, it is fixed to a clock named iiscdclk0.
+ - sclk_audio0: Audio bus clock, parent of mout_i2s.
+
+- clock-names: Aliases for the above clocks. They should be hclk,
+ xxti, fout_epll, iiscdclk0, and sclk_audio0 respectively.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/s5pv210-audss-clk.h header and can be used in device
+tree sources.
+
+Example: Clock controller node.
+
+ clk_audss: clock-controller@c090 {
+ compatible = samsung,s5pv210-audss-clock;
+ reg = 0xc090 0x1000;
+ #clock-cells = 1;
+ clock-names = hclk, xxti,
+ fout_epll, sclk_audio0;
+ clocks = clocks DOUT_HCLKP, xxti,
+ clocks FOUT_EPLL, clocks SCLK_AUDIO0;
+ };
+
+Example: I2S controller node that consumes the clock generated by the clock
+controller. Refer to the standard clock bindings for information
+ about 'clocks' and 'clock-names' property.
+
+ i2s0: i2s@0383 {
+ /* ... */
+ clock-names = iis, i2s_opclk0,
+ i2s_opclk1;
+ clocks = clk_audss CLK_I2S, clk_audss CLK_I2S,
+ clk_audss CLK_DOUT_AUD_BUS;
+ /* ... */
+ };
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 49d6ce1..9f256a4 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -16,4 +16,4 @@ obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o
obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o
obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o
obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
-obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o
+obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o clk-s5pv210-audss.o
diff --git a/drivers/clk/samsung/clk-s5pv210-audss.c
b/drivers/clk/samsung/clk-s5pv210-audss.c
new file mode 100644
index 000..a8053b4
--- /dev/null
+++ b/drivers/clk/samsung/clk-s5pv210-audss.c
@@ -0,0 +1,241 @@
+/*
+ * Copyright (c) 2014 Tomasz Figa t.f...@samsung.com
+ *
+ * Based on Exynos Audio Subsystem Clock Controller driver:
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Padmavathi Venna padm...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Driver for Audio Subsystem Clock Controller of S5PV210-compatible SoCs.
+*/
+
+#include linux/clkdev.h
+#include linux/io.h
+#include linux/clk-provider.h
+#include linux/of_address.h
+#include linux/syscore_ops.h
+#include linux/module.h
+#include linux/platform_device.h
+
+#include dt-bindings/clock/s5pv210-audss.h
+
+static DEFINE_SPINLOCK(lock);
+static struct clk **clk_table;
+static void __iomem *reg_base;
+static struct clk_onecell_data clk_data;
+
+#define ASS_CLK_SRC 0x0
+#define ASS_CLK_DIV 0x4
+#define ASS_CLK_GATE
[PATCH 01/19] clk: samsung: Add clock driver for S5PV210 and compatible SoCs
From: Mateusz Krawczuk m.krawc...@partner.samsung.com
This patch adds new, Common Clock Framework-based clock driver for Samsung
S5PV210 and compatible SoCs. The driver is just added, without enabling it yet.
Signed-off-by: Mateusz Krawczuk m.krawc...@partner.samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
[t.figa: Added support for other SoC variants and clock output. Fixed
remaining minor issues.]
Signed-off-by: Tomasz Figa t.f...@samsung.com
Cc: Mike Turquette mturque...@linaro.org
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Rob Herring robh...@kernel.org
Cc: devicet...@vger.kernel.org
---
.../bindings/clock/samsung,s5pv210-clock.txt | 78 ++
drivers/clk/samsung/Makefile | 1 +
drivers/clk/samsung/clk-s5pv210.c | 976 +
include/dt-bindings/clock/s5pv210.h| 239 +
4 files changed, 1294 insertions(+)
create mode 100644
Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
create mode 100644 drivers/clk/samsung/clk-s5pv210.c
create mode 100644 include/dt-bindings/clock/s5pv210.h
diff --git a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
new file mode 100644
index 000..effd940
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
@@ -0,0 +1,78 @@
+* Samsung S5P6442/S5PC110/S5PV210 Clock Controller
+
+Samsung S5P6442, S5PC110 and S5PV210 SoCs contain integrated clock
+controller, which generates and supplies clock to various controllers
+within the SoC.
+
+Required Properties:
+
+- compatible: should be one of following:
+ - samsung,s5pv210-clock : for clock controller of Samsung
+ S5PC110/S5PV210 SoCs,
+ - samsung,s5p6442-clock : for clock controller of Samsung
+ S5P6442 SoC.
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- #clock-cells: should be 1.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/s5pv210.h header and can be used in device tree sources.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - xxti: external crystal oscillator connected to XXTI and XXTO pins of
+the SoC,
+ - xusbxti: external crystal oscillator connected to XUSBXTI and XUSBXTO
+pins of the SoC,
+
+A subset of above clocks available on given board shall be specified in
+board device tree, including the system base clock, as selected by XOM[0]
+pin of the SoC. Refer to generic fixed rate clock bindings
+documentation[1] for more information how to specify these clocks.
+
+[1] Documentation/devicetree/bindings/clock/fixed-clock.txt
+
+Example: Clock controller node:
+
+ clock: clock-controller@7e00f000 {
+ compatible = samsung,s5pv210-clock;
+ reg = 0x7e00f000 0x1000;
+ #clock-cells = 1;
+ };
+
+Example: Required external clocks:
+
+ xxti: clock-xxti {
+ compatible = fixed-clock;
+ clock-output-names = xxti;
+ clock-frequency = 2400;
+ #clock-cells = 0;
+ };
+
+ xusbxti: clock-xusbxti {
+ compatible = fixed-clock;
+ clock-output-names = xusbxti;
+ clock-frequency = 2400;
+ #clock-cells = 0;
+ };
+
+Example: UART controller node that consumes the clock generated by the clock
+ controller (refer to the standard clock bindings for information about
+ clocks and clock-names properties):
+
+ uart0: serial@e290 {
+ compatible = samsung,s5pv210-uart;
+ reg = 0xe290 0x400;
+ interrupt-parent = vic1;
+ interrupts = 10;
+ clock-names = uart, clk_uart_baud0,
+ clk_uart_baud1;
+ clocks = clocks UART0, clocks UART0,
+ clocks SCLK_UART0;
+ status = disabled;
+ };
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 69e8177..49d6ce1 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o
obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o
obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o
obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
+obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o
diff --git a/drivers/clk/samsung/clk-s5pv210.c
b/drivers/clk/samsung/clk-s5pv210.c
new file mode 100644
index 000..509779a
--- /dev/null
+++ b/drivers/clk/samsung/clk-s5pv210.c
@@ -0,0 +1,976 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Mateusz Krawczuk m.krawc...@partner.samsung.com
+ *
+ * Based on clock drivers for S3C64xx and Exynos4 SoCs.
+ *
+ * This
[PATCH 03/19] cpufreq: s3c24xx: Remove some dead code
There is no use for the .resume_clocks() callback now and in fact all
the provided functions are empty, so this patch just removes it in
preparation for further patches.
Reported-by: Arnd Bergmann a...@arndb.de
Signed-off-by: Tomasz Figa t.f...@samsung.com
Cc: Rafael J. Wysocki r...@rjwysocki.net
Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: linux...@vger.kernel.org
---
drivers/cpufreq/s3c2410-cpufreq.c | 2 --
drivers/cpufreq/s3c2412-cpufreq.c | 3 ---
drivers/cpufreq/s3c2440-cpufreq.c | 3 ---
drivers/cpufreq/s3c24xx-cpufreq.c | 1 -
4 files changed, 9 deletions(-)
diff --git a/drivers/cpufreq/s3c2410-cpufreq.c
b/drivers/cpufreq/s3c2410-cpufreq.c
index cfa0dd8..b8e5da8 100644
--- a/drivers/cpufreq/s3c2410-cpufreq.c
+++ b/drivers/cpufreq/s3c2410-cpufreq.c
@@ -26,7 +26,6 @@
#include mach/regs-clock.h
#include plat/cpu.h
-#include plat/clock.h
#include plat/cpu-freq-core.h
/* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */
@@ -104,7 +103,6 @@ static struct s3c_cpufreq_info s3c2410_cpufreq_info = {
.calc_iotiming = s3c2410_iotiming_calc,
.set_iotiming = s3c2410_iotiming_set,
.get_iotiming = s3c2410_iotiming_get,
- .resume_clocks = s3c2410_setup_clocks,
.set_fvco = s3c2410_set_fvco,
.set_refresh= s3c2410_cpufreq_setrefresh,
diff --git a/drivers/cpufreq/s3c2412-cpufreq.c
b/drivers/cpufreq/s3c2412-cpufreq.c
index 4645b48..eb26213 100644
--- a/drivers/cpufreq/s3c2412-cpufreq.c
+++ b/drivers/cpufreq/s3c2412-cpufreq.c
@@ -28,7 +28,6 @@
#include mach/s3c2412.h
#include plat/cpu.h
-#include plat/clock.h
#include plat/cpu-freq-core.h
/* our clock resources. */
@@ -188,8 +187,6 @@ static struct s3c_cpufreq_info s3c2412_cpufreq_info = {
.set_iotiming = s3c2412_iotiming_set,
.get_iotiming = s3c2412_iotiming_get,
- .resume_clocks = s3c2412_setup_clocks,
-
.debug_io_show = s3c_cpufreq_debugfs_call(s3c2412_iotiming_debugfs),
};
diff --git a/drivers/cpufreq/s3c2440-cpufreq.c
b/drivers/cpufreq/s3c2440-cpufreq.c
index f84ed10..0129f5c 100644
--- a/drivers/cpufreq/s3c2440-cpufreq.c
+++ b/drivers/cpufreq/s3c2440-cpufreq.c
@@ -29,7 +29,6 @@
#include plat/cpu.h
#include plat/cpu-freq-core.h
-#include plat/clock.h
static struct clk *xtal;
static struct clk *fclk;
@@ -262,8 +261,6 @@ static struct s3c_cpufreq_info s3c2440_cpufreq_info = {
.calc_divs = s3c2440_cpufreq_calcdivs,
.calc_freqtable = s3c2440_cpufreq_calctable,
- .resume_clocks = s3c244x_setup_clocks,
-
.debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
};
diff --git a/drivers/cpufreq/s3c24xx-cpufreq.c
b/drivers/cpufreq/s3c24xx-cpufreq.c
index 227ebf7..d00f1ce 100644
--- a/drivers/cpufreq/s3c24xx-cpufreq.c
+++ b/drivers/cpufreq/s3c24xx-cpufreq.c
@@ -27,7 +27,6 @@
#include asm/mach/map.h
#include plat/cpu.h
-#include plat/clock.h
#include plat/cpu-freq-core.h
#include mach/regs-clock.h
--
1.9.3
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Re: [PATCH 00/19] ARM: SAMSUNG: S5PV210 platform clean-up
Aha, I forgot to add that the series is based on Kukjin's for-next branch with pwm: samsung: remove s5pc100 related pwm codes patch reverted and you can find a ready branch here: https://github.com/tom3q/linux.git v3.17-s5pv210-dt Sorry for the noise. Best regards, Tomasz On 04.07.2014 19:48, Tomasz Figa wrote: This huge series is a (hopefully final) attempt to convert Samsung S5PV210 into a DT-only and multiplatform-aware platform. It consists of several steps to gradually replace legacy code with one meeting current standards and then finally remove unused remnants. Patches 1-6 migrate the platform to fully use the Common Clock Framework and get rid of legacy private clock code, of which s5pv210 was the last user. Then patch 7 adds generic PHY driver for USB PHY on S5PV210 to allow USB to be supported when using DT. Further three patches (8-10) add DT support for mach-s5pv210 and necessary DT sources for currently supported boards. Patch 11 removes board files and code directly related to them, effectively making s5pv210 a DT-only platform. In next step, patches 12-15 prepare remaining code for multiplatform enablement, which is finally done in patch 16. Patches 17-19 are a final clean-up, which remove a lot of unused code left after making the last S5P platform DT-only. Build tested patch by patch on following configs: - s3c2410_defconfig (with DT support enabled), - s3c6400_defconfig (with DT support enabled), - s5pv210_defconfig (with DT support enabled after patches adding it), - exynos_defconfig, - exynos_defconfig with S5PV210 enabled in multiplatform configuration. Boot tested on s5pv210-goni board. Note that support for smdkc110, smdkv210 and torbreck boards is provided by moving data from existing board files to new device tree sources. No testing was performed due to mentioned board not being available anymore. However I believe we agreed on this approach, because apparently there are no active users of them. See the RFC from August 2013 asking for removal of the whole platform [1]. [1] http://www.mail-archive.com/linux-samsung-soc%40vger.kernel.org/msg21882.html Mateusz Krawczuk (6): clk: samsung: Add clock driver for S5PV210 and compatible SoCs ARM: s5pv210: Migrate clock handling to Common Clock Framework phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver ARM: s5pv210: Add board file for boot using Device Tree ARM: Samsung: DT: Add Device tree for s5pv210 ARM: Samsung: DT: Add Device tree for S5PC110/S5PV210 Boards Tomasz Figa (13): cpufreq: s3c24xx: Remove some dead code serial: samsung: Remove support for legacy clock code ARM: SAMSUNG: Remove legacy clock code clk: samsung: Add S5PV210 Audio Subsystem clock driver ARM: S5PV210: Remove support for board files ARM: S5PV210: Untie PM support from legacy code ARM: s5pv210: move debug-macro.S into the common space ARM: s5pv210: Register cpufreq platform device cpufreq: s5pv210: Make the driver multiplatform aware ARM: s5pv210: Enable multi-platform build support gpio: samsung: Remove legacy support of S5PV210 ARM: SAMSUNG: Remove remaining legacy code clk: samsung: s5pv210: Remove legacy board support .../bindings/clock/clk-s5pv210-audss.txt | 53 + .../bindings/clock/samsung,s5pv210-clock.txt | 78 ++ .../devicetree/bindings/phy/samsung-phy.txt|1 + arch/arm/Kconfig | 22 +- arch/arm/Kconfig.debug | 12 +- arch/arm/Makefile |4 +- arch/arm/boot/dts/Makefile |5 + arch/arm/boot/dts/s5pv210-aquila.dts | 392 ++ arch/arm/boot/dts/s5pv210-goni.dts | 449 +++ arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 839 arch/arm/boot/dts/s5pv210-smdkc110.dts | 78 ++ arch/arm/boot/dts/s5pv210-smdkv210.dts | 238 arch/arm/boot/dts/s5pv210-torbreck.dts | 92 ++ arch/arm/boot/dts/s5pv210.dtsi | 633 + arch/arm/include/debug/s5pv210.S | 34 + arch/arm/mach-exynos/pm.c |1 - arch/arm/mach-s3c24xx/common.c |2 - arch/arm/mach-s3c24xx/iotiming-s3c2412.c |1 - arch/arm/mach-s3c24xx/mach-h1940.c |5 +- arch/arm/mach-s3c24xx/mach-jive.c |1 - arch/arm/mach-s3c24xx/mach-smdk2413.c |1 - arch/arm/mach-s3c24xx/mach-smdk2416.c |1 - arch/arm/mach-s3c24xx/mach-smdk2443.c |1 - arch/arm/mach-s3c24xx/mach-vstms.c |1 - arch/arm/mach-s3c24xx/s3c2410.c|6 - arch/arm/mach-s3c24xx/s3c2412.c|6 - arch/arm/mach-s3c24xx/s3c2442.c|1 - arch/arm/mach-s3c24xx/s3c244x.c
Re: [PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420
On Fri, 4 Jul 2014, Abhilash Kesavan wrote:
On Fri, Jul 4, 2014 at 9:43 AM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
Another suggestion which might possibly be better: why not looking for
the SYS_PWR_CFG bit in exynos_cpu_power_down() directly? After all,
exynos_cpu_power_down() is semantically supposed to do what its name
suggest and could simply do nothing if the proper conditions are already
in place.
I have implemented this and it works fine. Patch coming up.
On Fri, 4 Jul 2014, Abhilash Kesavan wrote:
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
Changes in v2:
- Made use of the MCPM suspend/powered_up call-backs
Changes in v3:
- Used the residency value to indicate the entered state
Changes in v4:
- Checked if MCPM has been enabled to prevent build error
Changes in v5:
- Removed the MCPM flags and just used a local flag to
indicate that we are suspending.
Changes in v6:
- Read the SYS_PWR_REG value to decide if we are suspending
the system.
- Restore the SYS_PWR_REG value post-resume.
- Modified the comments to reflect the first change.
[...]
@@ -150,7 +153,15 @@ static void exynos_power_down(void)
BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
cpu_use_count[cpu][cluster]--;
if (cpu_use_count[cpu][cluster] == 0) {
- exynos_cpu_power_down(cpunr);
+ /*
+ * Bypass power down for CPU0 during suspend. Check for
+ * the SYS_PWR_REG value to decide if we are suspending
+ * the system.
+ */
+ temp = __raw_readl(pmu_base_addr +
+ EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+ if ((cpu != 0) || ((temp S5P_CORE_LOCAL_PWR_EN) != 0))
+ exynos_cpu_power_down(cpunr);
Nah... We're going in circles, aren't we?
What I suggested above is:
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 67d383de61..0a48421860 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -110,6 +110,16 @@ static int exynos_irq_set_wake(struct irq_data *data,
unsigned int state)
*/
void exynos_cpu_power_down(int cpu)
{
+ if (soc_is_exynos5250() cpu == 0) {
+ /*
+* Bypass power down for CPU0 during suspend. Check for
+* the SYS_PWR_REG value to decide if we are suspending
+* the system.
+*/
+ int val = __raw_readl(pmu_base_addr
+EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+ if (!(val S5P_CORE_LOCAL_PWR_EN))
+ return;
+ }
__raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
}
Nicolas
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Re: [PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420
Hi Nicolas,
On Sat, Jul 5, 2014 at 12:00 AM, Nicolas Pitre nicolas.pi...@linaro.org wrote:
On Fri, 4 Jul 2014, Abhilash Kesavan wrote:
On Fri, Jul 4, 2014 at 9:43 AM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
Another suggestion which might possibly be better: why not looking for
the SYS_PWR_CFG bit in exynos_cpu_power_down() directly? After all,
exynos_cpu_power_down() is semantically supposed to do what its name
suggest and could simply do nothing if the proper conditions are already
in place.
I have implemented this and it works fine. Patch coming up.
On Fri, 4 Jul 2014, Abhilash Kesavan wrote:
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
Changes in v2:
- Made use of the MCPM suspend/powered_up call-backs
Changes in v3:
- Used the residency value to indicate the entered state
Changes in v4:
- Checked if MCPM has been enabled to prevent build error
Changes in v5:
- Removed the MCPM flags and just used a local flag to
indicate that we are suspending.
Changes in v6:
- Read the SYS_PWR_REG value to decide if we are suspending
the system.
- Restore the SYS_PWR_REG value post-resume.
- Modified the comments to reflect the first change.
[...]
@@ -150,7 +153,15 @@ static void exynos_power_down(void)
BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
cpu_use_count[cpu][cluster]--;
if (cpu_use_count[cpu][cluster] == 0) {
- exynos_cpu_power_down(cpunr);
+ /*
+ * Bypass power down for CPU0 during suspend. Check for
+ * the SYS_PWR_REG value to decide if we are suspending
+ * the system.
+ */
+ temp = __raw_readl(pmu_base_addr +
+ EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+ if ((cpu != 0) || ((temp S5P_CORE_LOCAL_PWR_EN) != 0))
+ exynos_cpu_power_down(cpunr);
Nah... We're going in circles, aren't we?
What I suggested above is:
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 67d383de61..0a48421860 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -110,6 +110,16 @@ static int exynos_irq_set_wake(struct irq_data *data,
unsigned int state)
*/
void exynos_cpu_power_down(int cpu)
{
+ if (soc_is_exynos5250() cpu == 0) {
+ /*
+* Bypass power down for CPU0 during suspend. Check for
+* the SYS_PWR_REG value to decide if we are suspending
+* the system.
+*/
+ int val = __raw_readl(pmu_base_addr
+EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+ if (!(val S5P_CORE_LOCAL_PWR_EN))
+ return;
+ }
__raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
}
Ah, I get it, much nicer indeed. Will change.
Nicolas
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