[PATCHv6 1/4] iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability
This patchset add 'exynos_adc_data' structure which includes some functions
to control ADC operation and specific data according to ADC version (v1 or v2).
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
drivers/iio/adc/exynos_adc.c | 226 ---
1 file changed, 147 insertions(+), 79 deletions(-)
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 010578f..00d67fd 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -39,11 +39,6 @@
#include linux/iio/machine.h
#include linux/iio/driver.h
-enum adc_version {
- ADC_V1,
- ADC_V2
-};
-
/* EXYNOS4412/5250 ADC_V1 registers definitions */
#define ADC_V1_CON(x) ((x) + 0x00)
#define ADC_V1_DLY(x) ((x) + 0x08)
@@ -85,6 +80,7 @@ enum adc_version {
#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))
struct exynos_adc {
+ struct exynos_adc_data *data;
void __iomem*regs;
void __iomem*enable_reg;
struct clk *clk;
@@ -97,43 +93,139 @@ struct exynos_adc {
unsigned intversion;
};
-static const struct of_device_id exynos_adc_match[] = {
- { .compatible = samsung,exynos-adc-v1, .data = (void *)ADC_V1 },
- { .compatible = samsung,exynos-adc-v2, .data = (void *)ADC_V2 },
- {},
+struct exynos_adc_data {
+ int num_channels;
+
+ void (*init_hw)(struct exynos_adc *info);
+ void (*exit_hw)(struct exynos_adc *info);
+ void (*clear_irq)(struct exynos_adc *info);
+ void (*start_conv)(struct exynos_adc *info, unsigned long addr);
};
-MODULE_DEVICE_TABLE(of, exynos_adc_match);
-static inline unsigned int exynos_adc_get_version(struct platform_device *pdev)
+static void exynos_adc_v1_init_hw(struct exynos_adc *info)
{
- const struct of_device_id *match;
+ u32 con1;
- match = of_match_node(exynos_adc_match, pdev-dev.of_node);
- return (unsigned int)match-data;
+ writel(1, info-enable_reg);
+
+ /* set default prescaler values and Enable prescaler */
+ con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
+
+ /* Enable 12-bit ADC resolution */
+ con1 |= ADC_V1_CON_RES;
+ writel(con1, ADC_V1_CON(info-regs));
+}
+
+static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
+{
+ u32 con;
+
+ writel(0, info-enable_reg);
+
+ con = readl(ADC_V1_CON(info-regs));
+ con |= ADC_V1_CON_STANDBY;
+ writel(con, ADC_V1_CON(info-regs));
+}
+
+static void exynos_adc_v1_clear_irq(struct exynos_adc *info)
+{
+ writel(1, ADC_V1_INTCLR(info-regs));
}
-static void exynos_adc_hw_init(struct exynos_adc *info)
+static void exynos_adc_v1_start_conv(struct exynos_adc *info,
+unsigned long addr)
+{
+ u32 con1;
+
+ writel(addr, ADC_V1_MUX(info-regs));
+
+ con1 = readl(ADC_V1_CON(info-regs));
+ writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info-regs));
+}
+
+static struct exynos_adc_data const exynos_adc_v1_data = {
+ .num_channels = MAX_ADC_V1_CHANNELS,
+
+ .init_hw= exynos_adc_v1_init_hw,
+ .exit_hw= exynos_adc_v1_exit_hw,
+ .clear_irq = exynos_adc_v1_clear_irq,
+ .start_conv = exynos_adc_v1_start_conv,
+};
+
+static void exynos_adc_v2_init_hw(struct exynos_adc *info)
{
u32 con1, con2;
- if (info-version == ADC_V2) {
- con1 = ADC_V2_CON1_SOFT_RESET;
- writel(con1, ADC_V2_CON1(info-regs));
+ writel(1, info-enable_reg);
- con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
- ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
- writel(con2, ADC_V2_CON2(info-regs));
+ con1 = ADC_V2_CON1_SOFT_RESET;
+ writel(con1, ADC_V2_CON1(info-regs));
- /* Enable interrupts */
- writel(1, ADC_V2_INT_EN(info-regs));
- } else {
- /* set default prescaler values and Enable prescaler */
- con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
+ con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
+ ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
+ writel(con2, ADC_V2_CON2(info-regs));
- /* Enable 12-bit ADC resolution */
- con1 |= ADC_V1_CON_RES;
- writel(con1, ADC_V1_CON(info-regs));
- }
+ /* Enable interrupts */
+ writel(1, ADC_V2_INT_EN(info-regs));
+}
+
+static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
+{
+ u32 con;
+
+ writel(0, info-enable_reg);
+
+ con = readl(ADC_V2_CON1(info-regs));
+ con = ~ADC_CON_EN_START;
+ writel(con, ADC_V2_CON1(info-regs));
+}
+
+static void exynos_adc_v2_clear_irq(struct exynos_adc *info)
+{
+
[PATCHv6 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
special clock ('sclk_adc') for ADC which provide clock to internal ADC.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
---
.../devicetree/bindings/arm/samsung/exynos-adc.txt | 25 --
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index 832fe8c..26232f9 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -14,14 +14,21 @@ Required properties:
for exynos4412/5250 controllers.
Must be samsung,exynos-adc-v2 for
future controllers.
+ Must be samsung,exynos3250-adc-v2 for
+ controllers compatible with ADC of Exynos3250.
- reg: Contains ADC register address range (base address and
length) and the address of the phy enable register.
- interrupts: Contains the interrupt information for the timer. The
format is being dependent on which interrupt controller
the Samsung device uses.
- #io-channel-cells = 1; As ADC has multiple outputs
-- clocks From common clock binding: handle to adc clock.
-- clock-names From common clock binding: Shall be adc.
+- clocks From common clock bindings: handles to clocks specified
+ in clock-names property, in the same order.
+- clock-names From common clock bindings: list of clock input names
+ used by ADC block:
+ - adc : ADC bus clock
+ - sclk_adc : ADC special clock (only for Exynos3250
+ and compatible ADC block)
- vdd-supply VDD input supply.
Note: child nodes can be added for auto probing from device tree.
@@ -41,6 +48,20 @@ adc: adc@12D1 {
vdd-supply = buck5_reg;
};
+Example: adding device info in dtsi file for Exynos3250 with additional sclk
+
+adc: adc@126C {
+ compatible = samsung,exynos3250-adc-v2;
+ reg = 0x126C 0x100, 0x10020718 0x4;
+ interrupts = 0 137 0;
+ #io-channel-cells = 1;
+ io-channel-ranges;
+
+ clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
+ clock-names = adc, sclk_adc;
+
+ vdd-supply = buck5_reg;
+};
Example: Adding child nodes in dts file
--
1.8.0
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
This patch control special clock for ADC in Exynos series's FSYS block.
If special clock of ADC is registerd on clock list of common clk framework,
Exynos ADC drvier have to control this clock.
Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
- 'adc' clock: bus clock for ADC
Exynos3250 has additional 'sclk_adc' clock as following:
- 'sclk_adc' clock: special clock for ADC which provide clock to internal ADC
Exynos 4210/4212/4412 and Exynos5250/5420 has not included 'sclk_adc' clock
in FSYS_BLK. But, Exynos3250 based on Cortex-A7 has only included 'sclk_adc'
clock in FSYS_BLK.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
drivers/iio/adc/exynos_adc.c | 112 ++-
1 file changed, 101 insertions(+), 11 deletions(-)
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 00d67fd..b63e882 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -81,9 +81,11 @@
struct exynos_adc {
struct exynos_adc_data *data;
+ struct device *dev;
void __iomem*regs;
void __iomem*enable_reg;
struct clk *clk;
+ struct clk *sclk;
unsigned intirq;
struct regulator*vdd;
@@ -95,6 +97,7 @@ struct exynos_adc {
struct exynos_adc_data {
int num_channels;
+ bool needs_sclk;
void (*init_hw)(struct exynos_adc *info);
void (*exit_hw)(struct exynos_adc *info);
@@ -102,6 +105,66 @@ struct exynos_adc_data {
void (*start_conv)(struct exynos_adc *info, unsigned long addr);
};
+static void exynos_adc_unprepare_clk(struct exynos_adc *info)
+{
+ if (info-data-needs_sclk)
+ clk_unprepare(info-sclk);
+ clk_unprepare(info-clk);
+}
+
+static int exynos_adc_prepare_clk(struct exynos_adc *info)
+{
+ int ret;
+
+ ret = clk_prepare(info-clk);
+ if (ret) {
+ dev_err(info-dev, failed preparing adc clock: %d\n, ret);
+ return ret;
+ }
+
+ if (info-data-needs_sclk) {
+ ret = clk_prepare(info-sclk);
+ if (ret) {
+ clk_unprepare(info-clk);
+ dev_err(info-dev,
+ failed preparing sclk_adc clock: %d\n, ret);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static void exynos_adc_disable_clk(struct exynos_adc *info)
+{
+ if (info-data-needs_sclk)
+ clk_disable(info-sclk);
+ clk_disable(info-clk);
+}
+
+static int exynos_adc_enable_clk(struct exynos_adc *info)
+{
+ int ret;
+
+ ret = clk_enable(info-clk);
+ if (ret) {
+ dev_err(info-dev, failed enabling adc clock: %d\n, ret);
+ return ret;
+ }
+
+ if (info-data-needs_sclk) {
+ ret = clk_enable(info-sclk);
+ if (ret) {
+ clk_disable(info-clk);
+ dev_err(info-dev,
+ failed enabling sclk_adc clock: %d\n, ret);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
static void exynos_adc_v1_init_hw(struct exynos_adc *info)
{
u32 con1;
@@ -199,13 +262,20 @@ static void exynos_adc_v2_start_conv(struct exynos_adc
*info,
writel(con1 | ADC_CON_EN_START, ADC_V2_CON1(info-regs));
}
+#define __EXYNOS_ADC_V2_DATA \
+ .num_channels = MAX_ADC_V2_CHANNELS, \
+ .init_hw= exynos_adc_v2_init_hw,\
+ .exit_hw= exynos_adc_v2_exit_hw,\
+ .clear_irq = exynos_adc_v2_clear_irq, \
+ .start_conv = exynos_adc_v2_start_conv, \
+
static struct exynos_adc_data const exynos_adc_v2_data = {
- .num_channels = MAX_ADC_V2_CHANNELS,
+ __EXYNOS_ADC_V2_DATA
+};
- .init_hw= exynos_adc_v2_init_hw,
- .exit_hw= exynos_adc_v2_exit_hw,
- .clear_irq = exynos_adc_v2_clear_irq,
- .start_conv = exynos_adc_v2_start_conv,
+static struct exynos_adc_data const exynos3250_adc_v2_data = {
+ __EXYNOS_ADC_V2_DATA
+ .needs_sclk = true,
};
static const struct of_device_id exynos_adc_match[] = {
@@ -215,6 +285,9 @@ static const struct of_device_id exynos_adc_match[] = {
}, {
.compatible = samsung,exynos-adc-v2,
.data = (void *)exynos_adc_v2_data,
+ }, {
+ .compatible = samsung,exynos3250-adc-v2,
+ .data = (void *)exynos3250_adc_v2_data,
},
{},
};
@@ -376,6 +449,7 @@ static int exynos_adc_probe(struct platform_device *pdev)
}
info-irq = irq;
+ info-dev = pdev-dev;
init_completion(info-completion);
@@ -386,6
Re: [PATCH v2 0/4] Add Exynos4412 based Odroid X2 and U2/U3/U3+ support
On Thu, Jul 17, 2014 at 10:56 PM, Olof Johansson o...@lixom.net wrote: I gave the kernel (next-0717) a go here on my U3, and it boots (as you mention, no USB comes up). Btw, please update multi_v7_defconfig as well (as a separate patch, since it needs to be merged directly by us). Right now it doesn't find rootfs with that config. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/4] Add Exynos4412 based Odroid X2 and U2/U3/U3+ support
Hi Olof, Thanks for joining the party here :) On Fri, Jul 18, 2014 at 6:56 AM, Olof Johansson o...@lixom.net wrote: Anyone got a simple writeup on the steps needed to boot, bl1/2 needed, expected offset into eMMC for where it goes, etc? https://github.com/hardkernel/u-boot/blob/odroid-v2010.12/sd_fuse/sd_fusing.sh is probably the best writeup :) https://github.com/hardkernel/u-boot/tree/odroid-v2010.12/sd_fuse has the blobs needed (they have not changed at all in the U3's history, so the ones you have already will work fine). Samsung guys are also upstreaming support into uboot, including a README.odroid in the last commit with this info: http://patchwork.ozlabs.org/project/uboot/list/?submitter=23519 I gave the kernel (next-0717) a go here on my U3, and it boots (as you mention, no USB comes up). Nice. USB works with the later patches floating around. I do see a few KERN_ERR printks though: [ERR] [0.00] L2C: failed to init: -19 This one is fixed with the patch series Enable L2 cache support on Exynos4210/4x12 SoCs [ERR] [0.001302] missing device node for CPU 0 [ERR] [0.001344] missing device node for CPU 1 [ERR] [0.001366] missing device node for CPU 2 [ERR] [0.001386] missing device node for CPU 3 Not sure about these - I still get them with all the patches applied. [ERR] [0.156490] max77686 0-0009: irq is not specified I submitted a patch for this, ARM: dts: Enable PMIC interrupts on ODROID [ERR] [1.339498] /i2c@1386/usb3503@08: could not get #clock-cells for /system-controller@1002 [ERR] [1.348050] ERROR: could not get clock /i2c@1386/usb3503@08:refclk(0) I think these go away with the USB patches floating around. [ERR] [1.383055] max77686-rtc max77686-rtc: max77686_rtc_init_reg: fail to write controlm reg(-6) [ERR] [1.391108] max77686-rtc max77686-rtc: Failed to initialize RTC reg:-6 Fixed with ARM: dts: ODROID i2c improvements Daniel -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V5 05/12] Documentation: Add DT bindings for panel-lvds driver
Hi Thierry, Thanks for your comments. On Fri, Jul 18, 2014 at 4:18 AM, Thierry Reding thierry.red...@gmail.com wrote: On Fri, Jul 18, 2014 at 02:20:39AM +0530, Ajay kumar wrote: +devicet...@vger.kernel.org On Fri, Jul 18, 2014 at 2:13 AM, Ajay Kumar ajaykumar...@samsung.com wrote: Add DT binding documentation for panel-lvds driver. Signed-off-by: Ajay Kumar ajaykumar...@samsung.com --- .../devicetree/bindings/panel/panel-lvds.txt | 50 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/panel/panel-lvds.txt diff --git a/Documentation/devicetree/bindings/panel/panel-lvds.txt b/Documentation/devicetree/bindings/panel/panel-lvds.txt new file mode 100644 index 000..fdf91da2 --- /dev/null +++ b/Documentation/devicetree/bindings/panel/panel-lvds.txt @@ -0,0 +1,50 @@ +panel interface for eDP/lvds panels + +Required properties: + - compatible: panel-lvds I think I've said this before. I oppose the addition of this binding. We need to list a device-specific compatible value here, wildcards like this aren't a good choice. And then if we have that compatible value we can move most of the optional properties below into a driver. Yes, panel-lvds is a wildcard for all lvds panels. And since lvds panels from different vendors have different values for power_up_delay, delay from video_to_backlight etc, I thought its better to pick them up from device tree. +Optional properties: If all these properties are optional, then what happens if a device tree node doesn't contain any of them? Doesn't that turn the driver into one big no-op? No! We need to provide lcd-supply and backlight-supply. + -lcd-enable-gpios: + panel LCD poweron GPIO. + Indicates which GPIO needs to be powered up as output + to powerup/enable the switch to the LCD panel. + -backlight-enable-gpios: + panel LED enable GPIO. + Indicates which GPIO needs to be powered up as output + to enable the backlight. I've also said before that this really belongs in a backlight driver. Chances are that you'll want to have a way to set the brightness of the backlight as well, so simply an enable GPIO won't be good enough. Ok. I can handle this in backlight driver itself (with some minor glitches). But, how do I map bridge functions to panel functions now? The bridge supports (pre_enable, enable, disable and post_disable) which I map with (prepare, enable, disable and unprepare) of the panel, using a sample layer called bridge to panel_binder. Moving out the backlight control from panel means I really don't need those extra panel calls(prepare and unprepare)! Then how to distribute 2 panel calls(enable and disable) across 4 bridge calls? + -panel-prepare-delay: + delay value in ms required for panel_prepare process + Delay in ms needed for the panel LCD unit to + powerup completely. + ex: delay needed till eDP panel throws HPD. + delay needed so that we cans tart reading edid. If the panel signals HPD then we don't need this delay at all and we should just wait for HPD instead. Not always for HPD, we need to wait for EDID module as well. + -panel-enable-delay: + delay value in ms required for panel_enable process + Delay in ms needed for the panel backlight/LED unit + to powerup, and delay needed between video_enable and + backlight_enable. + -panel-disable-delay: + delay value in ms required for panel_disable process + Delay in ms needed for the panel backlight/LED unit + powerdown, and delay needed between backlight_disable + and video_disable. + -panel-unprepare-delay: + delay value in ms required for panel_post_disable process + Delay in ms needed for the panel LCD unit to + to powerdown completely, and the minimum delay needed + before powering it on again. These delays are all panel specific and they don't vary per board, so they shouldn't go into the device tree at all. But, fetching them from device tree would allow us to support all lvds panels in this single driver. Thanks and Regards, Ajay Kumar -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 06/24] mfd: max77686: Make error checking consistent
On Fri, 04 Jul 2014, Javier Martinez Canillas wrote:
Error checking across the driver is mostly consistent besides
a few exceptions, so change these exceptions for consistency.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/mfd/max77686.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
Applied now, thanks.
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index ada4976..87fe52e 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -134,7 +134,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
max77686 = devm_kzalloc(i2c-dev,
sizeof(struct max77686_dev), GFP_KERNEL);
- if (max77686 == NULL)
+ if (!max77686)
return -ENOMEM;
i2c_set_clientdata(i2c, max77686);
@@ -153,8 +153,8 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
return ret;
}
- if (regmap_read(max77686-regmap,
- MAX77686_REG_DEVICE_ID, data) 0) {
+ ret = regmap_read(max77686-regmap, MAX77686_REG_DEVICE_ID, data);
+ if (ret 0) {
dev_err(max77686-dev,
device not found on this channel (this is not an
error)\n);
return -ENODEV;
@@ -180,7 +180,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
IRQF_SHARED, 0, max77686_irq_chip,
max77686-irq_data);
- if (ret != 0) {
+ if (ret) {
dev_err(i2c-dev, failed to add PMIC irq chip: %d\n, ret);
goto err_unregister_i2c;
}
@@ -188,7 +188,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
IRQF_SHARED, 0, max77686_rtc_irq_chip,
max77686-rtc_irq_data);
- if (ret != 0) {
+ if (ret) {
dev_err(i2c-dev, failed to add RTC irq chip: %d\n, ret);
goto err_del_irqc;
}
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 07/24] mfd: max77686: Remove unneeded OOM error message
On Fri, 04 Jul 2014, Javier Martinez Canillas wrote:
There is no need to print out-of-memory errors since this is already
done by the memory management subsystem which even calls dump_stack().
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
Applied now, thanks.
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 87fe52e..8650832 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -107,10 +107,8 @@ static struct max77686_platform_data
*max77686_i2c_parse_dt_pdata(struct device
struct max77686_platform_data *pd;
pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
- if (!pd) {
- dev_err(dev, could not allocate memory for pdata\n);
+ if (!pd)
return NULL;
- }
dev-platform_data = pd;
return pd;
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 05/24] mfd: max77686: Return correct error when pdata isn't found
On Fri, 04 Jul 2014, Javier Martinez Canillas wrote:
When platform data is not found an -EIO (I/O error) code is returned.
This doesn't seem to be the correct error so better return -EINVAL
(Invalid argument) which is what most drivers do in this case.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Applied now, thanks.
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 12d4c17..ada4976 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -129,7 +129,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
if (!pdata) {
dev_err(i2c-dev, No platform data found.\n);
- return -EIO;
+ return -EINVAL;
}
max77686 = devm_kzalloc(i2c-dev,
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 03/24] mfd: max77686: Don't define dummy function if OF isn't enabled
On Fri, 04 Jul 2014, Javier Martinez Canillas wrote:
When the CONFIG_OF option was not enabled, a dummy function
max77686_i2c_parse_dt_pdata() was defined since this is called
unconditionally on probe(). Just always define the real function
and conditionally call it if CONFIG_OF is enabled instead.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
Applied now, thanks.
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index a38e9ee..d1f9d04 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -96,7 +96,6 @@ static const struct regmap_irq_chip max77686_rtc_irq_chip =
{
.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
};
-#ifdef CONFIG_OF
static const struct of_device_id max77686_pmic_dt_match[] = {
{.compatible = maxim,max77686, .data = NULL},
{},
@@ -116,13 +115,6 @@ static struct max77686_platform_data
*max77686_i2c_parse_dt_pdata(struct device
dev-platform_data = pd;
return pd;
}
-#else
-static struct max77686_platform_data *max77686_i2c_parse_dt_pdata(struct
device
- *dev)
-{
- return 0;
-}
-#endif
static int max77686_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
@@ -132,7 +124,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
unsigned int data;
int ret = 0;
- if (i2c-dev.of_node)
+ if (IS_ENABLED(CONFIG_OF) i2c-dev.of_node)
pdata = max77686_i2c_parse_dt_pdata(i2c-dev);
if (!pdata) {
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 02/24] mfd: max77686: Add power management support
On Fri, 04 Jul 2014, Javier Martinez Canillas wrote:
The driver doesn't have PM operations defined so add a suspend
and resume function handlers to allow the PMIC IRQ to wakeup
the system when it is put into a sleep state.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/mfd/max77686.c | 40
1 file changed, 40 insertions(+)
Applied now, thanks.
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 3cb41d0..a38e9ee 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -240,10 +240,50 @@ static const struct i2c_device_id max77686_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, max77686_i2c_id);
+#ifdef CONFIG_PM_SLEEP
+static int max77686_suspend(struct device *dev)
+{
+ struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
+ struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
+
+ if (device_may_wakeup(dev))
+ enable_irq_wake(max77686-irq);
+
+ /*
+ * IRQ must be disabled during suspend because if it happens
+ * while suspended it will be handled before resuming I2C.
+ *
+ * When device is woken up from suspend (e.g. by RTC wake alarm),
+ * an interrupt occurs before resuming I2C bus controller.
+ * Interrupt handler tries to read registers but this read
+ * will fail because I2C is still suspended.
+ */
+ disable_irq(max77686-irq);
+
+ return 0;
+}
+
+static int max77686_resume(struct device *dev)
+{
+ struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
+ struct max77686_dev *max77686 = i2c_get_clientdata(i2c);
+
+ if (device_may_wakeup(dev))
+ disable_irq_wake(max77686-irq);
+
+ enable_irq(max77686-irq);
+
+ return 0;
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static SIMPLE_DEV_PM_OPS(max77686_pm, max77686_suspend, max77686_resume);
+
static struct i2c_driver max77686_i2c_driver = {
.driver = {
.name = max77686,
.owner = THIS_MODULE,
+.pm = max77686_pm,
.of_match_table = of_match_ptr(max77686_pmic_dt_match),
},
.probe = max77686_i2c_probe,
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 04/24] mfd: max77686: Make platform data over-rule DT
On Fri, 04 Jul 2014, Javier Martinez Canillas wrote:
The function max77802_i2c_parse_dt_pdata() should only be called
if there isn't already platform data for the device.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/max77686.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Applied now, thanks.
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index d1f9d04..12d4c17 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -124,7 +124,7 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
unsigned int data;
int ret = 0;
- if (IS_ENABLED(CONFIG_OF) i2c-dev.of_node)
+ if (IS_ENABLED(CONFIG_OF) i2c-dev.of_node !pdata)
pdata = max77686_i2c_parse_dt_pdata(i2c-dev);
if (!pdata) {
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: ASoC: samsung: MACH_SMDKC100
Kukjin, On Wed, 2014-07-02 at 10:01 +0200, Paul Bolle wrote: Your commit 52ad6582ceb2 (ARM: S5PC100: no more support S5PC100 SoC landed in next-20140702. It removed the Kconfig symbol MACH_SMDKC100 (and a lot of other stuff). Is the trivial patch to also remove the last two references to MACH_SMDKC100 from sound/soc/samsung/Kconfig/ queued somewhere? I don't think it was part of the series that included the above commit. Have you had time to look at this? Those last two references to MACH_SMDKC100 can still be seen in next-20140718. Paul Bolle -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 0/4] iio: adc: exynos_adc: Support Exynos3250 ADC and code clean
On Friday 18 July 2014 14:59:42 Chanwoo Choi wrote: This patchset support Exynos3250 ADC (Analog Digital Converter) because Exynos3250 has additional special clock for ADC IP. by coincidence, I have just looked at the same driver in order to add support for s3c24xx and s3c64xx, so we can remove the plat-samsung adc framework they still use. Those changes would naturally conflict with yours, but I think it makes sense for your patches to come first. I'll comment a bit more on the individual patches. I didn't have interest in them earlier, so I didn't comment so far. Another aspect that came up is the touchscreen support. Right now, there is drivers/input/touchscreen/s3c2410_ts.c which is intimately tied to arch/arm/plat-samsung/adc.c. The best way forward (as discussed on IRC as few days ago) seems to be to integrate support for that into the exynos_adc driver. Can you comment on which parts actually support touchscreen? Did touchscreen support get dropped in the exynos hardware, or is the driver just missing at the moment? Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 1/4] iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability
On Friday 18 July 2014 14:59:43 Chanwoo Choi wrote:
This patchset add 'exynos_adc_data' structure which includes some functions
to control ADC operation and specific data according to ADC version (v1 or
v2).
This new structure makes a lot of sense for covering the exynos specific
versions, but it will likely give a little more complexity for the
older models. We'll have to deal with that later then, no need to
hold up your patch. Interestingly, the version numbers seem weird. The
old driver uses
{
.name = s3c24xx-adc,
.driver_data= TYPE_ADCV1,
}, {
.name = s3c2443-adc,
.driver_data= TYPE_ADCV11,
}, {
.name = s3c2416-adc,
.driver_data= TYPE_ADCV12,
}, {
.name = s3c64xx-adc,
.driver_data= TYPE_ADCV2,
}, {
.name = samsung-adc-v3,
.driver_data= TYPE_ADCV3,
}
Where TYPE_ADCV3 seems to be the same as the new ADC_V1 used in this
driver. Do you have an explanation for that?
Arnd
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
On Friday 18 July 2014 14:59:44 Chanwoo Choi wrote:
This patch control special clock for ADC in Exynos series's FSYS block.
If special clock of ADC is registerd on clock list of common clk framework,
Exynos ADC drvier have to control this clock.
Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
- 'adc' clock: bus clock for ADC
Exynos3250 has additional 'sclk_adc' clock as following:
- 'sclk_adc' clock: special clock for ADC which provide clock to internal ADC
Exynos 4210/4212/4412 and Exynos5250/5420 has not included 'sclk_adc' clock
in FSYS_BLK. But, Exynos3250 based on Cortex-A7 has only included 'sclk_adc'
clock in FSYS_BLK.
Do you know if any of the older ADC blocks have an sclk input as well?
Further, why is it called sclk_adc rather than just sclk?
@@ -199,13 +262,20 @@ static void exynos_adc_v2_start_conv(struct exynos_adc
*info,
writel(con1 | ADC_CON_EN_START, ADC_V2_CON1(info-regs));
}
+#define __EXYNOS_ADC_V2_DATA \
+ .num_channels = MAX_ADC_V2_CHANNELS, \
+ .init_hw= exynos_adc_v2_init_hw,\
+ .exit_hw= exynos_adc_v2_exit_hw,\
+ .clear_irq = exynos_adc_v2_clear_irq, \
+ .start_conv = exynos_adc_v2_start_conv, \
+
static struct exynos_adc_data const exynos_adc_v2_data = {
- .num_channels = MAX_ADC_V2_CHANNELS,
+ __EXYNOS_ADC_V2_DATA
+};
- .init_hw= exynos_adc_v2_init_hw,
- .exit_hw= exynos_adc_v2_exit_hw,
- .clear_irq = exynos_adc_v2_clear_irq,
- .start_conv = exynos_adc_v2_start_conv,
+static struct exynos_adc_data const exynos3250_adc_v2_data = {
+ __EXYNOS_ADC_V2_DATA
+ .needs_sclk = true,
};
I think the macro hurts readability. Please just duplicate the definition
here.
static const struct of_device_id exynos_adc_match[] = {
@@ -215,6 +285,9 @@ static const struct of_device_id exynos_adc_match[] = {
}, {
.compatible = samsung,exynos-adc-v2,
.data = (void *)exynos_adc_v2_data,
+ }, {
+ .compatible = samsung,exynos3250-adc-v2,
+ .data = (void *)exynos3250_adc_v2_data,
},
{},
Remove the '(void *)' cast here and mark the structure as 'const'.
We intentionally use a 'const void *' type here to verify that
the driver doesn't modify the per-device type data at runtime,
which would be bad if you ever have multiple device instances.
Arnd
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
On Friday 18 July 2014 14:59:45 Chanwoo Choi wrote: Must be samsung,exynos-adc-v2 for future controllers. It would be good to change 'future controllers' to something else now. Presumably that word was used before the actual products were announced, but now they are publically known. + Must be samsung,exynos3250-adc-v2 for + controllers compatible with ADC of Exynos3250. Doesn't this version have a specific name as well? The ADC block seems to use version numbers, so better put those in here to avoid confusion when another Exynos7890 comes out that uses the same ADC as exynos3250. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] clk: samsung: exynos4x12: Enable ARMCLK down feature
Enable ARMCLK down and up features on Exynos4212 and 4412 SoCs. The
frequency of ARMCLK will be reduced upon entering idle mode (WFI or
WFE). Additionally upon exiting from idle mode the divider for ARMCLK
will be brought back to 1.
These are exactly the same settings as for Exynos5250
(clk-exynos5250.c), except of Exynos4412 where ARMCLK down is enabled
for all 4 cores.
Tested on Trats2 board (Exynos4412) and Samsung Gear 1 (Exynos4212).
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/clk/samsung/clk-exynos4.c | 53 +++
1 file changed, 53 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b/drivers/clk/samsung/clk-exynos4.c
index 7f4a473a7ad7..b8ea37b23984 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -114,11 +114,34 @@
#define DIV_CPU1 0x14504
#define GATE_SCLK_CPU 0x14800
#define GATE_IP_CPU0x14900
+#define PWR_CTRL1 0x15020
+#define PWR_CTRL2 0x15024
#define E4X12_DIV_ISP0 0x18300
#define E4X12_DIV_ISP1 0x18304
#define E4X12_GATE_ISP00x18800
#define E4X12_GATE_ISP10x18804
+/* Below definitions are used for PWR_CTRL settings */
+#define PWR_CTRL1_CORE2_DOWN_RATIO (7 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO (7 16)
+#define PWR_CTRL1_DIV2_DOWN_EN (1 9)
+#define PWR_CTRL1_DIV1_DOWN_EN (1 8)
+#define PWR_CTRL1_USE_CORE3_WFE(1 7)
+#define PWR_CTRL1_USE_CORE2_WFE(1 6)
+#define PWR_CTRL1_USE_CORE1_WFE(1 5)
+#define PWR_CTRL1_USE_CORE0_WFE(1 4)
+#define PWR_CTRL1_USE_CORE3_WFI(1 3)
+#define PWR_CTRL1_USE_CORE2_WFI(1 2)
+#define PWR_CTRL1_USE_CORE1_WFI(1 1)
+#define PWR_CTRL1_USE_CORE0_WFI(1 0)
+
+#define PWR_CTRL2_DIV2_UP_EN (1 25)
+#define PWR_CTRL2_DIV1_UP_EN (1 24)
+#define PWR_CTRL2_DUR_STANDBY2_VAL (1 16)
+#define PWR_CTRL2_DUR_STANDBY1_VAL (1 8)
+#define PWR_CTRL2_CORE2_UP_RATIO (1 4)
+#define PWR_CTRL2_CORE1_UP_RATIO (1 0)
+
/* the exynos4 soc type */
enum exynos4_soc {
EXYNOS4210,
@@ -1164,6 +1187,34 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls]
__initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
};
+static void __init exynos4_core_down_clock(void)
+{
+ unsigned int tmp;
+
+ /*
+* Enable arm clock down (in idle) and set arm divider
+* ratios in WFI/WFE state.
+*/
+ tmp = (PWR_CTRL1_CORE2_DOWN_RATIO | PWR_CTRL1_CORE1_DOWN_RATIO |
+ PWR_CTRL1_DIV2_DOWN_EN | PWR_CTRL1_DIV1_DOWN_EN |
+ PWR_CTRL1_USE_CORE1_WFE | PWR_CTRL1_USE_CORE0_WFE |
+ PWR_CTRL1_USE_CORE1_WFI | PWR_CTRL1_USE_CORE0_WFI);
+ if (of_machine_is_compatible(samsung,exynos4412))
+ tmp |= PWR_CTRL1_USE_CORE3_WFE | PWR_CTRL1_USE_CORE2_WFE |
+ PWR_CTRL1_USE_CORE3_WFI | PWR_CTRL1_USE_CORE2_WFI;
+ __raw_writel(tmp, reg_base + PWR_CTRL1);
+
+ /*
+* Enable arm clock up (on exiting idle). Set arm divider
+* ratios when not in idle along with the standby duration
+* ratios.
+*/
+ tmp = (PWR_CTRL2_DIV2_UP_EN | PWR_CTRL2_DIV1_UP_EN |
+ PWR_CTRL2_DUR_STANDBY2_VAL | PWR_CTRL2_DUR_STANDBY1_VAL |
+ PWR_CTRL2_CORE2_UP_RATIO | PWR_CTRL2_CORE1_UP_RATIO);
+ __raw_writel(tmp, reg_base + PWR_CTRL2);
+}
+
/* register exynos4 clocks */
static void __init exynos4_clk_init(struct device_node *np,
enum exynos4_soc soc)
@@ -1250,6 +1301,8 @@ static void __init exynos4_clk_init(struct device_node
*np,
samsung_clk_register_alias(ctx, exynos4_aliases,
ARRAY_SIZE(exynos4_aliases));
+ if (exynos4_soc == EXYNOS4X12)
+ exynos4_core_down_clock();
exynos4_clk_sleep_init();
pr_info(%s clocks: sclk_apll = %ld, sclk_mpll = %ld\n
--
1.9.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] clk: samsung: exynos3250: Enable ARMCLK down feature
Enable ARMCLK down and up features on Exynos3250 SoC. The
frequency of ARMCLK will be reduced upon entering idle mode (WFI or
WFE). Additionally upon exiting from idle mode the divider for ARMCLK
will be brought back to 1.
These are exactly the same settings as for Exynos5250
(clk-exynos5250.c).
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/clk/samsung/clk-exynos3250.c | 50
1 file changed, 50 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos3250.c
b/drivers/clk/samsung/clk-exynos3250.c
index 7a17bd40d1dd..c80140270931 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -87,6 +87,29 @@
#define SRC_CPU0x14200
#define DIV_CPU0 0x14500
#define DIV_CPU1 0x14504
+#define PWR_CTRL1 0x15020
+#define PWR_CTRL2 0x15024
+
+/* Below definitions are used for PWR_CTRL settings */
+#define PWR_CTRL1_CORE2_DOWN_RATIO (7 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO (7 16)
+#define PWR_CTRL1_DIV2_DOWN_EN (1 9)
+#define PWR_CTRL1_DIV1_DOWN_EN (1 8)
+#define PWR_CTRL1_USE_CORE3_WFE(1 7)
+#define PWR_CTRL1_USE_CORE2_WFE(1 6)
+#define PWR_CTRL1_USE_CORE1_WFE(1 5)
+#define PWR_CTRL1_USE_CORE0_WFE(1 4)
+#define PWR_CTRL1_USE_CORE3_WFI(1 3)
+#define PWR_CTRL1_USE_CORE2_WFI(1 2)
+#define PWR_CTRL1_USE_CORE1_WFI(1 1)
+#define PWR_CTRL1_USE_CORE0_WFI(1 0)
+
+#define PWR_CTRL2_DIV2_UP_EN (1 25)
+#define PWR_CTRL2_DIV1_UP_EN (1 24)
+#define PWR_CTRL2_DUR_STANDBY2_VAL (1 16)
+#define PWR_CTRL2_DUR_STANDBY1_VAL (1 8)
+#define PWR_CTRL2_CORE2_UP_RATIO (1 4)
+#define PWR_CTRL2_CORE1_UP_RATIO (1 0)
/* list of PLLs to be registered */
enum exynos3250_plls {
@@ -748,6 +771,31 @@ static struct samsung_pll_clock exynos3250_plls[nr_plls]
__initdata = {
UPLL_LOCK, UPLL_CON0, NULL),
};
+static void __init exynos3_core_down_clock(void)
+{
+ unsigned int tmp;
+
+ /*
+* Enable arm clock down (in idle) and set arm divider
+* ratios in WFI/WFE state.
+*/
+ tmp = (PWR_CTRL1_CORE2_DOWN_RATIO | PWR_CTRL1_CORE1_DOWN_RATIO |
+ PWR_CTRL1_DIV2_DOWN_EN | PWR_CTRL1_DIV1_DOWN_EN |
+ PWR_CTRL1_USE_CORE1_WFE | PWR_CTRL1_USE_CORE0_WFE |
+ PWR_CTRL1_USE_CORE1_WFI | PWR_CTRL1_USE_CORE0_WFI);
+ __raw_writel(tmp, reg_base + PWR_CTRL1);
+
+ /*
+* Enable arm clock up (on exiting idle). Set arm divider
+* ratios when not in idle along with the standby duration
+* ratios.
+*/
+ tmp = (PWR_CTRL2_DIV2_UP_EN | PWR_CTRL2_DIV1_UP_EN |
+ PWR_CTRL2_DUR_STANDBY2_VAL | PWR_CTRL2_DUR_STANDBY1_VAL |
+ PWR_CTRL2_CORE2_UP_RATIO | PWR_CTRL2_CORE1_UP_RATIO);
+ __raw_writel(tmp, reg_base + PWR_CTRL2);
+}
+
static void __init exynos3250_cmu_init(struct device_node *np)
{
struct samsung_clk_provider *ctx;
@@ -775,6 +823,8 @@ static void __init exynos3250_cmu_init(struct device_node
*np)
samsung_clk_register_div(ctx, div_clks, ARRAY_SIZE(div_clks));
samsung_clk_register_gate(ctx, gate_clks, ARRAY_SIZE(gate_clks));
+ exynos3_core_down_clock();
+
exynos3250_clk_sleep_init();
}
CLK_OF_DECLARE(exynos3250_cmu, samsung,exynos3250-cmu, exynos3250_cmu_init);
--
1.9.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
Hi Arnd,
On 07/18/2014 06:47 PM, Arnd Bergmann wrote:
On Friday 18 July 2014 14:59:44 Chanwoo Choi wrote:
This patch control special clock for ADC in Exynos series's FSYS block.
If special clock of ADC is registerd on clock list of common clk framework,
Exynos ADC drvier have to control this clock.
Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
- 'adc' clock: bus clock for ADC
Exynos3250 has additional 'sclk_adc' clock as following:
- 'sclk_adc' clock: special clock for ADC which provide clock to internal ADC
Exynos 4210/4212/4412 and Exynos5250/5420 has not included 'sclk_adc' clock
in FSYS_BLK. But, Exynos3250 based on Cortex-A7 has only included 'sclk_adc'
clock in FSYS_BLK.
Do you know if any of the older ADC blocks have an sclk input as well?
No, I didn't check older ADC blocks. I only checked it on Exynos3250,
Exynos4210/4212/4412, Exynos5250/5420.
Further, why is it called sclk_adc rather than just sclk?
The sclk means 'special clock' in Exynos TRM. Exynos SoC has varisou sclk
clocks.
'sclk_adc' is only used for ADC IP.
@@ -199,13 +262,20 @@ static void exynos_adc_v2_start_conv(struct exynos_adc
*info,
writel(con1 | ADC_CON_EN_START, ADC_V2_CON1(info-regs));
}
+#define __EXYNOS_ADC_V2_DATA \
+ .num_channels = MAX_ADC_V2_CHANNELS, \
+ .init_hw= exynos_adc_v2_init_hw,\
+ .exit_hw= exynos_adc_v2_exit_hw,\
+ .clear_irq = exynos_adc_v2_clear_irq, \
+ .start_conv = exynos_adc_v2_start_conv, \
+
static struct exynos_adc_data const exynos_adc_v2_data = {
- .num_channels = MAX_ADC_V2_CHANNELS,
+ __EXYNOS_ADC_V2_DATA
+};
- .init_hw= exynos_adc_v2_init_hw,
- .exit_hw= exynos_adc_v2_exit_hw,
- .clear_irq = exynos_adc_v2_clear_irq,
- .start_conv = exynos_adc_v2_start_conv,
+static struct exynos_adc_data const exynos3250_adc_v2_data = {
+ __EXYNOS_ADC_V2_DATA
+ .needs_sclk = true,
};
I think the macro hurts readability. Please just duplicate the definition
here.
OK, I'll fix it.
static const struct of_device_id exynos_adc_match[] = {
@@ -215,6 +285,9 @@ static const struct of_device_id exynos_adc_match[] = {
}, {
.compatible = samsung,exynos-adc-v2,
.data = (void *)exynos_adc_v2_data,
+ }, {
+ .compatible = samsung,exynos3250-adc-v2,
+ .data = (void *)exynos3250_adc_v2_data,
},
{},
Remove the '(void *)' cast here and mark the structure as 'const'.
We intentionally use a 'const void *' type here to verify that
the driver doesn't modify the per-device type data at runtime,
which would be bad if you ever have multiple device instances.
OK, I'll remove it.
Thanks,
Chanwoo Choi
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 1/4] iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability
Hello Arnd,
On 18 July 2014 15:12, Arnd Bergmann a...@arndb.de wrote:
On Friday 18 July 2014 14:59:43 Chanwoo Choi wrote:
This patchset add 'exynos_adc_data' structure which includes some functions
to control ADC operation and specific data according to ADC version (v1 or
v2).
This new structure makes a lot of sense for covering the exynos specific
versions, but it will likely give a little more complexity for the
older models. We'll have to deal with that later then, no need to
hold up your patch. Interestingly, the version numbers seem weird. The
old driver uses
{
.name = s3c24xx-adc,
.driver_data= TYPE_ADCV1,
}, {
.name = s3c2443-adc,
.driver_data= TYPE_ADCV11,
}, {
.name = s3c2416-adc,
.driver_data= TYPE_ADCV12,
}, {
.name = s3c64xx-adc,
.driver_data= TYPE_ADCV2,
}, {
.name = samsung-adc-v3,
.driver_data= TYPE_ADCV3,
}
Where TYPE_ADCV3 seems to be the same as the new ADC_V1 used in this
driver. Do you have an explanation for that?
As per suggestion from Doug Anderson,
I've implemented IIO based ADC driver to work with Exynos5250.
keeping the plat-samsung/adc.c unchanged.
Assuming Exynos5250 is the one using the driver for the first time.
i've named it v1 and so on.
Now, This seems to cause a lot of confusion.
Arnd
--
To unsubscribe from this list: send the line unsubscribe linux-iio in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Shine bright,
(: Nav :)
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 0/4] iio: adc: exynos_adc: Support Exynos3250 ADC and code clean
Hello Arnd, On 18 July 2014 15:08, Arnd Bergmann a...@arndb.de wrote: On Friday 18 July 2014 14:59:42 Chanwoo Choi wrote: This patchset support Exynos3250 ADC (Analog Digital Converter) because Exynos3250 has additional special clock for ADC IP. by coincidence, I have just looked at the same driver in order to add support for s3c24xx and s3c64xx, so we can remove the plat-samsung adc framework they still use. Those changes would naturally conflict with yours, but I think it makes sense for your patches to come first. I'll comment a bit more on the individual patches. I didn't have interest in them earlier, so I didn't comment so far. Another aspect that came up is the touchscreen support. Right now, there is drivers/input/touchscreen/s3c2410_ts.c which is intimately tied to arch/arm/plat-samsung/adc.c. The best way forward (as discussed on IRC as few days ago) seems to be to integrate support for that into the exynos_adc driver. Can you comment on which parts actually support touchscreen? Did touchscreen support get dropped in the exynos hardware, or is the driver just missing at the moment? SoCs from Samsung before Exynos4 had and ADC based Touch screen and the driver under arch/arm/plat-samsung/adc.c and drivers/input/touchscreen/s3c2410_ts.c used to work together. Infact, the interrupt routine and priorities in plat-samsung/adc.c driver as written keeping the Touchscreen in mind. After Exynos4, ADC IP remained. But, the touch screen was removed in hardware. As per suggestion from Doug Anderson, I've implemented IIO based ADC driver started to support from exynos5250. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- Shine bright, (: Nav :) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 0/4] iio: adc: exynos_adc: Support Exynos3250 ADC and code clean
Hello All, On 18 July 2014 15:43, Naveen Krishna Ch naveenkrishna...@gmail.com wrote: Hello Arnd, On 18 July 2014 15:08, Arnd Bergmann a...@arndb.de wrote: On Friday 18 July 2014 14:59:42 Chanwoo Choi wrote: This patchset support Exynos3250 ADC (Analog Digital Converter) because Exynos3250 has additional special clock for ADC IP. by coincidence, I have just looked at the same driver in order to add support for s3c24xx and s3c64xx, so we can remove the plat-samsung adc framework they still use. Those changes would naturally conflict with yours, but I think it makes sense for your patches to come first. I'll comment a bit more on the individual patches. I didn't have interest in them earlier, so I didn't comment so far. Another aspect that came up is the touchscreen support. Right now, there is drivers/input/touchscreen/s3c2410_ts.c which is intimately tied to arch/arm/plat-samsung/adc.c. The best way forward (as discussed on IRC as few days ago) seems to be to integrate support for that into the exynos_adc driver. Can you comment on which parts actually support touchscreen? Did touchscreen support get dropped in the exynos hardware, or is the driver just missing at the moment? SoCs from Samsung before Exynos4 had and ADC based Touch screen and the driver under arch/arm/plat-samsung/adc.c and drivers/input/touchscreen/s3c2410_ts.c used to work together. Infact, the interrupt routine and priorities in plat-samsung/adc.c driver as written keeping the Touchscreen in mind. After Exynos4, ADC IP remained. But, the touch screen was removed in hardware. At least on Exynos4210 i'm not sure about the other Exynos4 series. I will try to verify the user manuals. As per suggestion from Doug Anderson, I've implemented IIO based ADC driver started to support from exynos5250. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- Shine bright, (: Nav :) -- Shine bright, (: Nav :) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] cpufreq: tests: Providing cpufreq regression test
This commit adds first regression test cpufreq_freq_test.sh for the
cpufreq subsystem.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/cpufreq/tests/README | 23 +
drivers/cpufreq/tests/cpufreq_freq_test.sh | 149 +
2 files changed, 172 insertions(+)
create mode 100644 drivers/cpufreq/tests/README
create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh
diff --git a/drivers/cpufreq/tests/README b/drivers/cpufreq/tests/README
new file mode 100644
index 000..66638d2
--- /dev/null
+++ b/drivers/cpufreq/tests/README
@@ -0,0 +1,23 @@
+This file contains list of cpufreq's available regression tests with a short
+usage description.
+
+1. cpufreq_freq_test.sh
+
+Description:
+
+This test is supposed to test if cpufreq attributes exported by sysfs are
+exposing a correct values.
+
+It can work with or without boost enabled and helps spotting errors related to
+cpufreq and common clock framework.
+
+Used attributes:
+
+- scaling_available_frequencies
+- cpuinfo_cur_freq
+- scaling_governor
+
+Target devices:
+---
+
+All devices which exports mentioned above sysfs attributes.
\ No newline at end of file
diff --git a/drivers/cpufreq/tests/cpufreq_freq_test.sh
b/drivers/cpufreq/tests/cpufreq_freq_test.sh
new file mode 100755
index 000..53156ca
--- /dev/null
+++ b/drivers/cpufreq/tests/cpufreq_freq_test.sh
@@ -0,0 +1,149 @@
+#!/bin/bash
+#
+# This file provides a simple mean to test if all declared freqs at
+# scaling_available_frequencies can be set and if cpuinfo_cur_freq
+# returns this value.
+#
+# Usage: ./cpufreq_freq_test.sh
+# Requisite: Compile in performance governor
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+# Copyright (C) Samsung Electronics, 2014
+#
+# Author: Lukasz Majewski l.majew...@samsung.com
+
+set +x
+
+COLOUR_RED=\33[31m
+COLOUR_BLUE=\33[34m
+COLOUR_GREEN=\33[32m
+COLOUR_DEFAULT=\33[0m
+
+T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq
+BOOST_PATCH=/sys/devices/system/cpu/cpufreq
+
+if [ ! -d $T_PATCH ]; then
+printf$COLOUR_RED No patch to CPUFREQ $COLOUR_DEFAULT\n
+exit 1
+fi
+
+ERRORS=0
+
+OLD_GOV=`cat $T_PATCH/scaling_governor`
+echo CURRENT GOVERNOR: $OLD_GOV
+echo SET GOVERNOR: performance
+echo performance $T_PATCH/scaling_governor
+
+function test_freqs1 {
+FREQS=`cat $1`
+for I in $FREQS; do
+ cpufreq_set_freq $I
+ if [ $2 ]; then
+ printf $COLOUR_BLUE BOOST $COLOUR_DEFAULT $I
+ fi
+ cpufreq_test_freq $I
+done
+}
+
+function test_freqs2 {
+FREQ=`cat $1`
+FREQS_ARRAY=($FREQ)
+
+for freq in ${FREQS_ARRAY[@]}
+do
+ echo REFERENCE FREQ: $freq
+ for f in ${FREQS_ARRAY[@]}
+ do
+ cpufreq_set_freq $freq
+ echo -n
+ cpufreq_set_freq $f
+ cpufreq_test_freq $f
+ done
+done
+}
+
+function restore {
+if [ -f $BOOST_PATCH/boost ]; then
+ cpufreq_boost_state $BOOST_STATE
+fi
+
+echo SET GOVERNOR: $OLD_GOV
+echo $OLD_GOV $T_PATCH/scaling_governor
+}
+
+function die {
+printf$COLOUR_RED FAILED $COLOUR_DEFAULT\n
+restore_gov
+exit 1
+}
+
+function cpufreq_test_freq {
+gzip /dev/urandom /dev/null
+pid=$!
+sleep 0.1
+CURR_FREQ=`cat $T_PATCH/cpuinfo_cur_freq`
+if [ $1 -eq $CURR_FREQ ]; then
+ printf \t$COLOUR_GREEN OK $COLOUR_DEFAULT\n
+else
+ printf $COLOUR_RED CURRENT $CURR_FREQ $COLOUR_DEFAULT\n
+ ERRORS=`expr $ERRORS + 1`
+ #die
+fi
+kill -9 $pid
+wait $! 2/dev/null
+}
+
+function cpufreq_set_freq {
+echo $1 $T_PATCH/scaling_max_freq || die $?
+printf FREQ:$COLOUR_GREEN %s $COLOUR_DEFAULT $1
+}
+
+function cpufreq_boost_state {
+ echo $1 $BOOST_PATCH/boost
+}
+
+function cpufreq_boost_status {
+ cat $BOOST_PATCH/boost
+}
+
+if [ -f $BOOST_PATCH/boost ]; then
+echo ##
+echo TEST BOOST OPERATION
+echo ##
+
+BOOST_STATE=$(cpufreq_boost_status)
+if [ $BOOST_STATE -eq 0 ]; then
+ cpufreq_boost_state 1
+fi
+test_freqs1 $T_PATCH/scaling_boost_frequencies 1
+fi
+
+echo ##
+echo TEST AVAILABLE FREQS
+echo ##
+test_freqs1
[PATCH 2/2] drm/exynos: dsi: add LPM (Low Power Mode) transfer support
This patch adds LPM transfer support for video or command data.
With this patch, Exynos MIPI DSI controller can transfer command or
video data with HS or LP mode in accordance with mode_flags set
by LCD Panel driver.
Signed-off-by: Inki Dae inki@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 2df3592..b120554 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -426,13 +426,28 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi)
| DSIM_ESC_PRESCALER(esc_div)
| DSIM_LANE_ESC_CLK_EN_CLK
| DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi-lanes) - 1)
- | DSIM_BYTE_CLK_SRC(0)
- | DSIM_TX_REQUEST_HSCLK;
+ | DSIM_BYTE_CLK_SRC(0);
+
+ if (!(dsi-mode_flags MIPI_DSI_MODE_CMD_LPM))
+ reg |= DSIM_TX_REQUEST_HSCLK;
+
writel(reg, dsi-reg_base + DSIM_CLKCTRL_REG);
return 0;
}
+static void exynos_dsi_enable_hs_clock(struct exynos_dsi *dsi,
+ bool enable)
+{
+ u32 reg = readl(dsi-reg_base + DSIM_CLKCTRL_REG);
+
+ reg = ~DSIM_TX_REQUEST_HSCLK;
+ if (enable)
+ reg |= DSIM_TX_REQUEST_HSCLK;
+
+ writel(reg, dsi-reg_base + DSIM_CLKCTRL_REG);
+}
+
static void exynos_dsi_disable_clock(struct exynos_dsi *dsi)
{
u32 reg;
@@ -575,6 +590,9 @@ static void exynos_dsi_set_display_enable(struct exynos_dsi
*dsi, bool enable)
{
u32 reg;
+ if (!(dsi-mode_flags MIPI_DSI_MODE_VIDEO_LPM))
+ exynos_dsi_enable_hs_clock(dsi, true);
+
reg = readl(dsi-reg_base + DSIM_MDRESOL_REG);
if (enable)
reg |= DSIM_MAIN_STAND_BY;
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] drm/mipi-dsi: support LPM (Low Power Mode) transfer
This patch series adds LPM tranfer support for video and command data. For this, this patch adds two flags, and makes MIPI DSI host to send commands to LCD Panel device with LPM if mode_flags of LCD Panel driver includes LPM flag. And also it applies this feature to Exynos MIPI DSI driver. Inki Dae (2): drm/mipi-dsi: add (LPM) Low Power Mode transfer support drm/exynos: dsi: add LPM (Low Power Mode) transfer support drivers/gpu/drm/drm_mipi_dsi.c |3 +++ drivers/gpu/drm/exynos/exynos_drm_dsi.c | 22 -- include/drm/drm_mipi_dsi.h |4 3 files changed, 27 insertions(+), 2 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] drm/mipi-dsi: add (LPM) Low Power Mode transfer support
This patch adds below two flags for LPM transfer, and it attaches LPM flags
to a msg in accordance with master's mode_flags set by LCD Panel driver.
MIPI_DSI_MODE_CMD_LPM: low power command transfer
MIPI_DSI_MODE_VIDEO_LPM: low power video transfer
MIPI DSI spec says,
the host processor controls the desired mode of clock operation.
Host protocol and applications control Clock Lane operating mode
(High Speed or Low Power mode). System designers are responsible
for understanding the clock requirements for peripherals attached
to DSI and controlling clock behavior in accordance with those
requirements.
Some LCD Panel devices, nt35502a, would need LPM transfer support
because they should receive some initial commands with LPM by default
hardware setting.
Signed-off-by: Inki Dae inki@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/gpu/drm/drm_mipi_dsi.c |3 +++
include/drm/drm_mipi_dsi.h |4
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index e633df2..6b2bbda 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -232,6 +232,9 @@ int mipi_dsi_dcs_write(struct mipi_dsi_device *dsi,
unsigned int channel,
break;
}
+ if (dsi-mode_flags MIPI_DSI_MODE_CMD_LPM)
+ msg.flags = MIPI_DSI_MSG_USE_LPM;
+
return ops-transfer(dsi-host, msg);
}
EXPORT_SYMBOL(mipi_dsi_dcs_write);
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 944f33f..1c41e49 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -94,6 +94,10 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
#define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
/* disable EoT packets in HS mode */
#define MIPI_DSI_MODE_EOT_PACKET BIT(9)
+/* command low power mode */
+#define MIPI_DSI_MODE_CMD_LPM BIT(10)
+/* video low power mode */
+#define MIPI_DSI_MODE_VIDEO_LPMBIT(11)
enum mipi_dsi_pixel_format {
MIPI_DSI_FMT_RGB888,
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
On Friday 18 July 2014 19:00:48 Chanwoo Choi wrote: On 07/18/2014 06:47 PM, Arnd Bergmann wrote: Further, why is it called sclk_adc rather than just sclk? The sclk means 'special clock' in Exynos TRM. Exynos SoC has varisou sclk clocks. 'sclk_adc' is only used for ADC IP. But that sounds like sclk_adc is the name of the global name of the clock signal coming out of the clock controller. I still think it would be best to name it 'sclk' as the input for the adc. It shouldn't rely on a particular name of the clock controller. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 1/4] iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability
On Friday 18 July 2014 15:41:27 Naveen Krishna Ch wrote:
{
.name = s3c24xx-adc,
.driver_data= TYPE_ADCV1,
}, {
.name = s3c2443-adc,
.driver_data= TYPE_ADCV11,
}, {
.name = s3c2416-adc,
.driver_data= TYPE_ADCV12,
}, {
.name = s3c64xx-adc,
.driver_data= TYPE_ADCV2,
}, {
.name = samsung-adc-v3,
.driver_data= TYPE_ADCV3,
}
Where TYPE_ADCV3 seems to be the same as the new ADC_V1 used in this
driver. Do you have an explanation for that?
As per suggestion from Doug Anderson,
I've implemented IIO based ADC driver to work with Exynos5250.
keeping the plat-samsung/adc.c unchanged.
Assuming Exynos5250 is the one using the driver for the first time.
i've named it v1 and so on.
Now, This seems to cause a lot of confusion.
Ah, so the version numbers don't come from Samsung hardware
documents but are just counting the versions we have drivers
for?
In this case, I guess using the first SoC that had a particular
version would have been better, and we should probably do that
when we add support for the older hardware in this driver.
Arnd
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] cpufreq: tests: Providing cpufreq regression test
On Friday, July 18, 2014 12:23:05 PM Lukasz Majewski wrote:
This commit adds first regression test cpufreq_freq_test.sh for the
cpufreq subsystem.
Care to add any description of how it is supposed to work and what it is
going to test?
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/cpufreq/tests/README | 23 +
drivers/cpufreq/tests/cpufreq_freq_test.sh | 149
+
2 files changed, 172 insertions(+)
create mode 100644 drivers/cpufreq/tests/README
create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh
diff --git a/drivers/cpufreq/tests/README b/drivers/cpufreq/tests/README
new file mode 100644
index 000..66638d2
--- /dev/null
+++ b/drivers/cpufreq/tests/README
@@ -0,0 +1,23 @@
+This file contains list of cpufreq's available regression tests with a short
+usage description.
+
+1. cpufreq_freq_test.sh
+
+Description:
+
+This test is supposed to test if cpufreq attributes exported by sysfs are
+exposing a correct values.
+
+It can work with or without boost enabled and helps spotting errors related
to
+cpufreq and common clock framework.
+
+Used attributes:
+
+- scaling_available_frequencies
+- cpuinfo_cur_freq
+- scaling_governor
+
+Target devices:
+---
+
+All devices which exports mentioned above sysfs attributes.
\ No newline at end of file
diff --git a/drivers/cpufreq/tests/cpufreq_freq_test.sh
b/drivers/cpufreq/tests/cpufreq_freq_test.sh
new file mode 100755
index 000..53156ca
--- /dev/null
+++ b/drivers/cpufreq/tests/cpufreq_freq_test.sh
@@ -0,0 +1,149 @@
+#!/bin/bash
+#
+# This file provides a simple mean to test if all declared freqs at
+# scaling_available_frequencies can be set and if cpuinfo_cur_freq
+# returns this value.
+#
+# Usage: ./cpufreq_freq_test.sh
+# Requisite: Compile in performance governor
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+# Copyright (C) Samsung Electronics, 2014
+#
+# Author: Lukasz Majewski l.majew...@samsung.com
+
+set +x
+
+COLOUR_RED=\33[31m
+COLOUR_BLUE=\33[34m
+COLOUR_GREEN=\33[32m
+COLOUR_DEFAULT=\33[0m
+
+T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq
+BOOST_PATCH=/sys/devices/system/cpu/cpufreq
+
+if [ ! -d $T_PATCH ]; then
+printf$COLOUR_RED No patch to CPUFREQ $COLOUR_DEFAULT\n
+exit 1
+fi
+
+ERRORS=0
+
+OLD_GOV=`cat $T_PATCH/scaling_governor`
+echo CURRENT GOVERNOR: $OLD_GOV
+echo SET GOVERNOR: performance
+echo performance $T_PATCH/scaling_governor
+
+function test_freqs1 {
+FREQS=`cat $1`
+for I in $FREQS; do
+ cpufreq_set_freq $I
+ if [ $2 ]; then
+ printf $COLOUR_BLUE BOOST $COLOUR_DEFAULT $I
+ fi
+ cpufreq_test_freq $I
+done
+}
+
+function test_freqs2 {
+FREQ=`cat $1`
+FREQS_ARRAY=($FREQ)
+
+for freq in ${FREQS_ARRAY[@]}
+do
+ echo REFERENCE FREQ: $freq
+ for f in ${FREQS_ARRAY[@]}
+ do
+ cpufreq_set_freq $freq
+ echo -n
+ cpufreq_set_freq $f
+ cpufreq_test_freq $f
+ done
+done
+}
+
+function restore {
+if [ -f $BOOST_PATCH/boost ]; then
+ cpufreq_boost_state $BOOST_STATE
+fi
+
+echo SET GOVERNOR: $OLD_GOV
+echo $OLD_GOV $T_PATCH/scaling_governor
+}
+
+function die {
+printf$COLOUR_RED FAILED $COLOUR_DEFAULT\n
+restore_gov
+exit 1
+}
+
+function cpufreq_test_freq {
+gzip /dev/urandom /dev/null
+pid=$!
+sleep 0.1
+CURR_FREQ=`cat $T_PATCH/cpuinfo_cur_freq`
+if [ $1 -eq $CURR_FREQ ]; then
+ printf \t$COLOUR_GREEN OK $COLOUR_DEFAULT\n
+else
+ printf $COLOUR_RED CURRENT $CURR_FREQ $COLOUR_DEFAULT\n
+ ERRORS=`expr $ERRORS + 1`
+ #die
+fi
+kill -9 $pid
+wait $! 2/dev/null
+}
+
+function cpufreq_set_freq {
+echo $1 $T_PATCH/scaling_max_freq || die $?
+printf FREQ:$COLOUR_GREEN %s $COLOUR_DEFAULT $1
+}
+
+function cpufreq_boost_state {
+ echo $1 $BOOST_PATCH/boost
+}
+
+function cpufreq_boost_status {
+ cat $BOOST_PATCH/boost
+}
+
+if [ -f $BOOST_PATCH/boost ]; then
+echo ##
+echo TEST BOOST OPERATION
+echo ##
+
+
Re: [PATCH] cpufreq: tests: Providing cpufreq regression test
Hi Lukasz, I tested this script on 4210 based Origen board. This is the output: ./cpufreq_freq_test.sh CURRENT GOVERNOR: performance SET GOVERNOR: performance ## TEST AVAILABLE FREQS ## FREQ: 120 sleep: invalid number '0.1' [5.918347] random: gzip urandom read with 61 bits of entropy available OK FREQ: 100 sleep: invalid number '0.1' OK FREQ: 80 sleep: invalid number '0.1' OK FREQ: 50 sleep: invalid number '0.1' OK FREQ: 20 sleep: invalid number '0.1' OK ## TEST FREQS SWITCHING ## REFERENCE FREQ: 120 FREQ: 120 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 120 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 120 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 120 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 120 FREQ: 20 sleep: invalid number '0.1' OK REFERENCE FREQ: 100 FREQ: 100 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 100 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 100 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 100 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 100 FREQ: 20 sleep: invalid number '0.1' OK REFERENCE FREQ: 80 FREQ: 80 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 80 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 80 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 80 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 80 FREQ: 20 sleep: invalid number '0.1' OK REFERENCE FREQ: 50 FREQ: 50 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 50 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 50 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 50 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 50 FREQ: 20 sleep: invalid number '0.1' OK REFERENCE FREQ: 20 FREQ: 20 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 20 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 20 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 20 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 20 FREQ: 20 sleep: invalid number '0.1' OK ## ERRORS: 0 ## Though it says 0 errors, what does the invalid number... signify? On Fri, Jul 18, 2014 at 3:53 PM, Lukasz Majewski l.majew...@samsung.com wrote: This commit adds first regression test cpufreq_freq_test.sh for the cpufreq subsystem. Signed-off-by: Lukasz Majewski l.majew...@samsung.com --- drivers/cpufreq/tests/README | 23 + drivers/cpufreq/tests/cpufreq_freq_test.sh | 149 + 2 files changed, 172 insertions(+) create mode 100644 drivers/cpufreq/tests/README create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh diff --git a/drivers/cpufreq/tests/README b/drivers/cpufreq/tests/README new file mode 100644 index 000..66638d2 --- /dev/null +++ b/drivers/cpufreq/tests/README @@ -0,0 +1,23 @@ +This file contains list of cpufreq's available regression tests with a short +usage description. + +1. cpufreq_freq_test.sh + +Description: + +This test is supposed to test if cpufreq attributes exported by sysfs are s/test/script would be better +exposing a correct values. s/ exposing a correct values / exposing correct values + +It can work with or without boost enabled and helps spotting errors related to s/ helps spotting / helps in spotting snip + +set +x + +COLOUR_RED=\33[31m +COLOUR_BLUE=\33[34m +COLOUR_GREEN=\33[32m +COLOUR_DEFAULT=\33[0m + +T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq Shouldn't this be called PATH instead of PATCH? +BOOST_PATCH=/sys/devices/system/cpu/cpufreq ditto and rest of the places in the document. -- Regards, Sachin. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] cpufreq: tests: Providing cpufreq regression test
Hi Sachin, Hi Lukasz, I tested this script on 4210 based Origen board. This is the output: ./cpufreq_freq_test.sh CURRENT GOVERNOR: performance SET GOVERNOR: performance ## TEST AVAILABLE FREQS ## FREQ: 120 sleep: invalid number '0.1' [5.918347] random: gzip urandom read with 61 bits of entropy available OK FREQ: 100 sleep: invalid number '0.1' OK FREQ: 80 sleep: invalid number '0.1' OK FREQ: 50 sleep: invalid number '0.1' OK FREQ: 20 sleep: invalid number '0.1' OK ## TEST FREQS SWITCHING ## REFERENCE FREQ: 120 FREQ: 120 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 120 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 120 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 120 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 120 FREQ: 20 sleep: invalid number '0.1' OK REFERENCE FREQ: 100 FREQ: 100 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 100 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 100 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 100 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 100 FREQ: 20 sleep: invalid number '0.1' OK REFERENCE FREQ: 80 FREQ: 80 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 80 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 80 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 80 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 80 FREQ: 20 sleep: invalid number '0.1' OK REFERENCE FREQ: 50 FREQ: 50 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 50 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 50 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 50 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 50 FREQ: 20 sleep: invalid number '0.1' OK REFERENCE FREQ: 20 FREQ: 20 FREQ: 120 sleep: invalid number '0.1' OK FREQ: 20 FREQ: 100 sleep: invalid number '0.1' OK FREQ: 20 FREQ: 80 sleep: invalid number '0.1' OK FREQ: 20 FREQ: 50 sleep: invalid number '0.1' OK FREQ: 20 FREQ: 20 sleep: invalid number '0.1' OK ## ERRORS: 0 ## Though it says 0 errors, what does the invalid number... signify? I guess that this message is caused by your default sleep implementation. Could you type 'sleep 0.1' and then 'sleep 1' in your console on the target system? Is the invalid number not present with the second case? On Fri, Jul 18, 2014 at 3:53 PM, Lukasz Majewski l.majew...@samsung.com wrote: This commit adds first regression test cpufreq_freq_test.sh for the cpufreq subsystem. Signed-off-by: Lukasz Majewski l.majew...@samsung.com --- drivers/cpufreq/tests/README | 23 + drivers/cpufreq/tests/cpufreq_freq_test.sh | 149 + 2 files changed, 172 insertions(+) create mode 100644 drivers/cpufreq/tests/README create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh diff --git a/drivers/cpufreq/tests/README b/drivers/cpufreq/tests/README new file mode 100644 index 000..66638d2 --- /dev/null +++ b/drivers/cpufreq/tests/README @@ -0,0 +1,23 @@ +This file contains list of cpufreq's available regression tests with a short +usage description. + +1. cpufreq_freq_test.sh + +Description: + +This test is supposed to test if cpufreq attributes exported by sysfs are s/test/script would be better Yes, you are right. +exposing a correct values. s/ exposing a correct values / exposing correct values + +It can work with or without boost enabled and helps spotting errors related to s/ helps spotting / helps in spotting Thanks for feedback. snip + +set +x + +COLOUR_RED=\33[31m +COLOUR_BLUE=\33[34m +COLOUR_GREEN=\33[32m +COLOUR_DEFAULT=\33[0m + +T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq Shouldn't this be called PATH instead of PATCH? Hmm It really should be PATH :-). +BOOST_PATCH=/sys/devices/system/cpu/cpufreq ditto and rest of the places in the document. Ok, I will correct that. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at
Re: [PATCH] cpufreq: tests: Providing cpufreq regression test
Hi Rafael,
On Friday, July 18, 2014 12:23:05 PM Lukasz Majewski wrote:
This commit adds first regression test cpufreq_freq_test.sh for
the cpufreq subsystem.
Care to add any description of how it is supposed to work and what it
is going to test?
Ok. I will extend the description in the README file.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/cpufreq/tests/README | 23 +
drivers/cpufreq/tests/cpufreq_freq_test.sh | 149
+ 2 files changed, 172 insertions(+)
create mode 100644 drivers/cpufreq/tests/README
create mode 100755 drivers/cpufreq/tests/cpufreq_freq_test.sh
diff --git a/drivers/cpufreq/tests/README
b/drivers/cpufreq/tests/README new file mode 100644
index 000..66638d2
--- /dev/null
+++ b/drivers/cpufreq/tests/README
@@ -0,0 +1,23 @@
+This file contains list of cpufreq's available regression tests
with a short +usage description.
+
+1. cpufreq_freq_test.sh
+
+Description:
+
+This test is supposed to test if cpufreq attributes exported by
sysfs are +exposing a correct values.
+
+It can work with or without boost enabled and helps spotting
errors related to +cpufreq and common clock framework.
+
+Used attributes:
+
+- scaling_available_frequencies
+- cpuinfo_cur_freq
+- scaling_governor
+
+Target devices:
+---
+
+All devices which exports mentioned above sysfs attributes.
\ No newline at end of file
diff --git a/drivers/cpufreq/tests/cpufreq_freq_test.sh
b/drivers/cpufreq/tests/cpufreq_freq_test.sh new file mode 100755
index 000..53156ca
--- /dev/null
+++ b/drivers/cpufreq/tests/cpufreq_freq_test.sh
@@ -0,0 +1,149 @@
+#!/bin/bash
+#
+# This file provides a simple mean to test if all declared freqs at
+# scaling_available_frequencies can be set and if
cpuinfo_cur_freq +# returns this value.
+#
+# Usage: ./cpufreq_freq_test.sh
+# Requisite: Compile in performance governor
+#
+# This program is free software; you can redistribute it and/or
modify +# it under the terms of the GNU General Public License as
published by +# the Free Software Foundation; either version 2 of
the License, or +# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+# Copyright (C) Samsung Electronics, 2014
+#
+# Author: Lukasz Majewski l.majew...@samsung.com
+
+set +x
+
+COLOUR_RED=\33[31m
+COLOUR_BLUE=\33[34m
+COLOUR_GREEN=\33[32m
+COLOUR_DEFAULT=\33[0m
+
+T_PATCH=/sys/devices/system/cpu/cpu0/cpufreq
+BOOST_PATCH=/sys/devices/system/cpu/cpufreq
+
+if [ ! -d $T_PATCH ]; then
+printf$COLOUR_RED No patch to CPUFREQ $COLOUR_DEFAULT\n
+exit 1
+fi
+
+ERRORS=0
+
+OLD_GOV=`cat $T_PATCH/scaling_governor`
+echo CURRENT GOVERNOR: $OLD_GOV
+echo SET GOVERNOR: performance
+echo performance $T_PATCH/scaling_governor
+
+function test_freqs1 {
+FREQS=`cat $1`
+for I in $FREQS; do
+ cpufreq_set_freq $I
+ if [ $2 ]; then
+ printf $COLOUR_BLUE BOOST $COLOUR_DEFAULT $I
+ fi
+ cpufreq_test_freq $I
+done
+}
+
+function test_freqs2 {
+FREQ=`cat $1`
+FREQS_ARRAY=($FREQ)
+
+for freq in ${FREQS_ARRAY[@]}
+do
+ echo REFERENCE FREQ: $freq
+ for f in ${FREQS_ARRAY[@]}
+ do
+ cpufreq_set_freq $freq
+ echo -n
+ cpufreq_set_freq $f
+ cpufreq_test_freq $f
+ done
+done
+}
+
+function restore {
+if [ -f $BOOST_PATCH/boost ]; then
+ cpufreq_boost_state $BOOST_STATE
+fi
+
+echo SET GOVERNOR: $OLD_GOV
+echo $OLD_GOV $T_PATCH/scaling_governor
+}
+
+function die {
+printf$COLOUR_RED FAILED $COLOUR_DEFAULT\n
+restore_gov
+exit 1
+}
+
+function cpufreq_test_freq {
+gzip /dev/urandom /dev/null
+pid=$!
+sleep 0.1
+CURR_FREQ=`cat $T_PATCH/cpuinfo_cur_freq`
+if [ $1 -eq $CURR_FREQ ]; then
+ printf \t$COLOUR_GREEN OK $COLOUR_DEFAULT\n
+else
+ printf $COLOUR_RED CURRENT $CURR_FREQ $COLOUR_DEFAULT\n
+ ERRORS=`expr $ERRORS + 1`
+ #die
+fi
+kill -9 $pid
+wait $! 2/dev/null
+}
+
+function cpufreq_set_freq {
+echo $1 $T_PATCH/scaling_max_freq || die $?
+printf FREQ:$COLOUR_GREEN %s $COLOUR_DEFAULT $1
+}
+
+function cpufreq_boost_state {
+ echo $1 $BOOST_PATCH/boost
+}
+
+function cpufreq_boost_status {
+ cat $BOOST_PATCH/boost
+}
Re: [PATCH 1/2] clk: samsung: exynos4x12: Enable ARMCLK down feature
Hi Krzysztof,
On 18.07.2014 11:53, Krzysztof Kozlowski wrote:
Enable ARMCLK down and up features on Exynos4212 and 4412 SoCs. The
frequency of ARMCLK will be reduced upon entering idle mode (WFI or
WFE). Additionally upon exiting from idle mode the divider for ARMCLK
will be brought back to 1.
These are exactly the same settings as for Exynos5250
(clk-exynos5250.c), except of Exynos4412 where ARMCLK down is enabled
for all 4 cores.
Could you add a sentence or two about the purpose of this change? E.g.
what it improves, in what conditions, etc.
Tested on Trats2 board (Exynos4412) and Samsung Gear 1 (Exynos4212).
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/clk/samsung/clk-exynos4.c | 53
+++
1 file changed, 53 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b/drivers/clk/samsung/clk-exynos4.c
index 7f4a473a7ad7..b8ea37b23984 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -114,11 +114,34 @@
#define DIV_CPU1 0x14504
#define GATE_SCLK_CPU0x14800
#define GATE_IP_CPU 0x14900
+#define PWR_CTRL10x15020
+#define PWR_CTRL20x15024
I guess these registers should be also added to save/restore list below
in this driver.
#define E4X12_DIV_ISP0 0x18300
#define E4X12_DIV_ISP1 0x18304
#define E4X12_GATE_ISP0 0x18800
#define E4X12_GATE_ISP1 0x18804
+/* Below definitions are used for PWR_CTRL settings */
+#define PWR_CTRL1_CORE2_DOWN_RATIO (7 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO (7 16)
I think these macros could be defined to take the ratio as its argument,
e.g.
#define PWR_CTRL1_CORE2_DOWN_RATIO(x) ((x) 28)
+#define PWR_CTRL1_DIV2_DOWN_EN (1 9)
+#define PWR_CTRL1_DIV1_DOWN_EN (1 8)
+#define PWR_CTRL1_USE_CORE3_WFE (1 7)
+#define PWR_CTRL1_USE_CORE2_WFE (1 6)
+#define PWR_CTRL1_USE_CORE1_WFE (1 5)
+#define PWR_CTRL1_USE_CORE0_WFE (1 4)
+#define PWR_CTRL1_USE_CORE3_WFI (1 3)
+#define PWR_CTRL1_USE_CORE2_WFI (1 2)
+#define PWR_CTRL1_USE_CORE1_WFI (1 1)
+#define PWR_CTRL1_USE_CORE0_WFI (1 0)
+
+#define PWR_CTRL2_DIV2_UP_EN (1 25)
+#define PWR_CTRL2_DIV1_UP_EN (1 24)
+#define PWR_CTRL2_DUR_STANDBY2_VAL (1 16)
+#define PWR_CTRL2_DUR_STANDBY1_VAL (1 8)
These two too.
+#define PWR_CTRL2_CORE2_UP_RATIO (1 4)
+#define PWR_CTRL2_CORE1_UP_RATIO (1 0)
These two as well.
+
/* the exynos4 soc type */
enum exynos4_soc {
EXYNOS4210,
@@ -1164,6 +1187,34 @@ static struct samsung_pll_clock
exynos4x12_plls[nr_plls] __initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
};
+static void __init exynos4_core_down_clock(void)
+{
+ unsigned int tmp;
+
+ /*
+ * Enable arm clock down (in idle) and set arm divider
+ * ratios in WFI/WFE state.
+ */
+ tmp = (PWR_CTRL1_CORE2_DOWN_RATIO | PWR_CTRL1_CORE1_DOWN_RATIO |
+ PWR_CTRL1_DIV2_DOWN_EN | PWR_CTRL1_DIV1_DOWN_EN |
+ PWR_CTRL1_USE_CORE1_WFE | PWR_CTRL1_USE_CORE0_WFE |
+ PWR_CTRL1_USE_CORE1_WFI | PWR_CTRL1_USE_CORE0_WFI);
+ if (of_machine_is_compatible(samsung,exynos4412))
Maybe you could use num_possible_cpus() here instead?
+ tmp |= PWR_CTRL1_USE_CORE3_WFE | PWR_CTRL1_USE_CORE2_WFE |
+PWR_CTRL1_USE_CORE3_WFI | PWR_CTRL1_USE_CORE2_WFI;
+ __raw_writel(tmp, reg_base + PWR_CTRL1);
+
+ /*
+ * Enable arm clock up (on exiting idle). Set arm divider
+ * ratios when not in idle along with the standby duration
+ * ratios.
+ */
+ tmp = (PWR_CTRL2_DIV2_UP_EN | PWR_CTRL2_DIV1_UP_EN |
+ PWR_CTRL2_DUR_STANDBY2_VAL | PWR_CTRL2_DUR_STANDBY1_VAL |
+ PWR_CTRL2_CORE2_UP_RATIO | PWR_CTRL2_CORE1_UP_RATIO);
+ __raw_writel(tmp, reg_base + PWR_CTRL2);
Do we need the clock up feature at all? The values you set seem to
configure both dividers to 2 (resulting in arm_clk = apll / 4) for a
very short period of time (16 ticks of some, unfortunately unspecified,
clock) between wake-up and setting the frequency back to normal.
Moreover, for certain settings (div_core * div_core2 set to 4 by
cpufreq) this might cause issues with activating higher frequency than
current voltage allows.
I believe the same comments apply for patch 2/2 as well.
Best regards,
Tomasz
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] irqchip: gic: Fix core ID calculation when topology is read from DT
On Thu, Jul 17, 2014 at 05:23:44PM +0200, Tomasz Figa wrote: Certain GIC implementation, namely those found on earlier, single cluster, Exynos SoCs, have registers mapped without per-CPU banking, which means that the driver needs to use different offset for each CPU. Currently the driver calculates the offset by multiplying value returned by cpu_logical_map() by CPU offset parsed from DT. This is correct when CPU topology is not specified in DT and aforementioned function returns core ID alone. However when DT contains CPU topology, the function changes to return cluster ID as well, which is non-zero on mentioned SoCs and so breaks the calculation in GIC driver. This patch fixes this by masking out cluster ID in CPU offset calculation so that only core ID is considered. Multi-cluster Exynos SoCs already have banked GIC implementations, so this simple fix should be enough. Reported-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com Reported-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com Signed-off-by: Tomasz Figa t.f...@samsung.com --- drivers/irqchip/irq-gic.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index ddee133..5c15a09 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -40,6 +40,7 @@ #include linux/irqchip/chained_irq.h #include linux/irqchip/arm-gic.h Applied to irqchip/urgent and Cc'd to stable for v3.3+ thx, Jason. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCHv6] mmc: dw_mmc: change to use recommended reset procedure
On Tue, July 15, 2014, Sonny Rao wrote:
This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
Acked-by: Seungwon Jeon tgih@samsung.com
Thanks,
Seungwon Jeon
---
v2: Add Generic DMA support
per the documentation, move interrupt clear before wait
make the test for DMA host-use_dma rather than host-using_dma
add proper return values (although it appears no caller checks)
v3: rename fifo reset function, and change callers
use this combined reset function in dw_mci_resume()
just one caller left (probe), so get rid of dw_mci_ctrl_all_reset()
use DMA reset bit for all systems which use DMA
remove extra IDMAC reset in dw_mci_work_routine_card()
do CIU clock update in error path, if CIU reset cleared
v4: remove comment about FIFO reset in dw_mci_work_routine_card()
move down error message when control reset clears but others don't
and clarify the error stating that we will still update clocks
make flags for all reset bits a macro
v5: don't use dw_mci_reset() in dw_mci_resume() and instead match what
is done in dw_mci_probe() and don't force inline dw_mci_resume()
v6: add newlines to dev_err() messages
---
drivers/mmc/host/dw_mmc.c | 86
++-
drivers/mmc/host/dw_mmc.h | 5 +++
2 files changed, 68 insertions(+), 23 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 55cd110..0c0aecb 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -111,8 +111,7 @@ static const u8 tuning_blk_pattern_8bit[] = {
0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
};
-static inline bool dw_mci_fifo_reset(struct dw_mci *host);
-static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host);
+static bool dw_mci_reset(struct dw_mci *host);
#if defined(CONFIG_DEBUG_FS)
static int dw_mci_req_show(struct seq_file *s, void *v)
@@ -1254,7 +1253,7 @@ static int dw_mci_data_complete(struct dw_mci *host,
struct mmc_data *data)
* After an error, there may be data lingering
* in the FIFO
*/
- dw_mci_fifo_reset(host);
+ dw_mci_reset(host);
} else {
data-bytes_xfered = data-blocks * data-blksz;
data-error = 0;
@@ -1371,7 +1370,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
/* CMD error in data command */
if (mrq-cmd-error mrq-data)
- dw_mci_fifo_reset(host);
+ dw_mci_reset(host);
host-cmd = NULL;
host-data = NULL;
@@ -1982,14 +1981,8 @@ static void dw_mci_work_routine_card(struct
work_struct *work)
}
/* Power down slot */
- if (present == 0) {
- /* Clear down the FIFO */
- dw_mci_fifo_reset(host);
-#ifdef CONFIG_MMC_DW_IDMAC
- dw_mci_idmac_reset(host);
-#endif
-
- }
+ if (present == 0)
+ dw_mci_reset(host);
spin_unlock_bh(host-lock);
@@ -2323,8 +2316,11 @@ static bool dw_mci_ctrl_reset(struct dw_mci *host, u32
reset)
return false;
}
-static inline bool dw_mci_fifo_reset(struct dw_mci *host)
+static bool dw_mci_reset(struct dw_mci *host)
{
+ u32 flags = SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET;
+ bool ret = false;
+
/*
* Reseting generates a block interrupt, hence setting
* the scatter-gather pointer to NULL.
@@ -2334,15 +2330,59 @@ static inline bool dw_mci_fifo_reset(struct dw_mci
*host)
host-sg = NULL;
}
- return dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET);
-}
+ if (host-use_dma)
+ flags |= SDMMC_CTRL_DMA_RESET;
-static inline bool dw_mci_ctrl_all_reset(struct dw_mci *host)
-{
- return dw_mci_ctrl_reset(host,
- SDMMC_CTRL_FIFO_RESET |
- SDMMC_CTRL_RESET |
- SDMMC_CTRL_DMA_RESET);
+ if (dw_mci_ctrl_reset(host, flags)) {
+ /*
+ * In all cases we clear the RAWINTS register to clear any
+ * interrupts.
+ */
+ mci_writel(host, RINTSTS, 0x);
+
+ /* if using dma we wait for dma_req to clear */
+ if (host-use_dma) {
+ unsigned long timeout = jiffies + msecs_to_jiffies(500);
+ u32 status;
+ do {
+ status = mci_readl(host, STATUS);
+
Re: [PATCH 1/2] clk: samsung: exynos4x12: Enable ARMCLK down feature
On pią, 2014-07-18 at 15:01 +0200, Tomasz Figa wrote:
Hi Krzysztof,
On 18.07.2014 11:53, Krzysztof Kozlowski wrote:
Enable ARMCLK down and up features on Exynos4212 and 4412 SoCs. The
frequency of ARMCLK will be reduced upon entering idle mode (WFI or
WFE). Additionally upon exiting from idle mode the divider for ARMCLK
will be brought back to 1.
These are exactly the same settings as for Exynos5250
(clk-exynos5250.c), except of Exynos4412 where ARMCLK down is enabled
for all 4 cores.
Could you add a sentence or two about the purpose of this change? E.g.
what it improves, in what conditions, etc.
Sure, I'll describe benefits.
Tested on Trats2 board (Exynos4412) and Samsung Gear 1 (Exynos4212).
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
drivers/clk/samsung/clk-exynos4.c | 53
+++
1 file changed, 53 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b/drivers/clk/samsung/clk-exynos4.c
index 7f4a473a7ad7..b8ea37b23984 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -114,11 +114,34 @@
#define DIV_CPU1 0x14504
#define GATE_SCLK_CPU 0x14800
#define GATE_IP_CPU0x14900
+#define PWR_CTRL1 0x15020
+#define PWR_CTRL2 0x15024
I guess these registers should be also added to save/restore list below
in this driver.
Yes, you're right.
#define E4X12_DIV_ISP0 0x18300
#define E4X12_DIV_ISP1 0x18304
#define E4X12_GATE_ISP00x18800
#define E4X12_GATE_ISP10x18804
+/* Below definitions are used for PWR_CTRL settings */
+#define PWR_CTRL1_CORE2_DOWN_RATIO (7 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO (7 16)
I think these macros could be defined to take the ratio as its argument,
e.g.
#define PWR_CTRL1_CORE2_DOWN_RATIO(x) ((x) 28)
OK.
+#define PWR_CTRL1_DIV2_DOWN_EN (1 9)
+#define PWR_CTRL1_DIV1_DOWN_EN (1 8)
+#define PWR_CTRL1_USE_CORE3_WFE(1 7)
+#define PWR_CTRL1_USE_CORE2_WFE(1 6)
+#define PWR_CTRL1_USE_CORE1_WFE(1 5)
+#define PWR_CTRL1_USE_CORE0_WFE(1 4)
+#define PWR_CTRL1_USE_CORE3_WFI(1 3)
+#define PWR_CTRL1_USE_CORE2_WFI(1 2)
+#define PWR_CTRL1_USE_CORE1_WFI(1 1)
+#define PWR_CTRL1_USE_CORE0_WFI(1 0)
+
+#define PWR_CTRL2_DIV2_UP_EN (1 25)
+#define PWR_CTRL2_DIV1_UP_EN (1 24)
+#define PWR_CTRL2_DUR_STANDBY2_VAL (1 16)
+#define PWR_CTRL2_DUR_STANDBY1_VAL (1 8)
These two too.
+#define PWR_CTRL2_CORE2_UP_RATIO (1 4)
+#define PWR_CTRL2_CORE1_UP_RATIO (1 0)
These two as well.
+
/* the exynos4 soc type */
enum exynos4_soc {
EXYNOS4210,
@@ -1164,6 +1187,34 @@ static struct samsung_pll_clock
exynos4x12_plls[nr_plls] __initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
};
+static void __init exynos4_core_down_clock(void)
+{
+ unsigned int tmp;
+
+ /*
+* Enable arm clock down (in idle) and set arm divider
+* ratios in WFI/WFE state.
+*/
+ tmp = (PWR_CTRL1_CORE2_DOWN_RATIO | PWR_CTRL1_CORE1_DOWN_RATIO |
+ PWR_CTRL1_DIV2_DOWN_EN | PWR_CTRL1_DIV1_DOWN_EN |
+ PWR_CTRL1_USE_CORE1_WFE | PWR_CTRL1_USE_CORE0_WFE |
+ PWR_CTRL1_USE_CORE1_WFI | PWR_CTRL1_USE_CORE0_WFI);
+ if (of_machine_is_compatible(samsung,exynos4412))
Maybe you could use num_possible_cpus() here instead?
Sure.
+ tmp |= PWR_CTRL1_USE_CORE3_WFE | PWR_CTRL1_USE_CORE2_WFE |
+ PWR_CTRL1_USE_CORE3_WFI | PWR_CTRL1_USE_CORE2_WFI;
+ __raw_writel(tmp, reg_base + PWR_CTRL1);
+
+ /*
+* Enable arm clock up (on exiting idle). Set arm divider
+* ratios when not in idle along with the standby duration
+* ratios.
+*/
+ tmp = (PWR_CTRL2_DIV2_UP_EN | PWR_CTRL2_DIV1_UP_EN |
+ PWR_CTRL2_DUR_STANDBY2_VAL | PWR_CTRL2_DUR_STANDBY1_VAL |
+ PWR_CTRL2_CORE2_UP_RATIO | PWR_CTRL2_CORE1_UP_RATIO);
+ __raw_writel(tmp, reg_base + PWR_CTRL2);
Do we need the clock up feature at all? The values you set seem to
configure both dividers to 2 (resulting in arm_clk = apll / 4) for a
very short period of time (16 ticks of some, unfortunately unspecified,
clock) between wake-up and setting the frequency back to normal.
Moreover, for certain settings (div_core * div_core2 set to 4 by
cpufreq) this might cause issues with activating higher frequency than
current voltage allows.
It seems that the clock up feature is not needed on Exynos 4x12. I'll
remove it.
Additionally I'll add support for 4210.
Thanks for
[PATCH 0/2] Convert exynos PPMU driver to be built as module
Hi, There's no reason why the exynos PPMU can't be built as a module except you need - - The first patch exports the functions that are needed to build devfreq drivers as modules. - The second patch then converts the exynos PPMU devfreq driver to be built as a module. Compile tested only. Thanks Punit Agrawal (1): PM / devfreq: exynos: Enable building exynos PPMU as module Ørjan Eide (1): PM / devfreq: Export helper functions for drivers drivers/devfreq/Kconfig |2 +- drivers/devfreq/devfreq.c|3 +++ drivers/devfreq/exynos/exynos_ppmu.c |3 +++ 3 files changed, 7 insertions(+), 1 deletion(-) -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] PM / devfreq: Export helper functions for drivers
From: Ørjan Eide orjan.e...@arm.com
These functions are indended for use by drivers and should be available
also when the driver is built as a module.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Ørjan Eide orjan.e...@arm.com
---
drivers/devfreq/devfreq.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 9f90369..30b538d8 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -1119,6 +1119,7 @@ struct dev_pm_opp *devfreq_recommended_opp(struct device
*dev,
return opp;
}
+EXPORT_SYMBOL(devfreq_recommended_opp);
/**
* devfreq_register_opp_notifier() - Helper function to get devfreq notified
@@ -1142,6 +1143,7 @@ int devfreq_register_opp_notifier(struct device *dev,
struct devfreq *devfreq)
return ret;
}
+EXPORT_SYMBOL(devfreq_register_opp_notifier);
/**
* devfreq_unregister_opp_notifier() - Helper function to stop getting devfreq
@@ -1168,6 +1170,7 @@ int devfreq_unregister_opp_notifier(struct device *dev,
struct devfreq *devfreq)
return ret;
}
+EXPORT_SYMBOL(devfreq_unregister_opp_notifier);
static void devm_devfreq_opp_release(struct device *dev, void *res)
{
--
1.7.10.4
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] PM / devfreq: exynos: Enable building exynos PPMU as module
Export symbols from the PPMU driver needed to build the exynos bus
driver as a module.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Kukjin Kim kgene@samsung.com
Cc: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Punit Agrawal punit.agra...@arm.com
---
drivers/devfreq/Kconfig |2 +-
drivers/devfreq/exynos/exynos_ppmu.c |3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index 49e74c1..77bf126 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -79,7 +79,7 @@ config ARM_EXYNOS4_BUS_DEVFREQ
This does not yet operate with optimal voltages.
config ARM_EXYNOS5_BUS_DEVFREQ
- bool ARM Exynos5250 Bus DEVFREQ Driver
+ tristate ARM Exynos5250 Bus DEVFREQ Driver
depends on SOC_EXYNOS5250
select ARCH_HAS_OPP
select DEVFREQ_GOV_SIMPLE_ONDEMAND
diff --git a/drivers/devfreq/exynos/exynos_ppmu.c
b/drivers/devfreq/exynos/exynos_ppmu.c
index 75fcc51..97b75e5 100644
--- a/drivers/devfreq/exynos/exynos_ppmu.c
+++ b/drivers/devfreq/exynos/exynos_ppmu.c
@@ -73,6 +73,7 @@ void busfreq_mon_reset(struct busfreq_ppmu_data *ppmu_data)
exynos_ppmu_start(ppmu_base);
}
}
+EXPORT_SYMBOL(busfreq_mon_reset);
void exynos_read_ppmu(struct busfreq_ppmu_data *ppmu_data)
{
@@ -97,6 +98,7 @@ void exynos_read_ppmu(struct busfreq_ppmu_data *ppmu_data)
busfreq_mon_reset(ppmu_data);
}
+EXPORT_SYMBOL(exynos_read_ppmu);
int exynos_get_busier_ppmu(struct busfreq_ppmu_data *ppmu_data)
{
@@ -114,3 +116,4 @@ int exynos_get_busier_ppmu(struct busfreq_ppmu_data
*ppmu_data)
return busy;
}
+EXPORT_SYMBOL(exynos_get_busier_ppmu);
--
1.7.10.4
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] clk: samsung: exynos4: Enable ARMCLK down feature
Enable ARMCLK down feature on all Exynos4 SoCs. The frequency of
ARMCLK will be reduced upon entering idle mode (WFI or WFE).
The feature behaves like very fast cpufreq ondemand governor. In idle
mode this reduces energy consumption on full frequency chosen by
cpufreq governor by approximately:
- Trats2: 6.5% (153 mA - 143 mA)
- Trats: 33.0% (180 mA - 120 mA)
- Gear1: 27.0% (180 mA - 130 mA)
The patch uses simillar settings as Exynos5250 (clk-exynos5250.c),
except it disables clock up feature and on Exynos4412 ARMCLK down is
enabled for all 4 cores.
Tested on Trats board (Exynos4210), Trats2 board (Exynos4412) and
Samsung Gear 1 (Exynos4212).
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes since v1:
1. Add PWR_CTRL registers to the list of saved clk registers on
Exynos4x12. Suggested by Tomasz Figa.
2. Disable the clock up feature. (sug. Tomasz Figa)
3. Use macros for setting clock down ratio. (sug. Tomasz Figa)
4. Use num_possible_cpus() for exception on Exynos4x12. (sug. Tomasz
Figa)
5. Enable the clock down feature also on Exynos4210 Trats board.
---
drivers/clk/samsung/clk-exynos4.c | 46 +++
1 file changed, 46 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b/drivers/clk/samsung/clk-exynos4.c
index 7f4a473a7ad7..86c7709dc6d6 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -114,11 +114,27 @@
#define DIV_CPU1 0x14504
#define GATE_SCLK_CPU 0x14800
#define GATE_IP_CPU0x14900
+#define PWR_CTRL1 0x15020
+#define E4X12_PWR_CTRL20x15024
#define E4X12_DIV_ISP0 0x18300
#define E4X12_DIV_ISP1 0x18304
#define E4X12_GATE_ISP00x18800
#define E4X12_GATE_ISP10x18804
+/* Below definitions are used for PWR_CTRL settings */
+#define PWR_CTRL1_CORE2_DOWN_RATIO(x) (((x) 0x7) 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO(x) (((x) 0x7) 16)
+#define PWR_CTRL1_DIV2_DOWN_EN (1 9)
+#define PWR_CTRL1_DIV1_DOWN_EN (1 8)
+#define PWR_CTRL1_USE_CORE3_WFE(1 7)
+#define PWR_CTRL1_USE_CORE2_WFE(1 6)
+#define PWR_CTRL1_USE_CORE1_WFE(1 5)
+#define PWR_CTRL1_USE_CORE0_WFE(1 4)
+#define PWR_CTRL1_USE_CORE3_WFI(1 3)
+#define PWR_CTRL1_USE_CORE2_WFI(1 2)
+#define PWR_CTRL1_USE_CORE1_WFI(1 1)
+#define PWR_CTRL1_USE_CORE0_WFI(1 0)
+
/* the exynos4 soc type */
enum exynos4_soc {
EXYNOS4210,
@@ -155,6 +171,7 @@ static unsigned long exynos4210_clk_save[] __initdata = {
E4210_GATE_IP_LCD1,
E4210_GATE_IP_PERIR,
E4210_MPLL_CON0,
+ PWR_CTRL1,
};
static unsigned long exynos4x12_clk_save[] __initdata = {
@@ -164,6 +181,8 @@ static unsigned long exynos4x12_clk_save[] __initdata = {
E4X12_DIV_ISP,
E4X12_DIV_CAM1,
E4X12_MPLL_CON0,
+ PWR_CTRL1,
+ E4X12_PWR_CTRL2,
};
static unsigned long exynos4_clk_pll_regs[] __initdata = {
@@ -1164,6 +1183,32 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls]
__initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
};
+static void __init exynos4_core_down_clock(enum exynos4_soc soc)
+{
+ unsigned int tmp;
+
+ /*
+* Enable arm clock down (in idle) and set arm divider
+* ratios in WFI/WFE state.
+*/
+ tmp = (PWR_CTRL1_CORE2_DOWN_RATIO(7) | PWR_CTRL1_CORE1_DOWN_RATIO(7) |
+ PWR_CTRL1_DIV2_DOWN_EN | PWR_CTRL1_DIV1_DOWN_EN |
+ PWR_CTRL1_USE_CORE1_WFE | PWR_CTRL1_USE_CORE0_WFE |
+ PWR_CTRL1_USE_CORE1_WFI | PWR_CTRL1_USE_CORE0_WFI);
+ /* On Exynos4412 enable it also on core 2 and 3 */
+ if (num_possible_cpus() == 4)
+ tmp |= PWR_CTRL1_USE_CORE3_WFE | PWR_CTRL1_USE_CORE2_WFE |
+ PWR_CTRL1_USE_CORE3_WFI | PWR_CTRL1_USE_CORE2_WFI;
+ __raw_writel(tmp, reg_base + PWR_CTRL1);
+
+ /*
+* Disable the clock up feature on Exynos4x12, in case it was
+* enabled by bootloader.
+*/
+ if (exynos4_soc == EXYNOS4X12)
+ __raw_writel(0x0, reg_base + E4X12_PWR_CTRL2);
+}
+
/* register exynos4 clocks */
static void __init exynos4_clk_init(struct device_node *np,
enum exynos4_soc soc)
@@ -1250,6 +1295,7 @@ static void __init exynos4_clk_init(struct device_node
*np,
samsung_clk_register_alias(ctx, exynos4_aliases,
ARRAY_SIZE(exynos4_aliases));
+ exynos4_core_down_clock(soc);
exynos4_clk_sleep_init();
pr_info(%s clocks: sclk_apll = %ld, sclk_mpll = %ld\n
--
1.9.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to
[PATCH v2 2/2] clk: samsung: exynos3250: Enable ARMCLK down feature
Enable ARMCLK down feature on Exynos3250 SoC. The frequency of
ARMCLK will be reduced upon entering idle mode (WFI or WFE).
The feature behaves like very fast cpufreq ondemand governor.
The patch uses simillar settings as Exynos5250 (clk-exynos5250.c),
except it disables clock up feature.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes since v1:
1. Add PWR_CTRL registers to the list of saved clk registers on
Exynos3250. Suggested by Tomasz Figa.
2. Disable the clock up feature. (sug. Tomasz Figa)
3. Use macros for setting clock down ratio. (sug. Tomasz Figa)
---
drivers/clk/samsung/clk-exynos3250.c | 41
1 file changed, 41 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos3250.c
b/drivers/clk/samsung/clk-exynos3250.c
index 7a17bd40d1dd..a50dc88f0e8f 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -87,6 +87,22 @@
#define SRC_CPU0x14200
#define DIV_CPU0 0x14500
#define DIV_CPU1 0x14504
+#define PWR_CTRL1 0x15020
+#define PWR_CTRL2 0x15024
+
+/* Below definitions are used for PWR_CTRL settings */
+#define PWR_CTRL1_CORE2_DOWN_RATIO(x) (((x) 0x7) 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO(x) (((x) 0x7) 16)
+#define PWR_CTRL1_DIV2_DOWN_EN (1 9)
+#define PWR_CTRL1_DIV1_DOWN_EN (1 8)
+#define PWR_CTRL1_USE_CORE3_WFE(1 7)
+#define PWR_CTRL1_USE_CORE2_WFE(1 6)
+#define PWR_CTRL1_USE_CORE1_WFE(1 5)
+#define PWR_CTRL1_USE_CORE0_WFE(1 4)
+#define PWR_CTRL1_USE_CORE3_WFI(1 3)
+#define PWR_CTRL1_USE_CORE2_WFI(1 2)
+#define PWR_CTRL1_USE_CORE1_WFI(1 1)
+#define PWR_CTRL1_USE_CORE0_WFI(1 0)
/* list of PLLs to be registered */
enum exynos3250_plls {
@@ -168,6 +184,8 @@ static unsigned long exynos3250_cmu_clk_regs[] __initdata =
{
SRC_CPU,
DIV_CPU0,
DIV_CPU1,
+ PWR_CTRL1,
+ PWR_CTRL2,
};
static int exynos3250_clk_suspend(void)
@@ -748,6 +766,27 @@ static struct samsung_pll_clock exynos3250_plls[nr_plls]
__initdata = {
UPLL_LOCK, UPLL_CON0, NULL),
};
+static void __init exynos3_core_down_clock(void)
+{
+ unsigned int tmp;
+
+ /*
+* Enable arm clock down (in idle) and set arm divider
+* ratios in WFI/WFE state.
+*/
+ tmp = (PWR_CTRL1_CORE2_DOWN_RATIO(7) | PWR_CTRL1_CORE1_DOWN_RATIO(7) |
+ PWR_CTRL1_DIV2_DOWN_EN | PWR_CTRL1_DIV1_DOWN_EN |
+ PWR_CTRL1_USE_CORE1_WFE | PWR_CTRL1_USE_CORE0_WFE |
+ PWR_CTRL1_USE_CORE1_WFI | PWR_CTRL1_USE_CORE0_WFI);
+ __raw_writel(tmp, reg_base + PWR_CTRL1);
+
+ /*
+* Disable the clock up feature on Exynos4x12, in case it was
+* enabled by bootloader.
+*/
+ __raw_writel(0x0, reg_base + PWR_CTRL2);
+}
+
static void __init exynos3250_cmu_init(struct device_node *np)
{
struct samsung_clk_provider *ctx;
@@ -775,6 +814,8 @@ static void __init exynos3250_cmu_init(struct device_node
*np)
samsung_clk_register_div(ctx, div_clks, ARRAY_SIZE(div_clks));
samsung_clk_register_gate(ctx, gate_clks, ARRAY_SIZE(gate_clks));
+ exynos3_core_down_clock();
+
exynos3250_clk_sleep_init();
}
CLK_OF_DECLARE(exynos3250_cmu, samsung,exynos3250-cmu, exynos3250_cmu_init);
--
1.9.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
On Fri, Jul 18, 2014 at 8:14 PM, Arnd Bergmann a...@arndb.de wrote: On Friday 18 July 2014 19:00:48 Chanwoo Choi wrote: On 07/18/2014 06:47 PM, Arnd Bergmann wrote: Further, why is it called sclk_adc rather than just sclk? The sclk means 'special clock' in Exynos TRM. Exynos SoC has varisou sclk clocks. 'sclk_adc' is only used for ADC IP. But that sounds like sclk_adc is the name of the global name of the clock signal coming out of the clock controller. I still think it would be best to name it 'sclk' as the input for the adc. It shouldn't rely on a particular name of the clock controller. I think 'sclk' is too common name. 'sclk' don't include specific device name. As I know, usual clock name includes the name of IP or includes the specific meaning for each IP. In my opinion, I think sclk_adc is better than 'sclk'. Thanks, Chanwoo Choi -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
On Saturday 19 July 2014 00:15:35 Chanwoo Choi wrote: On Fri, Jul 18, 2014 at 8:14 PM, Arnd Bergmann a...@arndb.de wrote: On Friday 18 July 2014 19:00:48 Chanwoo Choi wrote: On 07/18/2014 06:47 PM, Arnd Bergmann wrote: Further, why is it called sclk_adc rather than just sclk? The sclk means 'special clock' in Exynos TRM. Exynos SoC has varisou sclk clocks. 'sclk_adc' is only used for ADC IP. But that sounds like sclk_adc is the name of the global name of the clock signal coming out of the clock controller. I still think it would be best to name it 'sclk' as the input for the adc. It shouldn't rely on a particular name of the clock controller. I think 'sclk' is too common name. 'sclk' don't include specific device name. As I know, usual clock name includes the name of IP or includes the specific meaning for each IP. No, normally it does not include the name of the IP, that's my whole point. Including the name of the IP is completely pointless because that is implied by the fact that it's being used by that particular IP. Ideally you would find the data sheet for the ADC IP block and figure out what this clock is used for, then find the right name for that. In a lot of cases, we are actually better off not naming the clocks at all but simply enumerating them if nobody knows what they are good for. In that case, you would simply have the first clock and the second clock of the ADC part and enable them both. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/4] Add Exynos4412 based Odroid X2 and U2/U3/U3+ support
Hello, On 06/30/2014 07:34 AM, Marek Szyprowski wrote: Hello, On 2014-06-25 15:26, Marek Szyprowski wrote: Hello, This is the second version of the initial patch series adding support for Exynos 4412 based Odroid X2 and U2/U3/U3+ boards and improving support for Odroid X. Complete USB support for Odroid U2/U3/U3+ still requires some fixes in Exynos4 USB2 Phy driver and clock driver for CLKOUT: http://thread.gmane.org/gmane.linux.kernel/1731843/ http://www.spinics.net/lists/linux-usb/msg109587.html The above changes however don't affect Odroid DTS files, but without them, usb3503 hub is not yet functional. Support for audio codec will be posted separately by Sylwester Nawrocki soon. Support for HDMI video output will be also posted separately together with the required ExynosDRM-HDMI fixes. If one is interested in more complete and open-source Odroid board support, there are also patches for u-boot project: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/188295/focus=188610 Just to let everyone knows - updated Odroid patches for uboot has been posted in the following thread: http://www.mail-archive.com/u-boot@lists.denx.de/msg141234.html You can also download them here: http://patchwork.ozlabs.org/project/uboot/list/?submitter=23519 Best regards Please follow the link to the new U-boot Odroid U3/X2 patches: http://www.mail-archive.com/u-boot@lists.denx.de/msg142507.html Regards, -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: dts: add CPU nodes for Exynos4 SoCs
Recent patch by Tomasz Figa (irqchip: gic: Fix core ID calculation
when topology is read from DT) fixed GIC driver to filter cluster ID
from values returned by cpu_logical_map() for SoCs having registers
mapped without per-CPU banking making it is possible to add CPU nodes
for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also
required by future changes adding initialization of cpuidle states in
Exynos cpuidle driver through DT.
Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC).
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
---
Based on next-20140717 branch of linux-next tree +
- [PATCH 2/6] ARM: EXYNOS: Fix core ID used by platsmp and hotplug code
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg32811.html
- [PATCH] irqchip: gic: Fix core ID calculation when topology is read from DT
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34277.html
arch/arm/boot/dts/exynos4210.dtsi | 17 +
arch/arm/boot/dts/exynos4212.dtsi | 17 +
arch/arm/boot/dts/exynos4412.dtsi | 29 +
3 files changed, 63 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index ee3001f..b99fc83 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -31,6 +31,23 @@
pinctrl2 = pinctrl_2;
};
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0x900;
+ };
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0x901;
+ };
+ };
+
sysram@0202 {
compatible = mmio-sram;
reg = 0x0202 0x2;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi
b/arch/arm/boot/dts/exynos4212.dtsi
index 3c00e6e..484a2da 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -22,6 +22,23 @@
/ {
compatible = samsung,exynos4212, samsung,exynos4;
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA00;
+ };
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA01;
+ };
+ };
+
combiner: interrupt-controller@1044 {
samsung,combiner-nr = 18;
};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi
b/arch/arm/boot/dts/exynos4412.dtsi
index c42a3e1..89f4743 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -22,6 +22,35 @@
/ {
compatible = samsung,exynos4412, samsung,exynos4;
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA00;
+ };
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA01;
+ };
+
+ cpu@2 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA02;
+ };
+
+ cpu@3 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA03;
+ };
+ };
+
combiner: interrupt-controller@1044 {
samsung,combiner-nr = 20;
};
--
1.8.2.3
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
On Sat, Jul 19, 2014 at 12:23 AM, Arnd Bergmann a...@arndb.de wrote:
On Saturday 19 July 2014 00:15:35 Chanwoo Choi wrote:
On Fri, Jul 18, 2014 at 8:14 PM, Arnd Bergmann a...@arndb.de wrote:
On Friday 18 July 2014 19:00:48 Chanwoo Choi wrote:
On 07/18/2014 06:47 PM, Arnd Bergmann wrote:
Further, why is it called sclk_adc rather than just sclk?
The sclk means 'special clock' in Exynos TRM. Exynos SoC has varisou sclk
clocks.
'sclk_adc' is only used for ADC IP.
But that sounds like sclk_adc is the name of the global name
of the clock signal coming out of the clock controller.
I still think it would be best to name it 'sclk' as the input
for the adc. It shouldn't rely on a particular name of the
clock controller.
I think 'sclk' is too common name. 'sclk' don't include specific device name.
As I know, usual clock name includes the name of IP or includes the
specific meaning for each IP.
No, normally it does not include the name of the IP, that's my whole point.
Including the name of the IP is completely pointless because that is
implied by the fact that it's being used by that particular IP.
Ideally you would find the data sheet for the ADC IP block and figure
out what this clock is used for, then find the right name for that.
I mentioned the meaning of clocks ('adc', 'sclk_adc') as following in
patch description.
But, you think that need the more proper name instead of 'sclk_adc' to mean the
correct operation of 'sclk_adc'. I'll check once again the meaning of
'sclk_adc' in data sheet
and renaming it.
Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
- 'adc' clock: bus clock for ADC
Exynos3250 has additional 'sclk_adc' clock as following:
- 'sclk_adc' clock: special clock for ADC which provide clock to internal ADC
In a lot of cases, we are actually better off not naming the clocks
at all but simply enumerating them if nobody knows what they are good
for. In that case, you would simply have the first clock and the second
clock of the ADC part and enable them both.
Thanks for your review.
Chanwoo Choi
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
On Fri, Jul 18, 2014 at 6:50 PM, Arnd Bergmann a...@arndb.de wrote:
On Friday 18 July 2014 14:59:45 Chanwoo Choi wrote:
Must be samsung,exynos-adc-v2 for
future controllers.
It would be good to change 'future controllers' to something else now.
Presumably that word was used before the actual products were announced,
but now they are publically known.
+ Must be samsung,exynos3250-adc-v2 for
+ controllers compatible with ADC of
Exynos3250.
Doesn't this version have a specific name as well? The ADC block
seems to use version numbers, so better put those in here to avoid
confusion when another Exynos7890 comes out that uses the same
ADC as exynos3250.
If don't add new compatible including specific exynos version,
I would add new 'adc-needs-sclk' property with existing 'exynos-adc-v2'
compatible name.
Dear Naveen, Tomasz,
If existing exynos-adc driver add just one property for 'sclk_adc'
as following, exynos-adc could not include the exynos version
in compatible name.
I need your opinion about it.
adc: adc@126C {
compatible = samsung,exynos-adc-v2;
reg = 0x126C 0x100, 0x10020718 0x4;
interrupts = 0 137 0;
clock-names = adc, sclk_adc;
clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
+adc-needs-sclk;
#io-channel-cells = 1;
io-channel-ranges;
}
Thanks,
Chanwoo Choi
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: add CPU nodes for Exynos4 SoCs
On Fri, Jul 18, 2014 at 05:00:02PM +0100, Bartlomiej Zolnierkiewicz wrote:
Recent patch by Tomasz Figa (irqchip: gic: Fix core ID calculation
when topology is read from DT) fixed GIC driver to filter cluster ID
from values returned by cpu_logical_map() for SoCs having registers
mapped without per-CPU banking making it is possible to add CPU nodes
for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also
required by future changes adding initialization of cpuidle states in
Exynos cpuidle driver through DT.
Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC).
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
---
Based on next-20140717 branch of linux-next tree +
- [PATCH 2/6] ARM: EXYNOS: Fix core ID used by platsmp and hotplug code
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg32811.html
- [PATCH] irqchip: gic: Fix core ID calculation when topology is read from DT
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34277.html
arch/arm/boot/dts/exynos4210.dtsi | 17 +
arch/arm/boot/dts/exynos4212.dtsi | 17 +
arch/arm/boot/dts/exynos4412.dtsi | 29 +
3 files changed, 63 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index ee3001f..b99fc83 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -31,6 +31,23 @@
pinctrl2 = pinctrl_2;
};
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0x900;
+ };
Please match the unit-address with the reg (e.g. this should be
cpu@900).
Please do this for all the other CPU nodes.
Thanks,
Mark.
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0x901;
+ };
+ };
+
sysram@0202 {
compatible = mmio-sram;
reg = 0x0202 0x2;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi
b/arch/arm/boot/dts/exynos4212.dtsi
index 3c00e6e..484a2da 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -22,6 +22,23 @@
/ {
compatible = samsung,exynos4212, samsung,exynos4;
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA00;
+ };
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA01;
+ };
+ };
+
combiner: interrupt-controller@1044 {
samsung,combiner-nr = 18;
};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi
b/arch/arm/boot/dts/exynos4412.dtsi
index c42a3e1..89f4743 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -22,6 +22,35 @@
/ {
compatible = samsung,exynos4412, samsung,exynos4;
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA00;
+ };
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA01;
+ };
+
+ cpu@2 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA02;
+ };
+
+ cpu@3 {
+ device_type = cpu;
+ compatible = arm,cortex-a9;
+ reg = 0xA03;
+ };
+ };
+
combiner: interrupt-controller@1044 {
samsung,combiner-nr = 20;
};
--
1.8.2.3
___
linux-arm-kernel mailing list
linux-arm-ker...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
On Saturday 19 July 2014 01:11:53 Chanwoo Choi wrote: Exynos3250/Exynos4/Exynos5 has 'adc' clock as following: - 'adc' clock: bus clock for ADC Exynos3250 has additional 'sclk_adc' clock as following: - 'sclk_adc' clock: special clock for ADC which provide clock to internal ADC The bus clock is often named apb_pclk, but it's too late to change that now, and it's not clear if the device is actually on APB. The problem with sclk_adc is that it's very close to the name used in the clock provider, with is CLK_SCLK_TSADC. Please try to avoid the ambiguity here and make it clear that they are not referring to the same thing. internal or special might be good if you want to avoid sclk. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
On Saturday 19 July 2014 01:23:15 Chanwoo Choi wrote:
If don't add new compatible including specific exynos version,
I would add new 'adc-needs-sclk' property with existing 'exynos-adc-v2'
compatible name.
Dear Naveen, Tomasz,
If existing exynos-adc driver add just one property for 'sclk_adc'
as following, exynos-adc could not include the exynos version
in compatible name.
I need your opinion about it.
adc: adc@126C {
compatible = samsung,exynos-adc-v2;
reg = 0x126C 0x100, 0x10020718 0x4;
interrupts = 0 137 0;
clock-names = adc, sclk_adc;
clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
+adc-needs-sclk;
#io-channel-cells = 1;
io-channel-ranges;
}
How about just making it an optional clock? That would be much
easier because then you can simply see if the clock itself is
there and use it, or otherwise ignore it.
Arnd
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
On Sat, Jul 19, 2014 at 1:31 AM, Arnd Bergmann a...@arndb.de wrote: On Saturday 19 July 2014 01:11:53 Chanwoo Choi wrote: Exynos3250/Exynos4/Exynos5 has 'adc' clock as following: - 'adc' clock: bus clock for ADC Exynos3250 has additional 'sclk_adc' clock as following: - 'sclk_adc' clock: special clock for ADC which provide clock to internal ADC The bus clock is often named apb_pclk, but it's too late to change that now, and it's not clear if the device is actually on APB. The problem with sclk_adc is that it's very close to the name used in the clock provider, with is CLK_SCLK_TSADC. Please try to avoid the ambiguity here and make it clear that they are not referring to the same thing. internal or special might be good if you want to avoid sclk. OK, thanks for your feedback. I'll try to find proper name. Chanwoo Choi -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
On Sat, Jul 19, 2014 at 1:33 AM, Arnd Bergmann a...@arndb.de wrote:
On Saturday 19 July 2014 01:23:15 Chanwoo Choi wrote:
If don't add new compatible including specific exynos version,
I would add new 'adc-needs-sclk' property with existing 'exynos-adc-v2'
compatible name.
Dear Naveen, Tomasz,
If existing exynos-adc driver add just one property for 'sclk_adc'
as following, exynos-adc could not include the exynos version
in compatible name.
I need your opinion about it.
adc: adc@126C {
compatible = samsung,exynos-adc-v2;
reg = 0x126C 0x100, 0x10020718 0x4;
interrupts = 0 137 0;
clock-names = adc, sclk_adc;
clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
+adc-needs-sclk;
#io-channel-cells = 1;
io-channel-ranges;
}
How about just making it an optional clock? That would be much
easier because then you can simply see if the clock itself is
there and use it, or otherwise ignore it.
The v1 of this patchset[1] got the clock of 'sclk_adc' but if the dt node
of ADC in dtsi file didn't include 'sclk_adc', print just warning message
without stopping probe as following:
[1] https://lkml.org/lkml/2014/4/10/710
+ info-sclk = devm_clk_get(pdev-dev, sclk_adc);
+ if (IS_ERR(info-sclk)) {
+ dev_warn(pdev-dev, failed getting sclk clock, err = %ld\n,
+ PTR_ERR(info-sclk));
+ info-sclk = NULL;
+ }
But, Tomasz Figa suggested the method[2] of this patchset(v6).
[2] https://lkml.org/lkml/2014/4/11/189
Thanks,
Chanwoo Choi
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/4] ARM: dts: exynos: Prepare Spring
Hello, Based on the preinstalled 3.8 based ChromeOS kernel and previous 3.15 based attempts by Stephan and me that broke for 3.16, I've prepared a device tree for the HP Chromebook 11 aka Google Spring. v2 reuses the new cros-ec-keyboard.dtsi and retires exynos5250-cros-common.dtsi. It drops the timings subnode from dp-controller in expectation of the new drm eDP bridge framework, which needs it under a different node. The built-in MMC is now usable, its node had been inherited as disabled. Not yet enabled are trackpad, Wifi and sound. Now depends on a Tegra branch (pull pending): http://git.kernel.org/cgit/linux/kernel/git/tegra/linux.git/log/?h=for-3.17/dt-cros-ec-kbd Cc: linux-te...@vger.kernel.org My rebasing branch for testing is here: https://github.com/afaerber/linux/commits/spring-next Regards, Andreas v1 - v2: * Dropped 3 documentation patches from series: 2 picked up, https://patchwork.kernel.org/patch/4397271/ https://patchwork.kernel.org/patch/4397291/ 1 already sent separately as v2, pending. https://patchwork.kernel.org/patch/4424881/ * Minimized and beautified Spring device tree and to some degree Snow as well. See individual patches. Andreas Färber (4): ARM: dts: exynos5250: max77686 is Snow only ARM: dts: exynos5250: cypress,cyapa trackpad is Snow only ARM: dts: exynos5250: Fold common ChromeOS parts into Snow ARM: dts: exynos5250: Add Spring device tree arch/arm/boot/dts/Makefile| 1 + arch/arm/boot/dts/exynos5250-cros-common.dtsi | 323 - arch/arm/boot/dts/exynos5250-snow.dts | 334 -- arch/arm/boot/dts/exynos5250-spring.dts | 485 ++ 4 files changed, 799 insertions(+), 344 deletions(-) delete mode 100644 arch/arm/boot/dts/exynos5250-cros-common.dtsi create mode 100644 arch/arm/boot/dts/exynos5250-spring.dts -- 1.9.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/4] ARM: dts: exynos5250: cypress,cyapa trackpad is Snow only
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts.
Spring does not need it, it uses an Atmel maXTouch instead.
Signed-off-by: Andreas Färber afaer...@suse.de
---
v2: New (Doug Anderson)
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 8
arch/arm/boot/dts/exynos5250-snow.dts | 10 ++
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-cros-common.dtsi
b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
index 61128d1..e603e9c 100644
--- a/arch/arm/boot/dts/exynos5250-cros-common.dtsi
+++ b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
@@ -39,14 +39,6 @@
status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 378000;
-
- trackpad {
- reg = 0x67;
- compatible = cypress,cyapa;
- interrupts = 2 0;
- interrupt-parent = gpx1;
- wakeup-source;
- };
};
i2c@12C8 {
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index 0f867a3..f2b8c41 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -490,6 +490,16 @@
};
};
+i2c_1 {
+ trackpad {
+ reg = 0x67;
+ compatible = cypress,cyapa;
+ interrupts = 2 0;
+ interrupt-parent = gpx1;
+ wakeup-source;
+ };
+};
+
pinctrl_0 {
max77686_irq: max77686-irq {
samsung,pins = gpx3-2;
--
1.9.3
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 4/4] ARM: dts: exynos5250: Add Spring device tree
Adds initial support for the HP Chromebook 11.
Cc: Vincent Palatin vpala...@chromium.org
Cc: Doug Anderson diand...@chromium.org
Cc: Stephan van Schaik step...@synkhronix.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
v1 - v2:
* Use label-based overriding/extension of nodes. (Doug Anderson)
* Dropped tps65090 for now, until we know where to place it.
* Dropped non-Spring nodes from -cros-common.dtsi rather than disabling them.
* Enabled a missing MMC node for access to internal storage.
* Dropped display-timings from dp-controller node. (Ajay Kumar)
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5250-spring.dts | 485
2 files changed, 486 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5250-spring.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 80a781f..dec4c29 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos5250-arndale.dtb \
exynos5250-smdk5250.dtb \
exynos5250-snow.dtb \
+ exynos5250-spring.dtb \
exynos5260-xyref5260.dtb \
exynos5410-smdk5410.dtb \
exynos5420-arndale-octa.dtb \
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts
b/arch/arm/boot/dts/exynos5250-spring.dts
new file mode 100644
index 000..6695973
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-spring.dts
@@ -0,0 +1,485 @@
+/*
+ * Google Spring board device tree source
+ *
+ * Copyright (c) 2013 Google, Inc
+ * Copyright (c) 2014 SUSE LINUX Products GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+#include exynos5250.dtsi
+
+/ {
+ model = Google Spring;
+ compatible = google,spring, samsung,exynos5250, samsung,exynos5;
+
+ memory {
+ reg = 0x4000 0x8000;
+ };
+
+ chosen {
+ };
+
+ usb@1200 {
+ status = okay;
+ };
+
+ usb3_vbus_reg: regulator-usb3 {
+ compatible = regulator-fixed;
+ regulator-name = P5.0V_USB3CON;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ gpio = gpe1 0 1;
+ pinctrl-names = default;
+ pinctrl-0 = hsic_reset;
+ enable-active-high;
+ };
+
+ usb@1211 {
+ samsung,vbus-gpio = gpx1 1 0;
+ status = okay;
+ };
+
+ usb@1212 {
+ status = okay;
+ };
+
+ fimd@1440 {
+ status = okay;
+ samsung,invert-vclk;
+ };
+
+ hdmi {
+ hpd-gpio = gpx3 7 0;
+ pinctrl-names = default;
+ pinctrl-0 = hdmi_hpd_irq;
+ phy = hdmiphy;
+ ddc = i2c_2;
+ hdmi-en-supply = s5m_ldo8_reg;
+ vdd-supply = s5m_ldo8_reg;
+ vdd_osc-supply = s5m_ldo10_reg;
+ vdd_pll-supply = s5m_ldo8_reg;
+ };
+
+ dp-controller@145B {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = dp_hpd;
+ samsung,color-space = 0;
+ samsung,dynamic-range = 0;
+ samsung,ycbcr-coeff = 0;
+ samsung,color-depth = 1;
+ samsung,link-rate = 0x0a;
+ samsung,lane-count = 1;
+ samsung,hpd-gpio = gpc3 0 0;
+ };
+
+ fixed-rate-clocks {
+ xxti {
+ compatible = samsung,clock-xxti;
+ clock-frequency = 2400;
+ };
+ };
+
+ gpio-keys {
+ compatible = gpio-keys;
+
+ power {
+ label = Power;
+ gpios = gpx1 3 1;
+ linux,code = 116; /* KEY_POWER */
+ gpio-key,wakeup;
+ };
+ };
+};
+
+i2c_0 {
+ status = okay;
+ samsung,i2c-sda-delay = 100;
+ samsung,i2c-max-bus-freq = 378000;
+
+ s5m8767_pmic@66 {
+ compatible = samsung,s5m8767-pmic;
+ reg = 0x66;
+ interrupt-parent = gpx3;
+ interrupts = 2 0;
+ pinctrl-names = default;
+ pinctrl-0 = s5m8767_irq s5m8767_dvs s5m8767_ds;
+ wakeup-source;
+
+ s5m8767,pmic-buck-dvs-gpios = gpd1 0 1, /* DVS1 */
+ gpd1 1 1, /* DVS2 */
+ gpd1 2 1; /* DVS3 */
+
+ s5m8767,pmic-buck-ds-gpios = gpx2 3 1, /* SET1 */
+gpx2 4 1, /* SET2 */
+gpx2 5 1; /* SET3 */
+
[PATCH v2 3/4] ARM: dts: exynos5250: Fold common ChromeOS parts into Snow
The remaining pieces are fairly minor.
Suggested-by: Doug Anderson diand...@chromium.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
v2: New (Doug Anderson)
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 164 -
arch/arm/boot/dts/exynos5250-snow.dts | 169 ++
2 files changed, 148 insertions(+), 185 deletions(-)
delete mode 100644 arch/arm/boot/dts/exynos5250-cros-common.dtsi
diff --git a/arch/arm/boot/dts/exynos5250-cros-common.dtsi
b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
deleted file mode 100644
index e603e9c..000
--- a/arch/arm/boot/dts/exynos5250-cros-common.dtsi
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * Common device tree include for all Exynos 5250 boards based off of Daisy.
- *
- * Copyright (c) 2012 Google, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/ {
- aliases {
- };
-
- memory {
- reg = 0x4000 0x8000;
- };
-
- chosen {
- };
-
- pinctrl@1140 {
- /*
-* Disabled pullups since external part has its own pullups and
-* double-pulling gets us out of spec in some cases.
-*/
- i2c2_bus: i2c2-bus {
- samsung,pin-pud = 0;
- };
- };
-
- i2c@12C6 {
- status = okay;
- samsung,i2c-sda-delay = 100;
- samsung,i2c-max-bus-freq = 378000;
- };
-
- i2c@12C7 {
- status = okay;
- samsung,i2c-sda-delay = 100;
- samsung,i2c-max-bus-freq = 378000;
- };
-
- i2c@12C8 {
- status = okay;
- samsung,i2c-sda-delay = 100;
- samsung,i2c-max-bus-freq = 66000;
-
- hdmiddc@50 {
- compatible = samsung,exynos4210-hdmiddc;
- reg = 0x50;
- };
- };
-
- i2c@12C9 {
- status = okay;
- samsung,i2c-sda-delay = 100;
- samsung,i2c-max-bus-freq = 66000;
- };
-
- i2c@12CA {
- status = okay;
- samsung,i2c-sda-delay = 100;
- samsung,i2c-max-bus-freq = 66000;
- };
-
- i2c@12CB {
- status = okay;
- samsung,i2c-sda-delay = 100;
- samsung,i2c-max-bus-freq = 66000;
- };
-
- i2c@12CD {
- status = okay;
- samsung,i2c-sda-delay = 100;
- samsung,i2c-max-bus-freq = 66000;
- };
-
- i2c@12CE {
- status = okay;
- samsung,i2c-sda-delay = 100;
- samsung,i2c-max-bus-freq = 378000;
-
- hdmiphy: hdmiphy@38 {
- compatible = samsung,exynos4212-hdmiphy;
- reg = 0x38;
- };
- };
-
- mmc@1220 {
- num-slots = 1;
- supports-highspeed;
- broken-cd;
- card-detect-delay = 200;
- samsung,dw-mshc-ciu-div = 3;
- samsung,dw-mshc-sdr-timing = 2 3;
- samsung,dw-mshc-ddr-timing = 1 2;
- pinctrl-names = default;
- pinctrl-0 = sd0_clk sd0_cmd sd0_cd sd0_bus4 sd0_bus8;
-
- slot@0 {
- reg = 0;
- bus-width = 8;
- };
- };
-
- mmc@1222 {
- num-slots = 1;
- supports-highspeed;
- card-detect-delay = 200;
- samsung,dw-mshc-ciu-div = 3;
- samsung,dw-mshc-sdr-timing = 2 3;
- samsung,dw-mshc-ddr-timing = 1 2;
- pinctrl-names = default;
- pinctrl-0 = sd2_clk sd2_cmd sd2_cd sd2_bus4;
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- wp-gpios = gpc2 1 0;
- };
- };
-
- mmc@1223 {
- num-slots = 1;
- supports-highspeed;
- broken-cd;
- card-detect-delay = 200;
- samsung,dw-mshc-ciu-div = 3;
- samsung,dw-mshc-sdr-timing = 2 3;
- samsung,dw-mshc-ddr-timing = 1 2;
- /* See board-specific dts files for pin setup */
-
- slot@0 {
- reg = 0;
- bus-width = 4;
- };
- };
-
- spi_1: spi@12d3 {
- status = okay;
- samsung,spi-src-clk = 0;
- num-cs = 1;
- };
-
- hdmi {
- hpd-gpio = gpx3 7 0;
- pinctrl-names = default;
- pinctrl-0 = hdmi_hpd_irq;
- phy = hdmiphy;
-
[PATCH v2 1/4] ARM: dts: exynos5250: max77686 is Snow only
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts.
Spring does not need it, it uses an s5m8767 instead.
Signed-off-by: Andreas Färber afaer...@suse.de
---
v2: New (Doug Anderson)
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 151 -
arch/arm/boot/dts/exynos5250-snow.dts | 155 ++
2 files changed, 155 insertions(+), 151 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-cros-common.dtsi
b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
index 89ac90f..61128d1 100644
--- a/arch/arm/boot/dts/exynos5250-cros-common.dtsi
+++ b/arch/arm/boot/dts/exynos5250-cros-common.dtsi
@@ -27,163 +27,12 @@
i2c2_bus: i2c2-bus {
samsung,pin-pud = 0;
};
-
- max77686_irq: max77686-irq {
- samsung,pins = gpx3-2;
- samsung,pin-function = 0;
- samsung,pin-pud = 0;
- samsung,pin-drv = 0;
- };
};
i2c@12C6 {
status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 378000;
-
- max77686@09 {
- compatible = maxim,max77686;
- interrupt-parent = gpx3;
- interrupts = 2 0;
- pinctrl-names = default;
- pinctrl-0 = max77686_irq;
- wakeup-source;
- reg = 0x09;
- #clock-cells = 1;
-
- voltage-regulators {
- ldo1_reg: LDO1 {
- regulator-name = P1.0V_LDO_OUT1;
- regulator-min-microvolt = 100;
- regulator-max-microvolt = 100;
- regulator-always-on;
- };
-
- ldo2_reg: LDO2 {
- regulator-name = P1.8V_LDO_OUT2;
- regulator-min-microvolt = 180;
- regulator-max-microvolt = 180;
- regulator-always-on;
- };
-
- ldo3_reg: LDO3 {
- regulator-name = P1.8V_LDO_OUT3;
- regulator-min-microvolt = 180;
- regulator-max-microvolt = 180;
- regulator-always-on;
- };
-
- ldo7_reg: LDO7 {
- regulator-name = P1.1V_LDO_OUT7;
- regulator-min-microvolt = 110;
- regulator-max-microvolt = 110;
- regulator-always-on;
- };
-
- ldo8_reg: LDO8 {
- regulator-name = P1.0V_LDO_OUT8;
- regulator-min-microvolt = 100;
- regulator-max-microvolt = 100;
- regulator-always-on;
- };
-
- ldo10_reg: LDO10 {
- regulator-name = P1.8V_LDO_OUT10;
- regulator-min-microvolt = 180;
- regulator-max-microvolt = 180;
- regulator-always-on;
- };
-
- ldo12_reg: LDO12 {
- regulator-name = P3.0V_LDO_OUT12;
- regulator-min-microvolt = 300;
- regulator-max-microvolt = 300;
- regulator-always-on;
- };
-
- ldo14_reg: LDO14 {
- regulator-name = P1.8V_LDO_OUT14;
- regulator-min-microvolt = 180;
- regulator-max-microvolt = 180;
- regulator-always-on;
- };
-
- ldo15_reg: LDO15 {
- regulator-name = P1.0V_LDO_OUT15;
- regulator-min-microvolt = 100;
- regulator-max-microvolt = 100;
- regulator-always-on;
- };
-
-
Re: [PATCHv6 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC
On Saturday 19 July 2014 02:02:09 Chanwoo Choi wrote:
On Sat, Jul 19, 2014 at 1:33 AM, Arnd Bergmann a...@arndb.de wrote:
On Saturday 19 July 2014 01:23:15 Chanwoo Choi wrote:
If don't add new compatible including specific exynos version,
I would add new 'adc-needs-sclk' property with existing 'exynos-adc-v2'
compatible name.
What I actually meant is using compatible=exynos-adc-v2.1 or similar
rather than exynos3250-adc. However, as you already explained, the
version numbers are apparently just made up, so using exynos3250-adc
is actually better here. If a future exynos7890 uses the same clocks
as exynos3250, it can simply use the same exynos3250-adc string here.
Dear Naveen, Tomasz,
If existing exynos-adc driver add just one property for 'sclk_adc'
as following, exynos-adc could not include the exynos version
in compatible name.
I need your opinion about it.
adc: adc@126C {
compatible = samsung,exynos-adc-v2;
reg = 0x126C 0x100, 0x10020718 0x4;
interrupts = 0 137 0;
clock-names = adc, sclk_adc;
clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
+adc-needs-sclk;
#io-channel-cells = 1;
io-channel-ranges;
}
How about just making it an optional clock? That would be much
easier because then you can simply see if the clock itself is
there and use it, or otherwise ignore it.
The v1 of this patchset[1] got the clock of 'sclk_adc' but if the dt node
of ADC in dtsi file didn't include 'sclk_adc', print just warning message
without stopping probe as following:
[1] https://lkml.org/lkml/2014/4/10/710
+ info-sclk = devm_clk_get(pdev-dev, sclk_adc);
+ if (IS_ERR(info-sclk)) {
+ dev_warn(pdev-dev, failed getting sclk clock, err = %ld\n,
+ PTR_ERR(info-sclk));
+ info-sclk = NULL;
+ }
But, Tomasz Figa suggested the method[2] of this patchset(v6).
[2] https://lkml.org/lkml/2014/4/11/189
Yes, your current version is certainly better than this, but another way
to address Tomasz' comment would be to change the binding to list the sclk
as optional for any device and make the code silently ignore missing sclk
entries, like:
info-sclk = devm_clk_get(pdev-dev, sclk);
if (IS_ERR(info-sclk)) {
switch (PTR_ERR(info-sclk)) {
case -EPROBE_DEFER:
/* silently return error so we can retry */
return -EPROBE_DEFER:
case -ENOENT:
/* silently ignore missing optional clk */
info-sclk = NULL;
break;
default:
/* any other error: clk is defined by doesn't work */
dev_err(pdev-dev, failed getting sclk clock, err =
%ld\n,
PTR_ERR(info-sclk));
return PTR_ERR(info-sclk));
}
}
One more comment about the name: Both in the code you use sclk as the
name, so presumably that is the actual name of the clk as known to this
driver, and it makes sense to use clock-names=sclk as well, if you want
to have any name.
Arnd
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESPIN PATCH v6] ARM: EXYNOS: Move cpufreq and cpuidle device registration to init_machine
On 07/14/14 12:58, Pankaj Dubey wrote:
As exynos_cpuidle_init and exynos_cpufreq_init function have just one lines
of code for registering platform devices. We can move these lines to
exynos_dt_machine_init and delete exynos_cpuidle_init and exynos_cpufreq_init
function. This will help in reducing lines of code in exynos.c, making it
more cleaner.
Suggested-by: Tomasz Figat.f...@samsung.com
Signed-off-by: Pankaj Dubeypankaj.du...@samsung.com
Reviewed-by: Tomasz Figat.f...@samsung.com
---
This patch is part of exynos-cleanup series v6 [1]. Just respinning after
resolving merge conflicts on latest kgene/for-next.
[1]: https://lkml.org/lkml/2014/7/10/338
arch/arm/mach-exynos/exynos.c | 18 --
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 2a43a17..99dc5aa 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -175,17 +175,6 @@ static struct platform_device exynos_cpuidle = {
.id= -1,
};
-void __init exynos_cpuidle_init(void)
-{
- if (soc_is_exynos4210() || soc_is_exynos5250())
- platform_device_register(exynos_cpuidle);
-}
-
-void __init exynos_cpufreq_init(void)
-{
- platform_device_register_simple(exynos-cpufreq, -1, NULL, 0);
-}
-
void __iomem *sysram_base_addr;
void __iomem *sysram_ns_base_addr;
@@ -335,10 +324,11 @@ static void __init exynos_dt_machine_init(void)
if (!IS_ENABLED(CONFIG_SMP))
exynos_sysram_init();
- if (!of_machine_is_compatible(samsung,exynos5420))
- exynos_cpuidle_init();
+ if (of_machine_is_compatible(samsung,exynos4210) ||
+ of_machine_is_compatible(samsung,exynos5250))
+ platform_device_register(exynos_cpuidle);
- exynos_cpufreq_init();
+ platform_device_register_simple(exynos-cpufreq, -1, NULL, 0);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
I've applied.
Thanks,
Kukjin
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ASoC: samsung: remove MACH_SMDKC100
This removes MACH_SMDKC100 because of no more support for SMDKC100. Reported-by: Paul Bolle pebo...@tiscali.nl Signed-off-by: Kukjin Kim kgene@samsung.com Cc: Mark Brown broo...@linaro.org --- sound/soc/samsung/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig index 753b8c9..29459d9 100644 --- a/sound/soc/samsung/Kconfig +++ b/sound/soc/samsung/Kconfig @@ -63,7 +63,7 @@ config SND_SOC_SAMSUNG_JIVE_WM8750 config SND_SOC_SAMSUNG_SMDK_WM8580 tristate SoC I2S Audio support for WM8580 on SMDK - depends on SND_SOC_SAMSUNG (MACH_SMDK6410 || MACH_SMDKC100 || MACH_SMDK6440 || MACH_SMDK6450 || MACH_SMDKV210 || MACH_SMDKC110) + depends on SND_SOC_SAMSUNG (MACH_SMDK6410 || MACH_SMDK6440 || MACH_SMDK6450 || MACH_SMDKV210 || MACH_SMDKC110) depends on REGMAP_I2C select SND_SOC_WM8580 select SND_SAMSUNG_I2S @@ -146,7 +146,7 @@ config SND_SOC_SAMSUNG_RX1950_UDA1380 config SND_SOC_SAMSUNG_SMDK_WM9713 tristate SoC AC97 Audio support for SMDK with WM9713 - depends on SND_SOC_SAMSUNG (MACH_SMDK6410 || MACH_SMDKC100 || MACH_SMDKV210 || MACH_SMDKC110) + depends on SND_SOC_SAMSUNG (MACH_SMDK6410 || MACH_SMDKV210 || MACH_SMDKC110) select SND_SOC_WM9713 select SND_SAMSUNG_AC97 help -- 1.8.2.1.339.g52a3e01 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: ASoC: samsung: MACH_SMDKC100
On 07/18/14 17:55, Paul Bolle wrote: Kukjin, Hi Paul, On Wed, 2014-07-02 at 10:01 +0200, Paul Bolle wrote: Your commit 52ad6582ceb2 (ARM: S5PC100: no more support S5PC100 SoC landed in next-20140702. It removed the Kconfig symbol MACH_SMDKC100 (and a lot of other stuff). Is the trivial patch to also remove the last two references to MACH_SMDKC100 from sound/soc/samsung/Kconfig/ queued somewhere? I don't think it was part of the series that included the above commit. Have you had time to look at this? Those last two references to MACH_SMDKC100 can still be seen in next-20140718. Yeah you're right. The MACH_SMDKC100 is no more required... I submitted its fixup to Mark and I think he will take it for v3.17. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3] ARM: dts: Add cros_ec to exynos5420-peach-pit and exynos5800-peach-pi
On 07/18/14 07:42, Javier Martinez Canillas wrote: Hello Kukjin, Hi, On 06/24/2014 06:28 PM, Doug Anderson wrote: This adds cros_ec to exynos5420-peach-pit and exynos5800-peach-pi, including: * The keyboard * The i2c tunnel * The tps65090 under the i2c tunnel * The battery under the i2c tunnel To add extra motivation, it should be noted that tps65090 is one of the things needed to get display-related FETs turned on for pit and pi. Note that this relies on a few outstanding changes: * Needs (spi: s3c64xx: fix broken cs_gpios usage in the driver) and (spi: s3c64xx: for DT platofrms always get the chipselect info from DT node) to work properly and match the documented bindings. See https://patchwork.kernel.org/patch/4346701/ and https://patchwork.kernel.org/patch/4346711/ Signed-off-by: Doug Andersondiand...@chromium.org Tested-by: Javier Martinez Canillasjavier.marti...@collabora.co.uk Tested-by: Tushar Beheratusha...@samsung.com Mark Brown as already applied the SPI DT binding fix from Naveen [0] which was the dependency for this patch and he said that will try to send the whole series to Torvalds before the 3.16-rc cycle ends. Thanks for your gentle reminder ;-) So I think that it's safe now if you want to pick this patch. Sure, I've applied. Thanks a lot! Many thanks. - Kukjin Best regards, Javier [0]: https://git.kernel.org/cgit/linux/kernel/git/broonie/spi.git/commit/?h=for-nextid=306972cedfdedc662dd8e32a6397d0e29f2ac90e -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2] ARM: dts: Add I2S dt node for Exynos3250
On 07/18/14 09:10, Chanwoo Choi wrote:
On 07/09/2014 12:00 PM, Chanwoo Choi wrote:
From: Tomasz Figat.f...@samsung.com
This patch add I2S (Inter-IC Sound) dt node which supports 1-port stereo
(1 channels) IIS-bus for audio interface with DMA-based operation.
Signed-off-by: Tomasz Figat.f...@samsung.com
Signed-off-by: Inha Songideal.s...@samsung.com
Tested-by: Inha Songideal.s...@samsung.com
Signed-off-by: Chanwoo Choicw00.c...@samsung.com
Acked-by: Kyungmin Parkkyungmin.p...@samsung.com
---
Changes from v1:
- Fix wrong name of property (pinctrl-names)
- Change phanle name (i2s-i2s2)
arch/arm/boot/dts/exynos3250.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 3e678fa..77a06df 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -425,6 +425,19 @@
status = disabled;
};
+ i2s2: i2s@1397 {
+ compatible = samsung,s3c6410-i2s;
+ reg =0x1397 0x100;
+ interrupts =0 126 0;
+ clocks =cmu CLK_I2S,cmu CLK_SCLK_I2S;
+ clock-names = iis, i2s_opclk0;
+ dmas =pdma0 14,pdma0 13;
+ dma-names = tx, rx;
+ pinctrl-0 =i2s2_bus;
+ pinctrl-names = default;
+ status = disabled;
+ };
+
pwm: pwm@139D {
compatible = samsung,exynos4210-pwm;
reg =0x139D 0x1000;
Ping.
Applied, thanks.
- Kukjin
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/4] ARM: DTS: fix the chip select gpios definition in the SPI nodes
On 07/18/14 03:49, Mark Brown wrote: On Wed, Jul 16, 2014 at 05:19:10PM +0200, Javier Martinez Canillas wrote: From: Naveen Krishna Chatradhich.nav...@samsung.com This patch replaces the cs-gpio from controller-data node as was specified in the old binding and uses the standard cs-gpios property expected by the SPI core as is defined now in the spi-s3c64xx driver DT binding. I've applied this one too since everything here really ought to go in together and we should probably try to get this into v3.16 - Kukjin, please say if this is an issue and I can revert. It should be fine to me :) Thanks for your asking. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] iio: exynos-adc: add support for s3c64xx adc
The ADC in s3c64xx is almost the same as exynosv1, but
has a different 'select' method. Adding this here will be
helpful to move over the existing s3c64xx platform from the
legacy plat-samsung/adc driver to the new exynos-adc.
Signed-off-by: Arnd Bergmann a...@arndb.de
---
[In reply to Exynos3250 ADC support, adding Heiko and Ben]
I spent way too much time this week trying to clean up the
old plat-samsung/adc.c driver as preparation for s3c64xx multiplatform
support. Eventually I figured out that all that code is much simpler
done using the new driver. This adds support for s3c64xx in
samsung-adc.c, similar code changes can be done to support the
various s3c24xx variants as well.
This first patch should be fairly straightforward but is not tested
yet. The second patch is more tricky.
Both are based on the exynos3250 patches sent by Chanwoo Choi.
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index 26232f98d8c5..f84e9250429b 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -11,11 +11,21 @@ New driver handles the following
Required properties:
- compatible: Must be samsung,exynos-adc-v1
- for exynos4412/5250 controllers.
+ for exynos4412/5250 and s5pv210 controllers.
Must be samsung,exynos-adc-v2 for
future controllers.
Must be samsung,exynos3250-adc-v2 for
controllers compatible with ADC of Exynos3250.
+ Must be samsung,s3c2410-adc for
+ the ADC in s3c2410 and compatibles
+ Must be samsung,s3c2416-adc for
+ the ADC in s3c2416 and compatibles
+ Must be samsung,s3c2440-adc for
+ the ADC in s3c2440 and compatibles
+ Must be samsung,s3c2440-adc for
+ the ADC in s3c2440 and compatibles
+ Must be samsung,s3c2443-adc for
+ the ADC in s3c2443 and compatibles
- reg: Contains ADC register address range (base address and
length) and the address of the phy enable register.
- interrupts: Contains the interrupt information for the timer. The
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index b63e88247eb2..5f95638513d2 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -39,12 +39,16 @@
#include linux/iio/machine.h
#include linux/iio/driver.h
-/* EXYNOS4412/5250 ADC_V1 registers definitions */
+/* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
#define ADC_V1_CON(x) ((x) + 0x00)
+#define ADC_V1_TSC(x) ((x) + 0x04)
#define ADC_V1_DLY(x) ((x) + 0x08)
#define ADC_V1_DATX(x) ((x) + 0x0C)
+#define ADC_V1_DATY(x) ((x) + 0x10)
+#define ADC_V1_UPDN(x) ((x) + 0x14)
#define ADC_V1_INTCLR(x) ((x) + 0x18)
#define ADC_V1_MUX(x) ((x) + 0x1c)
+#define ADC_V1_CLRINTPNDNUP(x) ((x) + 0x20)
/* Future ADC_V2 registers definitions */
#define ADC_V2_CON1(x) ((x) + 0x00)
@@ -60,6 +64,30 @@
#define ADC_V1_CON_PRSCLV(x) (((x) 0xFF) 6)
#define ADC_V1_CON_STANDBY (1u 2)
+#define ADC_S3C2410_CON_SELMUX(x) (((x)0x7)3)
+
+/* ADCTSC Register Bits */
+#define ADC_S3C2443_TSC_UD_SEN (18)
+#define ADC_S3C2410_TSC_YM_SEN (17)
+#define ADC_S3C2410_TSC_YP_SEN (16)
+#define ADC_S3C2410_TSC_XM_SEN (15)
+#define ADC_S3C2410_TSC_XP_SEN (14)
+#define ADC_S3C2410_TSC_PULL_UP_DISABLE(13)
+#define ADC_S3C2410_TSC_AUTO_PST (12)
+#define ADC_S3C2410_TSC_XY_PST(x) (((x)0x3)0)
+
+#define ADC_TSC_WAIT4INT (ADC_S3C2410_TSC_YM_SEN | \
+ADC_S3C2410_TSC_YP_SEN | \
+ADC_S3C2410_TSC_XP_SEN | \
+ADC_S3C2410_TSC_XY_PST(3))
+
+#define ADC_TSC_AUTOPST(ADC_S3C2410_TSC_YM_SEN | \
+ADC_S3C2410_TSC_YP_SEN | \
+ADC_S3C2410_TSC_XP_SEN | \
+ADC_S3C2410_TSC_AUTO_PST | \
+ADC_S3C2410_TSC_XY_PST(0))
+
+
/* Bit definitions for ADC_V2 */
#define ADC_V2_CON1_SOFT_RESET (1u 2)
@@ -195,6 +223,26 @@ static void exynos_adc_v1_clear_irq(struct exynos_adc
*info)
writel(1, ADC_V1_INTCLR(info-regs));
}
+static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info,
+unsigned long addr)
+{
+ u32 con1;
+
+ con1 = readl(ADC_V1_CON(info-regs));
+ con1 = ~ADC_S3C2410_CON_SELMUX(7);
+ con1 |= ADC_S3C2410_CON_SELMUX(addr);
+ writel(con1 | ADC_CON_EN_START,
[PATCH 2/2] iio: exynos-adc: add experimental touchscreen support
This adds support for the touchscreen on Samsung s3c64xx.
The driver is completely untested but shows roughly how
it could be done, following the example of the at91 driver.
Open questions include:
- compared to the old plat-samsung/adc driver, there is
no support for prioritizing ts over other clients, nor
for oversampling. From my reading of the code, the
priorities didn't actually have any effect at all, but
the oversampling might be needed. Maybe the original
authors have some insight.
- I simply register the input device from the adc driver
itself, as the at91 code does. The driver also supports
sub-nodes, but I don't understand how they are meant
to be used, so using those might be better.
- The new exynos_read_s3c64xx_ts() function is intentionally
very similar to the existing exynos_read_raw() functions.
It should probably be changed, either by merging the two
into one, or by simplifying the exynos_read_s3c64xx_ts()
function. This depends a bit on the answers to the questions
above.
- We probably need to add support for platform_data as well,
I've skipped this so far.
- Is anybody able to debug this driver on real hardware?
While it's possible that it actually works, it's more
likely that I made a few subtle mistakes.
Signed-off-by: Arnd Bergmann a...@arndb.de
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index e1b74828f413..4329bf3c3326 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -41,6 +41,10 @@ Required properties:
and compatible ADC block)
- vdd-supply VDD input supply.
+Optional properties:
+- has-touchscreen: If present, indicates that a touchscreen is
+ connected an usable.
+
Note: child nodes can be added for auto probing from device tree.
Example: adding device info in dtsi file
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 5f95638513d2..cf1d9f3e2492 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -34,6 +34,7 @@
#include linux/regulator/consumer.h
#include linux/of_platform.h
#include linux/err.h
+#include linux/input.h
#include linux/iio/iio.h
#include linux/iio/machine.h
@@ -103,6 +104,7 @@
/* Bit definitions common for ADC_V1 and ADC_V2 */
#define ADC_CON_EN_START (1u 0)
+#define ADC_DATX_PRESSED (1u 15)
#define ADC_DATX_MASK 0xFFF
#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))
@@ -110,16 +112,20 @@
struct exynos_adc {
struct exynos_adc_data *data;
struct device *dev;
+ struct input_dev*input;
void __iomem*regs;
void __iomem*enable_reg;
struct clk *clk;
struct clk *sclk;
unsigned intirq;
+ unsigned inttsirq;
struct regulator*vdd;
struct completion completion;
+ boolread_ts;
u32 value;
+ u32 value2;
unsigned intversion;
};
@@ -390,12 +396,61 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
return ret;
}
+static int exynos_read_s3c64xx_ts(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val,
+ int *val2,
+ long mask)
+{
+ struct exynos_adc *info = iio_priv(indio_dev);
+ unsigned long timeout;
+ int ret;
+
+ if (mask != IIO_CHAN_INFO_RAW)
+ return -EINVAL;
+
+ mutex_lock(indio_dev-mlock);
+ info-read_ts = 1;
+
+ reinit_completion(info-completion);
+
+ writel(ADC_S3C2410_TSC_PULL_UP_DISABLE | ADC_TSC_AUTOPST,
+ ADC_V1_TSC(info-regs));
+
+ /* Select the ts channel to be used and Trigger conversion */
+ info-data-start_conv(info, 0);
+
+ timeout = wait_for_completion_timeout
+ (info-completion, EXYNOS_ADC_TIMEOUT);
+ if (timeout == 0) {
+ dev_warn(indio_dev-dev, Conversion timed out! Resetting\n);
+ if (info-data-init_hw)
+ info-data-init_hw(info);
+ ret = -ETIMEDOUT;
+ } else {
+ *val = info-value;
+ *val2 = info-value2;
+ ret = IIO_VAL_INT;
+ }
+
+ info-read_ts = 0;
+ mutex_unlock(indio_dev-mlock);
+
+ return ret;
+}
+
static irqreturn_t exynos_adc_isr(int irq, void *dev_id)
{
struct exynos_adc *info = (struct exynos_adc *)dev_id;
/* Read value */
- info-value = readl(ADC_V1_DATX(info-regs)) ADC_DATX_MASK;
+ if (info-read_ts) {
+
Re: [PATCH 13/19] ARM: s5pv210: move debug-macro.S into the common space
On 07/16/14 09:56, Tomasz Figa wrote: On 16.07.2014 02:53, Kukjin Kim wrote: Kukjin Kim wrote: On 07/05/14 02:48, Tomasz Figa wrote: Move debug-macro.S from mach/include to include/debug where all other common debug macros are. Signed-off-by: Tomasz Figat.f...@samsung.com --- arch/arm/Kconfig.debug | 12 +-- arch/arm/include/debug/s5pv210.S | 34 arch/arm/mach-s5pv210/include/mach/debug-macro.S | 41 3 files changed, 44 insertions(+), 43 deletions(-) create mode 100644 arch/arm/include/debug/s5pv210.S delete mode 100644 arch/arm/mach-s5pv210/include/mach/debug-macro.S [...] Tomasz, I couldn't apply this one from this your series because of conflict with others. Can you please respin this one? One more note, since I didn't apply this, there is a build breakage for s5pv210_defconfig now... arch/arm/kernel/debug.S:24:33: fatal error: mach/debug-macro.S: No such file or directory compilation terminated. make[2]: *** [arch/arm/kernel/debug.o] Error 1 make[1]: *** [arch/arm/kernel] Error 2 make[1]: *** Waiting for unfinished jobs Hmm? Are you sure previous patches applied correctly? I have tested this series patch by patch on all affected configs and it built fine back then. Maybe some conflict, I'll see tomorrow. Tomasz, I've applied this whole series including this again. Can you please check my branch before sending pull-request to arm-soc for 3.17? Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] ARM: EXYNOS: Fix build with PM_SLEEP=n
On 07/16/14 20:59, Tomasz Figa wrote: Hi Krzysztof, On 14.07.2014 09:45, Krzysztof Kozlowski wrote: Fix building of exynos defconfig with disabled PM_SLEEP: CONFIG_PM_SLEEP=n CONFIG_PM_SLEEP_SMP=n CONFIG_SUSPEND=n by moving functions for power up/down of CPU and cluster to platsmp.c The build error messages: arch/arm/mach-exynos/built-in.o: In function `exynos_boot_secondary': arch/arm/mach-exynos/platsmp.c:111: undefined reference to `exynos_cpu_power_state' arch/arm/mach-exynos/platsmp.c:112: undefined reference to `exynos_cpu_power_up' arch/arm/mach-exynos/platsmp.c:116: undefined reference to `exynos_cpu_power_state' make: *** [vmlinux] Error 1 Signed-off-by: Krzysztof Kozlowskik.kozlow...@samsung.com --- Changes since v1: 1. Use different solution - just move the power up/down functions to a common place instead of adding stubs in common.h. Suggested by Tomasz Figa. --- arch/arm/mach-exynos/platsmp.c | 66 ++ arch/arm/mach-exynos/pm.c | 66 -- 2 files changed, 66 insertions(+), 66 deletions(-) + Bart, Reviewed-by: Tomasz Figat.f...@samsung.com Applied, thanks. Bart, I think this is better at this moment to fix the build breakage with disabling PM...if you have any comments, please let me know. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] drm/exynos: Allow module to be autoloaded
The exynos DRM module currently is not automatically loaded when build as a module. This is due to the simple fact that it doesn't have any MODULE_DEVICE_TABLE entries whatsoever... Most of these were removed previously as it wasn't possible at the time to have multiple calls to MODULE_DEVICE_TABLE in one module, however commit 21bdd17b21b45ea solved that. The first two patches revert the previous removals of MODULE_DEVICE_TABLE calls, while the last one adds calls for the remaining OF match tables without a MODULE_DEVICE_TABLE call. Sjoerd Simons (3): Revert drm/exynos: fix module build error Revert drm/exynos: remove MODULE_DEVICE_TABLE definitions drm/exynos: Add MODULE_DEVICE_TABLE entries for various components drivers/gpu/drm/exynos/exynos_dp_core.c | 1 + drivers/gpu/drm/exynos/exynos_drm_dsi.c | 1 + drivers/gpu/drm/exynos/exynos_drm_fimc.c| 1 + drivers/gpu/drm/exynos/exynos_drm_fimd.c| 1 + drivers/gpu/drm/exynos/exynos_drm_g2d.c | 1 + drivers/gpu/drm/exynos/exynos_drm_rotator.c | 1 + drivers/gpu/drm/exynos/exynos_hdmi.c| 1 + drivers/gpu/drm/exynos/exynos_mixer.c | 1 + 8 files changed, 8 insertions(+) -- 2.0.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] drm/exynos: Add MODULE_DEVICE_TABLE entries for various components
Add MODULE_DEVICE_TABLE calls for the various OF match tables that
currently don't have one. This allows the module to be
autoloaded based on devicetree information.
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c| 1 +
drivers/gpu/drm/exynos/exynos_drm_rotator.c | 1 +
drivers/gpu/drm/exynos/exynos_hdmi.c| 1 +
drivers/gpu/drm/exynos/exynos_mixer.c | 1 +
4 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index 831dde9..ec7cc9e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -1887,6 +1887,7 @@ static const struct of_device_id fimc_of_match[] = {
{ .compatible = samsung,exynos4212-fimc },
{ },
};
+MODULE_DEVICE_TABLE(of, fimc_of_match);
struct platform_driver fimc_driver = {
.probe = fimc_probe,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
index f01fbb6..55af6b4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
@@ -691,6 +691,7 @@ static const struct of_device_id exynos_rotator_match[] = {
},
{},
};
+MODULE_DEVICE_TABLE(of, exynos_rotator_match);
static int rotator_probe(struct platform_device *pdev)
{
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index fd8141f..d08e00d 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -2295,6 +2295,7 @@ static struct of_device_id hdmi_match_types[] = {
/* end node */
}
};
+MODULE_DEVICE_TABLE (of, hdmi_match_types);
static int hdmi_bind(struct device *dev, struct device *master, void *data)
{
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c
b/drivers/gpu/drm/exynos/exynos_mixer.c
index 9d0c21a..6756d1c 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -1240,6 +1240,7 @@ static struct of_device_id mixer_match_types[] = {
/* end node */
}
};
+MODULE_DEVICE_TABLE(of, mixer_match_types);
static int mixer_bind(struct device *dev, struct device *manager, void *data)
{
--
2.0.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] Revert drm/exynos: remove MODULE_DEVICE_TABLE definitions
This reverts commit d089621896c3530a9bd309f96e9c9124d07f6c3f was
original to prevent multiple MODULE_DEVICE_TABLE in one module.
Which, as a side-effect broke autoloading of the module.
Since 21bdd17b21b45ea48e06e23918d681afbe0622e9 it is possible to have
multiple calls to MODULE_DEVICE_TABLE, so the patch can be
reverted to restore support for autoloading
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 1 +
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index 845d766..31c3de9 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1376,6 +1376,7 @@ static const struct of_device_id exynos_dp_match[] = {
{ .compatible = samsung,exynos5-dp },
{},
};
+MODULE_DEVICE_TABLE(of, exynos_dp_match);
struct platform_driver dp_driver = {
.probe = exynos_dp_probe,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 2df3592..46b7bf6 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -1529,6 +1529,7 @@ static struct of_device_id exynos_dsi_of_match[] = {
{ .compatible = samsung,exynos4210-mipi-dsi },
{ }
};
+MODULE_DEVICE_TABLE(of, exynos_dsi_of_match);
struct platform_driver dsi_driver = {
.probe = exynos_dsi_probe,
--
2.0.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] Revert drm/exynos: fix module build error
This reverts commit de1d3677017a1d58419722b60564cb56bd9462c3, which was
original added to fix build errors when building exynosdrm as a single
module caused by multiple MODULE_DEVICE_TABLE in one module. Which, as
a side-effect broke autoloading of the module.
Since 21bdd17b21b45ea48e06e23918d681afbe0622e9 it is possible to have
multiple calls to MODULE_DEVICE_TABLE, so the patch can be
reverted to restore support for autoloading
Conflicts:
drivers/gpu/drm/exynos/exynos_drm_fimd.c
drivers/gpu/drm/exynos/exynos_drm_g2d.c
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 1 +
drivers/gpu/drm/exynos/exynos_drm_g2d.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 33161ad..081eb15 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -136,6 +136,7 @@ static const struct of_device_id fimd_driver_dt_match[] = {
.data = exynos5_fimd_driver_data },
{},
};
+MODULE_DEVICE_TABLE(of, fimd_driver_dt_match);
static inline struct fimd_driver_data *drm_fimd_get_driver_data(
struct platform_device *pdev)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 8001587..bb728c8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -1546,6 +1546,7 @@ static const struct of_device_id exynos_g2d_match[] = {
{ .compatible = samsung,exynos5250-g2d },
{},
};
+MODULE_DEVICE_TABLE(of, exynos_g2d_match);
struct platform_driver g2d_driver = {
.probe = g2d_probe,
--
2.0.1
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 13/19] ARM: s5pv210: move debug-macro.S into the common space
Hi Kukjin, On 18.07.2014 21:38, Kukjin Kim wrote: On 07/16/14 09:56, Tomasz Figa wrote: On 16.07.2014 02:53, Kukjin Kim wrote: Kukjin Kim wrote: On 07/05/14 02:48, Tomasz Figa wrote: Move debug-macro.S from mach/include to include/debug where all other common debug macros are. Signed-off-by: Tomasz Figat.f...@samsung.com --- arch/arm/Kconfig.debug | 12 +-- arch/arm/include/debug/s5pv210.S | 34 arch/arm/mach-s5pv210/include/mach/debug-macro.S | 41 3 files changed, 44 insertions(+), 43 deletions(-) create mode 100644 arch/arm/include/debug/s5pv210.S delete mode 100644 arch/arm/mach-s5pv210/include/mach/debug-macro.S [...] Tomasz, I couldn't apply this one from this your series because of conflict with others. Can you please respin this one? One more note, since I didn't apply this, there is a build breakage for s5pv210_defconfig now... arch/arm/kernel/debug.S:24:33: fatal error: mach/debug-macro.S: No such file or directory compilation terminated. make[2]: *** [arch/arm/kernel/debug.o] Error 1 make[1]: *** [arch/arm/kernel] Error 2 make[1]: *** Waiting for unfinished jobs Hmm? Are you sure previous patches applied correctly? I have tested this series patch by patch on all affected configs and it built fine back then. Maybe some conflict, I'll see tomorrow. Tomasz, I've applied this whole series including this again. Can you please check my branch before sending pull-request to arm-soc for 3.17? Thanks for applying this. A quick look through the patches didn't reveal any issues. s5pv210_defconfig builds fine too. I don't have any s5pv210-based board at home, though, so I can't do anything else than compile testing until Tuesday. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL] Samsung fixes-4 for v3.16
Hi, This is a regression for v3.16 so please take this in -rc. Thanks, Kukjin The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-4 for you to fetch changes up to 4e3a498d6fc438d8c203c51aadc6ca8fb47b0577: ARM: EXYNOS: Fix core ID used by platsmp and hotplug code (2014-07-16 02:59:18 +0900) Samsung fixes-4 for v3.16 - Fix core ID for platsmp and hotplug This fixes existing calculation of PMU register offsets on exynos SoCs and this also fixes CPU hotplug with more than 2 cores, because it removes incorrect condition check in platform_do_lowpower(). Tomasz Figa (1): ARM: EXYNOS: Fix core ID used by platsmp and hotplug code arch/arm/mach-exynos/hotplug.c | 10 ++ arch/arm/mach-exynos/platsmp.c | 34 +++--- 2 files changed, 25 insertions(+), 19 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] Samsung fixes-4 for v3.16
On Fri, Jul 18, 2014 at 4:34 PM, Kukjin Kim kgene@samsung.com wrote: Hi, This is a regression for v3.16 so please take this in -rc. Thanks, Kukjin The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-4 for you to fetch changes up to 4e3a498d6fc438d8c203c51aadc6ca8fb47b0577: ARM: EXYNOS: Fix core ID used by platsmp and hotplug code (2014-07-16 02:59:18 +0900) This is based on a newer branch than our current fixes. So I've cherry picked the patch instead of merged the branch -- if you have the branch in linux-next you should remove it. Thanks, -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] Samsung fixes-4 for v3.16
On 07/19/14 09:12, Olof Johansson wrote: On Fri, Jul 18, 2014 at 4:34 PM, Kukjin Kimkgene@samsung.com wrote: Hi, This is a regression for v3.16 so please take this in -rc. Thanks, Kukjin The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-4 for you to fetch changes up to 4e3a498d6fc438d8c203c51aadc6ca8fb47b0577: ARM: EXYNOS: Fix core ID used by platsmp and hotplug code (2014-07-16 02:59:18 +0900) This is based on a newer branch than our current fixes. So I've cherry picked the patch instead of merged the branch -- if you have the branch in linux-next you should remove it. OK, I will. Thanks. Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] Samsung fixes-4 for v3.16
On 07/19/14 09:18, Kukjin Kim wrote: On 07/19/14 09:12, Olof Johansson wrote: On Fri, Jul 18, 2014 at 4:34 PM, Kukjin Kimkgene@samsung.com wrote: Hi, This is a regression for v3.16 so please take this in -rc. Thanks, Kukjin The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-4 for you to fetch changes up to 4e3a498d6fc438d8c203c51aadc6ca8fb47b0577: ARM: EXYNOS: Fix core ID used by platsmp and hotplug code (2014-07-16 02:59:18 +0900) This is based on a newer branch than our current fixes. So I've cherry picked the patch instead of merged the branch -- if you have the branch in linux-next you should remove it. OK, I will. BTW, other pm related branches in my tree have dependencies with the change so I just reverted that in my -next. If any problems, please let me know. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 1/5] Samsung non-critical-fixes for v3.17
The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/fixes-for-3.17 for you to fetch changes up to 042b687f880adcca77847688aac35e2e16927944: ARM: EXYNOS: Fix build breakge with PM_SLEEP=n (2014-07-19 04:45:02 +0900) Samsung non critical fixes for v3.17 - update exynos_defconfig for remove outdated configs and enable most of the configs used on latest exynos platforms - fix build breakge for exynos_defconfig with PM_SLEEP=n Krzysztof Kozlowski (1): ARM: EXYNOS: Fix build breakge with PM_SLEEP=n Sachin Kamat (1): ARM: exynos_defconfig: Update exynos_defconfig arch/arm/configs/exynos_defconfig | 56 - arch/arm/mach-exynos/platsmp.c| 66 +++ arch/arm/mach-exynos/pm.c | 66 --- 3 files changed, 114 insertions(+), 74 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 4/5] Samsung exynos_mct update for v3.17
Note that this is also based on 3.16-rc5 because of dependency with previous samsung fixes including exynos_mct already merged in mainline during -rc. The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/exynos-mct for you to fetch changes up to 1a631118c1d085fe162f3b6d44f710c72206ef2d: clocksource: exynos_mct: Only use 32-bits where possible (2014-07-19 03:07:52 +0900) exynos_mct update for v3.17 - only use 32-bit access for performance benefits on exynos 32-bit system and this means ARCH timer should be supported on exynos 64-bit system instead of current MCT. - use readl_relaxed/writel_relaxed to consistently use the proper functions in exynos_mct. Doug Anderson (2): clocksource: exynos_mct: use readl_relaxed/writel_relaxed clocksource: exynos_mct: Only use 32-bits where possible drivers/clocksource/Kconfig | 1 + drivers/clocksource/exynos_mct.c | 63 2 files changed, 45 insertions(+), 19 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 2/5] Samsung cleanup for v3.17
Note that this is based on 3.16-rc5 because of dependency with previous samsung fixes already merged in mainline during -rc. The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-cleanup for you to fetch changes up to fce9e5bb25264153f9f002eada41757118d25ba9: ARM: EXYNOS: Add support for mapping PMU base address via DT (2014-07-15 08:40:32 +0900) Samsung cleanup for v3.17 : Most of them are for exynos SoCs, remove useless codes and update for PMU consolidation. - remove unnecessary header file in mach-exynos/pmu.c - remove unused code in mach-exynos/common.h - remove mach-exynos/regs-pmu.h dependency from PD - remove file path from comment section in mach-exynos - move SYSREG definitions into mach-exynos/regs-sys.h - add mapping PMU base address via DT for PMU cleanup - use staic in mach-exynos/common.h - update Samsung UART config options for low-level debug Pankaj Dubey (6): ARM: EXYNOS: Make exynos machine_ops as static ARM: EXYNOS: Move SYSREG definition into sys-reg specific file ARM: EXYNOS: Remove file path from comment section ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain ARM: EXYNOS: Remove linux/bug.h from pmu.c ARM: EXYNOS: Add support for mapping PMU base address via DT Sachin Kamat (2): ARM: debug: Update Samsung UART config options ARM: EXYNOS: Remove unused code in common.h arch/arm/Kconfig.debug | 20 +++--- arch/arm/mach-exynos/common.h | 13 + arch/arm/mach-exynos/exynos.c | 44 -- arch/arm/mach-exynos/headsmp.S | 1 - arch/arm/mach-exynos/hotplug.c | 3 +- arch/arm/mach-exynos/include/mach/map.h| 3 +- arch/arm/mach-exynos/include/mach/memory.h | 3 +- arch/arm/mach-exynos/platsmp.c | 3 +- arch/arm/mach-exynos/pm.c | 1 + arch/arm/mach-exynos/pm_domains.c | 9 +++--- arch/arm/mach-exynos/pmu.c | 1 - arch/arm/mach-exynos/regs-pmu.h| 4 --- arch/arm/mach-exynos/regs-sys.h| 22 +++ 13 files changed, 77 insertions(+), 50 deletions(-) create mode 100644 arch/arm/mach-exynos/regs-sys.h -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 3/5] Samsung exynos cpuidle update for v3.17
The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/exynos-cpuidle for you to fetch changes up to fc2cac41ebbfb16da8b036cba6ec6714ab780a6d: ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm (2014-07-19 03:36:00 +0900) exynos cpuidle update for v3.17 - add callbacks exynos_suspend() and exynos_powered_up() for support cpuidle through mcpm - skip exynos_cpuidle for exynos5420 because is uses cpuidle-big-liggle generic cpuidle driver - add generic functions to calculate cpu number is used for pmu and this is required for exynos5420 multi-cluster - add of_device_id structure for big.LITTLE cpuidle and add samsung,exynos5420 compatible string for exynos5420 Chander Kashyap (6): cpuidle: big.LITTLE: add of_device_id structure ARM: EXYNOS: add generic function to calculate cpu number cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config cpuidle: big.LITTLE: init driver for exynos5420 ARM: EXYNOS: do not allow cpuidle registration for exynos5420 ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm arch/arm/mach-exynos/exynos.c| 4 +++- arch/arm/mach-exynos/mcpm-exynos.c | 36 arch/arm/mach-exynos/regs-pmu.h | 9 + drivers/cpuidle/Kconfig.arm | 2 +- drivers/cpuidle/cpuidle-big_little.c | 12 +++- 5 files changed, 60 insertions(+), 3 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 5/5] Samsung DT updates for v3.17
The following changes since commit 7171511eaec5bf23fb06078f59784a3a0626b38f: Linux 3.16-rc1 (2014-06-15 17:45:28 -1000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-dt for you to fetch changes up to ccaba4527156da1619a23bafcb944e8e029d0573: ARM: dts: Add I2S dt node for exynos3250 (2014-07-19 04:10:44 +0900) Samsung DT updates for v3.17 exynos3250: add i2s dt for audio interface exynos4 - cleanup arm-pmu node because of 4 pmu on exynos4412 but 2 pmu on other exynos4 SoCs - add support sub-nodes to exynos usb host for exynos4 exynos4412-odroid-common - fix T-FLASH hotplug detection - disable 'always on' for BUCK8 - add support for GPIO based buttons - add MAX98090 audio codec exynos4412-odroidx2 and exynos4412-odroidu3 - refactor exynos4412-odroidx and exynos4412-odroid-common for odroid-x2 and u2/u3 exynos4412-odroidx - add support for USB phy, host and device - enable common hardware blocks, secure firmware calls, watchdog, g2d and fimc (mem2mem) multimedia accelerators - add support for USB phy, host and device - correct memory size exynos5410 - fill in CPU clock-frequency property to avoid warning exynos5420 - remove display pd because of instability exynos5420-peach-pit and exynos5800-peach-pi - sort nodes each other to check its differences easily - enable audio support and add sound-card name property - add mask-tpm-reset node - add cros_ec including keyboard, i2c tunnel and tps65090 and battery under the i2c tunnel Andreas Faerber (1): ARM: dts: Fill in CPU clock-frequency for exynos5410 Chanho Park (1): ARM: dts: clean up arm-pmu node for exynos4 Doug Anderson (2): ARM: dts: Add mask-tpm-reset node in exynos5420-peach-pit ARM: dts: Add cros_ec to exynos5420-peach-pit and exynos5800-peach-pi Kamil Debski (2): ARM: dts: add support for USB phy, host and device for exynos4412-odroidx ARM: dts: disable 'always on' for BUCK8 regulator for exynos4412-odroid-common Marek Szyprowski (6): ARM: dts: add port sub-nodes to exynos usb host modules for exynos4 ARM: dts: enable common hardware blocks for exynos4412-odroidx ARM: dts: correct memory size for exynos4412-odroidx ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3 ARM: dts: add support for GPIO buttons for exynos4412-odroid ARM: dts: fix T-FLASH hotplug detection for exynos4412-odroid-common Rahul Sharma (1): ARM: dts: remove display power domain for exynos5420 Sylwester Nawrocki (1): ARM: dts: Add sound nodes for Odroid-X2/U3 boards Tomasz Figa (1): ARM: dts: Add I2S dt node for exynos3250 Tushar Behera (3): ARM: dts: Enable audio support for exynos5800-peach-pi ARM: dts: Sort nodes within Peach-pit/Peach-pi dts files ARM: dts: Add sound-card name for Snow/Peach-Pit/Peach-Pi Vikas Sajjan (1): ARM: dts: Add mask-tpm-reset node in exynos5800-peach-pi arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/exynos3250.dtsi | 13 + arch/arm/boot/dts/exynos4.dtsi | 30 ++ arch/arm/boot/dts/exynos4210.dtsi | 6 - arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 371 ++ arch/arm/boot/dts/exynos4412-odroidu3.dts | 61 arch/arm/boot/dts/exynos4412-odroidx.dts| 279 ++--- arch/arm/boot/dts/exynos4412-odroidx2.dts | 32 ++ arch/arm/boot/dts/exynos4412.dtsi | 4 + arch/arm/boot/dts/exynos4x12.dtsi | 6 - arch/arm/boot/dts/exynos5250-snow.dts | 1 + arch/arm/boot/dts/exynos5410.dtsi | 4 + arch/arm/boot/dts/exynos5420-peach-pit.dts | 392 +--- arch/arm/boot/dts/exynos5420.dtsi | 6 - arch/arm/boot/dts/exynos5800-peach-pi.dts | 374 -- 15 files changed, 1106 insertions(+), 475 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4412-odroid-common.dtsi create mode 100644 arch/arm/boot/dts/exynos4412-odroidu3.dts create mode 100644 arch/arm/boot/dts/exynos4412-odroidx2.dts -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] Samsung fixes-4 for v3.16
On Fri, Jul 18, 2014 at 5:43 PM, Kukjin Kim kgene@samsung.com wrote: On 07/19/14 09:18, Kukjin Kim wrote: On 07/19/14 09:12, Olof Johansson wrote: On Fri, Jul 18, 2014 at 4:34 PM, Kukjin Kimkgene@samsung.com wrote: Hi, This is a regression for v3.16 so please take this in -rc. Thanks, Kukjin The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-4 for you to fetch changes up to 4e3a498d6fc438d8c203c51aadc6ca8fb47b0577: ARM: EXYNOS: Fix core ID used by platsmp and hotplug code (2014-07-16 02:59:18 +0900) This is based on a newer branch than our current fixes. So I've cherry picked the patch instead of merged the branch -- if you have the branch in linux-next you should remove it. OK, I will. BTW, other pm related branches in my tree have dependencies with the change so I just reverted that in my -next. If any problems, please let me know. Are they part of the branches you sent now? Is that patch a base in those branches? -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [GIT PULL] Samsung fixes-4 for v3.16
Olof Johansson wrote: On Fri, Jul 18, 2014 at 5:43 PM, Kukjin Kim kgene@samsung.com wrote: On 07/19/14 09:18, Kukjin Kim wrote: On 07/19/14 09:12, Olof Johansson wrote: On Fri, Jul 18, 2014 at 4:34 PM, Kukjin Kimkgene@samsung.com wrote: Hi, This is a regression for v3.16 so please take this in -rc. Thanks, Kukjin The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-4 for you to fetch changes up to 4e3a498d6fc438d8c203c51aadc6ca8fb47b0577: ARM: EXYNOS: Fix core ID used by platsmp and hotplug code (2014-07-16 02:59:18 +0900) This is based on a newer branch than our current fixes. So I've cherry picked the patch instead of merged the branch -- if you have the branch in linux-next you should remove it. OK, I will. BTW, other pm related branches in my tree have dependencies with the change so I just reverted that in my -next. If any problems, please let me know. Are they part of the branches you sent now? Is that patch a base in those branches? No, I didn't send out any branch including the fix to arm-soc because I also don't want to make any conflict or inconvenience for you :) Just thought, I need to sort it out once it has been merged into mainline. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] Samsung fixes-4 for v3.16
On Fri, Jul 18, 2014 at 10:11 PM, Kukjin Kim kgene@samsung.com wrote: Olof Johansson wrote: On Fri, Jul 18, 2014 at 5:43 PM, Kukjin Kim kgene@samsung.com wrote: On 07/19/14 09:18, Kukjin Kim wrote: On 07/19/14 09:12, Olof Johansson wrote: On Fri, Jul 18, 2014 at 4:34 PM, Kukjin Kimkgene@samsung.com wrote: Hi, This is a regression for v3.16 so please take this in -rc. Thanks, Kukjin The following changes since commit 1795cd9b3a91d4b5473c97f491d63892442212ab: Linux 3.16-rc5 (2014-07-13 14:04:33 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-4 for you to fetch changes up to 4e3a498d6fc438d8c203c51aadc6ca8fb47b0577: ARM: EXYNOS: Fix core ID used by platsmp and hotplug code (2014-07-16 02:59:18 +0900) This is based on a newer branch than our current fixes. So I've cherry picked the patch instead of merged the branch -- if you have the branch in linux-next you should remove it. OK, I will. BTW, other pm related branches in my tree have dependencies with the change so I just reverted that in my -next. If any problems, please let me know. Are they part of the branches you sent now? Is that patch a base in those branches? No, I didn't send out any branch including the fix to arm-soc because I also don't want to make any conflict or inconvenience for you :) Just thought, I need to sort it out once it has been merged into mainline. Ok, it should be in for -rc6. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
