Re: power: reset: add driver for Hardkernel's Odroid boards
Hello, On 2015-01-14 16:17, Tobias Jakobi wrote: Hello, I've applied the two patches of this set onto torvalds/master (together with some other patches), but I now encounter an 'internal error' when doing a system reboot. Here's the corresponding part of the kernel log: http://www.math.uni-bielefeld.de/~tjakobi/archive/odroid_power_reset.txt Right. This patch was posted some time ago and reboot handling on ARM SoCs have been changed recently in v3.19-rc1. I will post an updated version of this patch soon. Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [v3,15/21] ARM: exynos4/5: convert pmu wakeup to stacked domains
+CC: Thomas Abraham Hi Mark, On Monday 12 January 2015 11:56 PM, Marc Zyngier wrote: Exynos has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the fact that the PMU block is actually the first interrupt controller in the chain for RTC, kernels with this patch applied wont have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs may not even boot. Also, I stronly suspect that there is more than two wake-up interrupts on these platforms, but I leave it to the maintainers to fix their mess. Signed-off-by: Marc Zyngier I tested this series on Exynos5250, using kgene/for-next and linux-next/next-20150114, but S2R failed on Exynos5250 based SMDK board. Following is the log I got on SMDK5250 board, (note I have added some debugging log to know what is happening) I can see is S3C-RTC's "enable_irq_wake" is failing with error -6. I also observed that even though we are adding pmu_domain_ops using irq_domain_add_hierarchy, but none of pmu_domain_ops are getting called. Please let me know if I am missing anything or do I need to modify anything to test S2R on Exynos SoC. - echo +10 > /sys/class/rtc/rtc1/wakealarm; sleep 1; echo mem > /sys/power/sta te [ 257.428163] PM: Syncing filesystems ... done. [ 257.431786] Freezing user space processes ... (elapsed 0.003 seconds) done. [ 257.439680] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. [ 257.544451] wake enabled for irq 116 [ 257.546916] CPU: 0 PID: 1311 Comm: ash Not tainted 3.19.0-rc4-next-20150114-00023-g492ff37 #15 [ 257.555141] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree) [ 257.561231] [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [ 257.568948] [] (show_stack) from [] (dump_stack+0x84/0xc4) [ 257.576151] [] (dump_stack) from [] (set_irq_wake_real+0x58/0x8c) [ 257.583961] [] (set_irq_wake_real) from [] (irq_set_irq_wake+0x8c/0xf0) [ 257.592295] [] (irq_set_irq_wake) from [] (s3c_rtc_suspend+0xb8/0xdc) [ 257.600456] [] (s3c_rtc_suspend) from [] (dpm_run_callback.isra.13+0x1c/0x60) [ 257.609308] [] (dpm_run_callback.isra.13) from [] (__device_suspend+0x128/0x2d0) [ 257.618422] [] (__device_suspend) from [] (dpm_suspend+0x64/0x22c) [ 257.626320] [] (dpm_suspend) from [] (suspend_devices_and_enter+0x88/0x3dc) [ 257.634999] [] (suspend_devices_and_enter) from [] (pm_suspend+0x1ec/0x24c) [ 257.643680] [] (pm_suspend) from [] (state_store+0x68/0xb8) [ 257.650972] [] (state_store) from [] (kernfs_fop_write+0xb8/0x19c) [ 257.658870] [] (kernfs_fop_write) from [] (vfs_write+0xa0/0x1ac) [ 257.666595] [] (vfs_write) from [] (SyS_write+0x44/0x9c) [ 257.673625] [] (SyS_write) from [] (ret_fast_syscall+0x0/0x30) [ 257.681176] genirq: PKD: irq_desc->name: (null): irq: 60 [ 257.686469] genirq: PKD: set_irq_wake_real: ret: -6 [ 257.691349] s3c-rtc 101e.rtc: enable_irq_wake failed: -6 [ 257.708926] PM: suspend of devices complete after 260.482 msecs [ 257.713362] BUCK9: No configuration [ 257.716840] BUCK8: No configuration [ 257.720309] BUCK7: No configuration [ 257.723776] BUCK6: No configuration [ 257.727254] P1.8V_BUCK_OUT5: No configuration [ 257.731597] LDO26: No configuration [ 257.735066] LDO25: No configuration [ 257.738532] LDO24: No configuration [ 257.742009] LDO23: No configuration [ 257.745481] LDO22: No configuration [ 257.748954] LDO21: No configuration [ 257.752419] LDO20: No configuration [ 257.755897] LDO19: No configuration [ 257.759370] LDO18: No configuration [ 257.762835] LDO17: No configuration [ 257.766314] P1.8V_LDO_OUT16: No configuration [ 257.770653] P1.0V_LDO_OUT15: No configuration [ 257.774994] P1.8V_LDO_OUT14: No configuration [ 257.779334] P1.8V_LDO_OUT13: No configuration [ 257.783668] P3.0V_LDO_OUT12: No configuration [ 257.788013] P1.8V_LDO_OUT11: No configuration [ 257.792353] P1.8V_LDO_OUT10: No configuration [ 257.796693] LDO9: No configuration [ 257.800079] P1.0V_LDO_OUT8: No configuration [ 257.804332] P1.1V_LDO_OUT7: No configuration [ 257.808579] P1.1V_LDO_OUT6: No configuration [ 257.812838] P1.8V_LDO_OUT5: No configuration [ 257.817091] P2.8V_LDO_OUT4: No configuration [ 257.821345] P1.8V_LDO_OUT3: No configuration [ 257.825599] P1.2V_LDO_OUT2: No configuration [ 257.829851] P1.0V_LDO_OUT1: No configuration [ 257.835786] PM: late suspend of devices complete after 1.676 msecs [ 257.841913] PM: noirq suspend of devices complete after 1.420 msecs [ 257.846737] Disabling non-boot CPUs ... [ 257.850810] IRQ54 no longer affine to CPU1 [ 257.850922] CPU1: shutdown Thanks, Pankaj Dubey -- To unsubscribe from this list: send the
Re: [PATCH 3/4] clk: samsung: exynos7: add clocks for audio block
Hi Vivek, On 1/13/15, Vivek Gautam wrote: > Hi Padma, > > > On Fri, Dec 19, 2014 at 6:53 PM, Padmavathi Venna > wrote: >> Add required clk support for I2S,PCM amd SPDIF >> >> Signed-off-by: Padmavathi Venna >> --- > > verified from Exynos7 datasheet. The patch looks good. > Reviewed-by: Vivek Gautam > Thanks for the review. Hi Sylwester, I posted patches after re-basing on your tree and after incorporating all comments from Vivek. Below is the link http://www.spinics.net/lists/linux-samsung-soc/msg40992.html Can you pick the patches? Thanks Padma -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 4/9] clk: samsung: exynos4: Add divider clock id for memory bus frequency
This patch adds the divider clock id for Exynos4 memory bus frequency.
The clock id is used fo DVFS (Dynamic Voltage/Frequency Scaling)
feature of exynos memory bus frequency.
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Signed-off-by: Chanwoo Choi
---
drivers/clk/samsung/clk-exynos4.c | 10 +-
include/dt-bindings/clock/exynos4.h | 7 ++-
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b/drivers/clk/samsung/clk-exynos4.c
index 88e8c6b..51462e8 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -703,12 +703,12 @@ static struct samsung_mux_clock exynos4x12_mux_clks[]
__initdata = {
/* list of divider clocks supported in all exynos4 soc's */
static struct samsung_div_clock exynos4_div_clks[] __initdata = {
- DIV(0, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),
+ DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),
DIV(0, "div_gpl", "div_gdl", DIV_LEFTBUS, 4, 3),
DIV(0, "div_clkout_leftbus", "mout_clkout_leftbus",
CLKOUT_CMU_LEFTBUS, 8, 6),
- DIV(0, "div_gdr", "mout_gdr", DIV_RIGHTBUS, 0, 3),
+ DIV(CLK_DIV_GDR, "div_gdr", "mout_gdr", DIV_RIGHTBUS, 0, 3),
DIV(0, "div_gpr", "div_gdr", DIV_RIGHTBUS, 4, 3),
DIV(0, "div_clkout_rightbus", "mout_clkout_rightbus",
CLKOUT_CMU_RIGHTBUS, 8, 6),
@@ -781,10 +781,10 @@ static struct samsung_div_clock exynos4_div_clks[]
__initdata = {
CLK_SET_RATE_PARENT, 0),
DIV(0, "div_clkout_top", "mout_clkout_top", CLKOUT_CMU_TOP, 8, 6),
- DIV(0, "div_acp", "mout_dmc_bus", DIV_DMC0, 0, 3),
+ DIV(CLK_DIV_ACP, "div_acp", "mout_dmc_bus", DIV_DMC0, 0, 3),
DIV(0, "div_acp_pclk", "div_acp", DIV_DMC0, 4, 3),
DIV(0, "div_dphy", "mout_dphy", DIV_DMC0, 8, 3),
- DIV(0, "div_dmc", "mout_dmc_bus", DIV_DMC0, 12, 3),
+ DIV(CLK_DIV_DMC, "div_dmc", "mout_dmc_bus", DIV_DMC0, 12, 3),
DIV(0, "div_dmcd", "div_dmc", DIV_DMC0, 16, 3),
DIV(0, "div_dmcp", "div_dmcd", DIV_DMC0, 20, 3),
DIV(0, "div_pwi", "mout_pwi", DIV_DMC1, 8, 4),
@@ -829,7 +829,7 @@ static struct samsung_div_clock exynos4x12_div_clks[]
__initdata = {
DIV_F(CLK_DIV_MCUISP1, "div_mcuisp1", "div_mcuisp0", E4X12_DIV_ISP1,
8, 3, CLK_GET_RATE_NOCACHE, 0),
DIV(CLK_SCLK_FIMG2D, "sclk_fimg2d", "mout_g2d", DIV_DMC1, 0, 4),
- DIV(0, "div_c2c", "mout_c2c", DIV_DMC1, 4, 3),
+ DIV(CLK_DIV_C2C, "div_c2c", "mout_c2c", DIV_DMC1, 4, 3),
DIV(0, "div_c2c_aclk", "div_c2c", DIV_DMC1, 12, 3),
};
diff --git a/include/dt-bindings/clock/exynos4.h
b/include/dt-bindings/clock/exynos4.h
index 34fe28c..c4b1676 100644
--- a/include/dt-bindings/clock/exynos4.h
+++ b/include/dt-bindings/clock/exynos4.h
@@ -262,8 +262,13 @@
#define CLK_DIV_MCUISP1453 /* Exynos4x12 only */
#define CLK_DIV_ACLK200454 /* Exynos4x12 only */
#define CLK_DIV_ACLK400_MCUISP 455 /* Exynos4x12 only */
+#define CLK_DIV_ACP456
+#define CLK_DIV_DMC457
+#define CLK_DIV_C2C458 /* Exynos4x12 only */
+#define CLK_DIV_GDL459
+#define CLK_DIV_GDR460
/* must be greater than maximal clock id */
-#define CLK_NR_CLKS456
+#define CLK_NR_CLKS461
#endif /* _DT_BINDINGS_CLOCK_EXYNOS_4_H */
--
1.8.5.5
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[PATCH v4 5/9] ARM: dts: Add memory bus node for Exynos4x12
This patch adds the memory bus node for Exynos4x12 SoC. Exynos4x12 SoC has
two memory bus to translate data between DRAM and eMMC/sub-IPs.
Following list specifies the detailed relation between memory bus clock and DMC
IP in MIF (Memory Interface) block:
- DMC/ACP clock : DMC (Dynamic Memory Controller)
Following list specifies the detailed relation between memory bus clock and
sub-IPs in INT (Internal) block:
- ACLK100 clock : PERIL/PERIR/MFC(PCLK)
- ACLK160 clock : CAM/TV/LCD
- ACLK133 clock : FSYS
- GDL/GDR clock : leftbus/rightbus
- SCLK_MFC clock : MFC
Cc: Kukjin Kim
Cc: Myungjoo Ham
Cc: Kyungmin Park
Signed-off-by: Chanwoo Choi
Acked-by: Myungjoo Ham
---
arch/arm/boot/dts/exynos4x12.dtsi | 121 ++
1 file changed, 121 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi
b/arch/arm/boot/dts/exynos4x12.dtsi
index 93b7040..44f6272 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -31,6 +31,127 @@
mshc0 = &mshc_0;
};
+ memory_bus_mif: memory_bus@0 {
+ compatible = "samsung,exynos-memory-bus";
+
+ operating-points = <
+ 40 110
+ 20 100
+ 16 95
+ 133000 95
+ 10 95>;
+ status = "disabled";
+
+ blocks {
+ dmc_block: memory_bus_block1 {
+ clocks = <&clock CLK_DIV_DMC>;
+ clock-names = "memory-bus";
+ frequency = <
+ 40
+ 20
+ 16
+ 133000
+ 10>;
+ };
+
+ acp_block: memory_bus_block2 {
+ clocks = <&clock CLK_DIV_ACP>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+ 133000
+ 133000
+ 10>;
+ };
+
+ c2c_block: memory_bus_block3 {
+ clocks = <&clock CLK_DIV_C2C>;
+ clock-names = "memory-bus";
+ frequency = <
+ 40
+ 20
+ 16
+ 133000
+ 10>;
+ };
+ };
+ };
+
+ memory_bus_int: memory_bus@1 {
+ compatible = "samsung,exynos-memory-bus";
+
+ operating-points = <
+ 20 100
+ 16 95
+ 133000 925000
+ 10 90>;
+
+ status = "disabled";
+
+ blocks {
+ peri_block: memory_bus_block1 {
+ clocks = <&clock CLK_ACLK100>;
+ clock-names = "memory-bus";
+ frequency = <
+ 10
+ 10
+ 10
+ 10>;
+ };
+
+ fsys_block: memory_bus_block2 {
+ clocks = <&clock CLK_ACLK133>;
+ clock-names = "memory-bus";
+ frequency = <
+ 133000
+ 133000
+ 10
+ 10>;
+ };
+
+ display_block: memory_bus_block3 {
+ clocks = <&clock CLK_ACLK160>;
+ clock-names = "memory-bus";
+ frequency = <
+ 16
+ 16
+ 133000
+ 10>;
+ };
+
+ leftbus_block: memory_bus_block4 {
+ clocks = <&clock CLK_DIV_GDL>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+
[PATCH v4 0/9] devfreq: Add generic exynos memory-bus frequency driver
This patch-set adds the generic exynos bus frequency driver for memory bus
with DEVFREQ framework. The Samsung Exynos SoCs have the common architecture
for memory bus between DRAM memory and MMC/sub IP in SoC. This driver can
support the memory bus frequency driver for Exynos SoCs.
Each memory bus block has a clock for memory bus speed and frequency
table which is changed according to the utilization of memory bus on runtime.
And then each memory bus group has the one more memory bus blocks and
OPP table (including frequency and voltage), regulator, devfreq-event
devices.
There are a little difference about the number of memory bus because each Exynos
SoC have the different sub-IP and different memory bus speed. In spite of this
difference among Exynos SoCs, we can support almost Exynos SoC by adding
unique data of memory bus to devicetree file.
Depend on:
- [PATCHv8 0/9] devfreq: Add devfreq-event class to provide raw data for
devfreq device
: https://lkml.org/lkml/2015/1/7/795
Changelog:
Changes from v3:
(https://lkml.org/lkml/2015/1/7/872)
- Change the driver name and path by comment
: drivers/devfreq/exynos-busfreq.c -> drivers/devfreq/exynos/exynos-bus.c
- Disable regulator when entering suspend state in exynos-bus.c
and enable it after wake-up from suspend state.
- Add 'exynos,saturation-ratio' property to calibrate the performance count
against cycle count.
- Add new patch to remove unused old driver
: drivers/devfreq/exynos/exynos4_bus.{c|h}
- Clean-up code for minor issue
- Add acked tag by Myungjoo Ham (DEVFREQ maintainer)
Changes from v2:
(https://lkml.org/lkml/2014/12/31/2)
- Support the memory bus frequency feature for Exynos3250-based Monk board
- Fix build warning about variable uninitialized
Changes from v1:
(https://lkml.org/lkml/2014/12/23/178)
- This patchset is rebased on v3.19-rc2.
- Fix bug after wake-up from suspend state. If devfreq device fail to get event,
exynos-busfreq retry to set the event for starting.
- Add memory bus group of Exynos4x12/Exynos4210
- Add divider clock id for Exynos4 memory bus frequency
- Support memory bus frequency driver on Exynos4412-based TRATS2 board
- This patch-set has the dependency on following patch-set[1]:
[1] [PATCHv6 0/9] devfreq: Add devfreq-event class to provide raw data for
devfreq device
: https://lkml.org/lkml/2014/12/28/139
Chanwoo Choi (9):
devfreq: exynos: Add generic exynos memory bus frequency driver
devfreq: exynos: Add documentation for generic exynos memory bus frequency
driver
ARM: dts: Add memory bus node for Exynos3250
clk: samsung: exynos4: Add divider clock id for memory bus frequency
ARM: dts: Add memory bus node for Exynos4x12
ARM: dts: Add memory bus node for Exynos4210
ARM: dts: Add the support for exynos busfreq on Exynos3250-based Rinato/Monk
board
ARM: dts: Add the support for exynos busfreq on Exynos4412-based TRATS2 board
devfreq: exynos: Remove unused exynos4 memory busfreq driver
.../devicetree/bindings/devfreq/exynos-bus.txt | 188
arch/arm/boot/dts/exynos3250-monk.dts | 12 +
arch/arm/boot/dts/exynos3250-rinato.dts| 12 +
arch/arm/boot/dts/exynos3250.dtsi | 125 +++
arch/arm/boot/dts/exynos4210.dtsi | 93 ++
arch/arm/boot/dts/exynos4412-trats2.dts| 12 +
arch/arm/boot/dts/exynos4x12.dtsi | 121 +++
drivers/clk/samsung/clk-exynos4.c | 10 +-
drivers/devfreq/Kconfig| 17 +-
drivers/devfreq/Makefile |1 +
drivers/devfreq/exynos/Makefile|2 +-
drivers/devfreq/exynos/exynos-bus.c| 598 +++
drivers/devfreq/exynos/exynos4_bus.c | 1055
drivers/devfreq/exynos/exynos4_bus.h | 110 --
include/dt-bindings/clock/exynos4.h|7 +-
15 files changed, 1184 insertions(+), 1179 deletions(-)
create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt
create mode 100644 drivers/devfreq/exynos/exynos-bus.c
delete mode 100644 drivers/devfreq/exynos/exynos4_bus.c
delete mode 100644 drivers/devfreq/exynos/exynos4_bus.h
--
1.8.5.5
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[PATCH v4 6/9] ARM: dts: Add memory bus node for Exynos4210
This patch adds the memory bus node for Exynos4210 SoC. Exynos4210 SoC has
one memory bus to translate data between DRAM and eMMC/sub-IPs because
Exynos4210 must need only one regulator for memory bus.
Following list specifies the detailed relation between memory bus clock and
sub-IPs:
- DMC/ACP clock : DMC (Dynamic Memory Controller)
- ACLK200 clock : LCD0
- ACLK100 clock : PERIL/PERIR/MFC(PCLK)
- ACLK160 clock : CAM/TV/LCD0/LCD1
- ACLK133 clock : FSYS/GPS
- GDL/GDR clock : leftbus/rightbus
- SCLK_MFC clock : MFC
Cc: Kukjin Kim
Cc: Myungjoo Ham
Cc: Kyungmin Park
Signed-off-by: Chanwoo Choi
---
arch/arm/boot/dts/exynos4210.dtsi | 93 +++
1 file changed, 93 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index b2598de..c039409 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -48,6 +48,99 @@
};
};
+ memory_bus: memory_bus@0 {
+ compatible = "samsung,exynos-memory-bus";
+
+ operating-points = <
+ 40 115
+ 267000 105
+ 133000 1025000>;
+ status = "disabled";
+
+ blocks {
+ dmc_block: memory_bus_block1 {
+ clocks = <&clock CLK_DIV_DMC>;
+ clock-names = "memory-bus";
+ frequency = <
+ 40
+ 267000
+ 133000>;
+ };
+
+ acp_block: memory_bus_block2 {
+ clocks = <&clock CLK_DIV_ACP>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+ 133000>;
+ };
+
+ peri_block: memory_bus_block3 {
+ clocks = <&clock CLK_ACLK100>;
+ clock-names = "memory-bus";
+ frequency = <
+ 10
+ 10
+ 10>;
+ };
+
+ fsys_block: memory_bus_block4 {
+ clocks = <&clock CLK_ACLK133>;
+ clock-names = "memory-bus";
+ frequency = <
+ 133000
+ 133000
+ 10>;
+ };
+
+ display_block: memory_bus_block5 {
+ clocks = <&clock CLK_ACLK160>;
+ clock-names = "memory-bus";
+ frequency = <
+ 16
+ 133000
+ 10>;
+ };
+
+ lcd0_block: memory_bus_block6 {
+ clocks = <&clock CLK_ACLK200>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+ 10>;
+ };
+
+ leftbus_block: memory_bus_block7 {
+ clocks = <&clock CLK_DIV_GDL>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+ 10>;
+ };
+
+ rightbus_block: memory_bus_block8 {
+ clocks = <&clock CLK_DIV_GDR>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+ 10>;
+ };
+
+ mfc_block: memory_bus_block9 {
+ clocks = <&clock CLK_SCLK_MFC>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+ 10>;
+ };
+ };
+ };
+
pmu_system_controller: system-controller@1002 {
clock-names = "clkout0", "clk
[PATCH v4 1/9] devfreq: exynos: Add generic exynos memory bus frequency driver
This patch adds the generic exynos bus frequency driver for memory bus
with DEVFREQ framework. The Samsung Exynos SoCs have the common architecture
for memory bus between DRAM memory and MMC/sub IP in SoC. This driver can
support the memory bus frequency driver for Exynos SoCs.
Each memory bus block has a clock for memory bus speed and frequency
table which is changed according to the utilization of memory bus on runtime.
And then each memory bus group has the one more memory bus blocks and
OPP table (including frequency and voltage), regulator, devfreq-event
devices.
There are a little difference about the number of memory bus because each Exynos
SoC have the different sub-IP and different memory bus speed. In spite of this
difference among Exynos SoCs, we can support almost Exynos SoC by adding
unique data of memory bus to devicetree file.
Cc: Myungjoo Ham
Cc: Kyungmin Park
Cc: Kukjin Kim
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/Kconfig | 15 +
drivers/devfreq/Makefile| 1 +
drivers/devfreq/exynos/Makefile | 1 +
drivers/devfreq/exynos/exynos-bus.c | 598
4 files changed, 615 insertions(+)
create mode 100644 drivers/devfreq/exynos/exynos-bus.c
diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index 21f8f17..cb66867 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -65,6 +65,21 @@ config DEVFREQ_GOV_USERSPACE
comment "DEVFREQ Drivers"
+config ARM_EXYNOS_BUS_DEVFREQ
+ bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
+ depends on ARCH_EXYNOS
+ select DEVFREQ_GOV_SIMPLE_ONDEMAND
+ select DEVFREQ_EVENT_EXYNOS_PPMU
+ select PM_DEVFREQ_EVENT
+ select PM_OPP
+ help
+ This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
+ Memory bus has one more group of memory bus (e.g, MIF and INT block).
+ Each memory bus group could contain many memoby bus block. It reads
+ PPMU counters of memory controllers by using DEVFREQ-event device
+ and adjusts the operating frequencies and voltages with OPP support.
+ This does not yet operate with optimal voltages.
+
config ARM_EXYNOS4_BUS_DEVFREQ
bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) &&
!ARCH_MULTIPLATFORM
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index c449336..29a04c5 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE) += governor_powersave.o
obj-$(CONFIG_DEVFREQ_GOV_USERSPACE)+= governor_userspace.o
# DEVFREQ Drivers
+obj-$(CONFIG_ARCH_EXYNOS) += exynos/
obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ) += exynos/
obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ) += exynos/
diff --git a/drivers/devfreq/exynos/Makefile b/drivers/devfreq/exynos/Makefile
index 49bc917..4ec06d3 100644
--- a/drivers/devfreq/exynos/Makefile
+++ b/drivers/devfreq/exynos/Makefile
@@ -1,3 +1,4 @@
# Exynos DEVFREQ Drivers
+obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o
obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ) += exynos_ppmu.o exynos4_bus.o
obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ) += exynos_ppmu.o exynos5_bus.o
diff --git a/drivers/devfreq/exynos/exynos-bus.c
b/drivers/devfreq/exynos/exynos-bus.c
new file mode 100644
index 000..b348956
--- /dev/null
+++ b/drivers/devfreq/exynos/exynos-bus.c
@@ -0,0 +1,598 @@
+/*
+ * Generic Exynos Memory Bus Frequency driver with DEVFREQ Framework
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * Author : Chanwoo Choi
+ *
+ * This driver is based on exynos4_bus.c, which was written
+ * by MyungJoo Ham , Samsung Electronics.
+ *
+ * This driver support Exynos Memory Bus frequency feature by using in DEVFREQ
+ * framework. This version supprots Exynos3250/Exynos4 series/Exynos5260 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DEFAULT_SATURATION_RATIO 40
+#define SAFEVOLT 5
+
+struct exynos_memory_bus_opp {
+ unsigned long rate;
+ unsigned long volt;
+};
+
+struct exynos_memory_bus_block {
+ struct clk *clk;
+ struct exynos_memory_bus_opp *freq_table;
+};
+
+struct exynos_memory_bus {
+ /* devfreq device to monitor and control memory bus group */
+ struct device *dev;
+ struct devfreq *devfreq;
+
+ struct exynos_memory_bus_opp *freq_table;
+ unsigned int freq_count;
+ struct regulator *regulator;
+ struct mutex lock;
+ int ratio;
+
+ struct exynos_memory_bus_opp curr_opp;
+
+ struct exynos_memory_bus_block *block;
+ unsign
[PATCH v4 3/9] ARM: dts: Add memory bus node for Exynos3250
This patch adds the memory bus node for Exynos3250 SoC. Exynos3250 has
following memory buses to translate data between DRAM and eMMC/sub-IPs.
Following list specifies the detailed relation between memory bus clock and DMC
IP in MIF (Memory Interface) block:
- DMC clock : DMC (Dynamic Memory Controller)
Following list specifies the detailed relation between memory bus clock and
sub-IPs in INT (Internal) block:
- ACLK100 clock : PERIL
- ACLK160 clock : LCD0
- ACLK200 clock : FSYS
- ACLK266 clock : ISP
- GDL/GDR clock : leftbus/rightbus
- SCLK_MFC clock : MFC
Cc: Kukjin Kim
Cc: Myungjoo Ham
Cc: Kyungmin Park
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
Acked-by: Myungjoo Ham
---
arch/arm/boot/dts/exynos3250.dtsi | 125 ++
1 file changed, 125 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 9ed1260..3eaed53 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -99,6 +99,131 @@
};
};
+ memory_bus_mif: memory_bus@0 {
+ compatible = "samsung,exynos-memory-bus";
+
+ operating-points = <
+ 40 875000
+ 20 80
+ 133000 80
+ 10 80
+ 5 80>;
+ status = "disabled";
+
+ blocks {
+ dmc_block: memory_bus_block1 {
+ clocks = <&cmu_dmc CLK_DIV_DMC>;
+ clock-names = "memory-bus";
+ frequency = <
+ 40
+ 20
+ 133000
+ 10
+ 5>;
+ };
+ };
+ };
+
+ memory_bus_int: memory_bus@1 {
+ compatible = "samsung,exynos-memory-bus";
+
+ operating-points = <
+ 40 95
+ 20 95
+ 133000 925000
+ 10 85
+ 8 85
+ 5 85>;
+
+ status = "disabled";
+
+ blocks {
+ peril_block: memory_bus_block1 {
+ clocks = <&cmu CLK_DIV_ACLK_100>;
+ clock-names = "memory-bus";
+ frequency = <
+ 10
+ 10
+ 10
+ 10
+ 5
+ 5>;
+ };
+
+ lcd0_block: memory_bus_block2 {
+ clocks = <&cmu CLK_DIV_ACLK_160>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+ 10
+ 8
+ 8
+ 5>;
+ };
+
+ fsys_block: memory_bus_block3 {
+ clocks = <&cmu CLK_DIV_ACLK_200>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 20
+ 10
+ 8
+ 5
+ 5>;
+ };
+
+ isp_block: memory_bus_block4 {
+ clocks = <&cmu CLK_DIV_ACLK_266>;
+ clock-names = "memory-bus";
+ frequency = <
+ 30
+ 20
+ 133000
+
[PATCH v4 9/9] devfreq: exynos: Remove unused exynos4 memory busfreq driver
This patch removes the unused exynos4 memory busfreq driver by adding generic
exynos memory bus frequency driver.
Cc: Myungjoo Ham
Cc: Kyungmin Park
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/Kconfig | 12 -
drivers/devfreq/exynos/Makefile |1 -
drivers/devfreq/exynos/exynos4_bus.c | 1055 --
drivers/devfreq/exynos/exynos4_bus.h | 110
4 files changed, 1178 deletions(-)
delete mode 100644 drivers/devfreq/exynos/exynos4_bus.c
delete mode 100644 drivers/devfreq/exynos/exynos4_bus.h
diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index cb66867..f7e5f5b 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -80,18 +80,6 @@ config ARM_EXYNOS_BUS_DEVFREQ
and adjusts the operating frequencies and voltages with OPP support.
This does not yet operate with optimal voltages.
-config ARM_EXYNOS4_BUS_DEVFREQ
- bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
- depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) &&
!ARCH_MULTIPLATFORM
- select DEVFREQ_GOV_SIMPLE_ONDEMAND
- select PM_OPP
- help
- This adds the DEVFREQ driver for Exynos4210 memory bus (vdd_int)
- and Exynos4212/4412 memory interface and bus (vdd_mif + vdd_int).
- It reads PPMU counters of memory controllers and adjusts
- the operating frequencies and voltages with OPP support.
- This does not yet operate with optimal voltages.
-
config ARM_EXYNOS5_BUS_DEVFREQ
tristate "ARM Exynos5250 Bus DEVFREQ Driver"
depends on SOC_EXYNOS5250
diff --git a/drivers/devfreq/exynos/Makefile b/drivers/devfreq/exynos/Makefile
index 4ec06d3..3f806c7 100644
--- a/drivers/devfreq/exynos/Makefile
+++ b/drivers/devfreq/exynos/Makefile
@@ -1,4 +1,3 @@
# Exynos DEVFREQ Drivers
obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o
-obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ) += exynos_ppmu.o exynos4_bus.o
obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ) += exynos_ppmu.o exynos5_bus.o
diff --git a/drivers/devfreq/exynos/exynos4_bus.c
b/drivers/devfreq/exynos/exynos4_bus.c
deleted file mode 100644
index da95092..000
--- a/drivers/devfreq/exynos/exynos4_bus.c
+++ /dev/null
@@ -1,1055 +0,0 @@
-/* drivers/devfreq/exynos4210_memorybus.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- * MyungJoo Ham
- *
- * EXYNOS4 - Memory/Bus clock frequency scaling support in DEVFREQ framework
- * This version supports EXYNOS4210 only. This changes bus frequencies
- * and vddint voltages. Exynos4412/4212 should be able to be supported
- * with minor modifications.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-
-#include "exynos_ppmu.h"
-#include "exynos4_bus.h"
-
-#define MAX_SAFEVOLT 120 /* 1.2V */
-
-enum exynos4_busf_type {
- TYPE_BUSF_EXYNOS4210,
- TYPE_BUSF_EXYNOS4x12,
-};
-
-/* Assume that the bus is saturated if the utilization is 40% */
-#define BUS_SATURATION_RATIO 40
-
-enum busclk_level_idx {
- LV_0 = 0,
- LV_1,
- LV_2,
- LV_3,
- LV_4,
- _LV_END
-};
-
-enum exynos_ppmu_idx {
- PPMU_DMC0,
- PPMU_DMC1,
- PPMU_END,
-};
-
-#define EX4210_LV_MAX LV_2
-#define EX4x12_LV_MAX LV_4
-#define EX4210_LV_NUM (LV_2 + 1)
-#define EX4x12_LV_NUM (LV_4 + 1)
-
-/**
- * struct busfreq_opp_info - opp information for bus
- * @rate: Frequency in hertz
- * @volt: Voltage in microvolts corresponding to this OPP
- */
-struct busfreq_opp_info {
- unsigned long rate;
- unsigned long volt;
-};
-
-struct busfreq_data {
- enum exynos4_busf_type type;
- struct device *dev;
- struct devfreq *devfreq;
- bool disabled;
- struct regulator *vdd_int;
- struct regulator *vdd_mif; /* Exynos4412/4212 only */
- struct busfreq_opp_info curr_oppinfo;
- struct busfreq_ppmu_data ppmu_data;
-
- struct notifier_block pm_notifier;
- struct mutex lock;
-
- /* Dividers calculated at boot/probe-time */
- unsigned int dmc_divtable[_LV_END]; /* DMC0 */
- unsigned int top_divtable[_LV_END];
-};
-
-/* 4210 controls clock of mif and voltage of int */
-static struct bus_opp_table exynos4210_busclk_table[] = {
- {LV_0, 40, 115},
- {LV_1, 267000, 105},
- {LV_2, 133000, 1025000},
- {0, 0, 0},
-};
-
-/*
- * MIF is the main control knob clock for Exynos4x12 MIF/INT
- * clock and voltage of both mif/int are controlled.
- */
-static struct bus_opp_table exynos4x12_mifclk_table[] = {
- {LV_0, 40, 110},
- {LV_1, 267000, 100},
- {LV_2, 16, 95},
-
[PATCH v4 7/9] ARM: dts: Add the support for exynos busfreq on Exynos3250-based Rinato/Monk board
This patch adds the Exynos3250 memory-bus node which includes the regulator
and devfreq-event phandle. The devfreq-event phandle is used for the
governor of devfreq device and provide the current usage state of
MIF (Memory Interface) / INT (Internal) memory bus group.
Cc: Kukjin Kim
Cc: Myungjoo Ham
Cc: Kyungmin Park
Cc: Youngjun Cho
Signed-off-by: Chanwoo Choi
Acked-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250-monk.dts | 12
arch/arm/boot/dts/exynos3250-rinato.dts | 12
2 files changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250-monk.dts
b/arch/arm/boot/dts/exynos3250-monk.dts
index fcceb59..efadb16 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -460,6 +460,18 @@
};
};
+&memory_bus_mif {
+ devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+ vdd-mem-supply = <&buck1_reg>;
+ status = "okay";
+};
+
+&memory_bus_int {
+ devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+ vdd-mem-supply = <&buck3_reg>;
+ status = "okay";
+};
+
&xusbxti {
clock-frequency = <2400>;
};
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 9dd1ce1..cf800ed 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -635,6 +635,18 @@
};
};
+&memory_bus_mif {
+ devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+ vdd-mem-supply = <&buck1_reg>;
+ status = "okay";
+};
+
+&memory_bus_int {
+ devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+ vdd-mem-supply = <&buck3_reg>;
+ status = "okay";
+};
+
&xusbxti {
clock-frequency = <2400>;
};
--
1.8.5.5
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[PATCH v4 8/9] ARM: dts: Add the support for exynos busfreq on Exynos4412-based TRATS2 board
This patch adds the Exynos4412 memory-bus node which includes the regulator
and devfreq-event phandle. The devfreq-event phandle is used for the
governor of devfreq device and provide the current usage state of
MIF (Memory Interface) / INT (Internal) memory bus group.
Cc: Kukjin Kim
Cc: Myungjoo Ham
Cc: Kyungmin Park
Signed-off-by: Chanwoo Choi
---
arch/arm/boot/dts/exynos4412-trats2.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index bee0eed..21ba25e 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -917,6 +917,18 @@
};
};
+&memory_bus_mif {
+ devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+ vdd-mem-supply = <&buck1_reg>;
+ status = "okay";
+};
+
+&memory_bus_int {
+ devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+ vdd-mem-supply = <&buck3_reg>;
+ status = "okay";
+};
+
&pinctrl_0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep0>;
--
1.8.5.5
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[PATCH v4 2/9] devfreq: exynos: Add documentation for generic exynos memory bus frequency driver
This patch adds the documentation for generic exynos memory bus frequency
driver.
Cc: MyungJoo Ham
Cc: Kyungmin Park
Cc: Kukjin Kim
Signed-off-by: Chanwoo Choi
Acked-by: MyungJoo Ham
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 188 +
1 file changed, 188 insertions(+)
create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt
diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
new file mode 100644
index 000..6323dcf
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -0,0 +1,188 @@
+
+* Generic Exynos Memory Bus device
+
+The Samsung Exynos SoCs have many memory buses for data transfer between DRAM
+memory and MMC/sub-IP in SoC. Almost Exynos SoCs have the common architecture
+for memory buses. Generally, Exynos SoC express the memory bus by using memory
+bus group and block. The memory bus group has one more memory bus blocks and
+OPP table (including frequency and voltage for DVFS), regulator, devfreq-event
+devices. Each memory bus block has a clock for own memory bus speen and
+frequency table for DVFS. There are a little different among Exynos SoCs
+because each Exynos SoC has the different sub-IP and differnt memory bus.
+So, this difference should be specified in devicetree file.
+
+Required properties for memory bus group:
+- compatible: Should be "samsung,exynos-memory-bus".
+- operating-points: the OPP table including frequency/voltage information to
+ support DVFS (Dynamic Voltage/Frequency Scaling) feature.
+- devfreq-events: the devfreq-event device to monitor the curret state of
+ memory bus group.
+- vdd-mem-supply: the regulator to provide memory bus group with the voltage.
+
+Optional properties for memory bus group:
+- exynos,saturation-ratio: the percentage value which is used to calibrate
+ the memory performance count againt memory cycle count.
+
+Required properties for memory bus block:
+- clock-names : the name of clock used by the memory bus, "memory-bus".
+- clocks : phandles for clock specified in "clock-names" property.
+- #clock-cells: should be 1.
+- frequency: the frequency table to support DVFS feature.
+
+Example1 : Memory bus group/block in exynos3250.dtsi are listed below.
+ Exynos3250 has two memory bus group (MIF, INT group). MIF (Memory
+ Interface) memory bus group includes one memory bus block between
+ DRAM and eMMC. Also, INT (Internal) memory bus group includes eight
+ memory bus blocks which support each sub-IP between DRAM and sub-IP.
+
+ memory_bus_mif: memory_bus@0 {
+ compatible = "samsung,exynos-memory-bus";
+
+ operating-points = <
+ 40 875000
+ 20 80
+ 133000 80
+ 10 80
+ 5 80>;
+ status = "disabled";
+
+ blocks {
+ dmc_block: memory_bus_block1 {
+ clocks = <&cmu_dmc CLK_DIV_DMC>;
+ clock-names = "memory-bus";
+ frequency = <
+ 40
+ 20
+ 133000
+ 10
+ 5>;
+ };
+ };
+ };
+
+ memory_bus_int: memory_bus@1 {
+ compatible = "samsung,exynos-memory-bus";
+
+ operating-points = <
+ 40 95
+ 20 95
+ 133000 925000
+ 10 85
+ 8 85
+ 5 85>;
+
+ status = "disabled";
+
+ blocks {
+ peri_block: memory_bus_block1 {
+ clocks = <&cmu CLK_DIV_ACLK_100>;
+ clock-names = "memory-bus";
+ frequency = <
+ 10
+ 10
+ 10
+ 10
+ 5
+ 5>;
+ };
+
+ display_block: memory_bus_block2 {
+ clocks = <&cmu CLK_DIV_ACLK_160>;
+ clock-names = "memory-bus";
+ frequency = <
+ 20
+ 16
+ 10
+ 8
+
[PATCH v2] hwmon: (ina2xx) Add ina231 compatible string
From: Kevin Hilman
Add support for "ina231" as compatible string, and update
Documentation and Kconfig accordingly.
Tested with the Exynos5422-based odroid-xu3 board which has on-board
INA231 sensors.
Signed-off-by: Kevin Hilman
---
Documentation/hwmon/ina2xx | 9 +
drivers/hwmon/Kconfig | 4 ++--
drivers/hwmon/ina2xx.c | 1 +
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/hwmon/ina2xx b/Documentation/hwmon/ina2xx
index 4223c2d3b508..c2f838f65ee4 100644
--- a/Documentation/hwmon/ina2xx
+++ b/Documentation/hwmon/ina2xx
@@ -26,6 +26,12 @@ Supported chips:
Datasheet: Publicly available at the Texas Instruments website
http://www.ti.com/
+ * Texas Instruments INA231
+Prefix: 'ina231'
+Addresses: I2C 0x40 - 0x4f
+Datasheet: Publicly available at the Texas Instruments website
+ http://www.ti.com/
+
Author: Lothar Felten
Description
@@ -44,6 +50,9 @@ The INA226 monitors both a shunt voltage drop and bus supply
voltage.
The INA230 is a high or low side current shunt and power monitor with an I2C
interface. The INA230 monitors both a shunt voltage drop and bus supply
voltage.
+The INA231 is a high or low side current shunt and power monitor with an I2C
+interface. The INA230 monitors both a shunt voltage drop and bus supply
voltage.
+
The shunt value in micro-ohms can be set via platform data or device tree.
Please refer to the Documentation/devicetree/bindings/i2c/ina2xx.txt for
bindings
if the device tree is used.
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 6529c09c46f0..408fb6f5f055 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1420,8 +1420,8 @@ config SENSORS_INA2XX
tristate "Texas Instruments INA219 and compatibles"
depends on I2C
help
- If you say yes here you get support for INA219, INA220, INA226, and
- INA230 power monitor chips.
+ If you say yes here you get support for INA219, INA220, INA226,
+ INA230, and INA231 power monitor chips.
The INA2xx driver is configured for the default configuration of
the part as described in the datasheet.
diff --git a/drivers/hwmon/ina2xx.c b/drivers/hwmon/ina2xx.c
index e01feba909c3..8c4a29bd2eaf 100644
--- a/drivers/hwmon/ina2xx.c
+++ b/drivers/hwmon/ina2xx.c
@@ -287,6 +287,7 @@ static const struct i2c_device_id ina2xx_id[] = {
{ "ina220", ina219 },
{ "ina226", ina226 },
{ "ina230", ina226 },
+ { "ina231", ina226 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ina2xx_id);
--
2.1.3
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Re: [PATCH] hwmon: (ina2xx) Add ina231 compatible string
Guenter Roeck writes: > On Wed, Jan 14, 2015 at 03:57:32PM -0800, Kevin Hilman wrote: >> From: Kevin Hilman >> >> Add support for "ina231" as compatible string. >> >> Tested with the Exynos5422-based odroid-xu3 board which has on-board >> INA231 sensors. >> >> Signed-off-by: Kevin Hilman > > Hi Kevin, > > can you also update Documentation/hwmon/ina2xx and > Documentation/hwmon/Kconfig ? > Sure... coming right up. Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2] ARM: dts: exynos5422-odroidxu3: add on-board INA231 sensors
From: Kevin Hilman
The odroid-xu3 has 4 INA231 current sensors on board which can be
accessed from the Linux via the hwmon interface.
There is one sensor for each of these power rails:
- A15 cluster: VDD_ARM
- A7 cluster: VDD_KFC
- GPU: VDD_G3D
- memory: VDD_MEM
In addition to adding the sensors, LDO26 from the PMIC needs to be
enabled because it's powering these sensor.
Cc: Javier Martinez Canillas
Cc: Sjoerd Simons
Signed-off-by: Kevin Hilman
---
v2: use "ti,ina231" as compatible string.
Applies on top of "ARM: dts: Add dts file for odroid XU3 board" from Sjoerd
Simons.
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 39 ++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index c29123c0734d..50353d023225 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -174,6 +174,13 @@
regulator-always-on;
};
+ ldo26_reg: LDO26 {
+ regulator-name = "vdd_ldo26";
+ regulator-min-microvolt = <300>;
+ regulator-max-microvolt = <300>;
+ regulator-always-on;
+ };
+
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-min-microvolt = <80>;
@@ -257,6 +264,38 @@
};
};
+ i2c_0: i2c@12C6 {
+ status = "okay";
+
+ /* A15 cluster: VDD_ARM */
+ ina231@40 {
+ compatible = "ti,ina231";
+ reg = <0x40>;
+ shunt-resistor = <1>;
+ };
+
+ /* memory: VDD_MEM */
+ ina231@41 {
+ compatible = "ti,ina231";
+ reg = <0x41>;
+ shunt-resistor = <1>;
+ };
+
+ /* GPU: VDD_G3D */
+ ina231@44 {
+ compatible = "ti,ina231";
+ reg = <0x44>;
+ shunt-resistor = <1>;
+ };
+
+ /* A7 cluster: VDD_KFC */
+ ina231@45 {
+ compatible = "ti,ina231";
+ reg = <0x45>;
+ shunt-resistor = <1>;
+ };
+ };
+
i2c_2: i2c@12C8 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
--
2.1.3
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Re: [PATCH] hwmon: (ina2xx) Add ina231 compatible string
On Wed, Jan 14, 2015 at 03:57:32PM -0800, Kevin Hilman wrote: > From: Kevin Hilman > > Add support for "ina231" as compatible string. > > Tested with the Exynos5422-based odroid-xu3 board which has on-board > INA231 sensors. > > Signed-off-by: Kevin Hilman Hi Kevin, can you also update Documentation/hwmon/ina2xx and Documentation/hwmon/Kconfig ? Thanks, Guenter -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] hwmon: (ina2xx) Add ina231 compatible string
From: Kevin Hilman
Add support for "ina231" as compatible string.
Tested with the Exynos5422-based odroid-xu3 board which has on-board
INA231 sensors.
Signed-off-by: Kevin Hilman
---
drivers/hwmon/ina2xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/hwmon/ina2xx.c b/drivers/hwmon/ina2xx.c
index e01feba909c3..8c4a29bd2eaf 100644
--- a/drivers/hwmon/ina2xx.c
+++ b/drivers/hwmon/ina2xx.c
@@ -287,6 +287,7 @@ static const struct i2c_device_id ina2xx_id[] = {
{ "ina220", ina219 },
{ "ina226", ina226 },
{ "ina230", ina226 },
+ { "ina231", ina226 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ina2xx_id);
--
2.1.3
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Re: [RESEND PATCH v3] clocksource: exynos_mct: Add the support for Exynos 64bit SoC
Hi Kukjin,
On 01/15/2015 01:02 AM, Daniel Lezcano wrote:
> On 01/14/2015 04:51 PM, Kukjin Kim wrote:
>> On 01/14/15 14:33, Chanwoo Choi wrote:
>>
>> Hi,
>>
>> + Doug, Olof
>>
>>> This patch adds the support for Exynos 64bit SoC. The delay_timer is only
>>> used
>>> for Exynos 32bit SoC.
>>>
>> Yes, the Exynos MCT(Multi-Core Timer) is 64bit timer and it is available
>> on 64bit exynos SoC such as exynos7. But basically ARMv8 architecture is
>> including ARM ARCH timer (ARM Generic Timer) and exynos7 also has
>> implemented it and additionally its access is faster than using memory
>> mapped register called SFR for MCT...so Doug submitted patch to use MCT
>> on 32bit exynos SoCs before.
I know arch_timer. As you comment, ARCH timer would be used for system timer
for ARMv8.
But, Exynos5433/Exynos7 (ARMv8) include MCT (Multi-Core Timer) IP. I checked it
on
Exynos5433/EXynos7 User-manaual and tested it.
I think that exynos_mct.c should support the Exynos 64-bit SoC
because Exynos5433/Exynos7 include already MCT (Multi-Core Timer) IP.
Also, I have a problem to verify ARCH timer on Exynos SoC. Exynos User-manual
never includes
the detailed information about for ARCH timer(e.g, clock for ARCH timer). I
knew that
I can get the document of ARCH timer for ARM official site but I think it is
insufficient
to implement ARCH timer on Exynos SoC.
Best Regards,
Chanwoo Choi
>>
>> I know using MCT on 64bit exynos is usefulness for Power Management and
>> I need to talk to relevant guys in office again. If anything, I'll let
>> you know.
>
> I will wait for your answer before digging more the patch.
>
> Thanks
> -- Daniel
>
>>> Cc: Daniel Lezcano
>>> Cc: Thomas Gleixner
>>> Cc: Kukjin Kim
>>> Cc: Mark Rutland
>>> Signed-off-by: Chanwoo Choi
>>> ---
>>> This patch set is tested on 64-bit Exynos SoC. I send only this patch from
>>> following patchst[1].
>>> [1] https://lkml.org/lkml/2014/12/2/134
>>>
>>> Changes from v2:
>>> - None
>>> Changes from v1:
>>> - Use CONFIG_ARM instead of CONFIG_ARM64
>>>
>>> drivers/clocksource/Kconfig | 1 -
>>> drivers/clocksource/exynos_mct.c | 4
>>> 2 files changed, 4 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
>>> index fc01ec2..be38119 100644
>>> --- a/drivers/clocksource/Kconfig
>>> +++ b/drivers/clocksource/Kconfig
>>> @@ -135,7 +135,6 @@ config CLKSRC_METAG_GENERIC
>>>
>>> config CLKSRC_EXYNOS_MCT
>>> def_bool y if ARCH_EXYNOS
>>> -depends on !ARM64
>>> help
>>> Support for Multi Core Timer controller on Exynos SoCs.
>>>
>>> diff --git a/drivers/clocksource/exynos_mct.c
>>> b/drivers/clocksource/exynos_mct.c
>>> index 9403061..b840ea1 100644
>>> --- a/drivers/clocksource/exynos_mct.c
>>> +++ b/drivers/clocksource/exynos_mct.c
>>> @@ -223,6 +223,7 @@ static u64 notrace exynos4_read_sched_clock(void)
>>> return exynos4_read_count_32();
>>> }
>>>
>>> +#if defined(CONFIG_ARM)
>>> static struct delay_timer exynos4_delay_timer;
>>>
>>> static cycles_t exynos4_read_current_timer(void)
>>> @@ -231,14 +232,17 @@ static cycles_t exynos4_read_current_timer(void)
>>>"cycles_t needs to move to 32-bit for ARM64 usage");
>>> return exynos4_read_count_32();
>>> }
>>> +#endif
>>>
>>> static void __init exynos4_clocksource_init(void)
>>> {
>>> exynos4_mct_frc_start();
>>>
>>> +#if defined(CONFIG_ARM)
>>> exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
>>> exynos4_delay_timer.freq = clk_rate;
>>> register_current_timer_delay(&exynos4_delay_timer);
>>> +#endif
>>>
>>> if (clocksource_register_hz(&mct_frc, clk_rate))
>>> panic("%s: can't register clocksource\n", mct_frc.name);
>
>
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Re: [PATCH] ARM: dts: exynos5422-odroidxu3: add INA2xx sensors
Sjoerd Simons writes:
> Hey kevin,
>
> On Tue, 2015-01-13 at 16:03 -0800, Kevin Hilman wrote:
>> From: Kevin Hilman
>>
>> The odroid-xu3 has 4 INA231 current sensors on board which can be
>> accessed from the Linux via the hwmon interface.
>>
>> There is one sensor for each of these power rails:
>>
>> - A15 cluster: VDD_ARM
>> - A7 cluster: VDD_KFC
>> - GPU: VDD_G3D
>> - memory: VDD_MEM
>>
>> In addition to adding the sensors, LDO26 from the PMIC needs to be
>> enabled because it's powering these sensor.
>>
>> Cc: Javier Martinez Canillas
>> Cc: Sjoerd Simons
>> Signed-off-by: Kevin Hilman
>> ---
>> Applies on top of "ARM: dts: Add dts file for odroid XU3 board" from Sjoerd
>> Simons.
>>
>> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 39
>> ++
>> 1 file changed, 39 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> index c29123c0734d..7874da20939f 100644
>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> @@ -257,6 +264,38 @@
>> };
>> };
>>
>> +i2c_0: i2c@12C6 {
>> +status = "okay";
>> +
>> +/* A15 cluster: VDD_ARM */
>> +ina220@40 {
>^ ina231@40 ?
>> +compatible = "ti,ina230";
>
> This feels incredibly nitpicky, but would it not better to use ti,ina231
> as it's an INA231 chip not a INA230? (And add the compatibility string
> to the driver)
Hmm, you're right. Until recently, I thought these were INA230s, but
squinted enough at the schematic yesterday to notice they were marked as
INA231, so updated the changelog, but not the DTS.
Will re-spin with a compatible string update to the driver.
Kevin
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Re: [PATCH] ARM: dts: exynos5422-odroidxu3: add INA2xx sensors
Kukjin Kim writes:
> On 01/14/15 09:03, Kevin Hilman wrote:
>> From: Kevin Hilman
>>
>> The odroid-xu3 has 4 INA231 current sensors on board which can be
>> accessed from the Linux via the hwmon interface.
>>
>> There is one sensor for each of these power rails:
>>
>> - A15 cluster: VDD_ARM
>> - A7 cluster: VDD_KFC
>> - GPU: VDD_G3D
>> - memory: VDD_MEM
>>
>> In addition to adding the sensors, LDO26 from the PMIC needs to be
>> enabled because it's powering these sensor.
>>
>> Cc: Javier Martinez Canillas
>> Cc: Sjoerd Simons
>> Signed-off-by: Kevin Hilman
>> ---
>> Applies on top of "ARM: dts: Add dts file for odroid XU3 board" from Sjoerd
>> Simons.
>>
>> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 39
>> ++
>> 1 file changed, 39 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> index c29123c0734d..7874da20939f 100644
>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> @@ -174,6 +174,13 @@
>> regulator-always-on;
>> };
>>
>> +ldo26_reg: LDO26 {
>> +regulator-name = "vdd_ldo26";
>> +regulator-min-microvolt = <300>;
>> +regulator-max-microvolt = <300>;
>> +regulator-always-on;
>> +};
>> +
>> buck1_reg: BUCK1 {
>> regulator-name = "vdd_mif";
>> regulator-min-microvolt = <80>;
>> @@ -257,6 +264,38 @@
>> };
>> };
>>
>> +i2c_0: i2c@12C6 {
>> +status = "okay";
>> +
>> +/* A15 cluster: VDD_ARM */
>> +ina220@40 {
>> +compatible = "ti,ina230";
>> +reg = <0x40>;
>> +shunt-resistor = <1>;
>> +};
>> +
>> +/* memory: VDD_MEM */
>> +ina220@41 {
>> +compatible = "ti,ina230";
>> +reg = <0x41>;
>> +shunt-resistor = <1>;
>> +};
>> +
>> +/* GPU: VDD_G3D */
>> +ina220@44 {
>> +compatible = "ti,ina230";
>> +reg = <0x44>;
>> +shunt-resistor = <1>;
>> +};
>> +
>> +/* A7 cluster: VDD_KFC */
>> +ina220@45 {
>> +compatible = "ti,ina230";
>> +reg = <0x45>;
>> +shunt-resistor = <1>;
>> +};
>> +};
>> +
>> i2c_2: i2c@12C8 {
>> samsung,i2c-sda-delay = <100>;
>> samsung,i2c-max-bus-freq = <66000>;
>
> Looks good to me and applied. To be honest, I'm not sure about the
> values in the node of shunt-resistor though ;)
I didn't measure the values, but used the values from the DTS that's
part of the hardkernel tree.
Kevin
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Re: [PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains
* Marc Zyngier [150112 10:30]:
> OMAP4/5 has been (ab)using the gic_arch_extn to provide
> wakeup from suspend, and it makes a lot of sense to convert
> this code to use stacked domains instead.
>
> This patch does just this, updating the DT files to actually
> reflect what the HW provides.
>
> BIG FAT WARNING: because the DTs were so far lying by not
> exposing the WUGEN HW block, kernels with this patch applied
> won't have any suspend-resume facility when booted with old DTs,
> and old kernels with updated DTs won't even boot.
>
> On a platform with this patch applied, the system looks like
> this:
>
> root@bacon-fat:~# cat /proc/interrupts
> CPU0 CPU1
> 16: 0 0 WUGEN 37 gp_timer
> 19: 233799 155916 GIC 27 arch_timer
> 23: 0 0 WUGEN 9 l3-dbg-irq
> 24: 1 0 WUGEN 10 l3-app-irq
> 27:282 0 WUGEN 13 omap-dma-engine
> 44: 0 0 4ae1.gpio 13 DMA
FYI, the legacy irq numbers are now all wrong since commit
9a1091ef0017 ("irqchip: gic: Support hierarchy irq domain.").
Started a separate thread "Regression with legacy IRQ numbers
caused by 9a1091ef0017" on it, will give these a try once
that's sorted out.
Regards,
Tony
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Re: [PATCH 2/2] clk: exynos-audss: Fix memory leak on driver unbind or probe failure
Quoting Stephen Boyd (2015-01-08 13:23:13)
> On 01/05/2015 01:52 AM, Krzysztof Kozlowski wrote:
> > The memory allocated by basic clock divider/gate/mux (struct clk_gate,
> > clk_divider and clk_mux) was leaking. During driver unbind or probe
> > failure the driver only unregistered the clocks.
> >
> > Use clk_unregister_{gate,divider,mux} to release all resources.
> >
> > Signed-off-by: Krzysztof Kozlowski
> >
>
> Reviewed-by: Stephen Boyd
I've applied both patches to clk-next. Krzysztof, let me know if you
would prefer to take the audss patch through the samsung clock branch
instead (to include it in a later pull request).
Regards,
Mike
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
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Re: [PATCH] ARM: dts: exynos5422-odroidxu3: add INA2xx sensors
Hey kevin,
On Tue, 2015-01-13 at 16:03 -0800, Kevin Hilman wrote:
> From: Kevin Hilman
>
> The odroid-xu3 has 4 INA231 current sensors on board which can be
> accessed from the Linux via the hwmon interface.
>
> There is one sensor for each of these power rails:
>
> - A15 cluster: VDD_ARM
> - A7 cluster: VDD_KFC
> - GPU: VDD_G3D
> - memory: VDD_MEM
>
> In addition to adding the sensors, LDO26 from the PMIC needs to be
> enabled because it's powering these sensor.
>
> Cc: Javier Martinez Canillas
> Cc: Sjoerd Simons
> Signed-off-by: Kevin Hilman
> ---
> Applies on top of "ARM: dts: Add dts file for odroid XU3 board" from Sjoerd
> Simons.
>
> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 39
> ++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> index c29123c0734d..7874da20939f 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> @@ -257,6 +264,38 @@
> };
> };
>
> + i2c_0: i2c@12C6 {
> + status = "okay";
> +
> + /* A15 cluster: VDD_ARM */
> + ina220@40 {
^ ina231@40 ?
> + compatible = "ti,ina230";
This feels incredibly nitpicky, but would it not better to use ti,ina231
as it's an INA231 chip not a INA230? (And add the compatibility string
to the driver)
--
Sjoerd Simons
Collabora Ltd.
smime.p7s
Description: S/MIME cryptographic signature
Re: [PATCH V3 13/15] ARM: dts: Exynos4 and Odroid X2/U3 sound device nodes update
On Wed, Jan 14, 2015 at 07:42:40PM +0100, Sylwester Nawrocki wrote: > Clock related properties are added to the Exynos4 I2S device nodes > so they can be referred to as clock providers. Missing i2s_opclk1 > clock is added to the I2S0 node and clock properties are added > to the MAX98090 codec node to allow it to control/read frequency > of the MCLK clock directly. Sorry, I should've said - I applied the ASoC patches, not these. signature.asc Description: Digital signature
Re: [PATCH V3 00/15] ASoC: samsung: Add clk provider for I2S internal clocks
On Wed, Jan 14, 2015 at 07:42:27PM +0100, Sylwester Nawrocki wrote: > This series is an attempt to resolve the CDCLK clock gating issue on Odroid > X2/U3 as reported by Daniel Drake [1], by exposing the CDCLK gate clock > (and the two other clocks) through clk API. The upside is we can switch > Odroid X2/U3 to the simple-card, once the CDCLK clock is taken care of by > the clk core and DT. Applied all, thanks. signature.asc Description: Digital signature
Re: [PATCH v3 13/16] thermal: exynos: dts: Provide device tree bindings identical to the one in exynos_tmu_data.c
On Wed, Jan 14, 2015 at 02:41:11PM +0100, Lukasz Majewski wrote:
> Presented device tree bindings provide data already hardcoded in the
> exynos_tmu_data.c file.
> After this commit, it should be possible to reuse common thermal core
> framework in Exynos SoCs.
>
> Signed-off-by: Lukasz Majewski
> ---
> Changes for v2:
> - Add proper TMU entries for exynos3250.dtsi
> Changes for v3:
> - Remove "type" DT properties, which will be extracted from compatible
> - "samsung,tmu_" prefix for TMU specific properties has been added
>
> ---
> arch/arm/boot/dts/exynos3250.dtsi | 2 ++
> arch/arm/boot/dts/exynos4.dtsi| 4
> arch/arm/boot/dts/exynos4210.dtsi | 21 -
> arch/arm/boot/dts/exynos4x12.dtsi | 1 +
> arch/arm/boot/dts/exynos5250.dtsi | 5 +++--
> arch/arm/boot/dts/exynos5420.dtsi | 28
> arch/arm/boot/dts/exynos5440.dtsi | 18 ++
> 7 files changed, 76 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
> b/arch/arm/boot/dts/exynos3250.dtsi
> index 2246549..8cc078c 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -18,6 +18,7 @@
> */
>
> #include "skeleton.dtsi"
> +#include "exynos4-cpu-thermal.dtsi"
> #include
>
> / {
> @@ -188,6 +189,7 @@
> interrupts = <0 216 0>;
> clocks = <&cmu CLK_TMU_APBIF>;
> clock-names = "tmu_apbif";
> + #include "exynos4412-tmu-sensor-conf.dtsi"
> status = "disabled";
> };
>
> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
> index b8168f1..f18d746 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -645,4 +645,8 @@
> samsung,sysreg = <&sys_reg>;
> status = "disabled";
> };
> +
> + tmu: tmu@100C {
> + #include "exynos4412-tmu-sensor-conf.dtsi"
> + };
> };
> diff --git a/arch/arm/boot/dts/exynos4210.dtsi
> b/arch/arm/boot/dts/exynos4210.dtsi
> index 2e66df8..7f0e012 100644
> --- a/arch/arm/boot/dts/exynos4210.dtsi
> +++ b/arch/arm/boot/dts/exynos4210.dtsi
> @@ -21,6 +21,7 @@
>
> #include "exynos4.dtsi"
> #include "exynos4210-pinctrl.dtsi"
> +#include "exynos4-cpu-thermal.dtsi"
>
> / {
> compatible = "samsung,exynos4210", "samsung,exynos4";
> @@ -146,16 +147,34 @@
> reg = <0x0386 0x1000>;
> };
>
> - tmu@100C {
> + tmu: tmu@100C {
> compatible = "samsung,exynos4210-tmu";
> interrupt-parent = <&combiner>;
> reg = <0x100C 0x100>;
> interrupts = <2 4>;
> clocks = <&clock CLK_TMU_APBIF>;
> clock-names = "tmu_apbif";
> + samsung,tmu_gain = <15>;
> + samsung,tmu_reference_voltage = <7>;
> status = "disabled";
> };
>
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + trips {
> + cpu_alert0: cpu-alert-0 {
> + temperature = <85000>; /* millicelsius */
> + };
> + cpu_alert1: cpu-alert-1 {
> + temperature = <10>; /* millicelsius */
> + };
> + cpu_alert2: cpu-alert-2 {
> + temperature = <11>; /* millicelsius */
> + };
> + };
> + };
> + };
> +
> g2d@1280 {
> compatible = "samsung,s5pv210-g2d";
> reg = <0x1280 0x1000>;
> diff --git a/arch/arm/boot/dts/exynos4x12.dtsi
> b/arch/arm/boot/dts/exynos4x12.dtsi
> index 93b7040..3ee2031 100644
> --- a/arch/arm/boot/dts/exynos4x12.dtsi
> +++ b/arch/arm/boot/dts/exynos4x12.dtsi
> @@ -19,6 +19,7 @@
>
> #include "exynos4.dtsi"
> #include "exynos4x12-pinctrl.dtsi"
> +#include "exynos4-cpu-thermal.dtsi"
>
> / {
> aliases {
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
> b/arch/arm/boot/dts/exynos5250.dtsi
> index dd5c3a0..07fd73a 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -20,7 +20,7 @@
> #include
> #include "exynos5.dtsi"
> #include "exynos5250-pinctrl.dtsi"
> -
> +#include "exynos4-cpu-thermal.dtsi"
> #include
>
> / {
> @@ -236,12 +236,13 @@
> status = "disabled";
> };
>
> - tmu@1006 {
> + tmu: tmu@1006 {
> compatible = "samsung,exynos5250-tmu";
> reg = <0x1006 0x100>;
> interrupts = <0 65 0>;
> clocks = <&clock CLK_TMU>;
> clock-names = "tmu_apbif";
> + #include "exynos4412-tmu-sensor-conf.dtsi"
> };
>
> thermal-zones {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi
> b/
Re: [PATCH v3 09/16] dts: Documentation: Extending documentation entry for exynos-thermal
On Wed, Jan 14, 2015 at 02:52:25PM -0400, Eduardo Valentin wrote:
> On Wed, Jan 14, 2015 at 02:41:07PM +0100, Lukasz Majewski wrote:
> > Properties necessary for providing Exynos thermal configuration via device
> > tree.
> >
> > Signed-off-by: Lukasz Majewski
> > ---
> > Changes for v3:
> > - New patch
> >
> > ---
> > .../devicetree/bindings/thermal/exynos-thermal.txt | 17
> > +
> > 1 file changed, 17 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> > b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> > index ae738f5..0f44932 100644
> > --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> > @@ -39,6 +39,18 @@
> > - vtmu-supply: This entry is optional and provides the regulator node
> > supplying
> > voltage to TMU. If needed this entry can be placed inside
> > board/platform specific dts file.
> > +Following properties are mandatory (depending on SoC):
> > +- samsung,tmu_gain: Gain value for internal TMU operation.
> > +- samsung,tmu_reference_voltage: Value of TMU IP block's reference voltage
> > +- samsung,tmu_noise_cancel_mode: Mode for noise cancellation
> > +- samsung,tmu_efuse_value: Default level of temperature - it is needed when
> > + in factory fusing produced wrong value
> > +- samsung,tmu_min_efuse_value: Minimum temperature fused value
> > +- samsung,tmu_max_efuse_value: Maximum temperature fused value
> > +- samsung,tmu_first_point_trim: First point trimming value
> > +- samsung,tmu_second_point_trim: Second point trimming value
> > +- samsung,tmu_default_temp_offset: Default temperature offset
> > +- samsung,tmu_cal_type: Callibration type
> >
> > Example 1):
> >
> > @@ -51,6 +63,7 @@ Example 1):
> > clock-names = "tmu_apbif";
> > status = "disabled";
> > vtmu-supply = <&tmu_regulator_node>;
> > + #include "exynos4412-tmu-sensor-conf.dtsi"
> > };
> >
> > Example 2):
> > @@ -61,6 +74,7 @@ Example 2):
> > interrupts = <0 58 0>;
> > clocks = <&clock 21>;
> > clock-names = "tmu_apbif";
> > + #include "exynos5440-tmu-sensor-conf.dtsi"
>
> Did I miss something or at this point the above file does not exist yet?
>
> Please make sure each commit / patch is in a compilable/usable/working
> state.
I know this is a Documentation file, but the comment above still
applies.
>
> > };
> >
> > Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
> > @@ -70,6 +84,7 @@ Example 3): (In case of Exynos5420 "with misplaced
> > TRIMINFO register")
> > interrupts = <0 184 0>;
> > clocks = <&clock 318>, <&clock 318>;
> > clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> > + #include "exynos4412-tmu-sensor-conf.dtsi"
> > };
> >
> > tmu_cpu3: tmu@1006c000 {
> > @@ -78,6 +93,7 @@ Example 3): (In case of Exynos5420 "with misplaced
> > TRIMINFO register")
> > interrupts = <0 185 0>;
> > clocks = <&clock 318>, <&clock 319>;
> > clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> > + #include "exynos4412-tmu-sensor-conf.dtsi"
> > };
> >
> > tmu_gpu: tmu@100a {
> > @@ -86,6 +102,7 @@ Example 3): (In case of Exynos5420 "with misplaced
> > TRIMINFO register")
> > interrupts = <0 215 0>;
> > clocks = <&clock 319>, <&clock 318>;
> > clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> > + #include "exynos4412-tmu-sensor-conf.dtsi"
> > };
> >
> > Note: For multi-instance tmu each instance should have an alias correctly
> > --
> > 2.0.0.rc2
> >
signature.asc
Description: Digital signature
Re: [PATCH v3 06/16] arm: dts: Adding CPU cooling binding for Exynos SoCs
On Wed, Jan 14, 2015 at 02:41:04PM +0100, Lukasz Majewski wrote:
> Presented patch aims to move data necessary for correct CPU cooling device
> configuration from exynos_tmu_data.c to device tree.
>
> Signed-off-by: Lukasz Majewski
> ---
> Changes for v2:
> - None
> Changes for v3:
> - Adjust CPU's DT nodes to work with newest ti-soc-thermal/next branch
> - Patch title has been changed from "thermal: cpu_cooling: dts: ..."
> ---
> arch/arm/boot/dts/exynos4210-trats.dts | 15 +++
> arch/arm/boot/dts/exynos4210.dtsi | 5 -
> arch/arm/boot/dts/exynos4212.dtsi | 5 -
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 15 +++
> arch/arm/boot/dts/exynos4412-trats2.dts | 15 +++
> arch/arm/boot/dts/exynos4412.dtsi | 5 -
> arch/arm/boot/dts/exynos5250.dtsi | 20 +++-
> 7 files changed, 76 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
> b/arch/arm/boot/dts/exynos4210-trats.dts
> index 61009f4..4cd8926 100644
> --- a/arch/arm/boot/dts/exynos4210-trats.dts
> +++ b/arch/arm/boot/dts/exynos4210-trats.dts
> @@ -428,6 +428,21 @@
> status = "okay";
> };
>
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + cooling-maps {
> + map0 {
> + /* Corresponds to 800MHz at freq_table */
> + cooling-device = <&cpu0 2 2>;
> + };
> + map1 {
> +/* Corresponds to 200MHz at freq_table */
> +cooling-device = <&cpu0 4 4>;
> +};
> +};
> + };
The cpu_thermal zone above is incomplete. It is missing the following
mandatory properties (according to
Documentation/devicetree/bindings/thermal/thermal.txt):
- polling-delay:
- polling-delay-passive:
- thermal-sensors:
- trips:
> + };
> +
> camera {
> pinctrl-names = "default";
> pinctrl-0 = <>;
> diff --git a/arch/arm/boot/dts/exynos4210.dtsi
> b/arch/arm/boot/dts/exynos4210.dtsi
> index bcc9e63..2e66df8 100644
> --- a/arch/arm/boot/dts/exynos4210.dtsi
> +++ b/arch/arm/boot/dts/exynos4210.dtsi
> @@ -35,10 +35,13 @@
> #address-cells = <1>;
> #size-cells = <0>;
>
> - cpu@900 {
> + cpu0: cpu@900 {
> device_type = "cpu";
> compatible = "arm,cortex-a9";
> reg = <0x900>;
> + cooling-min-level = <4>;
> + cooling-max-level = <2>;
> + #cooling-cells = <2>; /* min followed by max */
> };
>
> cpu@901 {
> diff --git a/arch/arm/boot/dts/exynos4212.dtsi
> b/arch/arm/boot/dts/exynos4212.dtsi
> index dd0a43e..5be03288 100644
> --- a/arch/arm/boot/dts/exynos4212.dtsi
> +++ b/arch/arm/boot/dts/exynos4212.dtsi
> @@ -26,10 +26,13 @@
> #address-cells = <1>;
> #size-cells = <0>;
>
> - cpu@A00 {
> + cpu0: cpu@A00 {
> device_type = "cpu";
> compatible = "arm,cortex-a9";
> reg = <0xA00>;
> + cooling-min-level = <13>;
> + cooling-max-level = <7>;
> + #cooling-cells = <2>; /* min followed by max */
> };
>
> cpu@A01 {
> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> index c7517fc..4838a2a 100644
> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> @@ -401,6 +401,21 @@
> vtmu-supply = <&ldo10_reg>;
> status = "okay";
> };
> +
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + cooling-maps {
> + map0 {
> + /* Corresponds to 800MHz at freq_table */
> + cooling-device = <&cpu0 7 7>;
> + };
> + map1 {
> +/* Corresponds to 200MHz at freq_table */
> +cooling-device = <&cpu0 13 13>;
> +};
> +};
> + };
> + };
> };
>
> &pinctrl_1 {
> diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
> b/arch/arm/boot/dts/exynos4412-trats2.dts
> index 29231b4..8c2c584 100644
> --- a/arch/arm/boot/dts/exynos4412-trats2.dts
> +++ b/arch/arm/boot/dts/exynos4412-trats2.dts
> @@ -863,6 +863,21 @@
> pulldown-ohm = <10>; /* 100K */
> io-channels = <&adc 2>; /* Battery temperature */
>
Re: [PATCH v3 09/16] dts: Documentation: Extending documentation entry for exynos-thermal
On Wed, Jan 14, 2015 at 02:41:07PM +0100, Lukasz Majewski wrote:
> Properties necessary for providing Exynos thermal configuration via device
> tree.
>
> Signed-off-by: Lukasz Majewski
> ---
> Changes for v3:
> - New patch
>
> ---
> .../devicetree/bindings/thermal/exynos-thermal.txt | 17
> +
> 1 file changed, 17 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> index ae738f5..0f44932 100644
> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -39,6 +39,18 @@
> - vtmu-supply: This entry is optional and provides the regulator node
> supplying
> voltage to TMU. If needed this entry can be placed inside
> board/platform specific dts file.
> +Following properties are mandatory (depending on SoC):
> +- samsung,tmu_gain: Gain value for internal TMU operation.
> +- samsung,tmu_reference_voltage: Value of TMU IP block's reference voltage
> +- samsung,tmu_noise_cancel_mode: Mode for noise cancellation
> +- samsung,tmu_efuse_value: Default level of temperature - it is needed when
> +in factory fusing produced wrong value
> +- samsung,tmu_min_efuse_value: Minimum temperature fused value
> +- samsung,tmu_max_efuse_value: Maximum temperature fused value
> +- samsung,tmu_first_point_trim: First point trimming value
> +- samsung,tmu_second_point_trim: Second point trimming value
> +- samsung,tmu_default_temp_offset: Default temperature offset
> +- samsung,tmu_cal_type: Callibration type
>
> Example 1):
>
> @@ -51,6 +63,7 @@ Example 1):
> clock-names = "tmu_apbif";
> status = "disabled";
> vtmu-supply = <&tmu_regulator_node>;
> + #include "exynos4412-tmu-sensor-conf.dtsi"
> };
>
> Example 2):
> @@ -61,6 +74,7 @@ Example 2):
> interrupts = <0 58 0>;
> clocks = <&clock 21>;
> clock-names = "tmu_apbif";
> + #include "exynos5440-tmu-sensor-conf.dtsi"
Did I miss something or at this point the above file does not exist yet?
Please make sure each commit / patch is in a compilable/usable/working
state.
> };
>
> Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
> @@ -70,6 +84,7 @@ Example 3): (In case of Exynos5420 "with misplaced TRIMINFO
> register")
> interrupts = <0 184 0>;
> clocks = <&clock 318>, <&clock 318>;
> clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> + #include "exynos4412-tmu-sensor-conf.dtsi"
> };
>
> tmu_cpu3: tmu@1006c000 {
> @@ -78,6 +93,7 @@ Example 3): (In case of Exynos5420 "with misplaced TRIMINFO
> register")
> interrupts = <0 185 0>;
> clocks = <&clock 318>, <&clock 319>;
> clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> + #include "exynos4412-tmu-sensor-conf.dtsi"
> };
>
> tmu_gpu: tmu@100a {
> @@ -86,6 +102,7 @@ Example 3): (In case of Exynos5420 "with misplaced
> TRIMINFO register")
> interrupts = <0 215 0>;
> clocks = <&clock 319>, <&clock 318>;
> clock-names = "tmu_apbif", "tmu_triminfo_apbif";
> + #include "exynos4412-tmu-sensor-conf.dtsi"
> };
>
> Note: For multi-instance tmu each instance should have an alias correctly
> --
> 2.0.0.rc2
>
signature.asc
Description: Digital signature
Re: [PATCH v3 05/16] thermal: dts: Enable TMU at Exynos4412 based Odroid U3 device
On Wed, Jan 14, 2015 at 02:41:03PM +0100, Lukasz Majewski wrote:
> This commit enables TMU IP block on the Exynos4412 Odroid U3
> device.
>
The comment about the patch subject applies here too. I would use "arm:
dts: ..." instead of "thermal: dts" ...".
> Signed-off-by: Lukasz Majewski
> ---
> Changes for v2:
> - None
> Changes for v3:
> - None
> ---
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> index 0adb57c..c7517fc 100644
> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> @@ -396,6 +396,11 @@
> ehci: ehci@1258 {
> status = "okay";
> };
> +
> + tmu@100C {
> + vtmu-supply = <&ldo10_reg>;
> + status = "okay";
> + };
> };
>
> &pinctrl_1 {
> --
> 2.0.0.rc2
>
signature.asc
Description: Digital signature
Re: [PATCH v3 14/16] thermal: samsung: core: Exynos TMU rework to use device tree for configuration
On Wed, Jan 14, 2015 at 02:41:12PM +0100, Lukasz Majewski wrote:
> This patch brings support for providing configuration via device tree.
> Previously this data has been hardcoded in the exynos_tmu_data.c file.
> Such approach was not scalable and very often required copying the whole
> data.
>
> Signed-off-by: Lukasz Majewski
> ---
> Changes for v2:
> - Adjust exynos_tmu.c code to the newest ti-soc-thermal repository
> - Usage of of-thermal.c exported trip points table
> Changes for v3:
> - Adding exynos_of_get_soc_type() method to set SOC type from device's
> compatible string
> - "samsung,tmu_" prefix for TMU specific properties has been added
>
> ---
> drivers/thermal/samsung/Makefile | 2 -
> drivers/thermal/samsung/exynos_tmu.c | 345
> +++
> drivers/thermal/samsung/exynos_tmu.h | 53 +-
> 3 files changed, 226 insertions(+), 174 deletions(-)
>
> diff --git a/drivers/thermal/samsung/Makefile
> b/drivers/thermal/samsung/Makefile
> index c09d830..1e47d0d 100644
> --- a/drivers/thermal/samsung/Makefile
> +++ b/drivers/thermal/samsung/Makefile
> @@ -3,5 +3,3 @@
> #
> obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
> exynos_thermal-y := exynos_tmu.o
> -exynos_thermal-y += exynos_tmu_data.o
Can this makefile change be part of the patch that removes
exynos_tmu_data.c?
> -exynos_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o
Can this makefile change be part of the patch that removes
exynos_thermal_common.c?
> diff --git a/drivers/thermal/samsung/exynos_tmu.c
> b/drivers/thermal/samsung/exynos_tmu.c
> index ae30f6a..633a9e2 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -1,6 +1,10 @@
> /*
> * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
> *
> + * Copyright (C) 2014 Samsung Electronics
> + * Bartlomiej Zolnierkiewicz
> + * Lukasz Majewski
> + *
> * Copyright (C) 2011 Samsung Electronics
> * Donggeun Kim
> * Amit Daniel Kachhap
> @@ -31,8 +35,8 @@
> #include
> #include
>
> -#include "exynos_thermal_common.h"
> #include "exynos_tmu.h"
> +#include "../thermal_core.h"
>
> /* Exynos generic registers */
> #define EXYNOS_TMU_REG_TRIMINFO 0x0
> @@ -115,6 +119,7 @@
> #define EXYNOS5440_TMU_TH_RISE4_SHIFT24
> #define EXYNOS5440_EFUSE_SWAP_OFFSET 8
>
> +#define MCELSIUS 1000
> /**
> * struct exynos_tmu_data : A structure to hold the private data of the TMU
> driver
> @@ -150,7 +155,8 @@ struct exynos_tmu_data {
> struct clk *clk, *clk_sec;
> u8 temp_error1, temp_error2;
> struct regulator *regulator;
> - struct thermal_sensor_conf *reg_conf;
> + struct thermal_zone_device *tzd;
> +
> int (*tmu_initialize)(struct platform_device *pdev);
> void (*tmu_control)(struct platform_device *pdev, bool on);
> int (*tmu_read)(struct exynos_tmu_data *data);
> @@ -159,6 +165,33 @@ struct exynos_tmu_data {
> void (*tmu_clear_irqs)(struct exynos_tmu_data *data);
> };
>
> +static void exynos_report_trigger(struct exynos_tmu_data *p)
> +{
> + char data[10], *envp[] = { data, NULL };
> + struct thermal_zone_device *tz = p->tzd;
> + unsigned long temp;
> + unsigned int i;
> +
> + if (!p) {
> + pr_err("Wrong temperature configuration data\n");
> + return;
> + }
> +
> + thermal_zone_device_update(tz);
> +
> + mutex_lock(&tz->lock);
> + /* Find the level for which trip happened */
> + for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
> + tz->ops->get_trip_temp(tz, i, &temp);
> + if (tz->last_temperature < temp)
> + break;
> + }
> +
> + snprintf(data, sizeof(data), "%u", i);
> + kobject_uevent_env(&tz->device.kobj, KOBJ_CHANGE, envp);
> + mutex_unlock(&tz->lock);
> +}
> +
> /*
> * TMU treats temperature as a mapped temperature code.
> * The temperature is converted differently depending on the calibration
> type.
> @@ -234,14 +267,25 @@ static void sanitize_temp_error(struct exynos_tmu_data
> *data, u32 trim_info)
>
> static u32 get_th_reg(struct exynos_tmu_data *data, u32 threshold, bool
> falling)
> {
> - struct exynos_tmu_platform_data *pdata = data->pdata;
> + struct thermal_zone_device *tz = data->tzd;
> + const struct thermal_trip * const trips =
> + of_thermal_get_trip_points(tz);
> + unsigned long temp;
> int i;
>
> - for (i = 0; i < pdata->non_hw_trigger_levels; i++) {
> - u8 temp = pdata->trigger_levels[i];
> + if (!trips) {
> + pr_err("%s: Cannot get trip points from of-thermal.c!\n",
> +__func__);
> + return 0;
> + }
> +
> + for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
> + if (trips[i].type == THERMAL_TRIP_CRITICAL)
> +
[PATCH V3 11/15] ASoC: samsung: i2s: Add clk provider DT binding documentation
The new DT properties required for the I2S device node to be referred
as a clock provider and corresponding clock indices definition is added.
Signed-off-by: Sylwester Nawrocki
---
.../devicetree/bindings/sound/samsung-i2s.txt | 22
include/dt-bindings/sound/samsung-i2s.h|8 +++
2 files changed, 30 insertions(+)
create mode 100644 include/dt-bindings/sound/samsung-i2s.h
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
index d188296..09e0e18 100644
--- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
@@ -33,6 +33,25 @@ Required SoC Specific Properties:
"iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root
clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2
doesn't have any such mux.
+- #clock-cells: should be 1, this property must be present if the I2S device
+ is a clock provider in terms of the common clock bindings, described in
+ ../clock/clock-bindings.txt.
+- clock-output-names: from the common clock bindings, names of the CDCLK
+ I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1",
+ "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices recpectively.
+
+There are following clocks available at the I2S device nodes:
+ CLK_I2S_CDCLK- the CDCLK (CODECLKO) gate clock,
+ CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the
+ IISPSR register),
+ CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in
+ IISMOD register).
+
+Refer to the SoC datasheet for availability of the above clocks.
+The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available
+in the IIS Multi Audio Interface (I2S0).
+Note: Old DTs may not have the #clock-cells, clock-output-names properties
+and then not use the I2S node as a clock supplier.
Optional SoC Specific Properties:
@@ -41,6 +60,7 @@ Optional SoC Specific Properties:
- pinctrl-0: Should specify pin control groups used for this controller.
- pinctrl-names: Should contain only one value - "default".
+
Example:
i2s0: i2s@0383 {
@@ -54,6 +74,8 @@ i2s0: i2s@0383 {
<&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_SCLK_I2S>;
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
+ #clock-cells;
+ clock-output-names = "i2s_cdclk0";
samsung,idma-addr = <0x0300>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
diff --git a/include/dt-bindings/sound/samsung-i2s.h
b/include/dt-bindings/sound/samsung-i2s.h
new file mode 100644
index 000..0c69818d
--- /dev/null
+++ b/include/dt-bindings/sound/samsung-i2s.h
@@ -0,0 +1,8 @@
+#ifndef _DT_BINDINGS_SAMSUNG_I2S_H
+#define _DT_BINDINGS_SAMSUNG_I2S_H
+
+#define CLK_I2S_CDCLK 0
+#define CLK_I2S_RCLK_SRC 1
+#define CLK_I2S_RCLK_PSR 2
+
+#endif /* _DT_BINDINGS_SAMSUNG_I2S_H */
--
1.7.9.5
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[PATCH V3 14/15] ARM: dts: Switch Odroid X2/U2 to simple-audio-card
Now when the CDCLK I2S output clock can be handled through the clock
API the Odroid X2/U3 can be switched to the simple-audio-card DT binding.
Signed-off-by: Sylwester Nawrocki
---
arch/arm/boot/dts/exynos4.dtsi |3 +++
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 19 ---
arch/arm/boot/dts/exynos4412-odroidu3.dts |8 +---
arch/arm/boot/dts/exynos4412-odroidx2.dts |8 ++--
4 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 38d8f68..0cffe39 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -66,6 +66,7 @@
dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
dma-names = "tx", "rx", "tx-sec";
samsung,idma-addr = <0x0300>;
+ #sound-dai-cells = <1>;
status = "disabled";
};
@@ -378,6 +379,7 @@
clock-output-names = "i2s_cdclk1";
dmas = <&pdma1 12>, <&pdma1 11>;
dma-names = "tx", "rx";
+ #sound-dai-cells = <1>;
status = "disabled";
};
@@ -390,6 +392,7 @@
clock-output-names = "i2s_cdclk2";
dmas = <&pdma0 14>, <&pdma0 13>;
dma-names = "tx", "rx";
+ #sound-dai-cells = <1>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index c26b9fb..abd6336 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -44,9 +44,7 @@
};
sound: sound {
- compatible = "samsung,odroidx2-audio";
- samsung,i2s-controller = <&i2s0>;
- samsung,audio-codec = <&max98090>;
+ compatible = "simple-audio-card";
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
@@ -57,6 +55,20 @@
<0>,
<19200>,
<1920>;
+
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&link0_codec>;
+ simple-audio-card,frame-master = <&link0_codec>;
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s0 0>;
+ system-clock-frequency = <1920>;
+ };
+
+ link0_codec: simple-audio-card,codec {
+ sound-dai = <&max98090>;
+ clocks = <&i2s0 CLK_I2S_CDCLK>;
+ };
};
mmc@1255 {
@@ -377,6 +389,7 @@
interrupts = <0 0>;
clocks = <&i2s0 CLK_I2S_CDCLK>;
clock-names = "mclk";
+ #sound-dai-cells = <0>;
};
};
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts
b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index c8a64be..44684e5 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -49,9 +49,11 @@
};
&sound {
- compatible = "samsung,odroidu3-audio";
- samsung,model = "Odroid-U3";
- samsung,audio-routing =
+ simple-audio-card,name = "Odroid-U3";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Speakers", "Speakers";
+ simple-audio-card,routing =
"Headphone Jack", "HPL",
"Headphone Jack", "HPR",
"Headphone Jack", "MICBIAS",
diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts
b/arch/arm/boot/dts/exynos4412-odroidx2.dts
index 96b43f4..6e33678 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx2.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts
@@ -23,8 +23,12 @@
};
&sound {
- samsung,model = "Odroid-X2";
- samsung,audio-routing =
+ simple-audio-card,name = "Odroid-X2";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Microphone", "Mic Jack",
+ "Microphone", "DMIC";
+ simple-audio-card,routing =
"Headphone Jack", "HPL",
"Headphone Jack", "HPR",
"IN1", "Mic Jack",
--
1.7.9.5
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[PATCH V3 10/15] ASoC: samsung: odroidx2: Handle I2S CDCLK clock conditionally
In order to support old DTs we check the codec device node if it
contains "clocks" property and only if it doesn't (which indicates
an old DT) we proceed with enabling the CDCLK clock by means of
the set_sysclk() callback. For new DTs which use the common clock
bindings for CDCLK that clock is supposed to be handled outside
the sound machine driver.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/odroidx2_max98090.c |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/sound/soc/samsung/odroidx2_max98090.c
b/sound/soc/samsung/odroidx2_max98090.c
index fa4f1d2..596f118 100644
--- a/sound/soc/samsung/odroidx2_max98090.c
+++ b/sound/soc/samsung/odroidx2_max98090.c
@@ -21,6 +21,8 @@ struct odroidx2_drv_data {
/* The I2S CDCLK output clock frequency for the MAX98090 codec */
#define MAX98090_MCLK 1920
+static struct snd_soc_dai_link odroidx2_dai[];
+
static int odroidx2_late_probe(struct snd_soc_card *card)
{
struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
@@ -29,7 +31,9 @@ static int odroidx2_late_probe(struct snd_soc_card *card)
ret = snd_soc_dai_set_sysclk(codec_dai, 0, MAX98090_MCLK,
SND_SOC_CLOCK_IN);
- if (ret < 0)
+
+ if (ret < 0 || of_find_property(odroidx2_dai[0].codec_of_node,
+ "clocks", NULL))
return ret;
/* Set the cpu DAI configuration in order to use CDCLK */
--
1.7.9.5
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[PATCH V3 12/15] ASoC: samsung: i2s: Add clock provider for the I2S internal clocks
This patch adds clock provider (currently only for DT platforms) for
the CODECLKO (CDCLK) gate, RCLKSRC mux and RCLK pre-scaler divider
divider clock. Those all tree clock are only available in the IIS
Multi Audio Interface (I2S0), the regular IIS Bus Interface has only
CDCLK gate clock.
The motivation behind this patch is to expose the I2S internal clocks
which are currently controlled through set_sysclk() through the clk
API, so dedicated sound machine driver per each board can be avoided.
The intention is also to fix the CDCLK gating issue reported by
Daniel Drake:
http://mailman.alsa-project.org/pipermail/alsa-devel/2014-September/081753.html
This patch also reverts commit b97c60abf9a561f86ae71bd741add02673cc1
("ASoC: samsung-i2s: Maintain CDCLK settings across i2s_{shutdown/
startup}") The problem that commit attempted to solve only affects
the Odroid X2/U3, which doesn't configure the CDCLK clock in
struct snd_soc_dai_ops hw_params callback and the issue should be
now resolved by using clk API, i.e. having the codec enabling/
disabling the CDCLK clock as required.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c | 113 ++-
1 file changed, 93 insertions(+), 20 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 05fc2f0..b92ab40 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -10,9 +10,11 @@
* published by the Free Software Foundation.
*/
+#include
#include
#include
#include
+#include
#include
#include
#include
@@ -81,8 +83,6 @@ struct i2s_dai {
#define DAI_OPENED (1 << 0) /* Dai is opened */
#define DAI_MANAGER(1 << 1) /* Dai is the manager */
unsigned mode;
- /* CDCLK pin direction: 0 - input, 1 - output */
- unsigned int cdclk_out:1;
/* Driver for this DAI */
struct snd_soc_dai_driver i2s_dai_drv;
/* DMA parameters */
@@ -98,6 +98,10 @@ struct i2s_dai {
/* Spinlock protecting access to the device's registers */
spinlock_t spinlock;
spinlock_t *lock;
+
+ /* Below fields are only valid if this is the primary FIFO */
+ struct clk *clk_table[3];
+ struct clk_onecell_data clk_data;
};
/* Lock for cross i/f checks */
@@ -774,9 +778,6 @@ static int i2s_startup(struct snd_pcm_substream *substream,
spin_unlock_irqrestore(&lock, flags);
- if (!is_opened(other) && i2s->cdclk_out)
- i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
- 0, SND_SOC_CLOCK_OUT);
return 0;
}
@@ -786,31 +787,20 @@ static void i2s_shutdown(struct snd_pcm_substream
*substream,
struct i2s_dai *i2s = to_info(dai);
struct i2s_dai *other = get_other_dai(i2s);
unsigned long flags;
- const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
spin_lock_irqsave(&lock, flags);
i2s->mode &= ~DAI_OPENED;
i2s->mode &= ~DAI_MANAGER;
- if (is_opened(other)) {
+ if (is_opened(other))
other->mode |= DAI_MANAGER;
- } else {
- u32 mod = readl(i2s->addr + I2SMOD);
- i2s->cdclk_out = !(mod & (1 << i2s_regs->cdclkcon_off));
- if (other)
- other->cdclk_out = i2s->cdclk_out;
- }
+
/* Reset any constraint on RFS and BFS */
i2s->rfs = 0;
i2s->bfs = 0;
spin_unlock_irqrestore(&lock, flags);
-
- /* Gate CDCLK by default */
- if (!is_opened(other))
- i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
- 0, SND_SOC_CLOCK_IN);
}
static int config_setup(struct i2s_dai *i2s)
@@ -1147,6 +1137,87 @@ static int i2s_runtime_resume(struct device *dev)
}
#endif /* CONFIG_PM */
+static void i2s_unregister_clocks(struct i2s_dai *i2s)
+{
+ int i;
+
+ for (i = 0; i < i2s->clk_data.clk_num; i++) {
+ if (!IS_ERR(i2s->clk_table[i]))
+ clk_unregister(i2s->clk_table[i]);
+ }
+}
+
+static void i2s_unregister_clock_provider(struct platform_device *pdev)
+{
+ struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
+
+ of_clk_del_provider(pdev->dev.of_node);
+ i2s_unregister_clocks(i2s);
+}
+
+static int i2s_register_clock_provider(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct i2s_dai *i2s = dev_get_drvdata(dev);
+ const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
+ const char *p_names[2] = { NULL };
+ const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
+ struct clk *rclksrc;
+ int ret, i;
+
+ /* Register the clock provider only if it's expected in the DTB */
+ if (!of_find_property(dev->of_node, "#clock-cells", NULL))
+ return 0;
+
+ /* Get the RCLKSRC mux clock parent clock names */
+ for (i = 0; i < ARRAY_SIZE(p_names); i++) {
+
[PATCH V3 13/15] ARM: dts: Exynos4 and Odroid X2/U3 sound device nodes update
Clock related properties are added to the Exynos4 I2S device nodes
so they can be referred to as clock providers. Missing i2s_opclk1
clock is added to the I2S0 node and clock properties are added
to the MAX98090 codec node to allow it to control/read frequency
of the MCLK clock directly.
Signed-off-by: Sylwester Nawrocki
---
arch/arm/boot/dts/exynos4.dtsi |6 ++
arch/arm/boot/dts/exynos4412-odroid-common.dtsi |8 ++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index b8168f1..38d8f68 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -61,6 +61,8 @@
reg = <0x0383 0x100>;
clocks = <&clock_audss EXYNOS_I2S_BUS>;
clock-names = "iis";
+ #clock-cells = <1>;
+ clock-output-names = "i2s_cdclk0";
dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
dma-names = "tx", "rx", "tx-sec";
samsung,idma-addr = <0x0300>;
@@ -372,6 +374,8 @@
reg = <0x1396 0x100>;
clocks = <&clock CLK_I2S1>;
clock-names = "iis";
+ #clock-cells = <1>;
+ clock-output-names = "i2s_cdclk1";
dmas = <&pdma1 12>, <&pdma1 11>;
dma-names = "tx", "rx";
status = "disabled";
@@ -382,6 +386,8 @@
reg = <0x1397 0x100>;
clocks = <&clock CLK_I2S2>;
clock-names = "iis";
+ #clock-cells = <1>;
+ clock-output-names = "i2s_cdclk2";
dmas = <&pdma0 14>, <&pdma0 13>;
dma-names = "tx", "rx";
status = "disabled";
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 3fbf588..c26b9fb 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -7,6 +7,7 @@
* published by the Free Software Foundation.
*/
+#include
#include
#include "exynos4412.dtsi"
@@ -37,8 +38,9 @@
pinctrl-names = "default";
status = "okay";
clocks = <&clock_audss EXYNOS_I2S_BUS>,
-<&clock_audss EXYNOS_DOUT_AUD_BUS>;
- clock-names = "iis", "i2s_opclk0";
+<&clock_audss EXYNOS_DOUT_AUD_BUS>,
+<&clock_audss EXYNOS_SCLK_I2S>;
+ clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
};
sound: sound {
@@ -373,6 +375,8 @@
reg = <0x10>;
interrupt-parent = <&gpx0>;
interrupts = <0 0>;
+ clocks = <&i2s0 CLK_I2S_CDCLK>;
+ clock-names = "mclk";
};
};
--
1.7.9.5
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[PATCH V3 15/15] ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs
I2S1, I2S2 on Exynos4 SoC series have limited functionality compared
to I2S0, "samsung,s3c6410-i2s" compatible should be used for them.
Cc: sta...@vger.kernel.org
Signed-off-by: Sylwester Nawrocki
---
arch/arm/boot/dts/exynos4.dtsi |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 0cffe39..cb60010 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -371,7 +371,7 @@
};
i2s1: i2s@1396 {
- compatible = "samsung,s5pv210-i2s";
+ compatible = "samsung,s3c6410-i2s";
reg = <0x1396 0x100>;
clocks = <&clock CLK_I2S1>;
clock-names = "iis";
@@ -384,7 +384,7 @@
};
i2s2: i2s@1397 {
- compatible = "samsung,s5pv210-i2s";
+ compatible = "samsung,s3c6410-i2s";
reg = <0x1397 0x100>;
clocks = <&clock CLK_I2S2>;
clock-names = "iis";
--
1.7.9.5
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[PATCH V3 08/15] ASoC: samsung: i2s: Add spinlock in place of local_irq_* calls
It seems this driver hasn't been updated for SMP, as local_irq_save/
local_irq_restore don't provide proper protection of read/modify/write
of the device's registers on such systems. Introduce a spinlock
serializing access to the register region, it will be helpful later
when I2SMOD, I2SPSR registers are made also accessible through the
clk API.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 2bac719..20cc51f 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -94,6 +94,10 @@ struct i2s_dai {
u32 suspend_i2scon;
u32 suspend_i2spsr;
const struct samsung_i2s_variant_regs *variant_regs;
+
+ /* Spinlock protecting access to the device's registers */
+ spinlock_t spinlock;
+ spinlock_t *lock;
};
/* Lock for cross i/f checks */
@@ -867,10 +871,10 @@ static int i2s_trigger(struct snd_pcm_substream
*substream,
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- local_irq_save(flags);
+ spin_lock_irqsave(i2s->lock, flags);
if (config_setup(i2s)) {
- local_irq_restore(flags);
+ spin_unlock_irqrestore(i2s->lock, flags);
return -EINVAL;
}
@@ -879,12 +883,12 @@ static int i2s_trigger(struct snd_pcm_substream
*substream,
else
i2s_txctrl(i2s, 1);
- local_irq_restore(flags);
+ spin_unlock_irqrestore(i2s->lock, flags);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- local_irq_save(flags);
+ spin_lock_irqsave(i2s->lock, flags);
if (capture) {
i2s_rxctrl(i2s, 0);
@@ -894,7 +898,7 @@ static int i2s_trigger(struct snd_pcm_substream *substream,
i2s_fifo(i2s, FIC_TXFLUSH);
}
- local_irq_restore(flags);
+ spin_unlock_irqrestore(i2s->lock, flags);
break;
}
@@ -1157,6 +1161,9 @@ static int samsung_i2s_probe(struct platform_device *pdev)
return -ENOMEM;
}
+ spin_lock_init(&pri_dai->spinlock);
+ pri_dai->lock = &pri_dai->spinlock;
+
if (!np) {
res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
if (!res) {
@@ -1234,6 +1241,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
return -ENOMEM;
}
+ sec_dai->lock = &pri_dai->spinlock;
sec_dai->variant_regs = pri_dai->variant_regs;
sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
sec_dai->dma_playback.ch_name = "tx-sec";
--
1.7.9.5
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[PATCH V3 09/15] ASoC: samsung: i2s: Protect more registers with a spinlock
Ensure the I2SMOD, I2SPSR registers, which are also exposed through
clk API are only accessed with the i2s->spinlock spinlock held.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c | 81 +--
1 file changed, 51 insertions(+), 30 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 20cc51f..05fc2f0 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -472,17 +472,22 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
{
struct i2s_dai *i2s = to_info(dai);
struct i2s_dai *other = get_other_dai(i2s);
- u32 mod = readl(i2s->addr + I2SMOD);
const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
+ u32 mod, mask, val = 0;
+
+ spin_lock(i2s->lock);
+ mod = readl(i2s->addr + I2SMOD);
+ spin_unlock(i2s->lock);
switch (clk_id) {
case SAMSUNG_I2S_OPCLK:
- mod &= ~MOD_OPCLK_MASK;
- mod |= dir;
+ mask = MOD_OPCLK_MASK;
+ val = dir;
break;
case SAMSUNG_I2S_CDCLK:
+ mask = 1 << i2s_regs->cdclkcon_off;
/* Shouldn't matter in GATING(CLOCK_IN) mode */
if (dir == SND_SOC_CLOCK_IN)
rfs = 0;
@@ -499,15 +504,15 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
}
if (dir == SND_SOC_CLOCK_IN)
- mod |= 1 << i2s_regs->cdclkcon_off;
- else
- mod &= ~(1 << i2s_regs->cdclkcon_off);
+ val = 1 << i2s_regs->cdclkcon_off;
i2s->rfs = rfs;
break;
case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
+ mask = 1 << i2s_regs->rclksrc_off;
+
if ((i2s->quirks & QUIRK_NO_MUXPSR)
|| (clk_id == SAMSUNG_I2S_RCLKSRC_0))
clk_id = 0;
@@ -557,18 +562,19 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
return 0;
}
- if (clk_id == 0)
- mod &= ~(1 << i2s_regs->rclksrc_off);
- else
- mod |= 1 << i2s_regs->rclksrc_off;
-
+ if (clk_id == 1)
+ val = 1 << i2s_regs->rclksrc_off;
break;
default:
dev_err(&i2s->pdev->dev, "We don't serve that!\n");
return -EINVAL;
}
+ spin_lock(i2s->lock);
+ mod = readl(i2s->addr + I2SMOD);
+ mod = (mod & ~mask) | val;
writel(mod, i2s->addr + I2SMOD);
+ spin_unlock(i2s->lock);
return 0;
}
@@ -577,9 +583,8 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
unsigned int fmt)
{
struct i2s_dai *i2s = to_info(dai);
- u32 mod = readl(i2s->addr + I2SMOD);
int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
- u32 tmp = 0;
+ u32 mod, tmp = 0;
lrp_shift = i2s->variant_regs->lrp_off;
sdf_shift = i2s->variant_regs->sdf_off;
@@ -639,12 +644,15 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
return -EINVAL;
}
+ spin_lock(i2s->lock);
+ mod = readl(i2s->addr + I2SMOD);
/*
* Don't change the I2S mode if any controller is active on this
* channel.
*/
if (any_active(i2s) &&
((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
+ spin_unlock(i2s->lock);
dev_err(&i2s->pdev->dev,
"%s:%d Other DAI busy\n", __func__, __LINE__);
return -EAGAIN;
@@ -653,6 +661,7 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
mod &= ~(sdf_mask | lrp_rlow | mod_slave);
mod |= tmp;
writel(mod, i2s->addr + I2SMOD);
+ spin_unlock(i2s->lock);
return 0;
}
@@ -661,16 +670,16 @@ static int i2s_hw_params(struct snd_pcm_substream
*substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
struct i2s_dai *i2s = to_info(dai);
- u32 mod = readl(i2s->addr + I2SMOD);
+ u32 mod, mask = 0, val = 0;
if (!is_secondary(i2s))
- mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
+ mask |= (MOD_DC2_EN | MOD_DC1_EN);
switch (params_channels(params)) {
case 6:
- mod |= MOD_DC2_EN;
+ val |= MOD_DC2_EN;
case 4:
- mod |= MOD_DC1_EN;
+ val |= MOD_DC1_EN;
break;
case 2:
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
@@ -692,44 +701,49 @@ static int i2s_hw_params(struct snd_p
[PATCH V3 05/15] ASoC: samsung: i2s: Move clk enable to the platform driver probe()
The clk_prepare_enable() call on the "iis" clock is moved to happen earlier
in the DAI platform device driver's probe() callback, so the I2S registers
can be safely accessed through the clk API, after the clk supplier is
registered in the platform device probe().
After this patch the "iis" clock is kept enabled since the (primary) I2S
platform device probe() and until the platform device driver remove() call.
This is similar to gating the clock in the snd_soc_dai probe() and remove()
callbacks.
Normally, in addition to that we should mark the device as PM runtime active,
so if runtime PM is enabled it can idle the device by turning off the clock.
Correcting this issue is left for a separate patch series, as we need to
ensure the BUSCLK clock is always enabled when required.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c | 25 +++--
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index a854ffc..f75c19e 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -969,7 +969,6 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct i2s_dai *i2s = to_info(dai);
struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
- int ret;
if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
@@ -977,12 +976,6 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
goto probe_exit;
}
- ret = clk_prepare_enable(i2s->clk);
- if (ret != 0) {
- dev_err(&i2s->pdev->dev, "failed to enable clock: %d\n", ret);
- return ret;
- }
-
samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
if (i2s->quirks & QUIRK_NEED_RSTCLR)
@@ -1014,18 +1007,12 @@ probe_exit:
static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
{
struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
-
- if (!other || !other->clk) {
+ if (!is_secondary(i2s)) {
if (i2s->quirks & QUIRK_NEED_RSTCLR)
writel(0, i2s->addr + I2SCON);
-
- clk_disable_unprepare(i2s->clk);
}
- i2s->clk = NULL;
-
return 0;
}
@@ -1139,6 +1126,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
u32 regs_base, quirks = 0, idma_addr = 0;
struct device_node *np = pdev->dev.of_node;
const struct samsung_i2s_dai_data *i2s_dai_data;
+ int ret;
/* Call during Seconday interface registration */
i2s_dai_data = samsung_i2s_get_driver_data(pdev);
@@ -1216,6 +1204,12 @@ static int samsung_i2s_probe(struct platform_device
*pdev)
dev_err(&pdev->dev, "Failed to get iis clock\n");
return PTR_ERR(pri_dai->clk);
}
+
+ ret = clk_prepare_enable(pri_dai->clk);
+ if (ret != 0) {
+ dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
+ return ret;
+ }
pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
pri_dai->dma_playback.ch_name = "tx";
@@ -1286,6 +1280,9 @@ static int samsung_i2s_remove(struct platform_device
*pdev)
pm_runtime_disable(&pdev->dev);
}
+ if (!is_secondary(i2s))
+ clk_disable_unprepare(i2s->clk);
+
i2s->pri_dai = NULL;
i2s->sec_dai = NULL;
--
1.7.9.5
--
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[PATCH V3 04/15] ASoC: samsung: i2s: Move clk_get() to platform driver probe()
Acquire the I2S interface clock in driver probe() callback
as it's a per-device not a per-DAI clock. While at it switch
to the resource managed clk_get().
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 366b720..a854ffc 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -971,18 +971,12 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
int ret;
- if (other && other->clk) { /* If this is probe on secondary */
+ if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
NULL);
goto probe_exit;
}
- i2s->clk = clk_get(&i2s->pdev->dev, "iis");
- if (IS_ERR(i2s->clk)) {
- dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
- return PTR_ERR(i2s->clk);
- }
-
ret = clk_prepare_enable(i2s->clk);
if (ret != 0) {
dev_err(&i2s->pdev->dev, "failed to enable clock: %d\n", ret);
@@ -991,10 +985,6 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
- if (other) {
- other->clk = i2s->clk;
- }
-
if (i2s->quirks & QUIRK_NEED_RSTCLR)
writel(CON_RSTCLR, i2s->addr + I2SCON);
@@ -1032,7 +1022,6 @@ static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
writel(0, i2s->addr + I2SCON);
clk_disable_unprepare(i2s->clk);
- clk_put(i2s->clk);
}
i2s->clk = NULL;
@@ -1222,6 +1211,11 @@ static int samsung_i2s_probe(struct platform_device
*pdev)
regs_base = res->start;
+ pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
+ if (IS_ERR(pri_dai->clk)) {
+ dev_err(&pdev->dev, "Failed to get iis clock\n");
+ return PTR_ERR(pri_dai->clk);
+ }
pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
pri_dai->dma_playback.ch_name = "tx";
@@ -1253,6 +1247,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
sec_dai->dma_playback.dma_size = 4;
sec_dai->addr = pri_dai->addr;
+ sec_dai->clk = pri_dai->clk;
sec_dai->quirks = quirks;
sec_dai->idma_playback.dma_addr = idma_addr;
sec_dai->pri_dai = pri_dai;
--
1.7.9.5
--
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[PATCH V3 02/15] ASoC: samsung: i2s: Add return value checks in probe()
These functions may fail so let's properly report any errors. Signed-off-by: Sylwester Nawrocki --- sound/soc/samsung/i2s.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c index e5473ee..aa52b41 100644 --- a/sound/soc/samsung/i2s.c +++ b/sound/soc/samsung/i2s.c @@ -1173,11 +1173,13 @@ static int samsung_i2s_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Unable to get drvdata\n"); return -EFAULT; } - devm_snd_soc_register_component(&sec_dai->pdev->dev, + ret = devm_snd_soc_register_component(&sec_dai->pdev->dev, &samsung_i2s_component, &sec_dai->i2s_dai_drv, 1); - samsung_asoc_dma_platform_register(&pdev->dev); - return 0; + if (ret != 0) + return ret; + + return samsung_asoc_dma_platform_register(&pdev->dev); } pri_dai = i2s_alloc_dai(pdev, false); @@ -1290,7 +1292,9 @@ static int samsung_i2s_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); - samsung_asoc_dma_platform_register(&pdev->dev); + ret = samsung_asoc_dma_platform_register(&pdev->dev); + if (ret != 0) + return ret; return 0; err: -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 03/15] ASoC: samsung: i2s: Request memory region in driver probe()
The memory mapped registers region is common for both DAIs so request
it in the I2S platform device driver's probe for the platform device
corresponding to the primary DAI, rather than in the ASoC DAI's probe
callback. While at it switch to devm_ioremap_resource(). This also
drops the hard coded (0x100) register region size in the driver.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c | 45 +++--
1 file changed, 7 insertions(+), 38 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index aa52b41..366b720 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -59,10 +59,8 @@ struct samsung_i2s_dai_data {
struct i2s_dai {
/* Platform device for this DAI */
struct platform_device *pdev;
- /* IOREMAP'd SFRs */
+ /* Memory mapped SFR region */
void __iomem*addr;
- /* Physical base address of SFRs */
- u32 base;
/* Rate of RCLK source clock */
unsigned long rclk_srcrate;
/* Frame Clock */
@@ -979,16 +977,9 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
goto probe_exit;
}
- i2s->addr = ioremap(i2s->base, 0x100);
- if (i2s->addr == NULL) {
- dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
- return -ENXIO;
- }
-
i2s->clk = clk_get(&i2s->pdev->dev, "iis");
if (IS_ERR(i2s->clk)) {
dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
- iounmap(i2s->addr);
return PTR_ERR(i2s->clk);
}
@@ -1001,7 +992,6 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
if (other) {
- other->addr = i2s->addr;
other->clk = i2s->clk;
}
@@ -1043,8 +1033,6 @@ static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
clk_disable_unprepare(i2s->clk);
clk_put(i2s->clk);
-
- iounmap(i2s->addr);
}
i2s->clk = NULL;
@@ -1162,7 +1150,6 @@ static int samsung_i2s_probe(struct platform_device *pdev)
u32 regs_base, quirks = 0, idma_addr = 0;
struct device_node *np = pdev->dev.of_node;
const struct samsung_i2s_dai_data *i2s_dai_data;
- int ret = 0;
/* Call during Seconday interface registration */
i2s_dai_data = samsung_i2s_get_driver_data(pdev);
@@ -1229,16 +1216,10 @@ static int samsung_i2s_probe(struct platform_device
*pdev)
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
- return -ENXIO;
- }
+ pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pri_dai->addr))
+ return PTR_ERR(pri_dai->addr);
- if (!request_mem_region(res->start, resource_size(res),
- "samsung-i2s")) {
- dev_err(&pdev->dev, "Unable to request SFR region\n");
- return -EBUSY;
- }
regs_base = res->start;
pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
@@ -1247,7 +1228,6 @@ static int samsung_i2s_probe(struct platform_device *pdev)
pri_dai->dma_capture.ch_name = "rx";
pri_dai->dma_playback.dma_size = 4;
pri_dai->dma_capture.dma_size = 4;
- pri_dai->base = regs_base;
pri_dai->quirks = quirks;
pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
@@ -1258,8 +1238,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
sec_dai = i2s_alloc_dai(pdev, true);
if (!sec_dai) {
dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
- ret = -ENOMEM;
- goto err;
+ return -ENOMEM;
}
sec_dai->variant_regs = pri_dai->variant_regs;
@@ -1273,7 +1252,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
}
sec_dai->dma_playback.dma_size = 4;
- sec_dai->base = regs_base;
+ sec_dai->addr = pri_dai->addr;
sec_dai->quirks = quirks;
sec_dai->idma_playback.dma_addr = idma_addr;
sec_dai->pri_dai = pri_dai;
@@ -1282,8 +1261,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
dev_err(&pdev->dev, "Unable to configure gpio\n");
- ret = -EINVAL;
- goto err;
+ return -EINVAL;
}
devm_snd_soc_register_component(&pri_dai->pdev->dev,
@@ -1297,17 +1275,11 @@ static int samsung_i2s_probe(struct platform_device
*pdev)
return ret;
[PATCH V3 06/15] ASoC: samsung: i2s: Add get_other_dai helper function
The code to get pointer to the other DAI is repeated multiple
times. Add a helper function and use it instead.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index f75c19e..cab2a2a 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -130,10 +130,16 @@ static inline bool tx_active(struct i2s_dai *i2s)
return active ? true : false;
}
+/* Return pointer to the other DAI */
+static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
+{
+ return i2s->pri_dai ? : i2s->sec_dai;
+}
+
/* If the other interface of the controller is transmitting data */
static inline bool other_tx_active(struct i2s_dai *i2s)
{
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
+ struct i2s_dai *other = get_other_dai(i2s);
return tx_active(other);
}
@@ -160,7 +166,7 @@ static inline bool rx_active(struct i2s_dai *i2s)
/* If the other interface of the controller is receiving data */
static inline bool other_rx_active(struct i2s_dai *i2s)
{
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
+ struct i2s_dai *other = get_other_dai(i2s);
return rx_active(other);
}
@@ -461,7 +467,7 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
int clk_id, unsigned int rfs, int dir)
{
struct i2s_dai *i2s = to_info(dai);
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
+ struct i2s_dai *other = get_other_dai(i2s);
u32 mod = readl(i2s->addr + I2SMOD);
const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
@@ -733,7 +739,7 @@ static int i2s_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct i2s_dai *i2s = to_info(dai);
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
+ struct i2s_dai *other = get_other_dai(i2s);
unsigned long flags;
spin_lock_irqsave(&lock, flags);
@@ -760,7 +766,7 @@ static void i2s_shutdown(struct snd_pcm_substream
*substream,
struct snd_soc_dai *dai)
{
struct i2s_dai *i2s = to_info(dai);
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
+ struct i2s_dai *other = get_other_dai(i2s);
unsigned long flags;
const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
@@ -791,7 +797,7 @@ static void i2s_shutdown(struct snd_pcm_substream
*substream,
static int config_setup(struct i2s_dai *i2s)
{
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
+ struct i2s_dai *other = get_other_dai(i2s);
unsigned rfs, bfs, blc;
u32 psr;
@@ -899,7 +905,7 @@ static int i2s_set_clkdiv(struct snd_soc_dai *dai,
int div_id, int div)
{
struct i2s_dai *i2s = to_info(dai);
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
+ struct i2s_dai *other = get_other_dai(i2s);
switch (div_id) {
case SAMSUNG_I2S_DIV_BCLK:
@@ -968,7 +974,7 @@ static int i2s_resume(struct snd_soc_dai *dai)
static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct i2s_dai *i2s = to_info(dai);
- struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
+ struct i2s_dai *other = get_other_dai(i2s);
if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
@@ -1271,7 +1277,7 @@ static int samsung_i2s_remove(struct platform_device
*pdev)
struct i2s_dai *i2s, *other;
i2s = dev_get_drvdata(&pdev->dev);
- other = i2s->pri_dai ? : i2s->sec_dai;
+ other = get_other_dai(i2s);
if (other) {
other->pri_dai = NULL;
--
1.7.9.5
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[PATCH V3 07/15] ASoC: samsung: i2s: Remove an unneeded goto usage
The usage of this goto seems unjustified, use if/else statement instead.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index cab2a2a..2bac719 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -979,19 +979,18 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
NULL);
- goto probe_exit;
- }
-
- samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
+ } else {
+ samsung_asoc_init_dma_data(dai, &i2s->dma_playback,
+ &i2s->dma_capture);
- if (i2s->quirks & QUIRK_NEED_RSTCLR)
- writel(CON_RSTCLR, i2s->addr + I2SCON);
+ if (i2s->quirks & QUIRK_NEED_RSTCLR)
+ writel(CON_RSTCLR, i2s->addr + I2SCON);
- if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
- idma_reg_addr_init(i2s->addr,
+ if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
+ idma_reg_addr_init(i2s->addr,
i2s->sec_dai->idma_playback.dma_addr);
+ }
-probe_exit:
/* Reset any constraint on RFS and BFS */
i2s->rfs = 0;
i2s->bfs = 0;
--
1.7.9.5
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[PATCH V3 00/15] ASoC: samsung: Add clk provider for I2S internal clocks
This series is an attempt to resolve the CDCLK clock gating issue on Odroid X2/U3 as reported by Daniel Drake [1], by exposing the CDCLK gate clock (and the two other clocks) through clk API. The upside is we can switch Odroid X2/U3 to the simple-card, once the CDCLK clock is taken care of by the clk core and DT. Changes since v2: - skipped the first, already merged patch, - modified description of the patch moving clk_prepare_enable() from DAI to the platform device probe(), - the last patch marked for stable. The patch series has been created on top of branch: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git topic/samsung Changes since the first version: - removed check for the i2s_opclk1 mux input clock while creating the mux and div clocks, - the DT binding documentation changes reworked (addressing review comments), - added include/dt-bindings/sound/samsung-i2s.h header file defining the clk indices, it's been put into a separate patch together with the I2S DT binding documentation updates to make merging of the ASoC and the dts patches separately easier, - a patch fixing compatible strings of I2S1, I2S2 in exynos4.dtsi is included in this series. This whole series may need more testing on other SoCs, so far I only tested it on Odroid Exynos4412 X2, with the I2S working in slave mode. [1] http://mailman.alsa-project.org/pipermail/alsa-devel/2014-September/081753.html Sylwester Nawrocki (15): ASoC: samsung: i2s: samsung_i2s_get_driver_data() cleanup ASoC: samsung: i2s: Add return value checks in probe() ASoC: samsung: i2s: Request memory region in driver probe() ASoC: samsung: i2s: Move clk_get() to platform driver probe() ASoC: samsung: i2s: Move clk enable to the platform driver probe() ASoC: samsung: i2s: Add get_other_dai helper function ASoC: samsung: i2s: Remove an unneeded goto usage ASoC: samsung: i2s: Add spinlock in place of local_irq_* calls ASoC: samsung: i2s: Protect more registers with a spinlock ASoC: samsung: odroidx2: Handle I2S CDCLK clock conditionally ASoC: samsung: i2s: Add clk provider DT binding documentation ASoC: samsung: i2s: Add clock provider for the I2S internal clocks ARM: dts: Exynos4 and Odroid X2/U3 sound device nodes update ARM: dts: Switch Odroid X2/U2 to simple-audio-card ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs .../devicetree/bindings/sound/samsung-i2s.txt | 22 ++ arch/arm/boot/dts/exynos4.dtsi | 13 +- arch/arm/boot/dts/exynos4412-odroid-common.dtsi| 27 +- arch/arm/boot/dts/exynos4412-odroidu3.dts |8 +- arch/arm/boot/dts/exynos4412-odroidx2.dts |8 +- include/dt-bindings/sound/samsung-i2s.h|8 + sound/soc/samsung/i2s.c| 361 sound/soc/samsung/odroidx2_max98090.c |6 +- 8 files changed, 295 insertions(+), 158 deletions(-) create mode 100644 include/dt-bindings/sound/samsung-i2s.h -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 01/15] ASoC: samsung: i2s: samsung_i2s_get_driver_data() cleanup
Tidy up the samsung_i2s_get_driver_data() function by using
IS_ENABLE() instead of #ifdef and add missing braces for
the 'else' part. Also ensure we are not dereferencing NULL
'match' pointer.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/samsung/i2s.c |9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 86491c9..e5473ee 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -1123,15 +1123,14 @@ static const struct of_device_id exynos_i2s_match[];
static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
struct platform_device *pdev)
{
-#ifdef CONFIG_OF
- if (pdev->dev.of_node) {
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
const struct of_device_id *match;
match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
- return match->data;
- } else
-#endif
+ return match ? match->data : NULL;
+ } else {
return (struct samsung_i2s_dai_data *)
platform_get_device_id(pdev)->driver_data;
+ }
}
#ifdef CONFIG_PM
--
1.7.9.5
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Re: [PATCH v2 1/8] thermal: Provide stub for thermal_of_cooling_device_register() function
On Wed, Jan 14, 2015 at 04:01:06PM +0100, Lukasz Majewski wrote:
> Hi Eduardo,
>
> > On Fri, Jan 02, 2015 at 02:54:28PM -0400, Eduardo Valentin wrote:
> > > On Mon, Dec 22, 2014 at 05:27:41PM +0100, Lukasz Majewski wrote:
> > > > Odroid U3 fan can work without being registered as OF cooling
> > > > device (with CONFIG_THERMAL_OF disabled).
> > > > In this situation it can be controlled via PWM entry at
> > > > /sys/class/hwmon/hwmon0/pwm1.
> > > >
> > > > Therefore, the thermal_of_cooling_device_register() function
> > > > needs a stub to allow clean compilation.
> > > >
> > > > Signed-off-by: Lukasz Majewski
> > >
> > > Acked-by: Eduardo Valentin
> >
> > Sorry, too fast,
> >
> > This is actually
> > Nacked-by: Eduardo Valentin
> >
> > :-)
> >
> > I get this error:
> > drivers/thermal/thermal_core.c:1210:1: error: redefinition of
> > ‘thermal_of_cooling_device_register’
> > thermal_of_cooling_device_register(struct device_node *np,
> > ^
> > In file included from drivers/thermal/thermal_core.c:34:0:
> > include/linux/thermal.h:321:1: note: previous definition of
> > ‘thermal_of_cooling_device_register’ was here
> >thermal_of_cooling_device_register(struct device_node *np,
> > ^
> >
> >
> > We provide the function in thermal core even if CONFIG_THERMAL_OF is
> > not set.
>
> Unfortunately the PWM fan subsystem can work perfectly fine without
> CONFIG_THERMAL.
>
Now I understand what you are trying to do.
> I think that it would be enough to make something like this in
> the ./include/linux/thermal.h:
>
> #ifdef CONFIG_THERMAL
Well, I think it should be the opposite here:
#ifndef CONFIG_THERMAL
that is, if no config thermal, then you provide the stub not the other
way around.
> static inline struct thermal_cooling_device *
> thermal_of_cooling_device_register(struct device_node
> *np, char *type, void *devdata,
> const struct
> thermal_cooling_device_ops *ops) {
> return NULL;
> }
> #else
> [ already present declaration of
> thermal_of_cooling_device_register() ]
> #endif /* CONFIG_THERMAL */
>
>
>
> > >
> > > > ---
> > > > Changes for v2:
> > > > - None
> > > > ---
> > > > include/linux/thermal.h | 14 +++---
> > > > 1 file changed, 11 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/include/linux/thermal.h b/include/linux/thermal.h
> > > > index 2de3d9e..871123c 100644
> > > > --- a/include/linux/thermal.h
> > > > +++ b/include/linux/thermal.h
> > > > @@ -328,6 +328,10 @@ thermal_zone_of_sensor_register(struct
> > > > device *dev, int id, void *data, const struct
> > > > thermal_zone_of_device_ops *ops); void
> > > > thermal_zone_of_sensor_unregister(struct device *dev, struct
> > > > thermal_zone_device *tz); +struct thermal_cooling_device *
> > > > +thermal_of_cooling_device_register(struct device_node *np,
> > > > + char *type, void *devdata,
> > > > + const struct
> > > > thermal_cooling_device_ops *); #else
> > > > static inline struct thermal_zone_device *
> > > > thermal_zone_of_sensor_register(struct device *dev, int id, void
> > > > *data, @@ -342,6 +346,13 @@ void
> > > > thermal_zone_of_sensor_unregister(struct device *dev, {
> > > > }
> > > >
> > > > +static inline struct thermal_cooling_device *
> > > > +thermal_of_cooling_device_register(struct device_node *np,
> > > > + char *type, void *devdata,
> > > > + const struct
> > > > thermal_cooling_device_ops *ops) +{
> > > > + return NULL;
> > > > +}
> > > > #endif
> > > > struct thermal_zone_device *thermal_zone_device_register(const
> > > > char *, int, int, void *, struct thermal_zone_device_ops *,
> > > > @@ -357,9 +368,6 @@ void thermal_zone_device_update(struct
> > > > thermal_zone_device *);
> > > > struct thermal_cooling_device
> > > > *thermal_cooling_device_register(char *, void *, const struct
> > > > thermal_cooling_device_ops *); -struct thermal_cooling_device *
> > > > -thermal_of_cooling_device_register(struct device_node *np, char
> > > > *, void *,
> > > > - const struct
> > > > thermal_cooling_device_ops *); void
> > > > thermal_cooling_device_unregister(struct thermal_cooling_device
> > > > *); struct thermal_zone_device
> > > > *thermal_zone_get_zone_by_name(const char *name); int
> > > > thermal_zone_get_temp(struct thermal_zone_device *tz, unsigned
> > > > long *temp); -- 2.0.0.rc2
> > > >
> >
> >
>
>
>
> --
> Best regards,
>
> Lukasz Majewski
>
> Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [PATCH v2 2/8] thermal: Provide stub for thermal_cdev_update() function
On Wed, Jan 14, 2015 at 04:07:53PM +0100, Lukasz Majewski wrote:
> Hi Eduardo,
>
> > On Mon, Dec 22, 2014 at 05:27:42PM +0100, Lukasz Majewski wrote:
> > > Odroid U3 fan can work without being registered as OF cooling device
> > > (with CONFIG_THERMAL_OF disabled).
> > > In this situation it can be controlled via PWM entry at
> > > /sys/class/hwmon/hwmon0/pwm1.
> > >
> > > Therefore, the thermal_cdev_update() function needs a stub
> > > to allow clean compilation.
> >
> > I am not sure I understand what you are attempting to do here. What is
> > the relation that you see between CONFIG_OF_THERMAL and
> > thermal_cdev_update?
>
> It should be CONFIG_THERMAL, not CONFIG_OF_THERMAL.
>
> The thermal_cdev_update() is necessary since pwm-fan code can be
> run without THERMAL subsystem (and such configuration is perfectly
> valid).
OK. Now I understand. Then, please resend this one using CONFIG_THERMAL.
Thanks,
Eduardo Valentin
>
> >
> > >
> > > Signed-off-by: Lukasz Majewski
> > > ---
> > > Changes for v2:
> > > - New patch
> > > ---
> > > include/linux/thermal.h | 6 +-
> > > 1 file changed, 5 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/include/linux/thermal.h b/include/linux/thermal.h
> > > index 871123c..b3515b5 100644
> > > --- a/include/linux/thermal.h
> > > +++ b/include/linux/thermal.h
> > > @@ -332,6 +332,7 @@ struct thermal_cooling_device *
> > > thermal_of_cooling_device_register(struct device_node *np,
> > > char *type, void *devdata,
> > > const struct
> > > thermal_cooling_device_ops *); +void thermal_cdev_update(struct
> > > thermal_cooling_device *); #else
> > > static inline struct thermal_zone_device *
> > > thermal_zone_of_sensor_register(struct device *dev, int id, void
> > > *data, @@ -353,6 +354,10 @@
> > > thermal_of_cooling_device_register(struct device_node *np, {
> > > return NULL;
> > > }
> > > +
> > > +static inline void thermal_cdev_update(struct
> > > thermal_cooling_device *cdev) +{
> > > +}
> > > #endif
> > > struct thermal_zone_device *thermal_zone_device_register(const
> > > char *, int, int, void *, struct thermal_zone_device_ops *,
> > > @@ -375,7 +380,6 @@ int thermal_zone_get_temp(struct
> > > thermal_zone_device *tz, unsigned long *temp); int
> > > get_tz_trend(struct thermal_zone_device *, int); struct
> > > thermal_instance *get_thermal_instance(struct thermal_zone_device
> > > *, struct thermal_cooling_device *, int); -void
> > > thermal_cdev_update(struct thermal_cooling_device *); void
> > > thermal_notify_framework(struct thermal_zone_device *, int);
> > > #ifdef CONFIG_NET
> > > --
> > > 2.0.0.rc2
> > >
>
>
> --
> Best regards,
>
> Lukasz Majewski
>
> Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [PATCH v5 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs
Hi, On 14/01/2015 at 16:21:50 +, Russell King - ARM Linux wrote : > On Wed, Jan 14, 2015 at 04:46:03PM +0100, Alexandre Belloni wrote: > > Hi, > > > > This patch set hasn't moved since while. We actually need patch 4 to > > properly configure prefetch on sama5d4. What would be needed to come to > > an agreement ? > > What do you mean "hasn't moved since a while" - there has been movement. > It was discovered that it breaks OMAP4 platforms. > > Since then, work has been done to resolve that breakage, and I've merged > the recent patch set into my tree for further regression testing, and > I'm going to push it out to linux-next later this week. > Indeed, my searching skills are not great. I was actually looking for mails from Tomasz but he is not taking care of it now... Thanks for the info! -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs
On Wed, Jan 14, 2015 at 04:46:03PM +0100, Alexandre Belloni wrote: > Hi, > > This patch set hasn't moved since while. We actually need patch 4 to > properly configure prefetch on sama5d4. What would be needed to come to > an agreement ? What do you mean "hasn't moved since a while" - there has been movement. It was discovered that it breaks OMAP4 platforms. Since then, work has been done to resolve that breakage, and I've merged the recent patch set into my tree for further regression testing, and I'm going to push it out to linux-next later this week. -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: EXYNOS: enable 4 cores secondary cpu up for exynos5440
On 01/07/15 11:31, Ming Lei wrote:
> Hi Kukjin,
>
Hi Ming Lei,
Sorry for late response.
> On Tue, Jan 1, 2013 at 3:09 AM, Kukjin Kim wrote:
>> No need to check power on/off with pmu control to support hotplug
>> in/out on exynos5440. And this patch enables 4 cores on exynos5440.
>
> Without this patch, oops will be triggered during kernel booting on
> exynos5440, so could this one be pushed out?
>
Yeah, I know exynos5440 requires this at least kernel boot but something
like soc_is_xxx should be updated with others in these days...so I need
some time for this.
Thanks,
Kukjin
> Thanks,
> Ming Lei
>
>>
>> Signed-off-by: Kukjin Kim
>> ---
>> arch/arm/mach-exynos/platsmp.c | 37 ++---
>> 1 file changed, 22 insertions(+), 15 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
>> index c5c840e..495a501 100644
>> --- a/arch/arm/mach-exynos/platsmp.c
>> +++ b/arch/arm/mach-exynos/platsmp.c
>> @@ -40,6 +40,8 @@ static inline void __iomem *cpu_boot_reg_base(void)
>> {
>> if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
>> return S5P_INFORM5;
>> + else if (soc_is_exynos5440())
>> + return (S5P_VA_CHIPID + 0x560);
>> return S5P_VA_SYSRAM;
>> }
>>
>> @@ -116,27 +118,30 @@ static int __cpuinit exynos_boot_secondary(unsigned
>> int cpu, struct task_struct
>> */
>> write_pen_release(phys_cpu);
>>
>> - if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
>> - __raw_writel(S5P_CORE_LOCAL_PWR_EN,
>> -S5P_ARM_CORE1_CONFIGURATION);
>> + if (!soc_is_exynos5440()) {
>> + if (!(__raw_readl(S5P_ARM_CORE1_STATUS) &
>> S5P_CORE_LOCAL_PWR_EN)) {
>> + __raw_writel(S5P_CORE_LOCAL_PWR_EN,
>> +S5P_ARM_CORE1_CONFIGURATION);
>>
>> - timeout = 10;
>> + timeout = 10;
>>
>> - /* wait max 10 ms until cpu1 is on */
>> - while ((__raw_readl(S5P_ARM_CORE1_STATUS)
>> - & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
>> - if (timeout-- == 0)
>> - break;
>> + /* wait max 10 ms until cpu1 is on */
>> + while ((__raw_readl(S5P_ARM_CORE1_STATUS)
>> + & S5P_CORE_LOCAL_PWR_EN) !=
>> S5P_CORE_LOCAL_PWR_EN) {
>> + if (timeout-- == 0)
>> + break;
>>
>> - mdelay(1);
>> - }
>> + mdelay(1);
>> + }
>>
>> - if (timeout == 0) {
>> - printk(KERN_ERR "cpu1 power enable failed");
>> - spin_unlock(&boot_lock);
>> - return -ETIMEDOUT;
>> + if (timeout == 0) {
>> + printk(KERN_ERR "cpu1 power enable failed");
>> + spin_unlock(&boot_lock);
>> + return -ETIMEDOUT;
>> + }
>> }
>> }
>> +
>> /*
>> * Send the secondary CPU a soft interrupt, thereby causing
>> * the boot monitor to read the system wide flags register,
>> @@ -178,6 +183,8 @@ static void __init exynos_smp_init_cpus(void)
>>
>> if (soc_is_exynos5250())
>> ncores = 2;
>> + else if (soc_is_exynos5440())
>> + ncores = 4;
>> else
>> ncores = scu_base ? scu_get_core_count(scu_base) : 1;
>>
>> --
>> 1.7.10.4
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Re: [PATCH] ARM: DTS: Exynos: convert to generic power domain bindings
On 01/13/15 01:50, Javier Martinez Canillas wrote: > Hello Marek, > > On Fri, Jan 2, 2015 at 10:36 AM, Marek Szyprowski > wrote: >> This patch replaces all custom samsung,power-domain device tree properties >> with generic power domain bindings and updates documentation Samsung's >> devices >> refering to old binding. >> >> Suggested-by: Kevin Hilman >> Signed-off-by: Marek Szyprowski > > It looks to me like a very nice cleanup. > > Reviewed-by: Javier Martinez Canillas > > and on an Exynos5800 Peach Pi Chromebook: > > Tested-by: Javier Martinez Canillas > Thanks your guys. Yeah, using generic something would be better and basically I have no objection. But need to check there is no side-effect because sometimes general cannot cover all of customs ;) Anyway I'll look at this change about that in this weekend. Thanks, Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESEND PATCH v3] clocksource: exynos_mct: Add the support for Exynos 64bit SoC
On 01/14/2015 04:51 PM, Kukjin Kim wrote:
On 01/14/15 14:33, Chanwoo Choi wrote:
Hi,
+ Doug, Olof
This patch adds the support for Exynos 64bit SoC. The delay_timer is only used
for Exynos 32bit SoC.
Yes, the Exynos MCT(Multi-Core Timer) is 64bit timer and it is available
on 64bit exynos SoC such as exynos7. But basically ARMv8 architecture is
including ARM ARCH timer (ARM Generic Timer) and exynos7 also has
implemented it and additionally its access is faster than using memory
mapped register called SFR for MCT...so Doug submitted patch to use MCT
on 32bit exynos SoCs before.
I know using MCT on 64bit exynos is usefulness for Power Management and
I need to talk to relevant guys in office again. If anything, I'll let
you know.
I will wait for your answer before digging more the patch.
Thanks
-- Daniel
Cc: Daniel Lezcano
Cc: Thomas Gleixner
Cc: Kukjin Kim
Cc: Mark Rutland
Signed-off-by: Chanwoo Choi
---
This patch set is tested on 64-bit Exynos SoC. I send only this patch from
following patchst[1].
[1] https://lkml.org/lkml/2014/12/2/134
Changes from v2:
- None
Changes from v1:
- Use CONFIG_ARM instead of CONFIG_ARM64
drivers/clocksource/Kconfig | 1 -
drivers/clocksource/exynos_mct.c | 4
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index fc01ec2..be38119 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -135,7 +135,6 @@ config CLKSRC_METAG_GENERIC
config CLKSRC_EXYNOS_MCT
def_bool y if ARCH_EXYNOS
- depends on !ARM64
help
Support for Multi Core Timer controller on Exynos SoCs.
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 9403061..b840ea1 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -223,6 +223,7 @@ static u64 notrace exynos4_read_sched_clock(void)
return exynos4_read_count_32();
}
+#if defined(CONFIG_ARM)
static struct delay_timer exynos4_delay_timer;
static cycles_t exynos4_read_current_timer(void)
@@ -231,14 +232,17 @@ static cycles_t exynos4_read_current_timer(void)
"cycles_t needs to move to 32-bit for ARM64 usage");
return exynos4_read_count_32();
}
+#endif
static void __init exynos4_clocksource_init(void)
{
exynos4_mct_frc_start();
+#if defined(CONFIG_ARM)
exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
exynos4_delay_timer.freq = clk_rate;
register_current_timer_delay(&exynos4_delay_timer);
+#endif
if (clocksource_register_hz(&mct_frc, clk_rate))
panic("%s: can't register clocksource\n", mct_frc.name);
--
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Re: [PATCH v4 0/2] mmc: dw_mmc: exynos: Add HS400 support
On 14 January 2015 at 16:35, Kukjin Kim wrote: > On 01/14/15 22:32, Jaehoon Chung wrote: >> Hi, Alim. >> >> On 01/14/2015 07:30 PM, Alim Akhtar wrote: >>> This adds HS400 mode support for exynos dw_mmc host controller. >>> >>> Currently tested on Exynos5800-peach-pi platform for HS400 mode. >>> Tested HS200 mode with this series applied, HS200 still works. >>> >>> Appreciate testing on other exynos5/7 platform which supports emmc5.0 >> >> I will test this patch on exynos5/7 board. >> > > What's the result? :-) If it's OK, I'll take DT changes for exynos > stuff, I'm not sure about the driver changes though... Kukjin, As I understand it, there is a dependency between the patches, since driver adds supports for new DT bindings. So, unless I am mistaken I think it would be best to take this complete patchset through my mmc tree. With your ack of course. Kind regards Uffe -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: exynos5422-odroidxu3: add INA2xx sensors
On 01/14/15 09:03, Kevin Hilman wrote:
> From: Kevin Hilman
>
> The odroid-xu3 has 4 INA231 current sensors on board which can be
> accessed from the Linux via the hwmon interface.
>
> There is one sensor for each of these power rails:
>
> - A15 cluster: VDD_ARM
> - A7 cluster: VDD_KFC
> - GPU: VDD_G3D
> - memory: VDD_MEM
>
> In addition to adding the sensors, LDO26 from the PMIC needs to be
> enabled because it's powering these sensor.
>
> Cc: Javier Martinez Canillas
> Cc: Sjoerd Simons
> Signed-off-by: Kevin Hilman
> ---
> Applies on top of "ARM: dts: Add dts file for odroid XU3 board" from Sjoerd
> Simons.
>
> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 39
> ++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> index c29123c0734d..7874da20939f 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> @@ -174,6 +174,13 @@
> regulator-always-on;
> };
>
> + ldo26_reg: LDO26 {
> + regulator-name = "vdd_ldo26";
> + regulator-min-microvolt = <300>;
> + regulator-max-microvolt = <300>;
> + regulator-always-on;
> + };
> +
> buck1_reg: BUCK1 {
> regulator-name = "vdd_mif";
> regulator-min-microvolt = <80>;
> @@ -257,6 +264,38 @@
> };
> };
>
> + i2c_0: i2c@12C6 {
> + status = "okay";
> +
> + /* A15 cluster: VDD_ARM */
> + ina220@40 {
> + compatible = "ti,ina230";
> + reg = <0x40>;
> + shunt-resistor = <1>;
> + };
> +
> + /* memory: VDD_MEM */
> + ina220@41 {
> + compatible = "ti,ina230";
> + reg = <0x41>;
> + shunt-resistor = <1>;
> + };
> +
> + /* GPU: VDD_G3D */
> + ina220@44 {
> + compatible = "ti,ina230";
> + reg = <0x44>;
> + shunt-resistor = <1>;
> + };
> +
> + /* A7 cluster: VDD_KFC */
> + ina220@45 {
> + compatible = "ti,ina230";
> + reg = <0x45>;
> + shunt-resistor = <1>;
> + };
> + };
> +
> i2c_2: i2c@12C8 {
> samsung,i2c-sda-delay = <100>;
> samsung,i2c-max-bus-freq = <66000>;
Looks good to me and applied. To be honest, I'm not sure about the
values in the node of shunt-resistor though ;)
Thanks,
Kukjin
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Re: [RESEND PATCH v3] clocksource: exynos_mct: Add the support for Exynos 64bit SoC
On 01/14/15 14:33, Chanwoo Choi wrote:
Hi,
+ Doug, Olof
> This patch adds the support for Exynos 64bit SoC. The delay_timer is only used
> for Exynos 32bit SoC.
>
Yes, the Exynos MCT(Multi-Core Timer) is 64bit timer and it is available
on 64bit exynos SoC such as exynos7. But basically ARMv8 architecture is
including ARM ARCH timer (ARM Generic Timer) and exynos7 also has
implemented it and additionally its access is faster than using memory
mapped register called SFR for MCT...so Doug submitted patch to use MCT
on 32bit exynos SoCs before.
I know using MCT on 64bit exynos is usefulness for Power Management and
I need to talk to relevant guys in office again. If anything, I'll let
you know.
Thanks,
Kukjin
> Cc: Daniel Lezcano
> Cc: Thomas Gleixner
> Cc: Kukjin Kim
> Cc: Mark Rutland
> Signed-off-by: Chanwoo Choi
> ---
> This patch set is tested on 64-bit Exynos SoC. I send only this patch from
> following patchst[1].
> [1] https://lkml.org/lkml/2014/12/2/134
>
> Changes from v2:
> - None
> Changes from v1:
> - Use CONFIG_ARM instead of CONFIG_ARM64
>
> drivers/clocksource/Kconfig | 1 -
> drivers/clocksource/exynos_mct.c | 4
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index fc01ec2..be38119 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -135,7 +135,6 @@ config CLKSRC_METAG_GENERIC
>
> config CLKSRC_EXYNOS_MCT
> def_bool y if ARCH_EXYNOS
> - depends on !ARM64
> help
> Support for Multi Core Timer controller on Exynos SoCs.
>
> diff --git a/drivers/clocksource/exynos_mct.c
> b/drivers/clocksource/exynos_mct.c
> index 9403061..b840ea1 100644
> --- a/drivers/clocksource/exynos_mct.c
> +++ b/drivers/clocksource/exynos_mct.c
> @@ -223,6 +223,7 @@ static u64 notrace exynos4_read_sched_clock(void)
> return exynos4_read_count_32();
> }
>
> +#if defined(CONFIG_ARM)
> static struct delay_timer exynos4_delay_timer;
>
> static cycles_t exynos4_read_current_timer(void)
> @@ -231,14 +232,17 @@ static cycles_t exynos4_read_current_timer(void)
>"cycles_t needs to move to 32-bit for ARM64 usage");
> return exynos4_read_count_32();
> }
> +#endif
>
> static void __init exynos4_clocksource_init(void)
> {
> exynos4_mct_frc_start();
>
> +#if defined(CONFIG_ARM)
> exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
> exynos4_delay_timer.freq = clk_rate;
> register_current_timer_delay(&exynos4_delay_timer);
> +#endif
>
> if (clocksource_register_hz(&mct_frc, clk_rate))
> panic("%s: can't register clocksource\n", mct_frc.name);
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Re: [PATCH v5 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs
Hi,
This patch set hasn't moved since while. We actually need patch 4 to
properly configure prefetch on sama5d4. What would be needed to come to
an agreement ?
On 24/09/2014 at 13:05:34 +0200, Marek Szyprowski wrote :
> This is an updated patchset, which intends to add support for L2 cache
> on Exynos4 SoCs on boards running under secure firmware, which requires
> certain initialization steps to be done with help of firmware, as
> selected registers are writable only from secure mode.
>
> First four patches extend existing support for secure write in L2C driver
> to account for design of secure firmware running on Exynos. Namely:
> 1) direct read access to certain registers is needed on Exynos, because
> secure firmware calls set several registers at once,
> 2) not all boards are running secure firmware, so .write_sec callback
> needs to be installed in Exynos firmware ops initialization code,
> 3) write access to {DATA,TAG}_LATENCY_CTRL registers fron non-secure world
> is not allowed and so must use l2c_write_sec as well,
> 4) on certain boards, default value of prefetch register is incorrect
> and must be overridden at L2C initialization.
> For boards running with firmware that provides access to individual
> L2C registers this series should introduce no functional changes. However
> since the driver is widely used on other platforms I'd like to kindly ask
> any interested people for testing.
>
> Further three patches add implementation of .write_sec and .configure
> callbacks for Exynos secure firmware and necessary DT nodes to enable
> L2 cache.
>
> Changes in this version tested on Exynos4412-based TRATS2 and OdroidU3+
> boards (both with secure firmware). There should be no functional change
> for Exynos boards running without secure firmware. I do not have access
> to affected non-Exynos boards, so I could not test on them.
>
>
> Depends on:
> - [PATCH v3 0/5] Firmware-assisted suspend/resume of Exynos SoCs
>(https://lkml.org/lkml/2014/8/26/445)
>
>
> Changelog:
>
> Changes since v4:
> (https://lkml.org/lkml/2014/8/26/461)
> - rewrote the code accessing l2x0_saved_regs from assembly code
> - added comment and reworked unconditional call to SMC_CMD_L2X0INVALL
>
> Changes since v3:
> (https://lkml.org/lkml/2014/7/17/600)
> - fixed issues with references to initdata on resume path by creating
>a copy of affected structure (pointed out by Russell King),
> - fixed unnecessary full reconfiguration of L2C controller on resume
>(configuration is already determined after initialization, so the
> only thing to do is to push those values to the controller),
> - rebased on next-20140717 tag of linux-next tree and last versions
>of dependencies.
>
> Changes since v2:
> (https://lkml.org/lkml/2014/6/25/416)
> - refactored L2C driver to use commit-like interface and make it no longer
>depend on availability of writes to individual registers,
> - moved L2C resume to assembly code, because doing it later makes some
>systems unstable - this is also needed for deeper cpuidle modes,
> - dropped unnecessary patch hacking around the .write_sec interface,
> - dropped patch making the driver use l2c_write_sec() for LATENCY_CTRL
>registers as Exynos is no longer affected and I'm not aware of any
>reports that this is also needed on other platforms (can be applied
>separately if it turns out to be so),
> - rebased onto next-20140717 tag of linux-next tree.
>
> Changes since v1:
> (https://www.mail-archive.com/linux-omap@vger.kernel.org/msg106323.html)
> - rebased onto for-next branch of linux-samsung tree,
> - changed argument order of outer_cache.write_sec() callback to match
>l2c_write_sec() function in cache-l2x0.c,
> - added support of overriding of prefetch settings to work around incorrect
>default settings on certain Exynos4x12-based boards,
> - added call to firmware to invalidate whole L2 cache before setting enable
>bit in L2C control register (required by Exynos secure firmware).
>
>
> Patch summary:
>
> Tomasz Figa (7):
> ARM: l2c: Refactor the driver to use commit-like interface
> ARM: l2c: Add interface to ask hypervisor to configure L2C
> ARM: l2c: Get outer cache .write_sec callback from mach_desc only if
> not NULL
> ARM: l2c: Add support for overriding prefetch settings
> ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310
> ARM: EXYNOS: Add support for non-secure L2X0 resume
> ARM: dts: exynos4: Add nodes for L2 cache controller
>
> Documentation/devicetree/bindings/arm/l2cc.txt | 10 +
> arch/arm/boot/dts/exynos4210.dtsi | 9 +
> arch/arm/boot/dts/exynos4x12.dtsi | 14 ++
> arch/arm/include/asm/outercache.h | 3 +
> arch/arm/kernel/irq.c | 3 +-
> arch/arm/mach-exynos/firmware.c| 50 +
> arch/arm/mach-exynos/sleep.S | 46 +
> arch/arm/mm/cache-l2x0.c
Re: [PATCH RESEND 0/4] Small updates to Snow and Peach Pit/Pi DTS
Hello Kukjin, On 01/14/2015 04:28 PM, Kukjin Kim wrote: >>> >>> I saw that you collected some DTS patches for 3.20 but these are not >>> included. Any comments about this series? >>> >> Yeah, but I don't think I checked all of submitted patches including >> this at that time and I'll have a look at this series soon. >> >> Thanks for your gentle reminder. >> > This series looks good to me, applied ;-) > Great, thanks a lot for your help! > Thanks, > Kukjin > Best regards, Javier -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RESEND 1/4] ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow
Hello Kukjin,
On 01/14/2015 04:17 PM, Kukjin Kim wrote:
>>
>> &pinctrl_0 {
>> +power_key_irq: power-key-irq {
>> +samsung,pins = "gpx1-3";
>> +samsung,pin-function = <0xf>;
>
> I think, this setting should be same with exynos5250-spring but different.
>
> from: arch/arm/boot/dts/exynos5250-spring.dts
> 491 power_key_irq: power-key-irq {
> 492 samsung,pins = "gpx1-3";
> 493 samsung,pin-function = <0>;
> 494 samsung,pin-pud = <0>;
> 495 samsung,pin-drv = <0>;
> 496 };
>
> Hmm...0xf should be correct so need to fix the spring DT?
>
Yes, the same problem has exynos5250-snow.dts. This is less relevant now
after commit f6a8249f9e55 ("pinctrl: exynos: Lock GPIOs as interrupts
when used as EINTs") that moved the pinmux reconfiguration to
.irq_{request,release}_resources() preventing the pads to be reconfigured
as regulator input/output.
But still for correctness we should audit spring / snow and change to 0xf.
Best regards,
Javier
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Re: [PATCH v4 0/2] mmc: dw_mmc: exynos: Add HS400 support
On 01/14/15 22:32, Jaehoon Chung wrote: > Hi, Alim. > > On 01/14/2015 07:30 PM, Alim Akhtar wrote: >> This adds HS400 mode support for exynos dw_mmc host controller. >> >> Currently tested on Exynos5800-peach-pi platform for HS400 mode. >> Tested HS200 mode with this series applied, HS200 still works. >> >> Appreciate testing on other exynos5/7 platform which supports emmc5.0 > > I will test this patch on exynos5/7 board. > What's the result? :-) If it's OK, I'll take DT changes for exynos stuff, I'm not sure about the driver changes though... Thanks, Kukjin > Best Regards, > Jaehoon Chung >> >> Changes in V4: >> * drop the idea of changing existing binding for ciu_div as per [1] >> * addressed comments from Jaehoon Chung [2] >> >> [1] http://www.spinics.net/lists/linux-samsung-soc/msg40923.html >> [2] http://www.spinics.net/lists/devicetree/msg64373.html >> >> Changes in V3: >> rebased on ulf's next (commit: 607b448 mmc: core: Make tuning block >> patterns static) >> >> Seungwon Jeon (2): >> mmc: dw_mmc: exynos: Support eMMC's HS400 mode >> ARM: dts: Add HS400 support for exynos5420 and exynos5800 >> >> .../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 + >> arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +- >> arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 + >> arch/arm/boot/dts/exynos5420-smdk5420.dts |4 +- >> arch/arm/boot/dts/exynos5800-peach-pi.dts |4 +- >> drivers/mmc/host/dw_mmc-exynos.c | 187 >> >> drivers/mmc/host/dw_mmc-exynos.h | 19 +- >> drivers/mmc/host/dw_mmc.c | 16 +- >> drivers/mmc/host/dw_mmc.h |2 + >> 9 files changed, 212 insertions(+), 38 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RESEND 0/4] Small updates to Snow and Peach Pit/Pi DTS
On 01/15/15 00:12, Kukjin Kim wrote: > On 01/12/15 19:41, Javier Martinez Canillas wrote: >> Hello Kukjin, >> > Hi, > >> On 01/02/2015 04:24 PM, Javier Martinez Canillas wrote: >>> >>> This series adds some DTS snippets that were missing in the mainline >>> Snow and Peach Pit/Pi Device Trees but are present in the downstream >>> ChromeOS kernel. >>> >>> The series is composed of the following patches: >>> >>> Javier Martinez Canillas (4): >>> ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow >>> ARM: dts: Add lid GPIO key device node for Peach boards >>> ARM: dts: Set Peach boards USB WebCam regulators to always on >>> ARM: dts: Configure regulators for suspend on exynos Peach boards >>> >>> arch/arm/boot/dts/exynos5250-snow.dts | 16 + >>> arch/arm/boot/dts/exynos5420-peach-pit.dts | 100 >>> +++- >>> arch/arm/boot/dts/exynos5800-peach-pi.dts | 101 >>> - >>> 3 files changed, 215 insertions(+), 2 deletions(-) >>> >>> Patch #1 adds some pinctrl lines for the GPIO keys in the Snow DTS. >>> >>> Patch #2 adds a device node and pinctrl lines for the lid GPIO in >>> the Peach boards DTS. >>> >>> Patch #3 sets the regulators that supply voltage to the USB WebCam >>> in Peach boards as always on. >>> >>> Patch #4 configures the max77802 regulators on the Peach Pit and Pi >>> boards to be enabled or disabled during system suspend. >>> >> >> I saw that you collected some DTS patches for 3.20 but these are not >> included. Any comments about this series? >> > Yeah, but I don't think I checked all of submitted patches including > this at that time and I'll have a look at this series soon. > > Thanks for your gentle reminder. > This series looks good to me, applied ;-) Thanks, Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESEND PATCH] ARM: EXYNOS: Add exynos3250 suspend-to-ram support
On 01/12/15 19:39, Chanwoo Choi wrote: > Dear Kukjin, > > On 01/12/2015 06:28 PM, Kukjin Kim wrote: >> On 01/12/15 17:51, Chanwoo Choi wrote: >>> Dear Kukjin, >>> >>> On 01/12/2015 05:44 PM, Kukjin Kim wrote: On 01/08/15 10:50, Chanwoo Choi wrote: > This patch adds the support for suspend-to-ram feature of Exynos3250 SoC. > Exynos3250 don't contain the L2 cache. > > Cc: Kukjin Kim > Signed-off-by: Chanwoo Choi > Acked-by: Kyungmin Park > --- > Depend on: > - v3.19-rc3 > Chanwoo, Can you please let me know why this is depending on v3.19-rc3? If I apply this on top of my tree not including some stuff between v3.19-rc1 and v3.19-rc3, is there a problem? >>> >>> No problem. >>> I'm sorry. It is my mistake about using meaning of dependency. >>> This patch can be applied on v3.19-rc1. I just tested it on v3.19-rc3. >>> >> OK, applied. > > Thanks for your apply. > > I check this patch on your git repository on following: > https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/commit/?h=v3.20-next/update-samsung&id=e2fb3668567d0b70563cca0d1e350afd5053e4a3 > > Although this patch contains a little decription of patch, > applied patch don't include any description of patch. > > If you possible, please add the description of patch. > You're right. Maybe I've missed the contents when I applied. I've just restored your git log with small modification. Thanks, Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/6] Enable HDMI support on Exynos platforms
Hello,
I've applied v6 of the HDMI patchset (together with the patches the set
depends on) onto torvalds/master, but I'm seeing a lot of warnings
(coming from __clk_{unprepare,disable}) that seem to originate from the
fimc subsystem.
Since the patchset also changes PM domain handling (which shows up in
the log as well), I was wondering if this is related?
Full boot log here:
http://www.math.uni-bielefeld.de/~tjakobi/archive/clk_warnings.txt
That's the tree I'm currently using:
https://github.com/tobiasjakobi/linux-odroid/commits/odroid-3.19.y
(maybe I'm missing something here?)
With best wishes,
Tobias
PS: This is on a ODROID-X2.
Marek Szyprowski wrote:
> Hi all,
>
> This is yet another approach to submit patches, which enables HDMI
> support for two Exynos based platforms: UniversalC210 and Odroid X2/U3.
>
> Beside DTS changes, this patchset adds parent domain support for Exynos
> PM domains. This was the most controversial patch in the previous
> attempts, but I hope I fixes all reported issues and made it really
> generic. For more details see individual patches.
>
> The patchset is based on my previous patch:
> 'ARM: DTS: Exynos: convert to generic power domain bindings'
> (http://www.spinics.net/lists/linux-samsung-soc/msg40584.html)
> and requires 2 patches that have been merged to v3.19-rc4:
> 'clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi'
> (commit df019a5c0f7083001cb694f44821ca506425bda2) and
> 'PM / Domains: Export of_genpd_get_from_provider function'
> (commit 7496fcbe8a643097efc061160e1c3b65ee2fa350).
>
> Regards
> Marek Szyprowski
>
> Change log:
>
> v2:
> - rewrote subdomains patch according to suggestions from Geert
> Uytterhoeven and Amit Daniel Kachhap.
>
> v1 resend: (http://www.spinics.net/lists/linux-samsung-soc/msg39428.html)
> - added handling of generic 'power-domains' binding in subdomains
>
> v1: (http://www.spinics.net/lists/linux-samsung-soc/msg38914.html)
> - resolved power domain on/off issue with 'clk: samsung: exynos4: set
> parent of mixer gate clock to hdmi' patch
>
> v0: (http://www.spinics.net/lists/linux-samsung-soc/msg33498.html)
> - first attempt, used 'always on' power domains hack
>
>
> Andrzej Hajda (1):
> ARM: dts: exynos5250: add display power domain
>
> Marek Szyprowski (4):
> ARM: Exynos: add support for sub-power domains
> ARM: dts: exynos4: add hdmi related nodes
> ARM: dts: exynos4: add dependency between TV and LCD0 power domains
> ARM: dts: exynos4412-odroid: enable hdmi support
>
> Tomasz Stanislawski (1):
> ARM: dts: exynos4210-universal_c210: enable hdmi support
>
> .../bindings/arm/exynos/power_domain.txt | 2 +
> arch/arm/boot/dts/exynos4.dtsi | 41
> arch/arm/boot/dts/exynos4210-universal_c210.dts| 57
> ++
> arch/arm/boot/dts/exynos4210.dtsi | 8 +++
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi| 44 +
> arch/arm/boot/dts/exynos4x12.dtsi | 11 +
> arch/arm/boot/dts/exynos5250.dtsi | 10
> arch/arm/mach-exynos/pm_domains.c | 28 +++
> 8 files changed, 201 insertions(+)
>
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Re: power: reset: add driver for Hardkernel's Odroid boards
Hello, I've applied the two patches of this set onto torvalds/master (together with some other patches), but I now encounter an 'internal error' when doing a system reboot. Here's the corresponding part of the kernel log: http://www.math.uni-bielefeld.de/~tjakobi/archive/odroid_power_reset.txt With best wishes, Tobias -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RESEND 1/4] ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow
On 01/03/15 00:24, Javier Martinez Canillas wrote:
> The Exynos5250 Snow Chromebook has GPIO keys for power and lid
> so the SoC I/O pins have to be configured in external interrupt
> mode. Currently, this is working without setting the pinctrl
> lines but is better to set it explicitly instead of relying on
> the previous state of the I/O pins.
>
> The DTS snippets were taken from the downstream ChromeOS tree.
>
> Signed-off-by: Javier Martinez Canillas
> ---
> arch/arm/boot/dts/exynos5250-snow.dts | 16
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
> b/arch/arm/boot/dts/exynos5250-snow.dts
> index effaf2a..b9aeec4 100644
> --- a/arch/arm/boot/dts/exynos5250-snow.dts
> +++ b/arch/arm/boot/dts/exynos5250-snow.dts
> @@ -33,6 +33,8 @@
>
> gpio-keys {
> compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&power_key_irq &lid_irq>;
>
> power {
> label = "Power";
> @@ -540,6 +542,13 @@
> };
>
> &pinctrl_0 {
> + power_key_irq: power-key-irq {
> + samsung,pins = "gpx1-3";
> + samsung,pin-function = <0xf>;
I think, this setting should be same with exynos5250-spring but different.
from: arch/arm/boot/dts/exynos5250-spring.dts
491 power_key_irq: power-key-irq {
492 samsung,pins = "gpx1-3";
493 samsung,pin-function = <0>;
494 samsung,pin-pud = <0>;
495 samsung,pin-drv = <0>;
496 };
Hmm...0xf should be correct so need to fix the spring DT?
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> ec_irq: ec-irq {
> samsung,pins = "gpx1-6";
> samsung,pin-function = <0>;
> @@ -575,6 +584,13 @@
> samsung,pin-drv = <0>;
> };
>
> + lid_irq: lid-irq {
> + samsung,pins = "gpx3-5";
> + samsung,pin-function = <0xf>;
Same as above.
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> hdmi_hpd_irq: hdmi-hpd-irq {
> samsung,pins = "gpx3-7";
> samsung,pin-function = <0>;
Thanks,
Kukjin
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Re: [PATCH RESEND 0/4] Small updates to Snow and Peach Pit/Pi DTS
On 01/12/15 19:41, Javier Martinez Canillas wrote: > Hello Kukjin, > Hi, > On 01/02/2015 04:24 PM, Javier Martinez Canillas wrote: >> >> This series adds some DTS snippets that were missing in the mainline >> Snow and Peach Pit/Pi Device Trees but are present in the downstream >> ChromeOS kernel. >> >> The series is composed of the following patches: >> >> Javier Martinez Canillas (4): >> ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow >> ARM: dts: Add lid GPIO key device node for Peach boards >> ARM: dts: Set Peach boards USB WebCam regulators to always on >> ARM: dts: Configure regulators for suspend on exynos Peach boards >> >> arch/arm/boot/dts/exynos5250-snow.dts | 16 + >> arch/arm/boot/dts/exynos5420-peach-pit.dts | 100 >> +++- >> arch/arm/boot/dts/exynos5800-peach-pi.dts | 101 >> - >> 3 files changed, 215 insertions(+), 2 deletions(-) >> >> Patch #1 adds some pinctrl lines for the GPIO keys in the Snow DTS. >> >> Patch #2 adds a device node and pinctrl lines for the lid GPIO in >> the Peach boards DTS. >> >> Patch #3 sets the regulators that supply voltage to the USB WebCam >> in Peach boards as always on. >> >> Patch #4 configures the max77802 regulators on the Peach Pit and Pi >> boards to be enabled or disabled during system suspend. >> > > I saw that you collected some DTS patches for 3.20 but these are not > included. Any comments about this series? > Yeah, but I don't think I checked all of submitted patches including this at that time and I'll have a look at this series soon. Thanks for your gentle reminder. - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL RE-SEND] Samsung exynos7 updates for v3.20
Hi, Sorry, I'm resending this pull-request because of missing signed-tag. Please pull. If any problems, please let me know. Thanks, Kukjin The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672: Linux 3.19-rc1 (2014-12-20 17:08:50 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-dt-64 for you to fetch changes up to 6f56eef1f9aba3747c811780a4768618167d5c97: arm64: Enable ARMv8 based exynos7 SoC support (2014-12-23 00:19:08 +0900) Samsung arch/arm64 DT updates for v3.19 - to support ARMv8 based exynos7 SoC : add initial device tree for pinctrl, PMU, mmc, i2c, rtc, watchdog, and adc nodes for exynos7 SoC and exynos7 based espresso board. Abhilash Kesavan (2): arm64: dts: Add PMU DT node for exynos7 SoC arm64: dts: Add nodes for mmc, i2c, rtc, watchdog, adc on exynos7 Alim Akhtar (1): arm64: Enable ARMv8 based exynos7 SoC support Naveen Krishna Ch (2): arm64: dts: Add initial device tree support for exynos7 arm64: dts: Add initial pinctrl support to exynos7 .../devicetree/bindings/arm/samsung/pmu.txt| 1 + arch/arm64/Kconfig | 17 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/exynos/Makefile| 5 + arch/arm64/boot/dts/exynos/exynos7-espresso.dts| 84 +++ arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi| 588 + arch/arm64/boot/dts/exynos/exynos7.dtsi| 530 +++ 7 files changed, 1226 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/Makefile create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi On 01/12/15 17:30, Kukjin Kim wrote: > Hi again, > > Please pull arm64 based exynos7 stuff for v3.20 and as you know I've > tried this in 3.19 but couldn't because of some dependencies like clk. > Now all of dependencies already resolved so this should be fine for v3.20. > > If any problems, please kindly let me know. > > Thanks, > Kukjin > > The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672: > > Linux 3.19-rc1 (2014-12-20 17:08:50 -0800) > > are available in the git repository at: > git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git > v3.20-next/dt-samsung-64 > > Abhilash Kesavan (2): > arm64: dts: Add PMU DT node for exynos7 SoC > arm64: dts: Add nodes for mmc, i2c, rtc, watchdog, adc on exynos7 > > Alim Akhtar (1): > arm64: Enable ARMv8 based exynos7 SoC support > > Naveen Krishna Ch (2): > arm64: dts: Add initial device tree support for exynos7 > arm64: dts: Add initial pinctrl support to exynos7 > > .../devicetree/bindings/arm/samsung/pmu.txt|1 + > arch/arm64/Kconfig | 17 + > arch/arm64/boot/dts/Makefile |1 + > arch/arm64/boot/dts/exynos/Makefile|5 + > arch/arm64/boot/dts/exynos/exynos7-espresso.dts| 84 +++ > arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi| 588 > > arch/arm64/boot/dts/exynos/exynos7.dtsi| 530 > ++ > 7 files changed, 1226 insertions(+), 0 deletions(-) > create mode 100644 arch/arm64/boot/dts/exynos/Makefile > create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts > create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi > create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 1/7 RESEND] PM / Domains: Add a note about power domain subdomains
On 14 January 2015 at 15:12, Marek Szyprowski wrote:
> This patch adds a note on defining subdomains to generic PM domain
> binding documentation to let power domain providers use common approach
> for defining power domain hierarchy.
>
> Signed-off-by: Marek Szyprowski
Reviewed-by: Ulf Hansson
Kind regards
Uffe
> ---
> RESEND version:
> - fixed spelling mistakes, thanks go to Geert!
> ---
> .../devicetree/bindings/power/power_domain.txt | 29
> ++
> 1 file changed, 29 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/power/power_domain.txt
> b/Documentation/devicetree/bindings/power/power_domain.txt
> index 98c1667..eeea45b 100644
> --- a/Documentation/devicetree/bindings/power/power_domain.txt
> +++ b/Documentation/devicetree/bindings/power/power_domain.txt
> @@ -19,6 +19,16 @@ Required properties:
> providing multiple PM domains (e.g. power controllers), but can be any
> value
> as specified by device tree binding documentation of particular provider.
>
> +Optional properties:
> + - power-domains : A phandle and PM domain specifier as defined by bindings
> of
> + the power controller specified by phandle.
> + Some power domains might be powered from another power domain (or have
> + other hardware specific dependencies). For representing such dependency
> + a standard PM domain consumer binding is used. When provided, all domains
> + created by the given provider should be subdomains of the domain
> + specified by this binding. More details about power domain specifier are
> + available in the next section.
> +
> Example:
>
> power: power-controller@1234 {
> @@ -30,6 +40,25 @@ Example:
> The node above defines a power controller that is a PM domain provider and
> expects one cell as its phandle argument.
>
> +Example 2:
> +
> + parent: power-controller@1234 {
> + compatible = "foo,power-controller";
> + reg = <0x1234 0x1000>;
> + #power-domain-cells = <1>;
> + };
> +
> + child: power-controller@1234 {
> + compatible = "foo,power-controller";
> + reg = <0x12341000 0x1000>;
> + power-domains = <&parent 0>;
> + #power-domain-cells = <1>;
> + };
> +
> +The nodes above define two power controllers: 'parent' and 'child'.
> +Domains created by the 'child' power controller are subdomains of '0' power
> +domain provided by the 'parent' power controller.
> +
> ==PM domain consumers==
>
> Required properties:
> --
> 1.9.2
>
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Re: [PATCH v2 2/8] thermal: Provide stub for thermal_cdev_update() function
Hi Eduardo,
> On Mon, Dec 22, 2014 at 05:27:42PM +0100, Lukasz Majewski wrote:
> > Odroid U3 fan can work without being registered as OF cooling device
> > (with CONFIG_THERMAL_OF disabled).
> > In this situation it can be controlled via PWM entry at
> > /sys/class/hwmon/hwmon0/pwm1.
> >
> > Therefore, the thermal_cdev_update() function needs a stub
> > to allow clean compilation.
>
> I am not sure I understand what you are attempting to do here. What is
> the relation that you see between CONFIG_OF_THERMAL and
> thermal_cdev_update?
It should be CONFIG_THERMAL, not CONFIG_OF_THERMAL.
The thermal_cdev_update() is necessary since pwm-fan code can be
run without THERMAL subsystem (and such configuration is perfectly
valid).
>
> >
> > Signed-off-by: Lukasz Majewski
> > ---
> > Changes for v2:
> > - New patch
> > ---
> > include/linux/thermal.h | 6 +-
> > 1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/include/linux/thermal.h b/include/linux/thermal.h
> > index 871123c..b3515b5 100644
> > --- a/include/linux/thermal.h
> > +++ b/include/linux/thermal.h
> > @@ -332,6 +332,7 @@ struct thermal_cooling_device *
> > thermal_of_cooling_device_register(struct device_node *np,
> >char *type, void *devdata,
> >const struct
> > thermal_cooling_device_ops *); +void thermal_cdev_update(struct
> > thermal_cooling_device *); #else
> > static inline struct thermal_zone_device *
> > thermal_zone_of_sensor_register(struct device *dev, int id, void
> > *data, @@ -353,6 +354,10 @@
> > thermal_of_cooling_device_register(struct device_node *np, {
> > return NULL;
> > }
> > +
> > +static inline void thermal_cdev_update(struct
> > thermal_cooling_device *cdev) +{
> > +}
> > #endif
> > struct thermal_zone_device *thermal_zone_device_register(const
> > char *, int, int, void *, struct thermal_zone_device_ops *,
> > @@ -375,7 +380,6 @@ int thermal_zone_get_temp(struct
> > thermal_zone_device *tz, unsigned long *temp); int
> > get_tz_trend(struct thermal_zone_device *, int); struct
> > thermal_instance *get_thermal_instance(struct thermal_zone_device
> > *, struct thermal_cooling_device *, int); -void
> > thermal_cdev_update(struct thermal_cooling_device *); void
> > thermal_notify_framework(struct thermal_zone_device *, int);
> > #ifdef CONFIG_NET
> > --
> > 2.0.0.rc2
> >
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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[GIT PULL RE-SEND] Samsung fixes for v3.19
Hi, Oops, it's totally my fault and mistake. Actually my git command for pull-request was correct but the git tool was old version :-( because there are two git in my laptop, anyway sorry for that and I'm resending with signed tag has been created before. Please pull if you're OK with my comments on your questions below. The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672: Linux 3.19-rc1 (2014-12-20 17:08:50 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-3.19 for you to fetch changes up to 26d13bf77b8e59adf4953577ba48e1903545bf7f: ARM: exynos_defconfig: Enable LM90 driver (2015-01-12 17:16:32 +0900) Samsung fixes for v3.19 - exynos_defconfig: enable LM90 driver and display panel support - HWMON - SENSORS_LM90 - Direct Rendering Manager (DRM) - DRM bridge registration and lookup framework - Parade ps8622/ps8625 eDP/LVDS bridge - NXP ptn3460 eDP/LVDS bridge - Exynos Fully Interactive Mobile Display controller (FIMD) - Panel registration and lookup framework - Simple panels - Backlight & LCD device support - use pmu_system_controller phandle for dp phy : DP PHY requires pmu_system_controller to handle PMU reg. now Andreas Faerber (1): ARM: exynos_defconfig: Enable LM90 driver Javier Martinez Canillas (1): ARM: exynos_defconfig: Enable options for display panel support Vivek Gautam (1): arm: dts: Use pmu_system_controller phandle for dp phy arch/arm/boot/dts/exynos5250.dtsi | 2 +- arch/arm/boot/dts/exynos5420.dtsi | 4 ++-- arch/arm/configs/exynos_defconfig | 18 +- 3 files changed, 20 insertions(+), 4 deletions(-) On 01/13/15 07:11, Olof Johansson wrote: > Hi, > > On Mon, Jan 12, 2015 at 05:26:56PM +0900, Kukjin Kim wrote: >> Hi Arnd, Olof, Kevin >> >> Please pull samsung fixes for v3.19. >> >> Thanks, >> Kukjin >> >> The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672: >> >> Linux 3.19-rc1 (2014-12-20 17:08:50 -0800) >> >> are available in the git repository at: >> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git >> v3.19-samsung-fixes >> >> Andreas Faerber (1): >> ARM: exynos_defconfig: Enable LM90 driver >> >> Javier Martinez Canillas (1): >> ARM: exynos_defconfig: Enable options for display panel support >> >> Vivek Gautam (1): >> arm: dts: Use pmu_system_controller phandle for dp phy >> >> arch/arm/boot/dts/exynos5250.dtsi |2 +- >> arch/arm/boot/dts/exynos5420.dtsi |4 ++-- >> arch/arm/configs/exynos_defconfig | 18 +- >> 3 files changed, 20 insertions(+), 4 deletions(-) > > Please write a tag description and sign it. You used to do this, why stop? > > Also, you're not explaining what these patches fixes. I can see the usefulness > in the display configuration options, but I'm less sure why 3.19 needs the > LM90 > driver if it's just for consistency? > Yeah it could be but I think, updating defconfig would be helpful anytime if possible. > Finally, please explain why pmu breaks. Sounds like an incompatible binding > change? Yes, correct so it is required even though the change has been done in v3.18 not v3.19...commit a5ec59865025 (phy: exynos-dp-video: Use syscon support to control pmu register) Thanks, Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/8] thermal: Provide stub for thermal_of_cooling_device_register() function
Hi Eduardo,
> On Fri, Jan 02, 2015 at 02:54:28PM -0400, Eduardo Valentin wrote:
> > On Mon, Dec 22, 2014 at 05:27:41PM +0100, Lukasz Majewski wrote:
> > > Odroid U3 fan can work without being registered as OF cooling
> > > device (with CONFIG_THERMAL_OF disabled).
> > > In this situation it can be controlled via PWM entry at
> > > /sys/class/hwmon/hwmon0/pwm1.
> > >
> > > Therefore, the thermal_of_cooling_device_register() function
> > > needs a stub to allow clean compilation.
> > >
> > > Signed-off-by: Lukasz Majewski
> >
> > Acked-by: Eduardo Valentin
>
> Sorry, too fast,
>
> This is actually
> Nacked-by: Eduardo Valentin
>
> :-)
>
> I get this error:
> drivers/thermal/thermal_core.c:1210:1: error: redefinition of
> ‘thermal_of_cooling_device_register’
> thermal_of_cooling_device_register(struct device_node *np,
> ^
> In file included from drivers/thermal/thermal_core.c:34:0:
> include/linux/thermal.h:321:1: note: previous definition of
> ‘thermal_of_cooling_device_register’ was here
>thermal_of_cooling_device_register(struct device_node *np,
> ^
>
>
> We provide the function in thermal core even if CONFIG_THERMAL_OF is
> not set.
Unfortunately the PWM fan subsystem can work perfectly fine without
CONFIG_THERMAL.
I think that it would be enough to make something like this in
the ./include/linux/thermal.h:
#ifdef CONFIG_THERMAL
static inline struct thermal_cooling_device *
thermal_of_cooling_device_register(struct device_node
*np, char *type, void *devdata,
const struct
thermal_cooling_device_ops *ops) {
return NULL;
}
#else
[ already present declaration of
thermal_of_cooling_device_register() ]
#endif /* CONFIG_THERMAL */
> >
> > > ---
> > > Changes for v2:
> > > - None
> > > ---
> > > include/linux/thermal.h | 14 +++---
> > > 1 file changed, 11 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/include/linux/thermal.h b/include/linux/thermal.h
> > > index 2de3d9e..871123c 100644
> > > --- a/include/linux/thermal.h
> > > +++ b/include/linux/thermal.h
> > > @@ -328,6 +328,10 @@ thermal_zone_of_sensor_register(struct
> > > device *dev, int id, void *data, const struct
> > > thermal_zone_of_device_ops *ops); void
> > > thermal_zone_of_sensor_unregister(struct device *dev, struct
> > > thermal_zone_device *tz); +struct thermal_cooling_device *
> > > +thermal_of_cooling_device_register(struct device_node *np,
> > > +char *type, void *devdata,
> > > +const struct
> > > thermal_cooling_device_ops *); #else
> > > static inline struct thermal_zone_device *
> > > thermal_zone_of_sensor_register(struct device *dev, int id, void
> > > *data, @@ -342,6 +346,13 @@ void
> > > thermal_zone_of_sensor_unregister(struct device *dev, {
> > > }
> > >
> > > +static inline struct thermal_cooling_device *
> > > +thermal_of_cooling_device_register(struct device_node *np,
> > > +char *type, void *devdata,
> > > +const struct
> > > thermal_cooling_device_ops *ops) +{
> > > + return NULL;
> > > +}
> > > #endif
> > > struct thermal_zone_device *thermal_zone_device_register(const
> > > char *, int, int, void *, struct thermal_zone_device_ops *,
> > > @@ -357,9 +368,6 @@ void thermal_zone_device_update(struct
> > > thermal_zone_device *);
> > > struct thermal_cooling_device
> > > *thermal_cooling_device_register(char *, void *, const struct
> > > thermal_cooling_device_ops *); -struct thermal_cooling_device *
> > > -thermal_of_cooling_device_register(struct device_node *np, char
> > > *, void *,
> > > -const struct
> > > thermal_cooling_device_ops *); void
> > > thermal_cooling_device_unregister(struct thermal_cooling_device
> > > *); struct thermal_zone_device
> > > *thermal_zone_get_zone_by_name(const char *name); int
> > > thermal_zone_get_temp(struct thermal_zone_device *tz, unsigned
> > > long *temp); -- 2.0.0.rc2
> > >
>
>
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [PATCH 1/2] pinctrl: exynos: Add AUDIO pin controller for exynos7
Hi Linus, 2015-01-14 20:40 GMT+09:00 Linus Walleij : > On Fri, Dec 19, 2014 at 2:10 PM, Padmavathi Venna wrote: > >> Audio IPs on Exynos7 require gpios available in AUDIO >> pin controller block. So adding the AUDIO pinctrl support. >> >> Signed-off-by: Padmavathi Venna > (...) >> --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt >> +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt >> @@ -181,6 +181,7 @@ Aliases for controllers compatible with >> "samsung,exynos7-pinctrl": >> - pinctrl6: pin controller of FSYS0 block, >> - pinctrl7: pin controller of FSYS1 block, >> - pinctrl8: pin controller of BUS1 block, >> +- pinctrl9: pin controller of AUDIO block, > > This doesn't apply at all, the list has never been in the document merged > upstream. I believe this patch depends on patch [1], which was mentioned in cover letter and which you seem to have applied two days ago. If it still doesn't apply, please let me know if I should collect the patches myself and prepare a pull request for you. [1] https://patchwork.kernel.org/patch/5467321/ Best regards, Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 1/7 RESEND] PM / Domains: Add a note about power domain subdomains
On Wed, Jan 14, 2015 at 3:12 PM, Marek Szyprowski
wrote:
> This patch adds a note on defining subdomains to generic PM domain
> binding documentation to let power domain providers use common approach
> for defining power domain hierarchy.
>
> Signed-off-by: Marek Szyprowski
Acked-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
--
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[PATCH v3 1/7 RESEND] PM / Domains: Add a note about power domain subdomains
This patch adds a note on defining subdomains to generic PM domain
binding documentation to let power domain providers use common approach
for defining power domain hierarchy.
Signed-off-by: Marek Szyprowski
---
RESEND version:
- fixed spelling mistakes, thanks go to Geert!
---
.../devicetree/bindings/power/power_domain.txt | 29 ++
1 file changed, 29 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/power_domain.txt
b/Documentation/devicetree/bindings/power/power_domain.txt
index 98c1667..eeea45b 100644
--- a/Documentation/devicetree/bindings/power/power_domain.txt
+++ b/Documentation/devicetree/bindings/power/power_domain.txt
@@ -19,6 +19,16 @@ Required properties:
providing multiple PM domains (e.g. power controllers), but can be any value
as specified by device tree binding documentation of particular provider.
+Optional properties:
+ - power-domains : A phandle and PM domain specifier as defined by bindings of
+ the power controller specified by phandle.
+ Some power domains might be powered from another power domain (or have
+ other hardware specific dependencies). For representing such dependency
+ a standard PM domain consumer binding is used. When provided, all domains
+ created by the given provider should be subdomains of the domain
+ specified by this binding. More details about power domain specifier are
+ available in the next section.
+
Example:
power: power-controller@1234 {
@@ -30,6 +40,25 @@ Example:
The node above defines a power controller that is a PM domain provider and
expects one cell as its phandle argument.
+Example 2:
+
+ parent: power-controller@1234 {
+ compatible = "foo,power-controller";
+ reg = <0x1234 0x1000>;
+ #power-domain-cells = <1>;
+ };
+
+ child: power-controller@1234 {
+ compatible = "foo,power-controller";
+ reg = <0x12341000 0x1000>;
+ power-domains = <&parent 0>;
+ #power-domain-cells = <1>;
+ };
+
+The nodes above define two power controllers: 'parent' and 'child'.
+Domains created by the 'child' power controller are subdomains of '0' power
+domain provided by the 'parent' power controller.
+
==PM domain consumers==
Required properties:
--
1.9.2
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Re: [PATCH 2/9] hwmon: dts: Doc: Add DTS doc to explain how to use PWM FAN as a cooling device
Hi Sjoerd, > Hey Lukasz, > > Blame the holiday season for my late reply ;) > > On Fri, 2014-12-19 at 17:13 +0100, Lukasz Majewski wrote: > > Hi Guenter, > > > > > On Fri, Dec 19, 2014 at 04:32:24PM +0100, Lukasz Majewski wrote: > > > > Hi Sjoerd, > > > > > > > > Thanks for your feedback and sorry for a late reply. > > > > > > > > > On Thu, 2014-12-18 at 11:13 +0100, Lukasz Majewski wrote: > > > > > > Several new properties to allow PWM fan working as a cooling > > > > > > device have been combined into this single commit. > > > > > > > > > > > > Signed-off-by: Lukasz Majewski > > > > > > --- > > > > > > .../devicetree/bindings/hwmon/pwm-fan.txt | 28 > > > > > > ++ 1 file changed, 28 insertions(+) > > > > > > > > > > > > diff --git > > > > > > a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt > > > > > > b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt index > > > > > > 610757c..3877810 100644 --- > > > > > > a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt +++ > > > > > > b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt @@ > > > > > > -3,10 +3,38 @@ Bindings for a fan connected to the PWM > > > > > > lines Required properties: > > > > > > - compatible : "pwm-fan" > > > > > > - pwms : the PWM that is used to control the > > > > > > PWM fan +- cooling-pwm-values : PWM duty cycle values > > > > > > relative to > > > > > > + cooling-max-pwm-value > > > > > > correspondig to > > > > > > + proper cooling states > > > > > > +- default-pulse-width : Property specifying default > > > > > > pulse width for FAN > > > > > > + at system boot (zero to disable > > > > > > FAN on boot). > > > > > > + Allowed range is 0 to 255 > > > > > > > > > > The 0..255 range seems somewhat random. Would be nicer to > > > > > either use the approach of pwm-backlight (iotw, have the > > > > > range go from the first to the last entry of > > > > > cooling-pwm-values) > > > > > > > > I'm OK to change the default-pulse-width to be similar to > > > > "default-brightness-level" (as it is in > > > > Documentation/devicetree/bindings/video/backlight/pwm-backlight.txt) > > > > > > > > > or simply have be the duty > > > > > lenght in NS as entries instead of the current indirection. > > > > > > > > I'd prefer to keep the indirection - as it is utilized in the > > > > current pwm-fan.c driver. > > > > > > > FWIW, devicetree information is supposed to be implementation > > > independent. So this is a poor argument. > > > > Many other pwm drivers use the indirection - e.g. mentioned > > pwm-backlight. > > I don't specifically mind the indirection, i was just thinking out > loud whether it added value (but if it's quite common, might indeed > be good to keep the pattern). What i do dislike is the number of > levels is being set to an arbitrary levels, as that will very rarely > match the actual number of distinct pwm levels you > > One thing though, when following the pattern of the pwm-backlight > driver; In pwm-backlight the highest index of brightness-levels is > always 100% duty cycle.. On e.g. XU3 the vendor kernel never drives > the fan at 100% duty (maximum of 91%). So it would be nice if the dt > bindigns could model that e.g. by having: > > pwm-levels = <20>; // 21 distinct pwm levels > valid-pwm-level = <5 15 18>; /* 5 15 and 18 are usable levels - pwm > will default to highest level */ > Could you review v2 of this patch series? http://www.spinics.net/lists/devicetree/msg63159.html > > > > > Enabling pan to full RPM was the default behaviour in the > > > > current pwm-fan.c file. > > > > > > > > To be honest, there is no need to enable fan to full RPM speed > > > > in this board for following reasons: > > > > 1. In Odroid the FAN is optional (stacked on top of a heat > > > > sink) - very often it is just enough to only have the heat sink. > > > > > > > > 2. Odroid has thermal enabled by default and IMHO it would be > > > > more feasible to allow thermal to control fan from the very > > > > beginning. > > > > > > > > However, I can also understand if the policy for hwmon implies a > > > > rule to enable by default all fans to full RPM speed. > > > > > > > Why and how does that all suggest that the current default > > > behavior should be changed ? > > > > I wanted to avoid the unpleasant sound for full speed fan when > > thermal is not enabled by default. > > > > But as I said, I fully understand the policy and I would be happy to > > comply with it as thermal should reduce the fan speed anyway at boot > > time. > > Yeah, what happens on my XU3 is that u-boot sets the pwm to 100% duty > and the thermal infrastructure turns it off as soon as it gets into > control, which works quite nicely (and keeps my sanity as that fan at > 100% is *loud*)... So if you want to avoid unpleasant sounds, just > build with thermal :p > > -- Best regards, L
Re: [PATCH v3 1/7] PM / Domains: Add a note about power domain subdomains
Hi Marek,
On Wed, Jan 14, 2015 at 2:44 PM, Marek Szyprowski
wrote:
> This patch adds a note on defining subdomains to generic PM domain
> binding documentation to let power domain providers use common approach
> for defining power domain hierarchy.
Thanks!
> Signed-off-by: Marek Szyprowski
> ---
> .../devicetree/bindings/power/power_domain.txt | 29
> ++
> 1 file changed, 29 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/power/power_domain.txt
> b/Documentation/devicetree/bindings/power/power_domain.txt
> index 98c1667..eeea45b 100644
> --- a/Documentation/devicetree/bindings/power/power_domain.txt
> +++ b/Documentation/devicetree/bindings/power/power_domain.txt
> @@ -19,6 +19,16 @@ Required properties:
> providing multiple PM domains (e.g. power controllers), but can be any
> value
> as specified by device tree binding documentation of particular provider.
>
> +Optional properties:
> + - power-domains : A phandle and PM domain specifier as defined by bindings
> of
> + the power controller specified by phandle.
> + Some power domains might be powered from other power domain (or have
s/other/another/
> + other hardware specific dependency). For representing such dependency
s/dependency/dependencies/ (twice)
> + a standard PM domain consumer binging is used. When provided, all domains
binding
> + created by the given provider should be a subdomain of the domain
s/a subdomain/subdomains/
> + specified by this binding. More details about power domain specifier is
s/is/are/
> + available in the the next section.
duplicate "the"
> +
> Example:
>
> power: power-controller@1234 {
> @@ -30,6 +40,25 @@ Example:
> The node above defines a power controller that is a PM domain provider and
> expects one cell as its phandle argument.
>
> +Example 2:
> +
> + parent: power-controller@1234 {
> + compatible = "foo,power-controller";
> + reg = <0x1234 0x1000>;
> + #power-domain-cells = <1>;
> + };
> +
> + child: power-controller@1234 {
> + compatible = "foo,power-controller";
> + reg = <0x12341000 0x1000>;
> + power-domains = <&parent 0>;
> + #power-domain-cells = <1>;
> + };
> +
> +The nodes above defines two power controllers: 'parent' and 'child'.
s/defines/define/
> +Domains created by 'child' power controller are subdomains of '0' power
the 'child' power controller
> +domain provided by 'parent' power controller.
the 'parent' power controller.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
--
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[PATCH v3 16/16] thermal: exynos: Remove exynos_tmu_data.c file
Data already present in the exynos_tmu_data.c file has been moved to the
appropriate device tree files.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- None
---
drivers/thermal/samsung/exynos_tmu_data.c | 228 --
1 file changed, 228 deletions(-)
delete mode 100644 drivers/thermal/samsung/exynos_tmu_data.c
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
deleted file mode 100644
index a993f3d..000
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ /dev/null
@@ -1,228 +0,0 @@
-/*
- * exynos_tmu_data.c - Samsung EXYNOS tmu data file
- *
- * Copyright (C) 2013 Samsung Electronics
- * Amit Daniel Kachhap
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include "exynos_thermal_common.h"
-#include "exynos_tmu.h"
-
-struct exynos_tmu_init_data const exynos4210_default_tmu_data = {
- .tmu_data = {
- {
- .threshold = 80,
- .trigger_levels[0] = 5,
- .trigger_levels[1] = 20,
- .trigger_levels[2] = 30,
- .trigger_enable[0] = true,
- .trigger_enable[1] = true,
- .trigger_enable[2] = true,
- .trigger_enable[3] = false,
- .trigger_type[0] = THROTTLE_ACTIVE,
- .trigger_type[1] = THROTTLE_ACTIVE,
- .trigger_type[2] = SW_TRIP,
- .max_trigger_level = 4,
- .non_hw_trigger_levels = 3,
- .gain = 15,
- .reference_voltage = 7,
- .cal_type = TYPE_ONE_POINT_TRIMMING,
- .min_efuse_value = 40,
- .max_efuse_value = 100,
- .first_point_trim = 25,
- .second_point_trim = 85,
- .default_temp_offset = 50,
- .type = SOC_ARCH_EXYNOS4210,
- },
- },
- .tmu_count = 1,
-};
-
-#define EXYNOS3250_TMU_DATA \
- .threshold_falling = 10, \
- .trigger_levels[0] = 70, \
- .trigger_levels[1] = 95, \
- .trigger_levels[2] = 110, \
- .trigger_levels[3] = 120, \
- .trigger_enable[0] = true, \
- .trigger_enable[1] = true, \
- .trigger_enable[2] = true, \
- .trigger_enable[3] = false, \
- .trigger_type[0] = THROTTLE_ACTIVE, \
- .trigger_type[1] = THROTTLE_ACTIVE, \
- .trigger_type[2] = SW_TRIP, \
- .trigger_type[3] = HW_TRIP, \
- .max_trigger_level = 4, \
- .non_hw_trigger_levels = 3, \
- .gain = 8, \
- .reference_voltage = 16, \
- .noise_cancel_mode = 4, \
- .cal_type = TYPE_TWO_POINT_TRIMMING, \
- .efuse_value = 55, \
- .min_efuse_value = 40, \
- .max_efuse_value = 100, \
- .first_point_trim = 25, \
- .second_point_trim = 85, \
- .default_temp_offset = 50
-
-struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
- .tmu_data = {
- {
- EXYNOS3250_TMU_DATA,
- .type = SOC_ARCH_EXYNOS3250,
- },
- },
- .tmu_count = 1,
-};
-
-#define EXYNOS4412_TMU_DATA \
- .threshold_falling = 10, \
- .trigger_levels[0] = 70, \
- .trigger_levels[1] = 95, \
- .trigger_levels[2] = 110, \
- .trigger_levels[3] = 120, \
- .trigger_enable[0] = true, \
- .trigger_enable[1] = true, \
- .trigger_enable[2] = true, \
- .trigger_enable[3] = false, \
- .trigger_type[0] = THROTTLE_ACTIVE, \
- .trigger_type[1] = THROTTLE_ACTIVE, \
- .trigger_type[2] = SW_TRIP, \
- .trigger_type[3] = HW_TRIP, \
- .max_trigger_level = 4, \
- .non_hw_trigger_levels = 3, \
- .gain = 8, \
- .reference_voltage = 16, \
- .noise_cancel_mode = 4, \
- .cal_type = TYPE_ONE_POINT_TRIMMING, \
- .efuse_value = 55, \
- .min_efuse_value = 40, \
- .max_efuse_value = 100, \
- .first_point_trim = 25, \
- .second_point_trim = 85, \
- .default_temp_offset = 50
-
-struct exynos_tmu_init_data const exynos4412_default_tmu_data = {
- .tmu_data = {
- {
- EXYNOS4412_TMU_DATA,
- .type = SOC_ARCH_EXYNOS4412,
- },
- },
-
[PATCH v3 15/16] thermal: exynos: Remove exynos_thermal_common.[c|h] files
After defining all necessary Exynos data in the device tree and heavy
reusage of the of-thermal.c those files can be removed.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- None
---
drivers/thermal/samsung/exynos_thermal_common.c | 445
drivers/thermal/samsung/exynos_thermal_common.h | 106 --
2 files changed, 551 deletions(-)
delete mode 100644 drivers/thermal/samsung/exynos_thermal_common.c
delete mode 100644 drivers/thermal/samsung/exynos_thermal_common.h
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
deleted file mode 100644
index 00aa688..000
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ /dev/null
@@ -1,445 +0,0 @@
-/*
- * exynos_thermal_common.c - Samsung EXYNOS common thermal file
- *
- * Copyright (C) 2013 Samsung Electronics
- * Amit Daniel Kachhap
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include
-#include
-#include
-#include
-
-#include "exynos_thermal_common.h"
-
-struct exynos_thermal_zone {
- enum thermal_device_mode mode;
- struct thermal_zone_device *therm_dev;
- struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
- unsigned int cool_dev_size;
- struct platform_device *exynos4_dev;
- struct thermal_sensor_conf *sensor_conf;
- bool bind;
-};
-
-/* Get mode callback functions for thermal zone */
-static int exynos_get_mode(struct thermal_zone_device *thermal,
- enum thermal_device_mode *mode)
-{
- struct exynos_thermal_zone *th_zone = thermal->devdata;
- if (th_zone)
- *mode = th_zone->mode;
- return 0;
-}
-
-/* Set mode callback functions for thermal zone */
-static int exynos_set_mode(struct thermal_zone_device *thermal,
- enum thermal_device_mode mode)
-{
- struct exynos_thermal_zone *th_zone = thermal->devdata;
- if (!th_zone) {
- dev_err(&thermal->device,
- "thermal zone not registered\n");
- return 0;
- }
-
- mutex_lock(&thermal->lock);
-
- if (mode == THERMAL_DEVICE_ENABLED &&
- !th_zone->sensor_conf->trip_data.trigger_falling)
- thermal->polling_delay = IDLE_INTERVAL;
- else
- thermal->polling_delay = 0;
-
- mutex_unlock(&thermal->lock);
-
- th_zone->mode = mode;
- thermal_zone_device_update(thermal);
- dev_dbg(th_zone->sensor_conf->dev,
- "thermal polling set for duration=%d msec\n",
- thermal->polling_delay);
- return 0;
-}
-
-
-/* Get trip type callback functions for thermal zone */
-static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
-enum thermal_trip_type *type)
-{
- struct exynos_thermal_zone *th_zone = thermal->devdata;
- int max_trip = th_zone->sensor_conf->trip_data.trip_count;
- int trip_type;
-
- if (trip < 0 || trip >= max_trip)
- return -EINVAL;
-
- trip_type = th_zone->sensor_conf->trip_data.trip_type[trip];
-
- if (trip_type == SW_TRIP)
- *type = THERMAL_TRIP_CRITICAL;
- else if (trip_type == THROTTLE_ACTIVE)
- *type = THERMAL_TRIP_ACTIVE;
- else if (trip_type == THROTTLE_PASSIVE)
- *type = THERMAL_TRIP_PASSIVE;
- else
- return -EINVAL;
-
- return 0;
-}
-
-/* Get trip temperature callback functions for thermal zone */
-static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
- unsigned long *temp)
-{
- struct exynos_thermal_zone *th_zone = thermal->devdata;
- int max_trip = th_zone->sensor_conf->trip_data.trip_count;
-
- if (trip < 0 || trip >= max_trip)
- return -EINVAL;
-
- *temp = th_zone->sensor_conf->trip_data.trip_val[trip];
- /* convert the temperature into millicelsius */
- *temp = *temp * MCELSIUS;
-
- return 0;
-}
-
-/* Get critical temperature callback functions for thermal zone */
-static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
- unsigned long *temp)
-{
- struct exy
[PATCH v3 14/16] thermal: samsung: core: Exynos TMU rework to use device tree for configuration
This patch brings support for providing configuration via device tree.
Previously this data has been hardcoded in the exynos_tmu_data.c file.
Such approach was not scalable and very often required copying the whole
data.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- Adjust exynos_tmu.c code to the newest ti-soc-thermal repository
- Usage of of-thermal.c exported trip points table
Changes for v3:
- Adding exynos_of_get_soc_type() method to set SOC type from device's
compatible string
- "samsung,tmu_" prefix for TMU specific properties has been added
---
drivers/thermal/samsung/Makefile | 2 -
drivers/thermal/samsung/exynos_tmu.c | 345 +++
drivers/thermal/samsung/exynos_tmu.h | 53 +-
3 files changed, 226 insertions(+), 174 deletions(-)
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
index c09d830..1e47d0d 100644
--- a/drivers/thermal/samsung/Makefile
+++ b/drivers/thermal/samsung/Makefile
@@ -3,5 +3,3 @@
#
obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
exynos_thermal-y := exynos_tmu.o
-exynos_thermal-y += exynos_tmu_data.o
-exynos_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index ae30f6a..633a9e2 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -1,6 +1,10 @@
/*
* exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
*
+ * Copyright (C) 2014 Samsung Electronics
+ * Bartlomiej Zolnierkiewicz
+ * Lukasz Majewski
+ *
* Copyright (C) 2011 Samsung Electronics
* Donggeun Kim
* Amit Daniel Kachhap
@@ -31,8 +35,8 @@
#include
#include
-#include "exynos_thermal_common.h"
#include "exynos_tmu.h"
+#include "../thermal_core.h"
/* Exynos generic registers */
#define EXYNOS_TMU_REG_TRIMINFO0x0
@@ -115,6 +119,7 @@
#define EXYNOS5440_TMU_TH_RISE4_SHIFT 24
#define EXYNOS5440_EFUSE_SWAP_OFFSET 8
+#define MCELSIUS 1000
/**
* struct exynos_tmu_data : A structure to hold the private data of the TMU
driver
@@ -150,7 +155,8 @@ struct exynos_tmu_data {
struct clk *clk, *clk_sec;
u8 temp_error1, temp_error2;
struct regulator *regulator;
- struct thermal_sensor_conf *reg_conf;
+ struct thermal_zone_device *tzd;
+
int (*tmu_initialize)(struct platform_device *pdev);
void (*tmu_control)(struct platform_device *pdev, bool on);
int (*tmu_read)(struct exynos_tmu_data *data);
@@ -159,6 +165,33 @@ struct exynos_tmu_data {
void (*tmu_clear_irqs)(struct exynos_tmu_data *data);
};
+static void exynos_report_trigger(struct exynos_tmu_data *p)
+{
+ char data[10], *envp[] = { data, NULL };
+ struct thermal_zone_device *tz = p->tzd;
+ unsigned long temp;
+ unsigned int i;
+
+ if (!p) {
+ pr_err("Wrong temperature configuration data\n");
+ return;
+ }
+
+ thermal_zone_device_update(tz);
+
+ mutex_lock(&tz->lock);
+ /* Find the level for which trip happened */
+ for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
+ tz->ops->get_trip_temp(tz, i, &temp);
+ if (tz->last_temperature < temp)
+ break;
+ }
+
+ snprintf(data, sizeof(data), "%u", i);
+ kobject_uevent_env(&tz->device.kobj, KOBJ_CHANGE, envp);
+ mutex_unlock(&tz->lock);
+}
+
/*
* TMU treats temperature as a mapped temperature code.
* The temperature is converted differently depending on the calibration type.
@@ -234,14 +267,25 @@ static void sanitize_temp_error(struct exynos_tmu_data
*data, u32 trim_info)
static u32 get_th_reg(struct exynos_tmu_data *data, u32 threshold, bool
falling)
{
- struct exynos_tmu_platform_data *pdata = data->pdata;
+ struct thermal_zone_device *tz = data->tzd;
+ const struct thermal_trip * const trips =
+ of_thermal_get_trip_points(tz);
+ unsigned long temp;
int i;
- for (i = 0; i < pdata->non_hw_trigger_levels; i++) {
- u8 temp = pdata->trigger_levels[i];
+ if (!trips) {
+ pr_err("%s: Cannot get trip points from of-thermal.c!\n",
+ __func__);
+ return 0;
+ }
+
+ for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
+ if (trips[i].type == THERMAL_TRIP_CRITICAL)
+ continue;
+ temp = trips[i].temperature / MCELSIUS;
if (falling)
- temp -= pdata->threshold_falling;
+ temp -= (trips[i].hysteresis / MCELSIUS);
else
threshold &= ~(0xff << 8 * i);
@@ -305,9 +349,19 @@ static void exynos_tmu_control(struct platform_device
*pdev, bool on)
[PATCH v3 13/16] thermal: exynos: dts: Provide device tree bindings identical to the one in exynos_tmu_data.c
Presented device tree bindings provide data already hardcoded in the
exynos_tmu_data.c file.
After this commit, it should be possible to reuse common thermal core
framework in Exynos SoCs.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- Add proper TMU entries for exynos3250.dtsi
Changes for v3:
- Remove "type" DT properties, which will be extracted from compatible
- "samsung,tmu_" prefix for TMU specific properties has been added
---
arch/arm/boot/dts/exynos3250.dtsi | 2 ++
arch/arm/boot/dts/exynos4.dtsi| 4
arch/arm/boot/dts/exynos4210.dtsi | 21 -
arch/arm/boot/dts/exynos4x12.dtsi | 1 +
arch/arm/boot/dts/exynos5250.dtsi | 5 +++--
arch/arm/boot/dts/exynos5420.dtsi | 28
arch/arm/boot/dts/exynos5440.dtsi | 18 ++
7 files changed, 76 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 2246549..8cc078c 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -18,6 +18,7 @@
*/
#include "skeleton.dtsi"
+#include "exynos4-cpu-thermal.dtsi"
#include
/ {
@@ -188,6 +189,7 @@
interrupts = <0 216 0>;
clocks = <&cmu CLK_TMU_APBIF>;
clock-names = "tmu_apbif";
+ #include "exynos4412-tmu-sensor-conf.dtsi"
status = "disabled";
};
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index b8168f1..f18d746 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -645,4 +645,8 @@
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
+
+ tmu: tmu@100C {
+ #include "exynos4412-tmu-sensor-conf.dtsi"
+ };
};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index 2e66df8..7f0e012 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
#include "exynos4.dtsi"
#include "exynos4210-pinctrl.dtsi"
+#include "exynos4-cpu-thermal.dtsi"
/ {
compatible = "samsung,exynos4210", "samsung,exynos4";
@@ -146,16 +147,34 @@
reg = <0x0386 0x1000>;
};
- tmu@100C {
+ tmu: tmu@100C {
compatible = "samsung,exynos4210-tmu";
interrupt-parent = <&combiner>;
reg = <0x100C 0x100>;
interrupts = <2 4>;
clocks = <&clock CLK_TMU_APBIF>;
clock-names = "tmu_apbif";
+ samsung,tmu_gain = <15>;
+ samsung,tmu_reference_voltage = <7>;
status = "disabled";
};
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ trips {
+ cpu_alert0: cpu-alert-0 {
+ temperature = <85000>; /* millicelsius */
+ };
+ cpu_alert1: cpu-alert-1 {
+ temperature = <10>; /* millicelsius */
+ };
+ cpu_alert2: cpu-alert-2 {
+ temperature = <11>; /* millicelsius */
+ };
+ };
+ };
+ };
+
g2d@1280 {
compatible = "samsung,s5pv210-g2d";
reg = <0x1280 0x1000>;
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi
b/arch/arm/boot/dts/exynos4x12.dtsi
index 93b7040..3ee2031 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
#include "exynos4.dtsi"
#include "exynos4x12-pinctrl.dtsi"
+#include "exynos4-cpu-thermal.dtsi"
/ {
aliases {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index dd5c3a0..07fd73a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,7 +20,7 @@
#include
#include "exynos5.dtsi"
#include "exynos5250-pinctrl.dtsi"
-
+#include "exynos4-cpu-thermal.dtsi"
#include
/ {
@@ -236,12 +236,13 @@
status = "disabled";
};
- tmu@1006 {
+ tmu: tmu@1006 {
compatible = "samsung,exynos5250-tmu";
reg = <0x1006 0x100>;
interrupts = <0 65 0>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
thermal-zones {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index 517e50f..f5771e5 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -761,6 +761,7 @@
interrupts = <0 65 0>;
clocks = <&clock CLK_TMU>;
[PATCH v3 12/16] thermal: dts: exynos: Trip points and sensor configuration data for Exynos5440
This commit provides information about Exynos5440 device configuration.
Previously this information was available in exynos_tmu_data.c file.
Now it is available in the device tree.
Such approach allows reusing some common code for thermal.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- "type" property removed
- "samsung,tmu_" prefix for TMU specific properties has been added
---
arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi | 24 ++
arch/arm/boot/dts/exynos5440-trip-points.dtsi | 25 +++
2 files changed, 49 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
create mode 100644 arch/arm/boot/dts/exynos5440-trip-points.dtsi
diff --git a/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
new file mode 100644
index 000..7b2fba0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
+/*
+ * Device tree sources for Exynos5440 TMU sensor configuration
+ *
+ * Copyright (c) 2014 Lukasz Majewski
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+
+#thermal-sensor-cells = <0>;
+samsung,tmu_gain = <5>;
+samsung,tmu_reference_voltage = <16>;
+samsung,tmu_noise_cancel_mode = <4>;
+samsung,tmu_efuse_value = <0x5d2d>;
+samsung,tmu_min_efuse_value = <16>;
+samsung,tmu_max_efuse_value = <76>;
+samsung,tmu_first_point_trim = <25>;
+samsung,tmu_second_point_trim = <70>;
+samsung,tmu_default_temp_offset = <25>;
+samsung,tmu_cal_type = ;
diff --git a/arch/arm/boot/dts/exynos5440-trip-points.dtsi
b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
new file mode 100644
index 000..48adfa8
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Device tree sources for default Exynos5440 thermal zone definition
+ *
+ * Copyright (c) 2014 Lukasz Majewski
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+polling-delay-passive = <0>;
+polling-delay = <0>;
+trips {
+ cpu-alert-0 {
+ temperature = <10>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "active";
+ };
+ cpu-crit-0 {
+ temperature = <105>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+};
--
2.0.0.rc2
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[PATCH v3 09/16] dts: Documentation: Extending documentation entry for exynos-thermal
Properties necessary for providing Exynos thermal configuration via device
tree.
Signed-off-by: Lukasz Majewski
---
Changes for v3:
- New patch
---
.../devicetree/bindings/thermal/exynos-thermal.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index ae738f5..0f44932 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -39,6 +39,18 @@
- vtmu-supply: This entry is optional and provides the regulator node supplying
voltage to TMU. If needed this entry can be placed inside
board/platform specific dts file.
+Following properties are mandatory (depending on SoC):
+- samsung,tmu_gain: Gain value for internal TMU operation.
+- samsung,tmu_reference_voltage: Value of TMU IP block's reference voltage
+- samsung,tmu_noise_cancel_mode: Mode for noise cancellation
+- samsung,tmu_efuse_value: Default level of temperature - it is needed when
+ in factory fusing produced wrong value
+- samsung,tmu_min_efuse_value: Minimum temperature fused value
+- samsung,tmu_max_efuse_value: Maximum temperature fused value
+- samsung,tmu_first_point_trim: First point trimming value
+- samsung,tmu_second_point_trim: Second point trimming value
+- samsung,tmu_default_temp_offset: Default temperature offset
+- samsung,tmu_cal_type: Callibration type
Example 1):
@@ -51,6 +63,7 @@ Example 1):
clock-names = "tmu_apbif";
status = "disabled";
vtmu-supply = <&tmu_regulator_node>;
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
Example 2):
@@ -61,6 +74,7 @@ Example 2):
interrupts = <0 58 0>;
clocks = <&clock 21>;
clock-names = "tmu_apbif";
+ #include "exynos5440-tmu-sensor-conf.dtsi"
};
Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
@@ -70,6 +84,7 @@ Example 3): (In case of Exynos5420 "with misplaced TRIMINFO
register")
interrupts = <0 184 0>;
clocks = <&clock 318>, <&clock 318>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
tmu_cpu3: tmu@1006c000 {
@@ -78,6 +93,7 @@ Example 3): (In case of Exynos5420 "with misplaced TRIMINFO
register")
interrupts = <0 185 0>;
clocks = <&clock 318>, <&clock 319>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
tmu_gpu: tmu@100a {
@@ -86,6 +102,7 @@ Example 3): (In case of Exynos5420 "with misplaced TRIMINFO
register")
interrupts = <0 215 0>;
clocks = <&clock 319>, <&clock 318>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+ #include "exynos4412-tmu-sensor-conf.dtsi"
};
Note: For multi-instance tmu each instance should have an alias correctly
--
2.0.0.rc2
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[PATCH v3 11/16] thermal: exynos: dts: Define default thermal-zones for Exynos4
Trip points corresponding to the one defined in the exynos_tmu_data.c
for Exynos4 have been included.
This thermal-zones attribute is afterwards reused for Exynos4210, Exynos4412
and Exynos5250.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- None
---
arch/arm/boot/dts/exynos4-cpu-thermal.dtsi | 52 ++
1 file changed, 52 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
diff --git a/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
new file mode 100644
index 000..506600a
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
@@ -0,0 +1,52 @@
+/*
+ * Device tree sources for Exynos4 thermal zone
+ *
+ * Copyright (c) 2014 Lukasz Majewski
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+
+/ {
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ thermal-sensors = <&tmu 0>;
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ trips {
+ cpu_alert0: cpu-alert-0 {
+ temperature = <7>; /* millicelsius */
+ hysteresis = <1>; /* millicelsius */
+ type = "active";
+ };
+ cpu_alert1: cpu-alert-1 {
+ temperature = <95000>; /* millicelsius */
+ hysteresis = <1>; /* millicelsius */
+ type = "active";
+ };
+ cpu_alert2: cpu-alert-2 {
+ temperature = <11>; /* millicelsius */
+ hysteresis = <1>; /* millicelsius */
+ type = "active";
+ };
+ cpu_crit0: cpu-crit-0 {
+ temperature = <12>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ };
+ map1 {
+ trip = <&cpu_alert1>;
+ };
+ };
+ };
+ };
+};
--
2.0.0.rc2
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[PATCH v3 10/16] thermal: dts: Default trip points definition for Exynos5420 SoCs
This code groups in one place default settings of trip points. It is used
in SoCs with multiple instances of TMU sensor.
Separate device tree file prevents from multiple copying of the same data.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- None
---
arch/arm/boot/dts/exynos5420-trip-points.dtsi | 35 +++
1 file changed, 35 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5420-trip-points.dtsi
diff --git a/arch/arm/boot/dts/exynos5420-trip-points.dtsi
b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
new file mode 100644
index 000..09d6c56
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
@@ -0,0 +1,35 @@
+/*
+ * Device tree sources for default Exynos 5420 thermal zone definition
+ *
+ * Copyright (c) 2014 Lukasz Majewski
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+polling-delay-passive = <0>;
+polling-delay = <0>;
+trips {
+ cpu-alert-0 {
+ temperature = <85000>; /* millicelsius */
+ hysteresis = <1>; /* millicelsius */
+ type = "active";
+ };
+ cpu-alert-1 {
+ temperature = <103000>; /* millicelsius */
+ hysteresis = <1>; /* millicelsius */
+ type = "active";
+ };
+ cpu-alert-2 {
+ temperature = <11>; /* millicelsius */
+ hysteresis = <1>; /* millicelsius */
+ type = "active";
+ };
+ cpu-crit-0 {
+ temperature = <120>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+};
--
2.0.0.rc2
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[PATCH v3 08/16] thermal: exynos: dts: Add default definition of the TMU sensor parameter
Exynos 4 and 5 family of SoCs uses almost identical TMU sensor to measure the on chip temperature. For this reason it is possible to group TMU configuration parameters in one dts file. Signed-off-by: Lukasz Majewski --- Changes for v2: - None Changes for v3: - "samsung,tmu_" prefix for TMU specific properties has been added --- arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi | 24 +++ 1 file changed, 24 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi diff --git a/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi new file mode 100644 index 000..e3f7934 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi @@ -0,0 +1,24 @@ +/* + * Device tree sources for Exynos4412 TMU sensor configuration + * + * Copyright (c) 2014 Lukasz Majewski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include + +#thermal-sensor-cells = <0>; +samsung,tmu_gain = <8>; +samsung,tmu_reference_voltage = <16>; +samsung,tmu_noise_cancel_mode = <4>; +samsung,tmu_efuse_value = <55>; +samsung,tmu_min_efuse_value = <40>; +samsung,tmu_max_efuse_value = <100>; +samsung,tmu_first_point_trim = <25>; +samsung,tmu_second_point_trim = <85>; +samsung,tmu_default_temp_offset = <50>; +samsung,tmu_cal_type = ; -- 2.0.0.rc2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 07/16] thermal: exynos: Modify exynos thermal code to use device tree for cpu cooling configuration
Up till now exynos_tmu_data.c was used for storing CPU cooling configuration
data. Now the Exynos thermal core code uses device tree to get this data.
For this purpose generic thermal code for configuring CPU cooling was
used.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- Rewrite code responsible for registering CPU cooling device to not depend
on explicit "/cpus/cpu@0" path since now Exynos SoCs use new cpu node
names (e.g. cpu@A00). New approach iterates over "cpus" node children.
- Patch title changed to thermal: exynos
---
drivers/cpufreq/exynos-cpufreq.c| 30 +-
drivers/thermal/samsung/exynos_thermal_common.c | 122 ++--
drivers/thermal/samsung/exynos_tmu.c| 7 --
drivers/thermal/samsung/exynos_tmu.h| 5 -
drivers/thermal/samsung/exynos_tmu_data.c | 42 +---
5 files changed, 101 insertions(+), 105 deletions(-)
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index f99a0b0..32bc64d 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -18,10 +18,13 @@
#include
#include
#include
+#include
+#include
#include "exynos-cpufreq.h"
static struct exynos_dvfs_info *exynos_info;
+static struct thermal_cooling_device *cdev;
static struct regulator *arm_regulator;
static unsigned int locking_frequency;
@@ -156,6 +159,7 @@ static struct cpufreq_driver exynos_driver = {
static int exynos_cpufreq_probe(struct platform_device *pdev)
{
+ struct device_node *cpus, *np;
int ret = -EINVAL;
exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
@@ -198,9 +202,31 @@ static int exynos_cpufreq_probe(struct platform_device
*pdev)
/* Done here as we want to capture boot frequency */
locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
- if (!cpufreq_register_driver(&exynos_driver))
- return 0;
+ if (cpufreq_register_driver(&exynos_driver))
+ goto err;
+ cpus = of_find_node_by_path("/cpus");
+ if (!cpus) {
+ pr_err("failed to find cpus node\n");
+ return -ENOENT;
+ }
+
+ for (np = of_get_next_child(cpus, NULL); np;
+of_node_put(np), np = of_get_next_child(cpus, np)) {
+ if (of_find_property(np, "#cooling-cells", NULL)) {
+ cdev = of_cpufreq_cooling_register(np,
+ cpu_present_mask);
+ if (IS_ERR(cdev))
+ pr_err("running cpufreq without cooling device:
%ld\n",
+ PTR_ERR(cdev));
+ break;
+ }
+ }
+ of_node_put(np);
+ of_node_put(cpus);
+
+ return 0;
+ err:
dev_err(&pdev->dev, "failed to register cpufreq driver\n");
regulator_put(arm_regulator);
err_vdd_arm:
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 6dc3815..00aa688 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -133,47 +133,62 @@ static int exynos_get_crit_temp(struct
thermal_zone_device *thermal,
static int exynos_bind(struct thermal_zone_device *thermal,
struct thermal_cooling_device *cdev)
{
- int ret = 0, i, tab_size, level;
- struct freq_clip_table *tab_ptr, *clip_data;
struct exynos_thermal_zone *th_zone = thermal->devdata;
struct thermal_sensor_conf *data = th_zone->sensor_conf;
+ struct device_node *child, *gchild, *np;
+ struct of_phandle_args cooling_spec;
+ unsigned long max, state = 0;
+ int ret = 0, i = 0;
- tab_ptr = (struct freq_clip_table *)data->cooling_data.freq_data;
- tab_size = data->cooling_data.freq_clip_count;
-
- if (tab_ptr == NULL || tab_size == 0)
+ /*
+* Below code is necessary to skip binding when cpufreq's
+* frequency table is not yet initialized.
+*/
+ cdev->ops->get_max_state(cdev, &state);
+ if (!state && !th_zone->cool_dev_size) {
+ th_zone->cool_dev_size = 1;
+ th_zone->cool_dev[0] = cdev;
+ th_zone->bind = false;
return 0;
+ }
- /* find the cooling device registered*/
- for (i = 0; i < th_zone->cool_dev_size; i++)
- if (cdev == th_zone->cool_dev[i])
- break;
+ np = of_find_node_by_path("/thermal-zones/cpu-thermal");
+ if (!np) {
+ pr_err("failed to find thmerla-zones/cpu-thermal node\n");
+ return -ENOENT;
+ }
- /* No matching cooling device */
- if (i == th_zone->cool_dev_size)
- return 0;
+ child = of_get_child_by_name(np, "cooling-maps");
- /* Bi
[PATCH v3 6/7] ARM: dts: exynos4210-universal_c210: enable hdmi support
From: Tomasz Stanislawski
This patch adds configuration of hw modules required to enable HDMI
support on Universal C210 board.
Signed-off-by: Tomasz Stanislawski
Signed-off-by: Marek Szyprowski
---
arch/arm/boot/dts/exynos4210-universal_c210.dts | 57 +
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index aaf0cae..01f7d3c 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -503,6 +503,63 @@
assigned-clock-rates = <0>, <16000>;
};
};
+
+ hdmi_en: voltage-regulator-hdmi-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "HDMI_5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = <&gpe0 1 0>;
+ enable-active-high;
+ };
+
+ hdmi_ddc: i2c-ddc {
+ compatible = "i2c-gpio";
+ gpios = <&gpe4 2 0 &gpe4 3 0>;
+ i2c-gpio,delay-us = <100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-0 = <&i2c_ddc_bus>;
+ pinctrl-names = "default";
+ status = "okay";
+ };
+
+ mixer@12C1 {
+ status = "okay";
+ };
+
+ hdmi@12D0 {
+ hpd-gpio = <&gpx3 7 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_hpd>;
+ hdmi-en-supply = <&hdmi_en>;
+ vdd-supply = <&ldo3_reg>;
+ vdd_osc-supply = <&ldo4_reg>;
+ vdd_pll-supply = <&ldo3_reg>;
+ ddc = <&hdmi_ddc>;
+ status = "okay";
+ };
+
+ i2c@138E {
+ status = "okay";
+ };
+};
+
+&pinctrl_1 {
+ hdmi_hpd: hdmi-hpd {
+ samsung,pins = "gpx3-7";
+ samsung,pin-pud = <0>;
+ };
+};
+
+&pinctrl_0 {
+ i2c_ddc_bus: i2c-ddc-bus {
+ samsung,pins = "gpe4-2", "gpe4-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <0>;
+ };
};
&mdma1 {
--
1.9.2
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[PATCH v3 1/7] PM / Domains: Add a note about power domain subdomains
This patch adds a note on defining subdomains to generic PM domain
binding documentation to let power domain providers use common approach
for defining power domain hierarchy.
Signed-off-by: Marek Szyprowski
---
.../devicetree/bindings/power/power_domain.txt | 29 ++
1 file changed, 29 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/power_domain.txt
b/Documentation/devicetree/bindings/power/power_domain.txt
index 98c1667..eeea45b 100644
--- a/Documentation/devicetree/bindings/power/power_domain.txt
+++ b/Documentation/devicetree/bindings/power/power_domain.txt
@@ -19,6 +19,16 @@ Required properties:
providing multiple PM domains (e.g. power controllers), but can be any value
as specified by device tree binding documentation of particular provider.
+Optional properties:
+ - power-domains : A phandle and PM domain specifier as defined by bindings of
+ the power controller specified by phandle.
+ Some power domains might be powered from other power domain (or have
+ other hardware specific dependency). For representing such dependency
+ a standard PM domain consumer binging is used. When provided, all domains
+ created by the given provider should be a subdomain of the domain
+ specified by this binding. More details about power domain specifier is
+ available in the the next section.
+
Example:
power: power-controller@1234 {
@@ -30,6 +40,25 @@ Example:
The node above defines a power controller that is a PM domain provider and
expects one cell as its phandle argument.
+Example 2:
+
+ parent: power-controller@1234 {
+ compatible = "foo,power-controller";
+ reg = <0x1234 0x1000>;
+ #power-domain-cells = <1>;
+ };
+
+ child: power-controller@1234 {
+ compatible = "foo,power-controller";
+ reg = <0x12341000 0x1000>;
+ power-domains = <&parent 0>;
+ #power-domain-cells = <1>;
+ };
+
+The nodes above defines two power controllers: 'parent' and 'child'.
+Domains created by 'child' power controller are subdomains of '0' power
+domain provided by 'parent' power controller.
+
==PM domain consumers==
Required properties:
--
1.9.2
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[PATCH v3 4/7] ARM: dts: exynos4: add dependency between TV and LCD0 power domains
TV Mixer needs both TV and LCD0 domains enabled to be fully operational.
This dependency is modelled by making TV power domains a sub-domain of
LCD0 power domain.
Signed-off-by: Marek Szyprowski
---
arch/arm/boot/dts/exynos4.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index d951647..a59b3fae 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -101,6 +101,7 @@
compatible = "samsung,exynos4210-pd";
reg = <0x10023C20 0x20>;
#power-domain-cells = <0>;
+ power-domains = <&pd_lcd0>;
};
pd_cam: cam-power-domain@10023C00 {
--
1.9.2
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[PATCH v3 7/7] ARM: dts: exynos5250: add display power domain
From: Andrzej Hajda
The patch adds domain definition and references to it in appropriate devices.
Signed-off-by: Andrzej Hajda
[mszyprow: rebased onto generic power domains dt bindings]
Signed-off-by: Marek Szyprowski
---
arch/arm/boot/dts/exynos5250.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 2b5a62c..cf4a6ec 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -102,6 +102,12 @@
#power-domain-cells = <0>;
};
+ pd_disp1: disp1-power-domain@100440A0 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x100440A0 0x20>;
+ #power-domain-cells = <0>;
+ };
+
clock: clock-controller@1001 {
compatible = "samsung,exynos5250-clock";
reg = <0x1001 0x3>;
@@ -719,6 +725,7 @@
hdmi: hdmi {
compatible = "samsung,exynos4212-hdmi";
reg = <0x1453 0x7>;
+ power-domains = <&pd_disp1>;
interrupts = <0 95 0>;
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
<&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
@@ -731,6 +738,7 @@
mixer {
compatible = "samsung,exynos5250-mixer";
reg = <0x1445 0x1>;
+ power-domains = <&pd_disp1>;
interrupts = <0 94 0>;
clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
clock-names = "mixer", "sclk_hdmi";
@@ -743,6 +751,7 @@
};
dp: dp-controller@145B {
+ power-domains = <&pd_disp1>;
clocks = <&clock CLK_DP>;
clock-names = "dp";
phys = <&dp_phy>;
@@ -750,6 +759,7 @@
};
fimd: fimd@1440 {
+ power-domains = <&pd_disp1>;
clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
clock-names = "sclk_fimd", "fimd";
};
--
1.9.2
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[PATCH v3 05/16] thermal: dts: Enable TMU at Exynos4412 based Odroid U3 device
This commit enables TMU IP block on the Exynos4412 Odroid U3
device.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- None
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 0adb57c..c7517fc 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -396,6 +396,11 @@
ehci: ehci@1258 {
status = "okay";
};
+
+ tmu@100C {
+ vtmu-supply = <&ldo10_reg>;
+ status = "okay";
+ };
};
&pinctrl_1 {
--
2.0.0.rc2
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[PATCH v3 06/16] arm: dts: Adding CPU cooling binding for Exynos SoCs
Presented patch aims to move data necessary for correct CPU cooling device
configuration from exynos_tmu_data.c to device tree.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- Adjust CPU's DT nodes to work with newest ti-soc-thermal/next branch
- Patch title has been changed from "thermal: cpu_cooling: dts: ..."
---
arch/arm/boot/dts/exynos4210-trats.dts | 15 +++
arch/arm/boot/dts/exynos4210.dtsi | 5 -
arch/arm/boot/dts/exynos4212.dtsi | 5 -
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 15 +++
arch/arm/boot/dts/exynos4412-trats2.dts | 15 +++
arch/arm/boot/dts/exynos4412.dtsi | 5 -
arch/arm/boot/dts/exynos5250.dtsi | 20 +++-
7 files changed, 76 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index 61009f4..4cd8926 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -428,6 +428,21 @@
status = "okay";
};
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 2 2>;
+ };
+ map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 4 4>;
+ };
+ };
+ };
+ };
+
camera {
pinctrl-names = "default";
pinctrl-0 = <>;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index bcc9e63..2e66df8 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -35,10 +35,13 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@900 {
+ cpu0: cpu@900 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x900>;
+ cooling-min-level = <4>;
+ cooling-max-level = <2>;
+ #cooling-cells = <2>; /* min followed by max */
};
cpu@901 {
diff --git a/arch/arm/boot/dts/exynos4212.dtsi
b/arch/arm/boot/dts/exynos4212.dtsi
index dd0a43e..5be03288 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -26,10 +26,13 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@A00 {
+ cpu0: cpu@A00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
+ cooling-min-level = <13>;
+ cooling-max-level = <7>;
+ #cooling-cells = <2>; /* min followed by max */
};
cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index c7517fc..4838a2a 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -401,6 +401,21 @@
vtmu-supply = <&ldo10_reg>;
status = "okay";
};
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 7 7>;
+ };
+ map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 13 13>;
+ };
+ };
+ };
+ };
};
&pinctrl_1 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 29231b4..8c2c584 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -863,6 +863,21 @@
pulldown-ohm = <10>; /* 100K */
io-channels = <&adc 2>; /* Battery temperature */
};
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 7 7>;
+ };
+ map1 {
+ /* Correspo
[PATCH v3 3/7] ARM: dts: exynos4: add hdmi related nodes
This patch adds entries for HDMI, Mixer and i2c with hdmi-phy modules
found in Exynos 4210 and 4x12 SoCs.
Signed-off-by: Marek Szyprowski
---
arch/arm/boot/dts/exynos4.dtsi| 40 +++
arch/arm/boot/dts/exynos4210.dtsi | 8
arch/arm/boot/dts/exynos4x12.dtsi | 11 +++
3 files changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index c5dc2ef..d951647 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -38,6 +38,7 @@
i2c5 = &i2c_5;
i2c6 = &i2c_6;
i2c7 = &i2c_7;
+ i2c8 = &i2c_8;
csis0 = &csis_0;
csis1 = &csis_1;
fimc0 = &fimc_0;
@@ -544,6 +545,22 @@
status = "disabled";
};
+ i2c_8: i2c@138E {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-hdmiphy-i2c";
+ reg = <0x138E 0x100>;
+ interrupts = <0 93 0>;
+ clocks = <&clock CLK_I2C_HDMI>;
+ clock-names = "i2c";
+ status = "disabled";
+
+ hdmi_i2c_phy: hdmiphy@38 {
+ compatible = "exynos4210-hdmiphy";
+ reg = <0x38>;
+ };
+ };
+
spi_0: spi@1392 {
compatible = "samsung,exynos4210-spi";
reg = <0x1392 0x100>;
@@ -652,4 +669,27 @@
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
+
+ hdmi: hdmi@12D0 {
+ compatible = "samsung,exynos4210-hdmi";
+ reg = <0x12D0 0x7>;
+ interrupts = <0 92 0>;
+ clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
+ "mout_hdmi";
+ clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
+ <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
+ <&clock CLK_MOUT_HDMI>;
+ phy = <&hdmi_i2c_phy>;
+ power-domains = <&pd_tv>;
+ samsung,syscon-phandle = <&pmu_system_controller>;
+ status = "disabled";
+ };
+
+ mixer: mixer@12C1 {
+ compatible = "samsung,exynos4210-mixer";
+ interrupts = <0 91 0>;
+ reg = <0x12C1 0x2100>, <0x12c0 0x300>;
+ power-domains = <&pd_tv>;
+ status = "disabled";
+ };
};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index 6728aaa..fc17cdf 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -193,4 +193,12 @@
samsung,lcd-wb;
};
};
+
+ mixer: mixer@12C1 {
+ clock-names = "mixer", "sclk_hdmi", "vp", "mout_mixer",
+ "sclk_mixer";
+ clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>,
+ <&clock CLK_VP>, <&clock CLK_MOUT_MIXER>,
+ <&clock CLK_SCLK_MIXER>;
+ };
};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi
b/arch/arm/boot/dts/exynos4x12.dtsi
index da8734e..e577bd0 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -283,4 +283,15 @@
clock-names = "tmu_apbif";
status = "disabled";
};
+
+ hdmi: hdmi@12D0 {
+ compatible = "samsung,exynos4212-hdmi";
+ };
+
+ mixer: mixer@12C1 {
+ compatible = "samsung,exynos4212-mixer";
+ clock-names = "mixer", "sclk_hdmi", "vp";
+ clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>,
+ <&clock CLK_VP>;
+ };
};
--
1.9.2
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[PATCH v3 0/7] Enable HDMI support on Exynos platforms
Hi all, This is yet another approach to submit patches, which enables HDMI support for two Exynos based platforms: UniversalC210 and Odroid X2/U3. Beside DTS changes, this patchset adds parent domain support for Exynos PM domains. This was the most controversial patch in the previous attempts, but I hope I fixes all reported issues and made it really generic. For more details see individual patches. The patchset is based on my previous patch: 'ARM: DTS: Exynos: convert to generic power domain bindings' (http://www.spinics.net/lists/linux-samsung-soc/msg40584.html) and requires 2 patches that have been merged to v3.19-rc4: 'clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi' (commit df019a5c0f7083001cb694f44821ca506425bda2) and 'PM / Domains: Export of_genpd_get_from_provider function' (commit 7496fcbe8a643097efc061160e1c3b65ee2fa350). Regards Marek Szyprowski Changelog: v3: - added a note on defining subdomains to generic PM domain binding documentation (requested by Ulf Hansson) v2: (http://www.spinics.net/lists/linux-samsung-soc/msg40980.html) - rewrote subdomains patch according to suggestions from Geert Uytterhoeven and Amit Daniel Kachhap. v1 resend: (http://www.spinics.net/lists/linux-samsung-soc/msg39428.html) - added handling of generic 'power-domains' binding in subdomains v1: (http://www.spinics.net/lists/linux-samsung-soc/msg38914.html) - resolved power domain on/off issue with 'clk: samsung: exynos4: set parent of mixer gate clock to hdmi' patch v0: (http://www.spinics.net/lists/linux-samsung-soc/msg33498.html) - first attempt, used 'always on' power domains hack Patch summary: Andrzej Hajda (1): ARM: dts: exynos5250: add display power domain Marek Szyprowski (5): PM / Domains: Add a note about power domain subdomains ARM: Exynos: add support for sub-power domains ARM: dts: exynos4: add hdmi related nodes ARM: dts: exynos4: add dependency between TV and LCD0 power domains ARM: dts: exynos4412-odroid: enable hdmi support Tomasz Stanislawski (1): ARM: dts: exynos4210-universal_c210: enable hdmi support .../bindings/arm/exynos/power_domain.txt | 2 + .../devicetree/bindings/power/power_domain.txt | 29 +++ arch/arm/boot/dts/exynos4.dtsi | 41 arch/arm/boot/dts/exynos4210-universal_c210.dts| 57 ++ arch/arm/boot/dts/exynos4210.dtsi | 8 +++ arch/arm/boot/dts/exynos4412-odroid-common.dtsi| 44 + arch/arm/boot/dts/exynos4x12.dtsi | 11 + arch/arm/boot/dts/exynos5250.dtsi | 10 arch/arm/mach-exynos/pm_domains.c | 28 +++ 9 files changed, 230 insertions(+) -- 1.9.2 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 5/7] ARM: dts: exynos4412-odroid: enable hdmi support
This patch adds nodes specific to Exynos4412 based Odroid X/X2/U2/U3
boards required for enabling HDMI display.
Signed-off-by: Marek Szyprowski
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 44 +
1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 3fbf588..e10efa8 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -231,6 +231,20 @@
regulator-always-on;
};
+ ldo8_reg: ldo@8 {
+ regulator-compatible = "LDO8";
+ regulator-name = "VDD10_HDMI_1.0V";
+ regulator-min-microvolt = <100>;
+ regulator-max-microvolt = <100>;
+ };
+
+ ldo10_reg: ldo@10 {
+ regulator-compatible = "LDO10";
+ regulator-name = "VDDQ_MIPIHSI_1.8V";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ };
+
ldo11_reg: LDO11 {
regulator-name = "VDD18_ABB1_1.8V";
regulator-min-microvolt = <180>;
@@ -389,6 +403,31 @@
ehci: ehci@1258 {
status = "okay";
};
+
+ mixer: mixer@12C1 {
+ status = "okay";
+ };
+
+ hdmi@12D0 {
+ hpd-gpio = <&gpx3 7 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_hpd>;
+ vdd-supply = <&ldo8_reg>;
+ vdd_osc-supply = <&ldo10_reg>;
+ vdd_pll-supply = <&ldo8_reg>;
+ ddc = <&hdmi_ddc>;
+ status = "okay";
+ };
+
+ hdmi_ddc: i2c@1388 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_bus>;
+ };
+
+ i2c@138E {
+ status = "okay";
+ };
};
&pinctrl_1 {
@@ -403,4 +442,9 @@
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
+
+ hdmi_hpd: hdmi-hpd {
+ samsung,pins = "gpx3-7";
+ samsung,pin-pud = <1>;
+ };
};
--
1.9.2
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[PATCH v3 2/7] ARM: Exynos: add support for sub-power domains
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences for devices
like TV Mixer or Camera ISP, which needs to have more than one power
domain enabled to be operational.
Based on previous work by Amit Daniel Kachhap .
Signed-off-by: Marek Szyprowski
---
.../bindings/arm/exynos/power_domain.txt | 2 ++
arch/arm/mach-exynos/pm_domains.c | 28 ++
2 files changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index f4445e5..1e09703 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -22,6 +22,8 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
+- power-domains: phandle pointing to the parent power domain, for more details
+see Documentation/devicetree/bindings/power/power_domain.txt
Node of a device using power domains must have a power-domains property
defined with a phandle to respective power domain.
diff --git a/arch/arm/mach-exynos/pm_domains.c
b/arch/arm/mach-exynos/pm_domains.c
index 20f2671..37266a8 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -161,6 +161,34 @@ no_clk:
of_genpd_add_provider_simple(np, &pd->pd);
}
+ /* Assign the child power domains to their parents */
+ for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
+ struct generic_pm_domain *child_domain, *parent_domain;
+ struct of_phandle_args args;
+
+ args.np = np;
+ args.args_count = 0;
+ child_domain = of_genpd_get_from_provider(&args);
+ if (!child_domain)
+ continue;
+
+ if (of_parse_phandle_with_args(np, "power-domains",
+"#power-domain-cells", 0, &args) != 0)
+ continue;
+
+ parent_domain = of_genpd_get_from_provider(&args);
+ if (!parent_domain)
+ continue;
+
+ if (pm_genpd_add_subdomain(parent_domain, child_domain))
+ pr_warn("%s failed to add subdomain: %s\n",
+ parent_domain->name, child_domain->name);
+ else
+ pr_info("%s has as child subdomain: %s.\n",
+ parent_domain->name, child_domain->name);
+ of_node_put(np);
+ }
+
return 0;
}
arch_initcall(exynos4_pm_init_power_domain);
--
1.9.2
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[PATCH v3 04/16] arm: dts: odroid: Add LD010 regulator node necessary for TMU on Odroid
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- Patch title has been changed from thermal: dts: exynos to arm: dts: Odroid
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 3fbf588..0adb57c 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -231,6 +231,13 @@
regulator-always-on;
};
+ ldo10_reg: LDO10 {
+ regulator-name = "VDD18_MIPIHSI_1.8V";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+
ldo11_reg: LDO11 {
regulator-name = "VDD18_ABB1_1.8V";
regulator-min-microvolt = <180>;
--
2.0.0.rc2
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[PATCH v3 03/16] arm: dts: trats: Enable TMU on the Exynos4210 trats device
The thermal IP block (Thermal Management Unit) called TMU has been enabled
in this device.
Signed-off-by: Lukasz Majewski
---
Changes for v2:
- None
Changes for v3:
- Patch title has been changed from thermal: dts: arm to arm: dts: trats
---
arch/arm/boot/dts/exynos4210-trats.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index 7208362..61009f4 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -424,6 +424,10 @@
status = "okay";
};
+ tmu@100C {
+ status = "okay";
+ };
+
camera {
pinctrl-names = "default";
pinctrl-0 = <>;
--
2.0.0.rc2
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