Re: [PATCH v3 01/12] clk: samsung: exynos5433: Add clocks using common clock framework
On 21/01/15 07:26, Chanwoo Choi wrote:
+/* list of all parent clock list */
+PNAME(mout_bus_pll_user_p) = { fin_pll, sclk_bus_pll, };
...
+
+static struct samsung_mux_clock top_mux_clks[] __initdata = {
+ MUX(CLK_MOUT_BUS_PLL_USER, mout_bus_pll_user, mout_bus_pll_user_p,
+ MUX_SEL_TOP1, 0, 1),
...
+};
+
+static struct samsung_div_clock top_div_clks[] __initdata = {
...
+ /* DIV_TOP3 */
+ DIV(CLK_DIV_ACLK_IMEM_SSSX_266, div_aclk_imem_sssx_266,
+ mout_bus_pll_user, DIV_TOP3, 24, 3),
Shouldn't fin_pll be renamed to oscclk ? In the documentation
the root clock (from XXTI input pin) seems to be referred as OSCCLK.
And I can't see fin_pll clock registered anywhere. Shouldn't there
be a fixed-rate-clock as a parent of at least CMU_TOP? e.g.
xxti: xxti {
compatible = fixed-clock;
#clock-cells = 0;
clock-output-names = oscclk;
clock-frequency = 2400;
};
cmu_top {
clocks = xxti;
};
--
Regards,
Sylwester
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Re: [PATCH v3 01/12] clk: samsung: exynos5433: Add clocks using common clock framework
Hi Sylwester,
On Sat, Jan 24, 2015 at 2:40 AM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
On 23/01/15 08:44, Chanwoo Choi wrote:
+ cmu_top: clock-controller@0x1003 {
+compatible = samsung,exynos5433-cmu-top;
+reg = 0x1003 0x0c04;
+#clock-cells = 1;
+};
+
+cmu_fsys: clock-controller@0x156e {
+compatible = samsung,exynos5433-cmu-fsys;
+reg = 0x156e 0x0b04;
+#clock-cells = 1;
+};
What are the reasons to split the whole clock controller into separate
device nodes with different compatible strings like this? I doubt drivers
associated with each of those compatible strings could be ever reused on
different Exynos SoCs.
No special reason. I added the clock controller according to clock domain
separately. As I knew, samsung clk drivers use this way to support various
clock domains. For exmaple, drivers/clk/samsung/clk-exynos7.c.
I'm afraid exynos7 has that initialization ordering issue, unfortunately I
didn't notice it before.
OK.
There are hardware dependencies between these clock domains, which are
not currently modelled in DT with your binding.
Right. current samsung clock drivers cannot show the hierarchy among clock
domains in DT.
IOW, there is currently
no way to ensure proper registration order of the CMUs (clock domains).
This may be important in some cases.
To address this we could either add clocks/clock-names properties in
respective CMU device nodes, pointing to any clocks in other CMU(s) or
make a single device node for the whole clock controller, with an
aggregated reg entry, e.g.
cmu: clock-controller@0x1003 {
compatible = samsung,exynos5433-cmu;
reg = 0x1003 0x0c04,
0x10fc 0x0c04,
0x105b 0x100c,
0x14c8 0x0b08,
0x1004 0x0b20,
0x156e 0x0b04,
...
reg-names = top, cpif, mif, peric, peris, fsys...
#clock-cells = 1;
};
If you make a single device node to support various clock domain,
How are you indicate the specific clock in some clock domain?
This might be an issue, we would need to make all the clk indexes a one
contiguous set.
Exynos5433 has a whole lot of clocks against Exynos4 series clocks.
So, if make all the clocks in the same set, I wonder making too huge set.
It may cause the complicated code to find the proper clock or to analyze
the clock driver.
I'm wondering if there is really any use of having such
information expressed explicitly in DT, or it would just make the DT
binding closer resembling the SoC's documentation ?
If we show the hierarchy or dependency between clock domains,
I think we should modify structure samsung_clk_provider
to include dependency information between clock domains.
(It is just my opinion, this opinion could be not proper solution.)
Because
when we use the common clk framework without adding
any dependency information between clock domains, it is well working.
Similarly, the clock controller is divided into subdomains in older SoCs,
like exynos4, yet we do not create separate device nodes for each domain.
Is reference to each individual clock domain required in any other SoC's
part in case of exynos5433 ?
There is a difference between exynos4 cmu and exynos5433 cmu.
exynos4. As I knew, Exynos4 series have the one more clock domain.
But, there are not any IPs between clock domains. We can check it as following
read base address and scope.
The base address and range of Exynos4412 clock domain :
- 0x1003_ ~ 0x1003_CA08
- 0x1004_ ~ 0x1004_8B0C
But, the clock domain in base address map of exynos5433 is located
in non-continuous range. Also, there are un-related IPs to clocks.
(e.g., mct 101c_, gic 1100_1000, serial0 14c1_, pinctrl 1058_ ...)
If we make the one dt node for clock domains like exynos4,
I think it may cause the possible issue that clock drivers may access
the un-related memory-mapped region.
The base address and range of Exynos5433 clock domain :
- top domain: 0x1003_ ~ 0x1003_0c04
- cpif domain : 0x10fc_ ~ 0x10fc_0x0c04
- mif domain: 0x105b_ ~ 0x105b_0x100c
- peric domain : 0x14c8_ ~ 0x14c8_0b08
- peris domain : 0x1004_ ~ 0x1004_0x0b20
- fsys domain : 0x156e_ ~ 0x156e_0b04
For example,
The serial dt node in exynos7.dtsi. serial_0 dt node use the uart clocks
in 'clock_peric0' clock domain and serial_1 dt node use the uart clocks
in 'clock-peric1' clock domain.
When using the clock in specific clock domain,
we need to phandle(e.g., clock_peric0, clock_peric1) of clock domain.
serial_0: serial@1363 {
compatible = samsung,exynos4210-uart;
reg = 0x1363 0x100;
interrupts = 0 440 0;
clocks = clock_peric0
Re: [PATCH v3 01/12] clk: samsung: exynos5433: Add clocks using common clock framework
Hi Sylwester,
On Sat, Jan 24, 2015 at 2:40 AM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
On 21/01/15 07:26, Chanwoo Choi wrote:
+/* list of all parent clock list */
+PNAME(mout_bus_pll_user_p) = { fin_pll, sclk_bus_pll, };
...
+
+static struct samsung_mux_clock top_mux_clks[] __initdata = {
+ MUX(CLK_MOUT_BUS_PLL_USER, mout_bus_pll_user, mout_bus_pll_user_p,
+ MUX_SEL_TOP1, 0, 1),
...
+};
+
+static struct samsung_div_clock top_div_clks[] __initdata = {
...
+ /* DIV_TOP3 */
+ DIV(CLK_DIV_ACLK_IMEM_SSSX_266, div_aclk_imem_sssx_266,
+ mout_bus_pll_user, DIV_TOP3, 24, 3),
Shouldn't fin_pll be renamed to oscclk ? In the documentation
the root clock (from XXTI input pin) seems to be referred as OSCCLK.
And I can't see fin_pll clock registered anywhere. Shouldn't there
be a fixed-rate-clock as a parent of at least CMU_TOP? e.g.
Right,
I added fin_pll fixed clock in DT as following:
When I registered fin_pll fixed clock, I could use fin_pll clock
for exynos5433 cmu without adding additional dt node.
fin_pll: xxti {
compatible = fixed-clock;
clock-output-names = fin_pll;
#clock-cells = 0;
};
I'll add the example of fin_pll dt node to documentation for exynos5433 cmu.
xxti: xxti {
compatible = fixed-clock;
#clock-cells = 0;
clock-output-names = oscclk;
clock-frequency = 2400;
};
cmu_top {
clocks = xxti;
};
Regards,
Chanwoo Choi
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Re: [PATCH v4 18/18] iommu: exynos: add callback for initializing devices from device tree
Hello,
On 2015-01-19 16:27, Javier Martinez Canillas wrote:
I wanted to test your IOMMU series on an Exynos5420 Peach Pit but the
kernel hangs with your series + dependencies on top of 3.19-rc5.
Bisecting I found that $subject is the offending commit. I've pushed
my test branch [0] in case I missed something.
On Fri, Jan 16, 2015 at 10:13 AM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
This patch adds implementation of of_xlate callback, which prepares
masters device for attaching to IOMMU. This callback is called during
creating devices from device tree.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index ea2659159e63..5432b443abfc 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -1077,6 +1077,33 @@ static phys_addr_t exynos_iommu_iova_to_phys(struct
iommu_domain *iommu_domain,
return phys;
}
+static int exynos_iommu_of_xlate(struct device *dev,
+struct of_phandle_args *spec)
+{
+ struct exynos_iommu_owner *owner = dev-archdata.iommu;
+ struct platform_device *sysmmu = of_find_device_by_node(spec-np);
+ struct sysmmu_drvdata *data;
+
+ if (!sysmmu)
+ return -ENODEV;
+
+ data = platform_get_drvdata(sysmmu);
+ if (!data)
+ return -ENODEV;
+
+ if (!owner) {
+ owner = kzalloc(sizeof(*owner), GFP_KERNEL);
+ if (!owner)
+ return -ENOMEM;
+
+ INIT_LIST_HEAD(owner-clients);
+ dev-archdata.iommu = owner;
+ }
+
+ list_add_tail(data-owner_node, owner-clients);
This is the line that causes the kernel to hang, if I comment the
list_add_tail() call then the kernel boots.
I checked that neither data nor owner are NULL and that the
owner-clients list_head is initialized. Do you have any ideas what
could be happening?
This is really strange. However the hang is definitely not caused by
adding the controller to the list, but rather the fact that it is later
being initialized, probably in exynos_iommu_attach_device().
Just a quick question - does bootloader on Exynos5420 Peach Pit sets
any image on the display?
If so then we will get IOMMU page fault on init (DMA engine of FIMD is
left enabled from bootloader) and such case is not yet handled.
Besides that I have no idea for any other reason for such failure.
To check if this is caused by io page fault, please temporarily add the
following hack:
---8---
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 7864797609b3..5e70cf7eb31b 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -2011,6 +2011,9 @@ static bool arm_setup_iommu_dma_ops(struct device
*dev, u64 dma_base, u64 size,
return false;
}
+iommu_map(mapping-domain, 0x4000, 0x4000, 0x8000,
+ IOMMU_READ | IOMMU_WRITE);
+
if (arm_iommu_attach_device(dev, mapping)) {
pr_warn(Failed to attached device %s to IOMMU_mapping\n,
dev_name(dev));
---8---
Best regards
--
Marek Szyprowski, PhD
Samsung RD Institute Poland
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[PATCH v4 2/2] ARM: dts: exynos4: Add stdout-path properties
From: Tomasz Figa t.f...@samsung.com
This patch adds stdout-path property to chosen nodes of Exynos4 boards
to enable use of earlycon feature without the need to hardcode port
number in kernel itself.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
arch/arm/boot/dts/exynos4210-origen.dts | 1 +
arch/arm/boot/dts/exynos4210-smdkv310.dts | 1 +
arch/arm/boot/dts/exynos4210-trats.dts | 1 +
arch/arm/boot/dts/exynos4210-universal_c210.dts | 1 +
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4
arch/arm/boot/dts/exynos4412-origen.dts | 1 +
arch/arm/boot/dts/exynos4412-smdk4412.dts | 1 +
arch/arm/boot/dts/exynos4412-tiny4412.dts | 4
arch/arm/boot/dts/exynos4412-trats2.dts | 1 +
9 files changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts
b/arch/arm/boot/dts/exynos4210-origen.dts
index f767c425d0b5..b81146141402 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -31,6 +31,7 @@
chosen {
bootargs =root=/dev/ram0 rw ramdisk=8192 initrd=0x4100,8M
console=ttySAC2,115200 init=/linuxrc;
+ stdout-path = serial_2;
};
regulators {
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts
b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 676e6e0c8cf3..86216fff1b4f 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -27,6 +27,7 @@
chosen {
bootargs = root=/dev/ram0 rw ramdisk=8192 initrd=0x4100,8M
console=ttySAC1,115200 init=/linuxrc;
+ stdout-path = serial_1;
};
sdhci@1253 {
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index f516da9e8b3a..b351c7bddf2d 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -28,6 +28,7 @@
chosen {
bootargs = console=ttySAC2,115200N8 root=/dev/mmcblk0p5
rootwait earlyprintk panic=5;
+ stdout-path = serial_2;
};
regulators {
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d50eb3aa708e..e65ee3cb36c3 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -26,6 +26,7 @@
chosen {
bootargs = console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw
rootwait earlyprintk panic=5 maxcpus=1;
+ stdout-path = serial_2;
};
sysram@0202 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index c697ff01ae8d..7c49bddf44b6 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -11,6 +11,10 @@
#include exynos4412.dtsi
/ {
+ chosen {
+ stdout-path = serial_1;
+ };
+
firmware@0204F000 {
compatible = samsung,secure-firmware;
reg = 0x0204F000 0x1000;
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index de15114fd07c..bd8b73077d41 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -26,6 +26,7 @@
chosen {
bootargs =console=ttySAC2,115200;
+ stdout-path = serial_2;
};
firmware@0203F000 {
diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts
b/arch/arm/boot/dts/exynos4412-smdk4412.dts
index ded0b70f7644..b9256afbcc68 100644
--- a/arch/arm/boot/dts/exynos4412-smdk4412.dts
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -25,6 +25,7 @@
chosen {
bootargs =root=/dev/ram0 rw ramdisk=8192 initrd=0x4100,8M
console=ttySAC1,115200 init=/linuxrc;
+ stdout-path = serial_1;
};
g2d@1080 {
diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts
b/arch/arm/boot/dts/exynos4412-tiny4412.dts
index ea6929d9c621..d46fd4c2aeaa 100644
--- a/arch/arm/boot/dts/exynos4412-tiny4412.dts
+++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts
@@ -18,6 +18,10 @@
model = FriendlyARM TINY4412 board based on Exynos4412;
compatible = friendlyarm,tiny4412, samsung,exynos4412,
samsung,exynos4;
+ chosen {
+ stdout-path = serial_0;
+ };
+
memory {
reg = 0x4000 0x4000;
};
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 5e066cd87f66..c8b38359d54e 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -30,6 +30,7 @@
chosen {
bootargs = console=ttySAC2,115200N8 root=/dev/mmcblk0p5
rootwait earlyprintk panic=5;
+
[PATCH v4 1/2] serial: samsung: Add support for early console
From: Tomasz Figa t.f...@samsung.com
This patch adds support for early console initialized from device tree
and kernel command line to all variants of Samsung serial driver.
Signed-off-by: Tomasz Figa t.f...@samsung.com
[mszyprow: added support for command line based initialization,
fixed comments, added documentation]
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
Tested-by: Alim Akhtar alim.akh...@samsung.com
Tested-by: Chanwoo Choi cw00.c...@samsung.com
---
Documentation/kernel-parameters.txt | 12 +
drivers/tty/serial/Kconfig | 1 +
drivers/tty/serial/samsung.c| 103
3 files changed, 116 insertions(+)
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
index 7dbe5ec9d9cd..24f363108ab3 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -961,6 +961,18 @@ bytes respectively. Such letter suffixes can also be
entirely omitted.
smh Use ARM semihosting calls for early console.
+ s3c2410,addr
+ s3c2412,addr
+ s3c2440,addr
+ s3c6400,addr
+ s5pv210,addr
+ exynos4210,addr
+ Use early console provided by serial driver available
+ on Samsung SoCs, requires selecting proper type and
+ a correct base address of the selected UART port. The
+ serial port must already be setup and configured.
+ Options are not yet supported.
+
earlyprintk=[X86,SH,BLACKFIN,ARM,M68k]
earlyprintk=vga
earlyprintk=efi
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 649b784081c7..50997be6cf6d 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -241,6 +241,7 @@ config SERIAL_SAMSUNG
tristate Samsung SoC serial support
depends on PLAT_SAMSUNG || ARCH_EXYNOS
select SERIAL_CORE
+ select SERIAL_EARLYCON
help
Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
providing /dev/ttySAC0, 1 and 2 (note, some machines may not
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index c78f43a481ce..8ad453a5d845 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1856,6 +1856,109 @@ static struct platform_driver samsung_serial_driver = {
module_platform_driver(samsung_serial_driver);
+/*
+ * Early console.
+ */
+
+struct samsung_early_console_data {
+ u32 txfull_mask;
+};
+
+static void samsung_early_busyuart(struct uart_port *port)
+{
+ while (!(readl(port-membase + S3C2410_UTRSTAT) S3C2410_UTRSTAT_TXFE))
+ ;
+}
+
+static void samsung_early_busyuart_fifo(struct uart_port *port)
+{
+ struct samsung_early_console_data *data = port-private_data;
+
+ while (readl(port-membase + S3C2410_UFSTAT) data-txfull_mask)
+ ;
+}
+
+static void samsung_early_putc(struct uart_port *port, int c)
+{
+ if (readl(port-membase + S3C2410_UFCON) S3C2410_UFCON_FIFOMODE)
+ samsung_early_busyuart_fifo(port);
+ else
+ samsung_early_busyuart(port);
+
+ writeb(c, port-membase + S3C2410_UTXH);
+}
+
+static void samsung_early_write(struct console *con, const char *s, unsigned n)
+{
+ struct earlycon_device *dev = con-data;
+
+ uart_console_write(dev-port, s, n, samsung_early_putc);
+}
+
+static int __init samsung_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ if (!device-port.membase)
+ return -ENODEV;
+
+ device-con-write = samsung_early_write;
+ return 0;
+}
+
+/* S3C2410 */
+static struct samsung_early_console_data s3c2410_early_console_data = {
+ .txfull_mask = S3C2410_UFSTAT_TXFULL,
+};
+
+static int __init s3c2410_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ device-port.private_data = s3c2410_early_console_data;
+ return samsung_early_console_setup(device, opt);
+}
+OF_EARLYCON_DECLARE(s3c2410, samsung,s3c2410-uart,
+ s3c2410_early_console_setup);
+EARLYCON_DECLARE(s3c2410, s3c2410_early_console_setup);
+
+/* S3C2412, S3C2440, S3C64xx */
+static struct samsung_early_console_data s3c2440_early_console_data = {
+ .txfull_mask = S3C2440_UFSTAT_TXFULL,
+};
+
+static int __init s3c2440_early_console_setup(struct earlycon_device *device,
+ const char *opt)
+{
+ device-port.private_data = s3c2440_early_console_data;
+ return samsung_early_console_setup(device, opt);
+}
+OF_EARLYCON_DECLARE(s3c2412, samsung,s3c2412-uart,
+
[PATCH v4 0/2] serial: samsung: add support for early console
This patchset adds support for early console defined in device tree. As an example, DTS files for all Exynos4 based machines are updated with the correct value for common chosen/sdtout property. To get it fully functional on ARM architecture, additional improvements (support for early_ioremap) are needed in early console code. Best regards Marek Szyprowski Samsung RD Institute Poland Changelog: v4: - added 'tested-by' tags, resend v3: http://www.spinics.net/lists/linux-samsung-soc/msg37922.html - rebased onto v3.18-rc1 - removed options from documentation (they are not yet supported) v2: http://www.spinics.net/lists/linux-samsung-soc/msg37278.html - added support for command line based initialization v1: http://www.spinics.net/lists/linux-samsung-soc/msg37094.html - initial version Tomasz Figa (2): serial: samsung: Add support for early console ARM: dts: exynos4: Add stdout-path properties Documentation/kernel-parameters.txt | 12 +++ arch/arm/boot/dts/exynos4210-origen.dts | 1 + arch/arm/boot/dts/exynos4210-smdkv310.dts | 1 + arch/arm/boot/dts/exynos4210-trats.dts | 1 + arch/arm/boot/dts/exynos4210-universal_c210.dts | 1 + arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 + arch/arm/boot/dts/exynos4412-origen.dts | 1 + arch/arm/boot/dts/exynos4412-smdk4412.dts | 1 + arch/arm/boot/dts/exynos4412-tiny4412.dts | 4 + arch/arm/boot/dts/exynos4412-trats2.dts | 1 + drivers/tty/serial/Kconfig | 1 + drivers/tty/serial/samsung.c| 103 12 files changed, 131 insertions(+) -- 1.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 18/18] iommu: exynos: add callback for initializing devices from device tree
Hello Marek,
On Fri, Jan 23, 2015 at 1:40 PM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
+
+ list_add_tail(data-owner_node, owner-clients);
This is the line that causes the kernel to hang, if I comment the
list_add_tail() call then the kernel boots.
I checked that neither data nor owner are NULL and that the
owner-clients list_head is initialized. Do you have any ideas what
could be happening?
This is really strange. However the hang is definitely not caused by
adding the controller to the list, but rather the fact that it is later
being initialized, probably in exynos_iommu_attach_device().
Yes, I knew adding to the list was not the issue but a side effect of
being in the list. I'm not familiar with Exynos sysmmu/iommu to figure
out though.
Just a quick question - does bootloader on Exynos5420 Peach Pit sets
any image on the display?
Yes u-boot does initialize the display, I see the boot messages and
have an u-boot prompt.
If so then we will get IOMMU page fault on init (DMA engine of FIMD is
left enabled from bootloader) and such case is not yet handled.
Besides that I have no idea for any other reason for such failure.
I see, that's a reasonable explanation and in fact your patch makes at
least the kernel to start booting.
To check if this is caused by io page fault, please temporarily add the
following hack:
---8---
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 7864797609b3..5e70cf7eb31b 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -2011,6 +2011,9 @@ static bool arm_setup_iommu_dma_ops(struct device
*dev, u64 dma_base, u64 size,
return false;
}
+iommu_map(mapping-domain, 0x4000, 0x4000, 0x8000,
+ IOMMU_READ | IOMMU_WRITE);
+
if (arm_iommu_attach_device(dev, mapping)) {
The kernel still hangs but the boot does indeed go further. Here is my
boot log [0] although I couldn't find an evident cause.
Best regards,
Javier
[0]: http://paste.debian.net/plain/141968
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Re: [PATCH v6 08/18] cpufreq: exynos: Use device tree to determine if cpufreq cooling should be registered
Hi Viresh,
On 23 January 2015 at 17:44, Lukasz Majewski l.majew...@samsung.com
wrote:
+ cpus = of_find_node_by_path(/cpus);
+ if (!cpus) {
+ pr_err(failed to find cpus node\n);
+ return 0;
+ }
+
+ np = of_get_next_child(cpus, NULL);
+ if (!np) {
+ pr_err(failed to find cpus child node\n);
+ of_node_put(cpus);
return 0;
+ }
Why making it complex? Just get device node for cpu 0 and
do cpu_dev-np.
Please pay a note about following problem:
Previously we got: cpu0: cpu@0 for all Exynos devices.
Now, however, cpu numbering has changed (due to GIC rework).
For example:
Exynos4412:
cpus {
cpu0: cpu@A00 {
...
#cooling-cells = 2; /* min followed by max */
};
cpu@A01 {
};
cpu@A02 {
};
cpu@A03 {
};
}
Exynos 4210:
cpus {
cpu0: cpu@900 {
#cooling-cells = 2; /* min followed by max */
};
cpu@901 {
};
};
Exynos 5250:
cpus {
cpu0: cpu@0 {
#cooling-cells = 2; /* min followed by max */
};
cpu@1 {
};
};
As you can see different cpu@XXY nodes we have and simply calling cpu@0
won't work.
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [PATCH] ARM: dts: exynos5422-odroidxu3: reduce total RAM by 22 MiB
On Fri, 2015-01-23 at 15:35 +0900, Kukjin Kim wrote:
Marek Szyprowski wrote:
Last 22 MiB is RAM is reserved by secure monitor code and cannot be
accessed from Linux kernel, so adjust total RAM size to 0x7EA0
(2 GiB - 22 MiB). This fixes random 'imprecise kernel abort' kernel
failures.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index f6fc9442f631..50843208860d 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -18,7 +18,7 @@
compatible = hardkernel,odroid-xu3, samsung,exynos5800,
samsung,exynos5;
memory {
- reg = 0x4000 0x8000;
+ reg = 0x4000 0x7EA0;
};
chosen {
--
Just checked hardkernels bootloader which defines:
#define CONFIG_TRUSTZONE_RESERVED_DRAM 0x160
So looks good,
Reviewed-By: Sjoerd Simons sjoerd.sim...@collabora.co.uk
Hi,
Maybe is it related to the SoC not only for odriodxu3 board. If so, following
would be better?
---88---
diff --git a/arch/arm/boot/dts/exynos5800.dtsi
b/arch/arm/boot/dts/exynos5800.dtsi
index c0bb356..54840e3 100644
--- a/arch/arm/boot/dts/exynos5800.dtsi
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -13,6 +13,8 @@
* published by the Free Software Foundation.
*/
+/memreserve/ 0x8000 0x160;
+
#include exynos5420.dtsi
/ {
---88---
- Kukjin
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smime.p7s
Description: S/MIME cryptographic signature
[PATCH] mmc: dw_mmc: exynos: remove incorrect __exit_p()
dw_mci_pltfm_remove() is not (nor should it be) marked as __exit,
so we should not be using __exit_p() wrapper with it.
Signed-off-by: Dmitry Torokhov dmitry.torok...@gmail.com
---
drivers/mmc/host/dw_mmc-exynos.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 12a5eaa..fe32948 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -422,7 +422,7 @@ static const struct dev_pm_ops dw_mci_exynos_pmops = {
static struct platform_driver dw_mci_exynos_pltfm_driver = {
.probe = dw_mci_exynos_probe,
- .remove = __exit_p(dw_mci_pltfm_remove),
+ .remove = dw_mci_pltfm_remove,
.driver = {
.name = dwmmc_exynos,
.of_match_table = dw_mci_exynos_match,
--
2.2.0.rc0.207.ga3a616c
--
Dmitry
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[GIT PULL] Samsung DT updates for v3.20
Hi, Please pull Samsung DT updates for v3.20. I checked to use signed tag in this time ;) Thanks and if any problems, please let me know. - Kukjin The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672: Linux 3.19-rc1 (2014-12-20 17:08:50 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-dt for you to fetch changes up to 23c76dc666471dce5ce71b620839d2465723a7c9: ARM: dts: Configure regulators for suspend on exynos Peach boards (2015-01-15 00:30:49 +0900) Samsung DT updates for v3.20 - exynos3250 : add exynos_usbphy node and hsotg nodes - exynos3250-rinato : enable usb : cleanup and use macro for gpio-keys : add fimd and Panel devices support - exynos3250-monk : enable usb : cleanup and use macro for gpio-keys - exynos5250-snow : add power and lid gpio-keys pinctrl - exynos5420-peach-pit and exynos5800-peach-pi : configure regulators for suspend : set always on for USB webCam regulators : add lid GPIO key device - exynos5422 : add support new board Odroid XU3 - dt-bindings : add exynos-chipid Beomho Seo (2): ARM: dts: remove unnecessary gpio-key nodes for exynos3250 boards ARM: dts: use macro in gpio keys for exynos3250 boards Inki Dae (2): ARM: dts: add fimd device support for exynos3250-rinato ARM: dts: add Panel device support for exynos3250-rinato Jaewon Kim (4): ARM: dts: Add exynos_usbphy node for exynos3250 ARM: dts: Add hsotg node for exynos3250 ARM: dts: Enable USB node for exynos3250-rinato ARM: dts: Enable USB node for exynos3250-monk Javier Martinez Canillas (4): ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow ARM: dts: Add lid GPIO key device node for Peach boards ARM: dts: Set Peach boards USB WebCam regulators to always on ARM: dts: Configure regulators for suspend on exynos Peach boards Pankaj Dubey (1): Documentation: dt-bindings: add exynos-chipid binding information Sjoerd Simons (1): ARM: dts: Add dts file for Odroid XU3 board .../bindings/arm/samsung/exynos-chipid.txt | 12 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos3250-monk.dts | 15 +- arch/arm/boot/dts/exynos3250-rinato.dts| 85 +- arch/arm/boot/dts/exynos3250.dtsi | 21 ++ arch/arm/boot/dts/exynos5250-snow.dts | 16 + arch/arm/boot/dts/exynos5420-peach-pit.dts | 100 ++- arch/arm/boot/dts/exynos5422-odroidxu3.dts | 332 + arch/arm/boot/dts/exynos5800-peach-pi.dts | 101 ++- 9 files changed, 675 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt create mode 100644 arch/arm/boot/dts/exynos5422-odroidxu3.dts -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 00/17] thermal: exynos: Thermal code rework to use device tree
On 01/23/15 23:45, Eduardo Valentin wrote: Hi Kukjin, Hi Eduardo, [...] I hope will apply DT changes in Samsung tree. Is it OK to thermal tree? I think that it is up to you and Eduardo to decide :-). I'd personally prefer to add this patch set at once to Eduardo's tree (of course with your ACKs). If so, we could see too many useless merge conflicts. Because your patches touch most of exynos DT stuff and that's why DT changes should be handled in Samsung tree if there is no problem ;) Let's wait for thermal guys. Let's target the latest version (v6) of this series. You can add my Acked-by: Eduardo Valentin edubez...@gmail.com OK, I'll take DT changes in my tree with your ack. in the DTS changes. And add them via your tree. I believe we will avoid merge conflicts this way. I will handle the patches touching drivers/. Sure, thanks. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 00/16] thermal: exynos: Thermal code rework to use device tree
Eduardo Valentin wrote: The reason is that hwmon sensor device drivers also register via of-thermal. So, adding hwmon interface by default will create a cyclic problem. Hmm, I see. Would it still be possible to flag some thermal zones so that hwmon nodes are created for them? With best wishes, Tobias -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 00/16] ASoC: samsung: Add clk provider for I2S internal clocks
Hello, I've tested the series on my X2 and so far I haven't encountered any obvious issues with it. I have a small question though. With the move to simple-audio-card the old driver (selected by SND_SOC_ODROIDX2) is probably going away after some time. Currently SND_SOC_ODROIDX2 also selects SND_SOC_MAX98090 and SND_SAMSUNG_I2S, which I believe (correct me if I'm wrong) are necessary to use the sound subsystem even with simple-audio-card (since the max98090 codec has to be built at least). I've found no way of selecting these two manually, so at the moment I need both CONFIG_SND_SIMPLE_CARD and SND_SOC_ODROIDX2 enabled to use sound. Is this intended behaviour? And while I'm at it. I'm booting the board with an upstream u-boot version which sets the MPLL to 800MHz, which AFAIK is the clocking rate that makes less 'trouble' (but at the expense of performance). I was wondering if anyone can comment on whether the recent rework has any influence on the behaviour when booting with the vendor u-boot (which sets the MPLL to 880MHz). IIRC then clock rounding issues arose there. It would be interesting to know if this series gets us closer to drive the MPLL with the recommended (?) higher clocking rate. With best wishes, Tobias Sylwester Nawrocki wrote: This series is an attempt to resolve the CDCLK clock gating issue on Odroid X2/U3 as reported by Daniel Drake [1], by exposing the CDCLK gate clock (and the two other clocks) through clk API. Changes since previous version: - removed check for the i2s_opclk1 mux input clock while creating the mux and div clocks, - the DT binding documentation changes reworked (addressing review comments), - added include/dt-bindings/sound/samsung-i2s.h header file defining the clk indices, it's been put into a separate patch together with the I2S DT binding documentation updates to make merging of the ASoC and the dts patches separately easier, - a patch fixing compatible strings of I2S1, I2S2 in exynos4.dtsi is included in this series. This whole series may need more testing on other SoCs, so far I only tested it on Odroid Exynos4412 X2, with the I2S working in slave mode. [1] http://mailman.alsa-project.org/pipermail/alsa-devel/2014-September/081753.html Sylwester Nawrocki (16): ASoC: samsung: i2s: Remove unused gpios field from struct i2s ASoC: samsung: i2s: samsung_i2s_get_driver_data() cleanup ASoC: samsung: i2s: Add return value checks in probe() ASoC: samsung: i2s: Request memory region in driver probe() ASoC: samsung: i2s: Move clk_get() to platform driver probe() ASoC: samsung: i2s: Move clk enable to the platform driver probe() ASoC: samsung: i2s: Add get_other_dai helper function ASoC: samsung: i2s: Remove an unneeded goto usage ASoC: samsung: i2s: Add spinlock in place of local_irq_* calls ASoC: samsung: i2s: Protect more registers with a spinlock ASoC: samsung: odroidx2: Handle I2S CDCLK clock conditionally ASoC: samsung: i2s: Add clk provider DT binding documentation ASoC: samsung: i2s: Add clock provider for the I2S internal clocks ARM: dts: Exynos4 and Odroid X2/U3 sound device nodes update ARM: dts: Switch Odroid X2/U2 to simple-audio-card ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs .../devicetree/bindings/sound/samsung-i2s.txt | 22 ++ arch/arm/boot/dts/exynos4.dtsi | 13 +- arch/arm/boot/dts/exynos4412-odroid-common.dtsi| 27 +- arch/arm/boot/dts/exynos4412-odroidu3.dts |8 +- arch/arm/boot/dts/exynos4412-odroidx2.dts |8 +- include/dt-bindings/sound/samsung-i2s.h|8 + sound/soc/samsung/i2s.c| 362 sound/soc/samsung/odroidx2_max98090.c |6 +- 8 files changed, 295 insertions(+), 159 deletions(-) create mode 100644 include/dt-bindings/sound/samsung-i2s.h -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v6 00/18] thermal: exynos: Thermal code rework to use device tree
1. Introduction Following patches aim to clean up the current implementation of the thermal framework on Exynos devices. The main goal was to use a generic code for reading thermal configuration (of-thermal.c). Due to that redundant exynos_thermal_common.[h|c] files were removed. Around 400 lines of code (LOC) were removed directly by this patch, which is around 20% of the Exynos thermal code base. This work should NOT bring any functional changes to Exynos thermal subsystem. 2. Patch-set structure Then the cpu_cooling functionality has been preserved to allow cooling devices by reducing operating frequency. Definition of trip points and cpufreq's cooling properties were moved to device tree. Then the rework of the way in which configuration data is provided to the Exynos thermal subsystem was performed. Now device tree is used for configuration. 3. Dead code removal Thermal support for some SoCs, previously available in the exynos_tmu_data.c file, was removed since, as of (almost) 3.19-rc3, they didn't have TMU bindings. Moreover, support for cpu_cooling devices was preserved only on those SoCs which had available and working cpufreq driver. 4. Testing Test devices: - Exynos4210 - Trats (TMU zone + cpu_cooling) - Exynos4412 - Trats2/Odroid U3 (TMU zone + cpu_cooling) - Exynos5250 - Arndale (TMU zone + cpu_cooling) - Exynos5420 - Arndale-octa (only TMU zones) Unfortunately, I don't posses Exynos5440 for testing. Its functionality has been preserved in the code, but not tested on the hardware. I would be grateful for help in testing. 5. This work apply on the following tree: kernel.org: 'linux-soc-thermal/next' - Eduardo Velentin's tree SHA1: 1813d80874699145f04af6b05ebab0a6419001fb Lukasz Majewski (18): thermal: exynos: cosmetic: Correct comment format thermal: exynos: Provide thermal_exynos.h file to be included in device tree files arm: dts: trats: Enable TMU on the Exynos4210 trats device arm: dts: odroid: Add LDO10 regulator node necessary for TMU on Odroid arm: dts: odroid: Enable TMU at Exynos4412 based Odroid U3 device arm: dts: Adding CPU cooling binding for Exynos SoCs thermal: exynos: Modify exynos thermal code to use device tree for cpu cooling configuration cpufreq: exynos: Use device tree to determine if cpufreq cooling should be registered thermal: exynos: dts: Add default definition of the TMU sensor parameter dts: Documentation: Extending documentation entry for exynos-thermal thermal: dts: Default trip points definition for Exynos5420 SoCs thermal: exynos: dts: Define default thermal-zones for Exynos4 thermal: dts: exynos: Trip points and sensor configuration data for Exynos5440 dts: Documentation: Update exynos-thermal.txt example for Exynos5440 thermal: exynos: dts: Provide device tree bindings identical to the one in exynos_tmu_data.c thermal: samsung: core: Exynos TMU rework to use device tree for configuration thermal: exynos: Remove exynos_thermal_common.[c|h] files thermal: exynos: Remove exynos_tmu_data.c file .../devicetree/bindings/thermal/exynos-thermal.txt | 17 + arch/arm/boot/dts/exynos3250.dtsi | 2 + arch/arm/boot/dts/exynos4-cpu-thermal.dtsi | 52 +++ arch/arm/boot/dts/exynos4.dtsi | 4 + arch/arm/boot/dts/exynos4210-trats.dts | 19 + arch/arm/boot/dts/exynos4210.dtsi | 30 +- arch/arm/boot/dts/exynos4212.dtsi | 5 +- arch/arm/boot/dts/exynos4412-odroid-common.dtsi| 27 ++ arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi | 24 ++ arch/arm/boot/dts/exynos4412-trats2.dts| 15 + arch/arm/boot/dts/exynos4412.dtsi | 5 +- arch/arm/boot/dts/exynos4x12.dtsi | 1 + arch/arm/boot/dts/exynos5250.dtsi | 29 +- arch/arm/boot/dts/exynos5420-trip-points.dtsi | 35 ++ arch/arm/boot/dts/exynos5420.dtsi | 28 ++ arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi | 24 ++ arch/arm/boot/dts/exynos5440-trip-points.dtsi | 25 ++ arch/arm/boot/dts/exynos5440.dtsi | 18 + drivers/cpufreq/exynos-cpufreq.c | 33 +- drivers/thermal/samsung/Makefile | 2 - drivers/thermal/samsung/exynos_thermal_common.c| 427 - drivers/thermal/samsung/exynos_thermal_common.h| 106 - drivers/thermal/samsung/exynos_tmu.c | 348 +++-- drivers/thermal/samsung/exynos_tmu.h | 76 +--- drivers/thermal/samsung/exynos_tmu_data.c | 264 - include/dt-bindings/thermal/thermal_exynos.h | 28 ++ 26 files changed, 636 insertions(+), 1008 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4-cpu-thermal.dtsi create mode 100644 arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi create mode 100644 arch/arm/boot/dts/exynos5420-trip-points.dtsi create mode 100644
[PATCH v6 01/18] thermal: exynos: cosmetic: Correct comment format
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- None
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
drivers/thermal/samsung/exynos_tmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index d2f1e62..5000727 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -576,7 +576,7 @@ out:
#define exynos5440_tmu_set_emulation NULL
static int exynos_tmu_set_emulation(void *drv_data,unsigned long temp)
{ return -EINVAL; }
-#endif/*CONFIG_THERMAL_EMULATION*/
+#endif /* CONFIG_THERMAL_EMULATION */
static int exynos4210_tmu_read(struct exynos_tmu_data *data)
{
--
2.0.0.rc2
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[PATCH v6 13/18] thermal: dts: exynos: Trip points and sensor configuration data for Exynos5440
This commit provides information about Exynos5440 device configuration.
Previously this information was available in exynos_tmu_data.c file.
Now it is available in the device tree.
Such approach allows reusing some common code for thermal.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- type property removed
- samsung,tmu_ prefix for TMU specific properties has been added
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi | 24 ++
arch/arm/boot/dts/exynos5440-trip-points.dtsi | 25 +++
2 files changed, 49 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
create mode 100644 arch/arm/boot/dts/exynos5440-trip-points.dtsi
diff --git a/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
new file mode 100644
index 000..7b2fba0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
+/*
+ * Device tree sources for Exynos5440 TMU sensor configuration
+ *
+ * Copyright (c) 2014 Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include dt-bindings/thermal/thermal_exynos.h
+
+#thermal-sensor-cells = 0;
+samsung,tmu_gain = 5;
+samsung,tmu_reference_voltage = 16;
+samsung,tmu_noise_cancel_mode = 4;
+samsung,tmu_efuse_value = 0x5d2d;
+samsung,tmu_min_efuse_value = 16;
+samsung,tmu_max_efuse_value = 76;
+samsung,tmu_first_point_trim = 25;
+samsung,tmu_second_point_trim = 70;
+samsung,tmu_default_temp_offset = 25;
+samsung,tmu_cal_type = TYPE_ONE_POINT_TRIMMING;
diff --git a/arch/arm/boot/dts/exynos5440-trip-points.dtsi
b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
new file mode 100644
index 000..48adfa8
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Device tree sources for default Exynos5440 thermal zone definition
+ *
+ * Copyright (c) 2014 Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+polling-delay-passive = 0;
+polling-delay = 0;
+trips {
+ cpu-alert-0 {
+ temperature = 10; /* millicelsius */
+ hysteresis = 0; /* millicelsius */
+ type = active;
+ };
+ cpu-crit-0 {
+ temperature = 105; /* millicelsius */
+ hysteresis = 0; /* millicelsius */
+ type = critical;
+ };
+};
--
2.0.0.rc2
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[PATCH v6 12/18] thermal: exynos: dts: Define default thermal-zones for Exynos4
Trip points corresponding to the one defined in the exynos_tmu_data.c
for Exynos4 have been included.
This thermal-zones attribute is afterwards reused for Exynos4210, Exynos4412
and Exynos5250.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- None
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos4-cpu-thermal.dtsi | 52 ++
1 file changed, 52 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
diff --git a/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
new file mode 100644
index 000..506600a
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
@@ -0,0 +1,52 @@
+/*
+ * Device tree sources for Exynos4 thermal zone
+ *
+ * Copyright (c) 2014 Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include dt-bindings/thermal/thermal.h
+
+/ {
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ thermal-sensors = tmu 0;
+ polling-delay-passive = 0;
+ polling-delay = 0;
+ trips {
+ cpu_alert0: cpu-alert-0 {
+ temperature = 7; /* millicelsius */
+ hysteresis = 1; /* millicelsius */
+ type = active;
+ };
+ cpu_alert1: cpu-alert-1 {
+ temperature = 95000; /* millicelsius */
+ hysteresis = 1; /* millicelsius */
+ type = active;
+ };
+ cpu_alert2: cpu-alert-2 {
+ temperature = 11; /* millicelsius */
+ hysteresis = 1; /* millicelsius */
+ type = active;
+ };
+ cpu_crit0: cpu-crit-0 {
+ temperature = 12; /* millicelsius */
+ hysteresis = 0; /* millicelsius */
+ type = critical;
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = cpu_alert0;
+ };
+ map1 {
+ trip = cpu_alert1;
+ };
+ };
+ };
+ };
+};
--
2.0.0.rc2
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[PATCH v6 14/18] dts: Documentation: Update exynos-thermal.txt example for Exynos5440
Updating exynos-thermal.txt documentation entry for Exynos5440 Signed-off-by: Lukasz Majewski l.majew...@samsung.com --- Changes for v4: - New patch Changes for v5: - None Changes for v6: - None --- Documentation/devicetree/bindings/thermal/exynos-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt index 8497794..0f44932 100644 --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt @@ -74,6 +74,7 @@ Example 2): interrupts = 0 58 0; clocks = clock 21; clock-names = tmu_apbif; + #include exynos5440-tmu-sensor-conf.dtsi }; Example 3): (In case of Exynos5420 with misplaced TRIMINFO register) -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v6 11/18] thermal: dts: Default trip points definition for Exynos5420 SoCs
This code groups in one place default settings of trip points. It is used
in SoCs with multiple instances of TMU sensor.
Separate device tree file prevents from multiple copying of the same data.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- None
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos5420-trip-points.dtsi | 35 +++
1 file changed, 35 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5420-trip-points.dtsi
diff --git a/arch/arm/boot/dts/exynos5420-trip-points.dtsi
b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
new file mode 100644
index 000..09d6c56
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
@@ -0,0 +1,35 @@
+/*
+ * Device tree sources for default Exynos 5420 thermal zone definition
+ *
+ * Copyright (c) 2014 Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+polling-delay-passive = 0;
+polling-delay = 0;
+trips {
+ cpu-alert-0 {
+ temperature = 85000; /* millicelsius */
+ hysteresis = 1; /* millicelsius */
+ type = active;
+ };
+ cpu-alert-1 {
+ temperature = 103000; /* millicelsius */
+ hysteresis = 1; /* millicelsius */
+ type = active;
+ };
+ cpu-alert-2 {
+ temperature = 11; /* millicelsius */
+ hysteresis = 1; /* millicelsius */
+ type = active;
+ };
+ cpu-crit-0 {
+ temperature = 120; /* millicelsius */
+ hysteresis = 0; /* millicelsius */
+ type = critical;
+ };
+};
--
2.0.0.rc2
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[PATCH v6 08/18] cpufreq: exynos: Use device tree to determine if cpufreq cooling should be registered
With thermal subsystem rework it is necessary to tune current cpufreq code
to use cpu frequency change as a potential cooling device.
Now the cpu cooling device is registered only when proper nodes and properties
are available in device tree. Lack of them, however, will not prevent
cpufreq for normal operation.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v6:
- New patch
---
drivers/cpufreq/exynos-cpufreq.c | 33 -
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index f99a0b0..5e98c6b 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -18,10 +18,13 @@
#include linux/cpufreq.h
#include linux/platform_device.h
#include linux/of.h
+#include linux/cpu_cooling.h
+#include linux/cpu.h
#include exynos-cpufreq.h
static struct exynos_dvfs_info *exynos_info;
+static struct thermal_cooling_device *cdev;
static struct regulator *arm_regulator;
static unsigned int locking_frequency;
@@ -156,6 +159,7 @@ static struct cpufreq_driver exynos_driver = {
static int exynos_cpufreq_probe(struct platform_device *pdev)
{
+ struct device_node *cpus, *np;
int ret = -EINVAL;
exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
@@ -198,9 +202,36 @@ static int exynos_cpufreq_probe(struct platform_device
*pdev)
/* Done here as we want to capture boot frequency */
locking_frequency = clk_get_rate(exynos_info-cpu_clk) / 1000;
- if (!cpufreq_register_driver(exynos_driver))
+ ret = cpufreq_register_driver(exynos_driver);
+ if (ret)
+ goto err_cpufreq_reg;
+
+ cpus = of_find_node_by_path(/cpus);
+ if (!cpus) {
+ pr_err(failed to find cpus node\n);
+ return 0;
+ }
+
+ np = of_get_next_child(cpus, NULL);
+ if (!np) {
+ pr_err(failed to find cpus child node\n);
+ of_node_put(cpus);
return 0;
+ }
+
+ if (of_find_property(np, #cooling-cells, NULL)) {
+ cdev = of_cpufreq_cooling_register(np,
+ cpu_present_mask);
+ if (IS_ERR(cdev))
+ pr_err(running cpufreq without cooling device: %ld\n,
+ PTR_ERR(cdev));
+ }
+ of_node_put(np);
+ of_node_put(cpus);
+
+ return 0;
+err_cpufreq_reg:
dev_err(pdev-dev, failed to register cpufreq driver\n);
regulator_put(arm_regulator);
err_vdd_arm:
--
2.0.0.rc2
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Aw: [PATCH v6 05/18] arm: dts: odroid: Enable TMU at Exynos4412 based Odroid U3 device
Hello,
just a small nit concerning the patch subject. Shouldn't it be Enable TMU on
Exynos4412 based Odroid devices (since it's not just for the U3)?
With best wishes,
Tobias
Â
Gesendet:Â Freitag, 23. Januar 2015 um 13:09 Uhr
Von:Â Lukasz Majewski l.majew...@samsung.com
An:Â Eduardo Valentin edubez...@gmail.com, Zhang Rui
rui.zh...@intel.com, Kukjin Kim kgene@samsung.com, Kukjin Kim
kg...@kernel.org
Cc:Â Linux PM list linux...@vger.kernel.org,
linux-samsung-soc@vger.kernel.org linux-samsung-soc@vger.kernel.org,
Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com, Lukasz Majewski
l.majew...@majess.pl, Amit Daniel Kachhap amit.dan...@samsung.com,
Abhilash Kesavan kesavan.abhil...@gmail.com, Abhilash Kesavan
a.kesa...@samsung.com, Chanwoo Choi cw00.c...@samsung.com, Viresh Kumar
viresh.ku...@linaro.org, Lukasz Majewski l.majew...@samsung.com
Betreff:Â [PATCH v6 05/18] arm: dts: odroid: Enable TMU at Exynos4412 based
Odroid U3 device
This commit enables TMU IP block on the Exynos4412 Odroid U3
device.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- None
Changes for v4:
- Rename patch title from thermal: dts: to arm: dts: odroid
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 0adb57c..c7517fc 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -396,6 +396,11 @@
ehci: ehci@1258 {
status = okay;
};
+
+ tmu@100C {
+ vtmu-supply = ldo10_reg;
+ status = okay;
+ };
};
pinctrl_1 {
--
2.0.0.rc2
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[PATCH v6 10/18] dts: Documentation: Extending documentation entry for exynos-thermal
Properties necessary for providing Exynos thermal configuration via device
tree.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v3:
- New patch
Changes for v4:
- Remove entry regarding Exynos5440
Changes for v5:
- None
Changes for v6:
- None
---
.../devicetree/bindings/thermal/exynos-thermal.txt | 16
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index ae738f5..8497794 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -39,6 +39,18 @@
- vtmu-supply: This entry is optional and provides the regulator node supplying
voltage to TMU. If needed this entry can be placed inside
board/platform specific dts file.
+Following properties are mandatory (depending on SoC):
+- samsung,tmu_gain: Gain value for internal TMU operation.
+- samsung,tmu_reference_voltage: Value of TMU IP block's reference voltage
+- samsung,tmu_noise_cancel_mode: Mode for noise cancellation
+- samsung,tmu_efuse_value: Default level of temperature - it is needed when
+ in factory fusing produced wrong value
+- samsung,tmu_min_efuse_value: Minimum temperature fused value
+- samsung,tmu_max_efuse_value: Maximum temperature fused value
+- samsung,tmu_first_point_trim: First point trimming value
+- samsung,tmu_second_point_trim: Second point trimming value
+- samsung,tmu_default_temp_offset: Default temperature offset
+- samsung,tmu_cal_type: Callibration type
Example 1):
@@ -51,6 +63,7 @@ Example 1):
clock-names = tmu_apbif;
status = disabled;
vtmu-supply = tmu_regulator_node;
+ #include exynos4412-tmu-sensor-conf.dtsi
};
Example 2):
@@ -70,6 +83,7 @@ Example 3): (In case of Exynos5420 with misplaced TRIMINFO
register)
interrupts = 0 184 0;
clocks = clock 318, clock 318;
clock-names = tmu_apbif, tmu_triminfo_apbif;
+ #include exynos4412-tmu-sensor-conf.dtsi
};
tmu_cpu3: tmu@1006c000 {
@@ -78,6 +92,7 @@ Example 3): (In case of Exynos5420 with misplaced TRIMINFO
register)
interrupts = 0 185 0;
clocks = clock 318, clock 319;
clock-names = tmu_apbif, tmu_triminfo_apbif;
+ #include exynos4412-tmu-sensor-conf.dtsi
};
tmu_gpu: tmu@100a {
@@ -86,6 +101,7 @@ Example 3): (In case of Exynos5420 with misplaced TRIMINFO
register)
interrupts = 0 215 0;
clocks = clock 319, clock 318;
clock-names = tmu_apbif, tmu_triminfo_apbif;
+ #include exynos4412-tmu-sensor-conf.dtsi
};
Note: For multi-instance tmu each instance should have an alias correctly
--
2.0.0.rc2
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[PATCH v6 07/18] thermal: exynos: Modify exynos thermal code to use device tree for cpu cooling configuration
Up till now exynos_tmu_data.c was used for storing CPU cooling configuration
data. Now the Exynos thermal core code uses device tree to get this data.
For this purpose generic thermal code for configuring CPU cooling was
used.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- Rewrite code responsible for registering CPU cooling device to not depend
on explicit /cpus/cpu@0 path since now Exynos SoCs use new cpu node
names (e.g. cpu@A00). New approach iterates over cpus node children.
- Patch title changed to thermal: exynos
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- Remove exynos cpufreq related code (exynos-cpufreq.c) from this commit
---
drivers/thermal/samsung/exynos_thermal_common.c | 122 ++--
drivers/thermal/samsung/exynos_tmu.c| 7 --
drivers/thermal/samsung/exynos_tmu.h| 5 -
drivers/thermal/samsung/exynos_tmu_data.c | 42 +---
4 files changed, 73 insertions(+), 103 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 6dc3815..00aa688 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -133,47 +133,62 @@ static int exynos_get_crit_temp(struct
thermal_zone_device *thermal,
static int exynos_bind(struct thermal_zone_device *thermal,
struct thermal_cooling_device *cdev)
{
- int ret = 0, i, tab_size, level;
- struct freq_clip_table *tab_ptr, *clip_data;
struct exynos_thermal_zone *th_zone = thermal-devdata;
struct thermal_sensor_conf *data = th_zone-sensor_conf;
+ struct device_node *child, *gchild, *np;
+ struct of_phandle_args cooling_spec;
+ unsigned long max, state = 0;
+ int ret = 0, i = 0;
- tab_ptr = (struct freq_clip_table *)data-cooling_data.freq_data;
- tab_size = data-cooling_data.freq_clip_count;
-
- if (tab_ptr == NULL || tab_size == 0)
+ /*
+* Below code is necessary to skip binding when cpufreq's
+* frequency table is not yet initialized.
+*/
+ cdev-ops-get_max_state(cdev, state);
+ if (!state !th_zone-cool_dev_size) {
+ th_zone-cool_dev_size = 1;
+ th_zone-cool_dev[0] = cdev;
+ th_zone-bind = false;
return 0;
+ }
- /* find the cooling device registered*/
- for (i = 0; i th_zone-cool_dev_size; i++)
- if (cdev == th_zone-cool_dev[i])
- break;
+ np = of_find_node_by_path(/thermal-zones/cpu-thermal);
+ if (!np) {
+ pr_err(failed to find thmerla-zones/cpu-thermal node\n);
+ return -ENOENT;
+ }
- /* No matching cooling device */
- if (i == th_zone-cool_dev_size)
- return 0;
+ child = of_get_child_by_name(np, cooling-maps);
- /* Bind the thermal zone to the cpufreq cooling device */
- for (i = 0; i tab_size; i++) {
- clip_data = (struct freq_clip_table *)(tab_ptr[i]);
- level = cpufreq_cooling_get_level(0, clip_data-freq_clip_max);
- if (level == THERMAL_CSTATE_INVALID)
- return 0;
- switch (GET_ZONE(i)) {
- case MONITOR_ZONE:
- case WARN_ZONE:
- if (thermal_zone_bind_cooling_device(thermal, i, cdev,
- level, 0)) {
- dev_err(data-dev,
- error unbinding cdev inst=%d\n, i);
- ret = -EINVAL;
- }
- th_zone-bind = true;
- break;
- default:
+ for_each_child_of_node(child, gchild) {
+ ret = of_parse_phandle_with_args(gchild, cooling-device,
+#cooling-cells,
+0, cooling_spec);
+ if (ret 0) {
+ pr_err(missing cooling_device property\n);
+ goto end;
+ }
+
+ if (cooling_spec.args_count 2) {
ret = -EINVAL;
+ goto end;
}
+
+ max = cooling_spec.args[0];
+ if (thermal_zone_bind_cooling_device(thermal, i, cdev,
+max, 0)) {
+ dev_err(data-dev,
+ thermal error unbinding cdev inst=%d\n, i);
+
+ ret = -EINVAL;
+ goto end;
+ }
+ i++;
}
+ th_zone-bind = true;
+end:
+ of_node_put(child);
+ of_node_put(np);
return ret;
}
@@ -182,16
[PATCH v6 09/18] thermal: exynos: dts: Add default definition of the TMU sensor parameter
Exynos 4 and 5 family of SoCs uses almost identical TMU sensor to measure the on chip temperature. For this reason it is possible to group TMU configuration parameters in one dts file. Signed-off-by: Lukasz Majewski l.majew...@samsung.com --- Changes for v2: - None Changes for v3: - samsung,tmu_ prefix for TMU specific properties has been added Changes for v4: - None Changes for v5: - None Changes for v6: - None --- arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi | 24 +++ 1 file changed, 24 insertions(+) create mode 100644 arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi diff --git a/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi new file mode 100644 index 000..e3f7934 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi @@ -0,0 +1,24 @@ +/* + * Device tree sources for Exynos4412 TMU sensor configuration + * + * Copyright (c) 2014 Lukasz Majewski l.majew...@samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include dt-bindings/thermal/thermal_exynos.h + +#thermal-sensor-cells = 0; +samsung,tmu_gain = 8; +samsung,tmu_reference_voltage = 16; +samsung,tmu_noise_cancel_mode = 4; +samsung,tmu_efuse_value = 55; +samsung,tmu_min_efuse_value = 40; +samsung,tmu_max_efuse_value = 100; +samsung,tmu_first_point_trim = 25; +samsung,tmu_second_point_trim = 85; +samsung,tmu_default_temp_offset = 50; +samsung,tmu_cal_type = TYPE_ONE_POINT_TRIMMING; -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v6 06/18] arm: dts: Adding CPU cooling binding for Exynos SoCs
Presented patch aims to move data necessary for correct CPU cooling device
configuration from exynos_tmu_data.c to device tree.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- Adjust CPU's DT nodes to work with newest ti-soc-thermal/next branch
- Patch title has been changed from thermal: cpu_cooling: dts: ...
Changes for v4:
- Spaces and tabs cleanup
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos4210-trats.dts | 15 +++
arch/arm/boot/dts/exynos4210.dtsi | 5 -
arch/arm/boot/dts/exynos4212.dtsi | 5 -
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 15 +++
arch/arm/boot/dts/exynos4412-trats2.dts | 15 +++
arch/arm/boot/dts/exynos4412.dtsi | 5 -
arch/arm/boot/dts/exynos5250.dtsi | 20 +++-
7 files changed, 76 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index 61009f4..e3879c0 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -428,6 +428,21 @@
status = okay;
};
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ cooling-maps {
+ map0 {
+/* Corresponds to 800MHz at freq_table */
+cooling-device = cpu0 2 2;
+ };
+ map1 {
+/* Corresponds to 200MHz at freq_table */
+cooling-device = cpu0 4 4;
+ };
+ };
+ };
+ };
+
camera {
pinctrl-names = default;
pinctrl-0 = ;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index bcc9e63..2e66df8 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -35,10 +35,13 @@
#address-cells = 1;
#size-cells = 0;
- cpu@900 {
+ cpu0: cpu@900 {
device_type = cpu;
compatible = arm,cortex-a9;
reg = 0x900;
+ cooling-min-level = 4;
+ cooling-max-level = 2;
+ #cooling-cells = 2; /* min followed by max */
};
cpu@901 {
diff --git a/arch/arm/boot/dts/exynos4212.dtsi
b/arch/arm/boot/dts/exynos4212.dtsi
index dd0a43e..5be03288 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -26,10 +26,13 @@
#address-cells = 1;
#size-cells = 0;
- cpu@A00 {
+ cpu0: cpu@A00 {
device_type = cpu;
compatible = arm,cortex-a9;
reg = 0xA00;
+ cooling-min-level = 13;
+ cooling-max-level = 7;
+ #cooling-cells = 2; /* min followed by max */
};
cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index c7517fc..25b4f7d 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -401,6 +401,21 @@
vtmu-supply = ldo10_reg;
status = okay;
};
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ cooling-maps {
+ map0 {
+/* Corresponds to 800MHz at freq_table */
+cooling-device = cpu0 7 7;
+ };
+ map1 {
+/* Corresponds to 200MHz at freq_table */
+cooling-device = cpu0 13 13;
+ };
+ };
+ };
+ };
};
pinctrl_1 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 29231b4..52a7771 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -863,6 +863,21 @@
pulldown-ohm = 10; /* 100K */
io-channels = adc 2; /* Battery temperature */
};
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ cooling-maps {
+ map0 {
+/* Corresponds to 800MHz at freq_table */
+cooling-device = cpu0 7 7;
+ };
+
[PATCH v6 02/18] thermal: exynos: Provide thermal_exynos.h file to be included in device tree files
This patch is a preparatory patch to be able to read Exynos thermal
configuration from the device tree.
It turned out that DTC is not able to interpret enums properly and hence
it is necessary to #define those values explicitly.
For this reason the ./include/dt-bindings/thermal/thermal_exynos.h file
has been introduced.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- Restore 'enum soc_type type' since TMU sensor type will be extracted from
device tree compatible
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
drivers/thermal/samsung/exynos_tmu.h | 12 +++-
include/dt-bindings/thermal/thermal_exynos.h | 28
2 files changed, 31 insertions(+), 9 deletions(-)
create mode 100644 include/dt-bindings/thermal/thermal_exynos.h
diff --git a/drivers/thermal/samsung/exynos_tmu.h
b/drivers/thermal/samsung/exynos_tmu.h
index da3009b..7f880d2 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -26,14 +26,6 @@
#include exynos_thermal_common.h
-enum calibration_type {
- TYPE_ONE_POINT_TRIMMING,
- TYPE_ONE_POINT_TRIMMING_25,
- TYPE_ONE_POINT_TRIMMING_85,
- TYPE_TWO_POINT_TRIMMING,
- TYPE_NONE,
-};
-
enum soc_type {
SOC_ARCH_EXYNOS3250 = 1,
SOC_ARCH_EXYNOS4210,
@@ -44,6 +36,7 @@ enum soc_type {
SOC_ARCH_EXYNOS5420_TRIMINFO,
SOC_ARCH_EXYNOS5440,
};
+#include dt-bindings/thermal/thermal_exynos.h
/**
* struct exynos_tmu_platform_data
@@ -115,8 +108,9 @@ struct exynos_tmu_platform_data {
u8 second_point_trim;
u8 default_temp_offset;
- enum calibration_type cal_type;
enum soc_type type;
+ u32 cal_type;
+ u32 cal_mode;
struct freq_clip_table freq_tab[4];
unsigned int freq_tab_count;
};
diff --git a/include/dt-bindings/thermal/thermal_exynos.h
b/include/dt-bindings/thermal/thermal_exynos.h
new file mode 100644
index 000..0646500
--- /dev/null
+++ b/include/dt-bindings/thermal/thermal_exynos.h
@@ -0,0 +1,28 @@
+/*
+ * thermal_exynos.h - Samsung EXYNOS TMU device tree definitions
+ *
+ * Copyright (C) 2014 Samsung Electronics
+ * Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _EXYNOS_THERMAL_TMU_DT_H
+#define _EXYNOS_THERMAL_TMU_DT_H
+
+#define TYPE_ONE_POINT_TRIMMING 0
+#define TYPE_ONE_POINT_TRIMMING_25 1
+#define TYPE_ONE_POINT_TRIMMING_85 2
+#define TYPE_TWO_POINT_TRIMMING 3
+#define TYPE_NONE 4
+
+#endif /* _EXYNOS_THERMAL_TMU_DT_H */
--
2.0.0.rc2
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[PATCH v6 05/18] arm: dts: odroid: Enable TMU at Exynos4412 based Odroid U3 device
This commit enables TMU IP block on the Exynos4412 Odroid U3
device.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- None
Changes for v4:
- Rename patch title from thermal: dts: to arm: dts: odroid
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 0adb57c..c7517fc 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -396,6 +396,11 @@
ehci: ehci@1258 {
status = okay;
};
+
+ tmu@100C {
+ vtmu-supply = ldo10_reg;
+ status = okay;
+ };
};
pinctrl_1 {
--
2.0.0.rc2
--
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[PATCH v6 04/18] arm: dts: odroid: Add LDO10 regulator node necessary for TMU on Odroid
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- Patch title has been changed from thermal: dts: exynos to arm: dts: Odroid
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 3fbf588..0adb57c 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -231,6 +231,13 @@
regulator-always-on;
};
+ ldo10_reg: LDO10 {
+ regulator-name = VDD18_MIPIHSI_1.8V;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
ldo11_reg: LDO11 {
regulator-name = VDD18_ABB1_1.8V;
regulator-min-microvolt = 180;
--
2.0.0.rc2
--
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[PATCH v6 03/18] arm: dts: trats: Enable TMU on the Exynos4210 trats device
The thermal IP block (Thermal Management Unit) called TMU has been enabled
in this device.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- Patch title has been changed from thermal: dts: arm to arm: dts: trats
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos4210-trats.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index 7208362..61009f4 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -424,6 +424,10 @@
status = okay;
};
+ tmu@100C {
+ status = okay;
+ };
+
camera {
pinctrl-names = default;
pinctrl-0 = ;
--
2.0.0.rc2
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[PATCH v6 16/18] thermal: samsung: core: Exynos TMU rework to use device tree for configuration
This patch brings support for providing configuration via device tree.
Previously this data has been hardcoded in the exynos_tmu_data.c file.
Such approach was not scalable and very often required copying the whole
data.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- Adjust exynos_tmu.c code to the newest ti-soc-thermal repository
- Usage of of-thermal.c exported trip points table
Changes for v3:
- Adding exynos_of_get_soc_type() method to set SOC type from device's
compatible string
- samsung,tmu_ prefix for TMU specific properties has been added
Changes for v4:
- None
Changes for v5:
- Remove duplicated exynos_tmu_initialize() - reported by Abhilash Kesavan
a.kesa...@samsung.com
Changes for v6:
- change exynos_get_temp() definition to be static
- squash with v5's patch:
thermal: exynos: Remove not needed exynos_tmu_init_data declarations from
exynos_tmu.h
- Remove space after cast to squash checkpatch.pl --strict
---
drivers/thermal/samsung/Makefile | 2 -
drivers/thermal/samsung/exynos_tmu.c | 339 ++-
drivers/thermal/samsung/exynos_tmu.h | 61 +--
3 files changed, 220 insertions(+), 182 deletions(-)
diff --git a/drivers/thermal/samsung/Makefile b/drivers/thermal/samsung/Makefile
index c09d830..1e47d0d 100644
--- a/drivers/thermal/samsung/Makefile
+++ b/drivers/thermal/samsung/Makefile
@@ -3,5 +3,3 @@
#
obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
exynos_thermal-y := exynos_tmu.o
-exynos_thermal-y += exynos_tmu_data.o
-exynos_thermal-$(CONFIG_EXYNOS_THERMAL_CORE) += exynos_thermal_common.o
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index ae30f6a..864eec8 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -1,6 +1,10 @@
/*
* exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
*
+ * Copyright (C) 2014 Samsung Electronics
+ * Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
+ * Lukasz Majewski l.majew...@samsung.com
+ *
* Copyright (C) 2011 Samsung Electronics
* Donggeun Kim dg77@samsung.com
* Amit Daniel Kachhap amit.kach...@linaro.org
@@ -31,8 +35,8 @@
#include linux/platform_device.h
#include linux/regulator/consumer.h
-#include exynos_thermal_common.h
#include exynos_tmu.h
+#include ../thermal_core.h
/* Exynos generic registers */
#define EXYNOS_TMU_REG_TRIMINFO0x0
@@ -115,6 +119,7 @@
#define EXYNOS5440_TMU_TH_RISE4_SHIFT 24
#define EXYNOS5440_EFUSE_SWAP_OFFSET 8
+#define MCELSIUS 1000
/**
* struct exynos_tmu_data : A structure to hold the private data of the TMU
driver
@@ -150,7 +155,8 @@ struct exynos_tmu_data {
struct clk *clk, *clk_sec;
u8 temp_error1, temp_error2;
struct regulator *regulator;
- struct thermal_sensor_conf *reg_conf;
+ struct thermal_zone_device *tzd;
+
int (*tmu_initialize)(struct platform_device *pdev);
void (*tmu_control)(struct platform_device *pdev, bool on);
int (*tmu_read)(struct exynos_tmu_data *data);
@@ -159,6 +165,33 @@ struct exynos_tmu_data {
void (*tmu_clear_irqs)(struct exynos_tmu_data *data);
};
+static void exynos_report_trigger(struct exynos_tmu_data *p)
+{
+ char data[10], *envp[] = { data, NULL };
+ struct thermal_zone_device *tz = p-tzd;
+ unsigned long temp;
+ unsigned int i;
+
+ if (!p) {
+ pr_err(Wrong temperature configuration data\n);
+ return;
+ }
+
+ thermal_zone_device_update(tz);
+
+ mutex_lock(tz-lock);
+ /* Find the level for which trip happened */
+ for (i = 0; i of_thermal_get_ntrips(tz); i++) {
+ tz-ops-get_trip_temp(tz, i, temp);
+ if (tz-last_temperature temp)
+ break;
+ }
+
+ snprintf(data, sizeof(data), %u, i);
+ kobject_uevent_env(tz-device.kobj, KOBJ_CHANGE, envp);
+ mutex_unlock(tz-lock);
+}
+
/*
* TMU treats temperature as a mapped temperature code.
* The temperature is converted differently depending on the calibration type.
@@ -234,14 +267,25 @@ static void sanitize_temp_error(struct exynos_tmu_data
*data, u32 trim_info)
static u32 get_th_reg(struct exynos_tmu_data *data, u32 threshold, bool
falling)
{
- struct exynos_tmu_platform_data *pdata = data-pdata;
+ struct thermal_zone_device *tz = data-tzd;
+ const struct thermal_trip * const trips =
+ of_thermal_get_trip_points(tz);
+ unsigned long temp;
int i;
- for (i = 0; i pdata-non_hw_trigger_levels; i++) {
- u8 temp = pdata-trigger_levels[i];
+ if (!trips) {
+ pr_err(%s: Cannot get trip points from of-thermal.c!\n,
+ __func__);
+ return 0;
+ }
+ for (i = 0; i
[PATCH v6 17/18] thermal: exynos: Remove exynos_thermal_common.[c|h] files
After defining all necessary Exynos data in the device tree and heavy
reusage of the of-thermal.c those files can be removed.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- None
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
drivers/thermal/samsung/exynos_thermal_common.c | 445
drivers/thermal/samsung/exynos_thermal_common.h | 106 --
2 files changed, 551 deletions(-)
delete mode 100644 drivers/thermal/samsung/exynos_thermal_common.c
delete mode 100644 drivers/thermal/samsung/exynos_thermal_common.h
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
deleted file mode 100644
index 00aa688..000
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ /dev/null
@@ -1,445 +0,0 @@
-/*
- * exynos_thermal_common.c - Samsung EXYNOS common thermal file
- *
- * Copyright (C) 2013 Samsung Electronics
- * Amit Daniel Kachhap amit.dan...@samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include linux/cpu_cooling.h
-#include linux/err.h
-#include linux/slab.h
-#include linux/thermal.h
-
-#include exynos_thermal_common.h
-
-struct exynos_thermal_zone {
- enum thermal_device_mode mode;
- struct thermal_zone_device *therm_dev;
- struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
- unsigned int cool_dev_size;
- struct platform_device *exynos4_dev;
- struct thermal_sensor_conf *sensor_conf;
- bool bind;
-};
-
-/* Get mode callback functions for thermal zone */
-static int exynos_get_mode(struct thermal_zone_device *thermal,
- enum thermal_device_mode *mode)
-{
- struct exynos_thermal_zone *th_zone = thermal-devdata;
- if (th_zone)
- *mode = th_zone-mode;
- return 0;
-}
-
-/* Set mode callback functions for thermal zone */
-static int exynos_set_mode(struct thermal_zone_device *thermal,
- enum thermal_device_mode mode)
-{
- struct exynos_thermal_zone *th_zone = thermal-devdata;
- if (!th_zone) {
- dev_err(thermal-device,
- thermal zone not registered\n);
- return 0;
- }
-
- mutex_lock(thermal-lock);
-
- if (mode == THERMAL_DEVICE_ENABLED
- !th_zone-sensor_conf-trip_data.trigger_falling)
- thermal-polling_delay = IDLE_INTERVAL;
- else
- thermal-polling_delay = 0;
-
- mutex_unlock(thermal-lock);
-
- th_zone-mode = mode;
- thermal_zone_device_update(thermal);
- dev_dbg(th_zone-sensor_conf-dev,
- thermal polling set for duration=%d msec\n,
- thermal-polling_delay);
- return 0;
-}
-
-
-/* Get trip type callback functions for thermal zone */
-static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
-enum thermal_trip_type *type)
-{
- struct exynos_thermal_zone *th_zone = thermal-devdata;
- int max_trip = th_zone-sensor_conf-trip_data.trip_count;
- int trip_type;
-
- if (trip 0 || trip = max_trip)
- return -EINVAL;
-
- trip_type = th_zone-sensor_conf-trip_data.trip_type[trip];
-
- if (trip_type == SW_TRIP)
- *type = THERMAL_TRIP_CRITICAL;
- else if (trip_type == THROTTLE_ACTIVE)
- *type = THERMAL_TRIP_ACTIVE;
- else if (trip_type == THROTTLE_PASSIVE)
- *type = THERMAL_TRIP_PASSIVE;
- else
- return -EINVAL;
-
- return 0;
-}
-
-/* Get trip temperature callback functions for thermal zone */
-static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
- unsigned long *temp)
-{
- struct exynos_thermal_zone *th_zone = thermal-devdata;
- int max_trip = th_zone-sensor_conf-trip_data.trip_count;
-
- if (trip 0 || trip = max_trip)
- return -EINVAL;
-
- *temp = th_zone-sensor_conf-trip_data.trip_val[trip];
- /* convert the temperature into millicelsius */
- *temp = *temp * MCELSIUS;
-
- return 0;
-}
-
-/* Get critical temperature callback functions for thermal zone */
-static int
[PATCH v6 18/18] thermal: exynos: Remove exynos_tmu_data.c file
Data already present in the exynos_tmu_data.c file has been moved to the
appropriate device tree files.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- None
Changes for v4:
- None
Changes for v5:
- None
Changes for v6:
- None
---
drivers/thermal/samsung/exynos_tmu_data.c | 228 --
1 file changed, 228 deletions(-)
delete mode 100644 drivers/thermal/samsung/exynos_tmu_data.c
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c
b/drivers/thermal/samsung/exynos_tmu_data.c
deleted file mode 100644
index a993f3d..000
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ /dev/null
@@ -1,228 +0,0 @@
-/*
- * exynos_tmu_data.c - Samsung EXYNOS tmu data file
- *
- * Copyright (C) 2013 Samsung Electronics
- * Amit Daniel Kachhap amit.dan...@samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include exynos_thermal_common.h
-#include exynos_tmu.h
-
-struct exynos_tmu_init_data const exynos4210_default_tmu_data = {
- .tmu_data = {
- {
- .threshold = 80,
- .trigger_levels[0] = 5,
- .trigger_levels[1] = 20,
- .trigger_levels[2] = 30,
- .trigger_enable[0] = true,
- .trigger_enable[1] = true,
- .trigger_enable[2] = true,
- .trigger_enable[3] = false,
- .trigger_type[0] = THROTTLE_ACTIVE,
- .trigger_type[1] = THROTTLE_ACTIVE,
- .trigger_type[2] = SW_TRIP,
- .max_trigger_level = 4,
- .non_hw_trigger_levels = 3,
- .gain = 15,
- .reference_voltage = 7,
- .cal_type = TYPE_ONE_POINT_TRIMMING,
- .min_efuse_value = 40,
- .max_efuse_value = 100,
- .first_point_trim = 25,
- .second_point_trim = 85,
- .default_temp_offset = 50,
- .type = SOC_ARCH_EXYNOS4210,
- },
- },
- .tmu_count = 1,
-};
-
-#define EXYNOS3250_TMU_DATA \
- .threshold_falling = 10, \
- .trigger_levels[0] = 70, \
- .trigger_levels[1] = 95, \
- .trigger_levels[2] = 110, \
- .trigger_levels[3] = 120, \
- .trigger_enable[0] = true, \
- .trigger_enable[1] = true, \
- .trigger_enable[2] = true, \
- .trigger_enable[3] = false, \
- .trigger_type[0] = THROTTLE_ACTIVE, \
- .trigger_type[1] = THROTTLE_ACTIVE, \
- .trigger_type[2] = SW_TRIP, \
- .trigger_type[3] = HW_TRIP, \
- .max_trigger_level = 4, \
- .non_hw_trigger_levels = 3, \
- .gain = 8, \
- .reference_voltage = 16, \
- .noise_cancel_mode = 4, \
- .cal_type = TYPE_TWO_POINT_TRIMMING, \
- .efuse_value = 55, \
- .min_efuse_value = 40, \
- .max_efuse_value = 100, \
- .first_point_trim = 25, \
- .second_point_trim = 85, \
- .default_temp_offset = 50
-
-struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
- .tmu_data = {
- {
- EXYNOS3250_TMU_DATA,
- .type = SOC_ARCH_EXYNOS3250,
- },
- },
- .tmu_count = 1,
-};
-
-#define EXYNOS4412_TMU_DATA \
- .threshold_falling = 10, \
- .trigger_levels[0] = 70, \
- .trigger_levels[1] = 95, \
- .trigger_levels[2] = 110, \
- .trigger_levels[3] = 120, \
- .trigger_enable[0] = true, \
- .trigger_enable[1] = true, \
- .trigger_enable[2] = true, \
- .trigger_enable[3] = false, \
- .trigger_type[0] = THROTTLE_ACTIVE, \
- .trigger_type[1] = THROTTLE_ACTIVE, \
- .trigger_type[2] = SW_TRIP, \
- .trigger_type[3] = HW_TRIP, \
- .max_trigger_level = 4, \
- .non_hw_trigger_levels = 3, \
- .gain = 8, \
- .reference_voltage = 16, \
- .noise_cancel_mode = 4, \
- .cal_type = TYPE_ONE_POINT_TRIMMING, \
- .efuse_value = 55, \
- .min_efuse_value = 40, \
- .max_efuse_value = 100, \
- .first_point_trim = 25, \
- .second_point_trim = 85, \
- .default_temp_offset = 50
-
-struct exynos_tmu_init_data const exynos4412_default_tmu_data = {
- .tmu_data = {
- {
-
[PATCH v6 15/18] thermal: exynos: dts: Provide device tree bindings identical to the one in exynos_tmu_data.c
Presented device tree bindings provide data already hardcoded in the
exynos_tmu_data.c file.
After this commit, it should be possible to reuse common thermal core
framework in Exynos SoCs.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- Add proper TMU entries for exynos3250.dtsi
Changes for v3:
- Remove type DT properties, which will be extracted from compatible
- samsung,tmu_ prefix for TMU specific properties has been added
Changes for v4:
- Providing mandatory properties for thermal-zones (Exynos4210 and Exynos5250)
Changes for v5:
- None
Changes for v6:
- None
---
arch/arm/boot/dts/exynos3250.dtsi | 2 ++
arch/arm/boot/dts/exynos4.dtsi| 4
arch/arm/boot/dts/exynos4210.dtsi | 25 -
arch/arm/boot/dts/exynos4x12.dtsi | 1 +
arch/arm/boot/dts/exynos5250.dtsi | 9 +++--
arch/arm/boot/dts/exynos5420.dtsi | 28
arch/arm/boot/dts/exynos5440.dtsi | 18 ++
7 files changed, 84 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 2246549..8cc078c 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -18,6 +18,7 @@
*/
#include skeleton.dtsi
+#include exynos4-cpu-thermal.dtsi
#include dt-bindings/clock/exynos3250.h
/ {
@@ -188,6 +189,7 @@
interrupts = 0 216 0;
clocks = cmu CLK_TMU_APBIF;
clock-names = tmu_apbif;
+ #include exynos4412-tmu-sensor-conf.dtsi
status = disabled;
};
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index b8168f1..f18d746 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -645,4 +645,8 @@
samsung,sysreg = sys_reg;
status = disabled;
};
+
+ tmu: tmu@100C {
+ #include exynos4412-tmu-sensor-conf.dtsi
+ };
};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index 2e66df8..78a43b0 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
#include exynos4.dtsi
#include exynos4210-pinctrl.dtsi
+#include exynos4-cpu-thermal.dtsi
/ {
compatible = samsung,exynos4210, samsung,exynos4;
@@ -146,16 +147,38 @@
reg = 0x0386 0x1000;
};
- tmu@100C {
+ tmu: tmu@100C {
compatible = samsung,exynos4210-tmu;
interrupt-parent = combiner;
reg = 0x100C 0x100;
interrupts = 2 4;
clocks = clock CLK_TMU_APBIF;
clock-names = tmu_apbif;
+ samsung,tmu_gain = 15;
+ samsung,tmu_reference_voltage = 7;
status = disabled;
};
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = 0;
+ polling-delay = 0;
+ thermal-sensors = tmu 0;
+
+ trips {
+ cpu_alert0: cpu-alert-0 {
+ temperature = 85000; /* millicelsius */
+ };
+ cpu_alert1: cpu-alert-1 {
+ temperature = 10; /* millicelsius */
+ };
+ cpu_alert2: cpu-alert-2 {
+ temperature = 11; /* millicelsius */
+ };
+ };
+ };
+ };
+
g2d@1280 {
compatible = samsung,s5pv210-g2d;
reg = 0x1280 0x1000;
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi
b/arch/arm/boot/dts/exynos4x12.dtsi
index 93b7040..3ee2031 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
#include exynos4.dtsi
#include exynos4x12-pinctrl.dtsi
+#include exynos4-cpu-thermal.dtsi
/ {
aliases {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 4641d3c..90211c0 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,7 +20,7 @@
#include dt-bindings/clock/exynos5250.h
#include exynos5.dtsi
#include exynos5250-pinctrl.dtsi
-
+#include exynos4-cpu-thermal.dtsi
#include dt-bindings/clock/exynos-audss-clk.h
/ {
@@ -236,16 +236,21 @@
status = disabled;
};
- tmu@1006 {
+ tmu: tmu@1006 {
compatible = samsung,exynos5250-tmu;
reg = 0x1006 0x100;
interrupts = 0 65 0;
clocks = clock CLK_TMU;
clock-names = tmu_apbif;
+ #include exynos4412-tmu-sensor-conf.dtsi
};
Re: [PATCH] ARM: exynos_defconfig: Enable PMIC and MUIC drivers for Gears and Trats2
On 01/23/15 23:22, Krzysztof Kozlowski wrote: Enable drivers for PMICs and MUICs present on Exynos-based devices: - max14577: charger, extcon, fuel gauge (max17040), regulator, used on: Gear 1, Gear 2, - max77693: charger, extcon, fuel gauge (max17042), used on: Trats2, This allows full usage of charging stack on these devices along with extcon connector. Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com --- arch/arm/configs/exynos_defconfig | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 3d0c5d65c741..01758378a1b1 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -83,6 +83,10 @@ CONFIG_I2C_S3C2410=y CONFIG_DEBUG_GPIO=y CONFIG_POWER_SUPPLY=y CONFIG_BATTERY_SBS=y +CONFIG_BATTERY_MAX17040=y +CONFIG_BATTERY_MAX17042=y +CONFIG_CHARGER_MAX14577=y +CONFIG_CHARGER_MAX77693=y CONFIG_CHARGER_TPS65090=y CONFIG_HWMON=y CONFIG_SENSORS_LM90=y @@ -94,6 +98,7 @@ CONFIG_S3C2410_WATCHDOG=y CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_MFD_CROS_EC_SPI=y +CONFIG_MFD_MAX14577=y CONFIG_MFD_MAX77686=y CONFIG_MFD_MAX77693=y CONFIG_MFD_MAX8997=y @@ -102,6 +107,7 @@ CONFIG_MFD_TPS65090=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MAX14577=y CONFIG_REGULATOR_MAX8997=y CONFIG_REGULATOR_MAX77686=y CONFIG_REGULATOR_MAX77802=y @@ -168,6 +174,9 @@ CONFIG_COMMON_CLK_MAX77686=y CONFIG_COMMON_CLK_MAX77802=y CONFIG_COMMON_CLK_S2MPS11=y CONFIG_EXYNOS_IOMMU=y +CONFIG_EXTCON=y +CONFIG_EXTCON_MAX14577=y +CONFIG_EXTCON_MAX77693=y CONFIG_IIO=y CONFIG_EXYNOS_ADC=y CONFIG_PWM=y I've applied, thanks. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: exynos_defconfig: Enable CONFIG_FHANDLE
On 01/23/15 17:56, Javier Martinez Canillas wrote: Hello Kukjin, Hi, On 01/19/2015 06:43 AM, Joonyoung Shim wrote: I also hope merge this, already multi_v7_defconfig supports this. I would also hope this to be merged since it's required to boot using systemd. Thanks. This is certainly required for newer systemd and has to be enabled. But it would also be great to have enabled all the config symbols that are listed as requirements in the systemd README file: http://cgit.freedesktop.org/systemd/systemd/tree/README. Tony added that support to OMAP2+ defconfig in commit 673ce00c (ARM: omap2plus_defconfig: Add support for distros with systemd) so the same should be done in exynos_defconfig. That can of course be a follow-up patch though, so for $subject: Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk Thanks, applied. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3] ARM: exynos_defconfig Enable CONFIG_LOCKUP_DETECTOR.
On 01/13/15 17:18, Krzysztof Kozlowski wrote: On wto, 2015-01-13 at 00:20 +0530, Anand Moon wrote: On enabling CONFIG_LOCKUP_DETECTOR the kernel to act as a watchdog to detect hard and soft lockups. Enabling CONFIG_LOCKUP_DETECTOR don't introduce much overhead on exyons SOC. CONFIG_LOCKUP_DETECTOR is enabled on multi_v7_defconfig. Changes since v3: * Made commit message more clear * Corrected difference between CONFIG_LOCKUP_DETECTOR and CONFIG_LOCKDEP. Tested on Exynos5422 ODROID XU3 board. Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com Signed-off-by: Anand Moon moon.li...@yahoo.com Now it looks okay. My reviewed-by may stay on. Thanks, applied - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] net: stmmac: add fixed_phy support via fixed-link DT binding
On 1/23/15, Ming Lei ming@canonical.com wrote:
Signed-off-by: Ming Lei ming@canonical.com
---
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 3039de2..73a3ced 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -27,6 +27,7 @@
#include linux/of.h
#include linux/of_net.h
#include linux/of_device.h
+#include linux/of_mdio.h
#include stmmac.h
#include stmmac_platform.h
@@ -216,6 +217,15 @@ static int stmmac_probe_config_dt(struct
platform_device *pdev,
plat-pmt = 1;
}
+ if (of_phy_is_fixed_link(np)) {
+ int ret = of_phy_register_fixed_link(np);
+ if (ret) {
+ dev_err(pdev-dev, failed to register fixed PHY\n);
+ return ret;
+ }
+ plat-phy_bus_name = fixed;
+ }
+
if (of_device_is_compatible(np, snps,dwmac-3.610) ||
of_device_is_compatible(np, snps,dwmac-3.710)) {
plat-enh_desc = 1;
Sorry, bypassing check on phy id is missed in this patch, and will
submit v1 later.
Thanks,
Ming Lei
--
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Re: [PATCH 1/2] clk: exynos5420: Add IDs for clocks used in DISP1 power domain
Hello Kukjin, On 01/23/2015 07:51 AM, Kukjin Kim wrote: Acked-by: Sylwester Nawrocki s.nawro...@samsung.com Acked-by: Michael Turquette mturque...@linaro.org Thanks a lot Sylwester and Mike for your acks. Kukjin, could you please pick $subject and Patch 2/2 ARM: dts: Add DISP1 power domain for exynos5420 through your tree? Sure, I will after applying Marek's generic power domain patch. Awesome, thanks a lot for your help! Thanks, Kukjin Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] i2c: s3c2410: fix ABBA deadlock by keeping clock prepared
2015-01-19 17:03 GMT+01:00 Paul Osmialowski p.osmialo...@samsung.com: This patch solves deadlock between clock prepare mutex and regmap mutex reported by Tomasz Figa in [1] by implementing solution from [2]: always leave the clock of the i2c controller in a prepared state. [1] https://lkml.org/lkml/2014/7/2/171 [2] https://lkml.org/lkml/2014/7/2/207 On each i2c transfer handled by s3c24xx_i2c_xfer(), clk_prepare_enable() was called, which calls clk_prepare() then clk_enable(). clk_prepare() takes prepare_lock mutex before proceeding. Note that i2c transfer functions are invoked from many places in kernel, typically with some other additional lock held. It may happen that function on CPU1 (e.g. regmap_update_bits()) has taken a mutex (i.e. regmap lock mutex) then it attempts i2c communication in order to proceed (so it needs to obtain clock related prepare_lock mutex during transfer preparation stage due to clk_prepare() call). At the same time other task on CPU0 wants to operate on clock (e.g. to (un)prepare clock for some other reason) so it has taken prepare_lock mutex. CPU0:CPU1: clk_disable_unused() regulator_disable() clk_prepare_lock() map-lock(map-lock_arg) regmap_read()s3c24xx_i2c_xfer() map-lock(map-lock_arg) clk_prepare_lock() Implemented solution from [2] leaves i2c clock prepared. Preparation is done in s3c24xx_i2c_probe() function. Without this patch, it is immediately unprepared by clk_disable_unprepare() call. I've replaced this call with clk_disable() and I've added clk_unprepare() call in s3c24xx_i2c_remove(). The s3c24xx_i2c_xfer() function now uses clk_enable() instead of clk_prepare_enable() (and clk_disable() instead of clk_unprepare_disable()). Signed-off-by: Paul Osmialowski p.osmialo...@samsung.com --- drivers/i2c/busses/i2c-s3c2410.c | 23 +-- 1 file changed, 17 insertions(+), 6 deletions(-) Looks good to me. Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: exynos_defconfig: Enable CONFIG_FHANDLE
Hello Kukjin, On 01/19/2015 06:43 AM, Joonyoung Shim wrote: I also hope merge this, already multi_v7_defconfig supports this. I would also hope this to be merged since it's required to boot using systemd. Thanks. This is certainly required for newer systemd and has to be enabled. But it would also be great to have enabled all the config symbols that are listed as requirements in the systemd README file: http://cgit.freedesktop.org/systemd/systemd/tree/README. Tony added that support to OMAP2+ defconfig in commit 673ce00c (ARM: omap2plus_defconfig: Add support for distros with systemd) so the same should be done in exynos_defconfig. That can of course be a follow-up patch though, so for $subject: Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 3/7] misc: Add cros_ec_lpc driver for x86 devices
Hello Varka,
Thanks a lot for your feedback.
On 01/23/2015 04:57 AM, Varka Bhadram wrote:
(...)
+static int cros_ec_lpc_probe(struct platform_device *pdev)
+{
+ struct device *dev = pdev-dev;
+ struct cros_ec_device *ec_dev;
+ int err = -ENOTTY;
+
+ if (!request_region(EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE, MYNAME)) {
Why dont you use devres API for request_region()... Then maximum of
your goto label regarding
release region will gone...
Good point, I'll change that on next version.
+ dev_warn(dev, couldn't reserve memmap region\n);
+ goto failed_memmap;
+ }
+
+ if ((inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID) != 'E') ||
+ (inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID + 1) != 'C')) {
+ dev_warn(dev, EC ID not detected\n);
+ goto failed_ec_probe;
+ }
+
+ if (!request_region(EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION_SIZE,
+ MYNAME)) {
same...
+ dev_warn(dev, couldn't reserve region0\n);
+ goto failed_region0;
+ }
+ if (!request_region(EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION_SIZE,
+ MYNAME)) {
same ...
+ dev_warn(dev, couldn't reserve region1\n);
+ goto failed_region1;
+ }
+
+ ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
+ if (!ec_dev) {
+ err = -ENOMEM;
+ goto failed_ec_dev;
+ }
+
+ platform_set_drvdata(pdev, ec_dev);
+ ec_dev-dev = dev;
+ ec_dev-ec_name = pdev-name;
+ ec_dev-phys_name = dev_name(dev);
+ ec_dev-parent = dev;
+ ec_dev-cmd_xfer = cros_ec_cmd_xfer_lpc;
+ ec_dev-cmd_readmem = cros_ec_lpc_readmem;
+
+ err = cros_ec_register(ec_dev);
+ if (err) {
+ dev_warn(dev, couldn't register ec_dev\n);
+ goto failed_ec_dev;
+ }
+
+ return 0;
+
+failed_ec_dev:
+ release_region(EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION_SIZE);
+failed_region1:
+ release_region(EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION_SIZE);
+failed_region0:
+failed_ec_probe:
+ release_region(EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE);
All these goto labels will be gone if you use devres API..
Yes, I'll wait a couple more days to see if I get more feedback and re-post.
Best regards,
Javier
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RE: [PATCH v4 00/17] thermal: exynos: Thermal code rework to use device tree
Lukasz Majewski wrote: Hi Kukjin, Hi, Lukasz Majewski wrote: Hi, 1. Introduction Following patches aim to clean up the current implementation of the thermal framework on Exynos devices. The main goal was to use a generic code for reading thermal configuration (of-thermal.c). Due to that redundant exynos_thermal_common.[h|c] files were removed. Around 400 lines of code (LOC) were removed directly by this patch, which is around 20% of the Exynos thermal code base. This work should NOT bring any functional changes to Exynos thermal subsystem. Sounds great to use generic some framework in kernel. 2. Patch-set structure Then the cpu_cooling functionality has been preserved to allow cooling devices by reducing operating frequency. Definition of trip points and cpufreq's cooling properties were moved to device tree. Then the rework of the way in which configuration data is provided to the Exynos thermal subsystem was performed. Now device tree is used for configuration. 3. Dead code removal Thermal support for some SoCs, previously available in the exynos_tmu_data.c file, was removed since, as of (almost) 3.19-rc3, they didn't have TMU bindings. Moreover, support for cpu_cooling devices was preserved only on those SoCs which had available and working cpufreq driver. 4. Testing Test devices: - Exynos4210 - Trats (TMU zone + cpu_cooling) - Exynos4412 - Trats2/Odroid U3 (TMU zone + cpu_cooling) - Exynos5250 - Arndale (TMU zone + cpu_cooling) - Exynos5420 - Arndale-octa (only TMU zones) Thanks for your check on the boards... Unfortunately, I don't posses Exynos5440 for testing. Its functionality has been preserved in the code, but not tested on the hardware. I would be grateful for help in testing. I think, Amit can do it on exynos5440 ;) 5. This work apply on the following tree: kernel.org: 'linux-soc-thermal/next' - Eduardo Velentin's tree SHA1: 1813d80874699145f04af6b05ebab0a6419001fb Lukasz Majewski (17): thermal: exynos: cosmetic: Correct comment format thermal: exynos: Provide thermal_exynos.h file to be included in device tree files arm: dts: trats: Enable TMU on the Exynos4210 trats device arm: dts: odroid: Add LD010 regulator node necessary for TMU on Odroid arm: dts: odroid: Enable TMU at Exynos4412 based Odroid U3 device arm: dts: Adding CPU cooling binding for Exynos SoCs thermal: exynos: Modify exynos thermal code to use device tree for cpu cooling configuration thermal: exynos: dts: Add default definition of the TMU sensor parameter dts: Documentation: Extending documentation entry for exynos-thermal thermal: dts: Default trip points definition for Exynos5420 SoCs thermal: exynos: dts: Define default thermal-zones for Exynos4 thermal: dts: exynos: Trip points and sensor configuration data for Exynos5440 dts: Documentation: Update exynos-thermal.txt example for Exynos5440 thermal: exynos: dts: Provide device tree bindings identical to the one in exynos_tmu_data.c thermal: samsung: core: Exynos TMU rework to use device tree for configuration thermal: exynos: Remove exynos_thermal_common.[c|h] files thermal: exynos: Remove exynos_tmu_data.c file .../devicetree/bindings/thermal/exynos-thermal.txt | 17 + arch/arm/boot/dts/exynos3250.dtsi | 2 + arch/arm/boot/dts/exynos4-cpu-thermal.dtsi | 52 +++ arch/arm/boot/dts/exynos4.dtsi | 4 + arch/arm/boot/dts/exynos4210-trats.dts | 19 + arch/arm/boot/dts/exynos4210.dtsi | 30 +- arch/arm/boot/dts/exynos4212.dtsi | 5 +- arch/arm/boot/dts/exynos4412-odroid-common.dtsi| 27 ++ arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi | 24 ++ arch/arm/boot/dts/exynos4412-trats2.dts| 15 + arch/arm/boot/dts/exynos4412.dtsi | 5 +- arch/arm/boot/dts/exynos4x12.dtsi | 1 + arch/arm/boot/dts/exynos5250.dtsi | 29 +- arch/arm/boot/dts/exynos5420-trip-points.dtsi | 35 ++ arch/arm/boot/dts/exynos5420.dtsi | 28 ++ arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi | 24 ++ arch/arm/boot/dts/exynos5440-trip-points.dtsi | 25 ++ arch/arm/boot/dts/exynos5440.dtsi | 18 + drivers/cpufreq/exynos-cpufreq.c | 30 +- drivers/thermal/samsung/Makefile | 2 - drivers/thermal/samsung/exynos_thermal_common.c| 427 - drivers/thermal/samsung/exynos_thermal_common.h| 106 - drivers/thermal/samsung/exynos_tmu.c | 354 +++-- drivers/thermal/samsung/exynos_tmu.h | 68 +---
Re: [PATCH v4 00/17] thermal: exynos: Thermal code rework to use device tree
Hi Kukjin, Lukasz Majewski wrote: Hi, 1. Introduction Following patches aim to clean up the current implementation of the thermal framework on Exynos devices. The main goal was to use a generic code for reading thermal configuration (of-thermal.c). Due to that redundant exynos_thermal_common.[h|c] files were removed. Around 400 lines of code (LOC) were removed directly by this patch, which is around 20% of the Exynos thermal code base. This work should NOT bring any functional changes to Exynos thermal subsystem. Sounds great to use generic some framework in kernel. 2. Patch-set structure Then the cpu_cooling functionality has been preserved to allow cooling devices by reducing operating frequency. Definition of trip points and cpufreq's cooling properties were moved to device tree. Then the rework of the way in which configuration data is provided to the Exynos thermal subsystem was performed. Now device tree is used for configuration. 3. Dead code removal Thermal support for some SoCs, previously available in the exynos_tmu_data.c file, was removed since, as of (almost) 3.19-rc3, they didn't have TMU bindings. Moreover, support for cpu_cooling devices was preserved only on those SoCs which had available and working cpufreq driver. 4. Testing Test devices: - Exynos4210 - Trats (TMU zone + cpu_cooling) - Exynos4412 - Trats2/Odroid U3 (TMU zone + cpu_cooling) - Exynos5250 - Arndale (TMU zone + cpu_cooling) - Exynos5420 - Arndale-octa (only TMU zones) Thanks for your check on the boards... Unfortunately, I don't posses Exynos5440 for testing. Its functionality has been preserved in the code, but not tested on the hardware. I would be grateful for help in testing. I think, Amit can do it on exynos5440 ;) 5. This work apply on the following tree: kernel.org: 'linux-soc-thermal/next' - Eduardo Velentin's tree SHA1: 1813d80874699145f04af6b05ebab0a6419001fb Lukasz Majewski (17): thermal: exynos: cosmetic: Correct comment format thermal: exynos: Provide thermal_exynos.h file to be included in device tree files arm: dts: trats: Enable TMU on the Exynos4210 trats device arm: dts: odroid: Add LD010 regulator node necessary for TMU on Odroid arm: dts: odroid: Enable TMU at Exynos4412 based Odroid U3 device arm: dts: Adding CPU cooling binding for Exynos SoCs thermal: exynos: Modify exynos thermal code to use device tree for cpu cooling configuration thermal: exynos: dts: Add default definition of the TMU sensor parameter dts: Documentation: Extending documentation entry for exynos-thermal thermal: dts: Default trip points definition for Exynos5420 SoCs thermal: exynos: dts: Define default thermal-zones for Exynos4 thermal: dts: exynos: Trip points and sensor configuration data for Exynos5440 dts: Documentation: Update exynos-thermal.txt example for Exynos5440 thermal: exynos: dts: Provide device tree bindings identical to the one in exynos_tmu_data.c thermal: samsung: core: Exynos TMU rework to use device tree for configuration thermal: exynos: Remove exynos_thermal_common.[c|h] files thermal: exynos: Remove exynos_tmu_data.c file .../devicetree/bindings/thermal/exynos-thermal.txt | 17 + arch/arm/boot/dts/exynos3250.dtsi | 2 + arch/arm/boot/dts/exynos4-cpu-thermal.dtsi | 52 +++ arch/arm/boot/dts/exynos4.dtsi | 4 + arch/arm/boot/dts/exynos4210-trats.dts | 19 + arch/arm/boot/dts/exynos4210.dtsi | 30 +- arch/arm/boot/dts/exynos4212.dtsi | 5 +- arch/arm/boot/dts/exynos4412-odroid-common.dtsi| 27 ++ arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi | 24 ++ arch/arm/boot/dts/exynos4412-trats2.dts| 15 + arch/arm/boot/dts/exynos4412.dtsi | 5 +- arch/arm/boot/dts/exynos4x12.dtsi | 1 + arch/arm/boot/dts/exynos5250.dtsi | 29 +- arch/arm/boot/dts/exynos5420-trip-points.dtsi | 35 ++ arch/arm/boot/dts/exynos5420.dtsi | 28 ++ arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi | 24 ++ arch/arm/boot/dts/exynos5440-trip-points.dtsi | 25 ++ arch/arm/boot/dts/exynos5440.dtsi | 18 + drivers/cpufreq/exynos-cpufreq.c | 30 +- drivers/thermal/samsung/Makefile | 2 - drivers/thermal/samsung/exynos_thermal_common.c| 427 - drivers/thermal/samsung/exynos_thermal_common.h| 106 - drivers/thermal/samsung/exynos_tmu.c | 354 +++-- drivers/thermal/samsung/exynos_tmu.h | 68 +--- drivers/thermal/samsung/exynos_tmu_data.c | 264 - include/dt-bindings/thermal/thermal_exynos.h | 28 ++ 26 files
Re: [PATCH v3 5/7] mfd: cros_ec: Instantiate ChromeOS EC character device
On Thu, 22 Jan 2015, Javier Martinez Canillas wrote:
The ChromeOS EC character device is an user-space interface to
allow applications to access the Embedded Controller.
Add a cell for this device so it's spawned from the mfd driver.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
Changes since v2:
- Rename the name to cros-ec-ctl. Suggested by Lee Jones.
Changes since v1: None, new patch.
---
drivers/mfd/cros_ec.c | 4
1 file changed, 4 insertions(+)
Acked-by: Lee Jones lee.jo...@linaro.org
diff --git a/drivers/mfd/cros_ec.c b/drivers/mfd/cros_ec.c
index c872e1b0eaf8..c4aecc6f8373 100644
--- a/drivers/mfd/cros_ec.c
+++ b/drivers/mfd/cros_ec.c
@@ -118,6 +118,10 @@ static const struct mfd_cell cros_devs[] = {
.id = 2,
.of_compatible = google,cros-ec-i2c-tunnel,
},
+ {
+ .name = cros-ec-ctl,
+ .id = 3,
+ },
};
int cros_ec_register(struct cros_ec_device *ec_dev)
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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Re: [PATCH 1/2] power: reset: add driver for Hardkernel's Odroid boards
Hello,
On 2015-01-22 02:33, Joonyoung Shim wrote:
On 01/22/2015 10:06 AM, Sebastian Reichel wrote:
On Wed, Oct 29, 2014 at 02:13:28PM +0100, Marek Szyprowski wrote:
This patch adds a driver implementing correct reboot and poweroff
procedures for Exynos4412-based Hardkernel's Odroid X/X2/U2/U3/U3+
boards.
Sorry it took so long. I have a couple of small requests before
applying this (comments inline).
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
.../bindings/power/reset/odroid-reset.txt | 18
drivers/power/reset/Kconfig| 6 ++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/odroid-reboot.c| 119 +
4 files changed, 144 insertions(+)
create mode 100644
Documentation/devicetree/bindings/power/reset/odroid-reset.txt
create mode 100644 drivers/power/reset/odroid-reboot.c
diff --git a/Documentation/devicetree/bindings/power/reset/odroid-reset.txt
b/Documentation/devicetree/bindings/power/reset/odroid-reset.txt
new file mode 100644
index ..86471a463518
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/reset/odroid-reset.txt
@@ -0,0 +1,18 @@
+* Device tree bindings for Hardkernel's Exynos4412 based Odroid boards
+
+This node is intended to allow proper system reboot and power off of
+Odroid X/X2/U2/U3/U3+ boards with eMMC storage. Without this node, board
+hangs during standard reset procedure.
+
+Required properties:
+- compatible: hardkernel,odroid-reboot
+- samsung,pmureg-phandle: phandle to Exynos PMU node
+- reset-gpios: phandle and gpio-specifier to the GPIO pin
+ connected to the eMMC_nDET
+
+Example:
+odroid_reboot {
+ compatible = hardkernel,odroid-reboot;
+ samsung,pmureg-phandle = pmu_system_controller;
+ reset-gpio = gpk1 2 0;
+};
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index f65ff49bb275..f02b13d5344f 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -84,6 +84,12 @@ config POWER_RESET_LTC2952
This driver supports an external powerdown trigger and board power
down via the LTC2952. Bindings are made in the device tree.
+config POWER_RESET_ODROID
+ bool Hardkernel's Exynos4412 based Odroid reboot driver
+ depends on POWER_RESET ARCH_EXYNOS
once the arm specific restart handler is gone you can add ||
COMPILE_TEST
+ help
+ Power off and restart support for Odroid boards.
+
config POWER_RESET_QNAP
bool QNAP power-off driver
depends on OF_GPIO PLAT_ORION
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 76ce1c59469b..178ee86eb813 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o
+obj-$(CONFIG_POWER_RESET_ODROID) += odroid-reboot.o
obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
obj-$(CONFIG_POWER_RESET_SUN6I) += sun6i-reboot.o
diff --git a/drivers/power/reset/odroid-reboot.c
b/drivers/power/reset/odroid-reboot.c
new file mode 100644
index ..823e93539220
--- /dev/null
+++ b/drivers/power/reset/odroid-reboot.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/delay.h
+#include linux/gpio.h
+#include linux/io.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of_platform.h
+#include linux/of_gpio.h
+#include linux/reboot.h
+#include linux/regmap.h
+
+#include asm/system_misc.h
+
+#define PS_HOLD_CONTROL0x330C
+
+struct odroid_reboot_data {
+ struct device *dev;
+ int power_gpio;
+ struct regmap *reg_pmu;
+ void (*reboot_func)(enum reboot_mode mode, const char *cmd);
+};
+
+static struct odroid_reboot_data *reboot_data;
+
+static void odroid_reboot(enum reboot_mode mode, const char *cmd)
+{
+ local_irq_disable();
+
+ gpio_set_value(reboot_data-power_gpio, 0);
+ mdelay(150);
+ gpio_set_value(reboot_data-power_gpio, 1);
+
+ reboot_data-reboot_func(mode, cmd);
+
It is called do_kernel_restart() if arm_pm_restart is NULL from
machine_restart of arch/arm/kernel/process.c
How about this?
if (reboot_data-reboot_func)
reboot_data-reboot_func(mode, cmd);
else
do_kernel_restart(cmd);
Frankly, I analyzed this case once again and I came to
Re: [alsa-devel] [PATCH v4 3/3] ARM: dts: Add sound nodes for exynos4412-trats2
On 23/01/15 06:03, Inha Song wrote: This patch add WM1811 audio codec, I2S interface and the sound machine nodes to enable audio on exynos4412-trats2 board. Signed-off-by: Inha Song ideal.s...@samsung.com Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: dts: Add sd0_rst pinctrl node to exynos5420
Add sd0_rst node to exynos5420-pinctrl.dtsi.
(It's used on odroid-xu3 board)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index ba686e4..315cad7 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -194,6 +194,11 @@
samsung,pin-drv = 3;
};
+ sd0_rst: sd0-rst {
+ samsung,pins = gpd1-0;
+ samsung,pin-function = 1;
+ };
+
sd1_clk: sd1-clk {
samsung,pins = gpc1-0;
samsung,pin-function = 2;
--
1.7.9.5
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Re: [PATCH] ARM: dts: Add sd0_rst pinctrl node to exynos5420
Hello Jaehoon, On Fri, Jan 23, 2015 at 3:23 PM, Jaehoon Chung jh80.ch...@samsung.com wrote: Add sd0_rst node to exynos5420-pinctrl.dtsi. (It's used on odroid-xu3 board) It would be good to mention which device needs this pinctrl line. Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com --- arch/arm/boot/dts/exynos5420-pinctrl.dtsi |5 + If this pin is used by the Odroid XU3 board, shouldn't be defined in the exynos5422-odroidxu3.dts instead? Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 00/17] thermal: exynos: Thermal code rework to use device tree
Hi Kukjin, On Fri, Jan 23, 2015 at 08:00:07PM +0900, Kukjin Kim wrote: Lukasz Majewski wrote: Hi Kukjin, Hi, Lukasz Majewski wrote: Hi, 1. Introduction Following patches aim to clean up the current implementation of the thermal framework on Exynos devices. The main goal was to use a generic code for reading thermal configuration (of-thermal.c). Due to that redundant exynos_thermal_common.[h|c] files were removed. Around 400 lines of code (LOC) were removed directly by this patch, which is around 20% of the Exynos thermal code base. This work should NOT bring any functional changes to Exynos thermal subsystem. Sounds great to use generic some framework in kernel. 2. Patch-set structure Then the cpu_cooling functionality has been preserved to allow cooling devices by reducing operating frequency. Definition of trip points and cpufreq's cooling properties were moved to device tree. Then the rework of the way in which configuration data is provided to the Exynos thermal subsystem was performed. Now device tree is used for configuration. 3. Dead code removal Thermal support for some SoCs, previously available in the exynos_tmu_data.c file, was removed since, as of (almost) 3.19-rc3, they didn't have TMU bindings. Moreover, support for cpu_cooling devices was preserved only on those SoCs which had available and working cpufreq driver. 4. Testing Test devices: - Exynos4210 - Trats (TMU zone + cpu_cooling) - Exynos4412 - Trats2/Odroid U3 (TMU zone + cpu_cooling) - Exynos5250 - Arndale (TMU zone + cpu_cooling) - Exynos5420 - Arndale-octa (only TMU zones) Thanks for your check on the boards... Unfortunately, I don't posses Exynos5440 for testing. Its functionality has been preserved in the code, but not tested on the hardware. I would be grateful for help in testing. I think, Amit can do it on exynos5440 ;) 5. This work apply on the following tree: kernel.org: 'linux-soc-thermal/next' - Eduardo Velentin's tree SHA1: 1813d80874699145f04af6b05ebab0a6419001fb Lukasz Majewski (17): thermal: exynos: cosmetic: Correct comment format thermal: exynos: Provide thermal_exynos.h file to be included in device tree files arm: dts: trats: Enable TMU on the Exynos4210 trats device arm: dts: odroid: Add LD010 regulator node necessary for TMU on Odroid arm: dts: odroid: Enable TMU at Exynos4412 based Odroid U3 device arm: dts: Adding CPU cooling binding for Exynos SoCs thermal: exynos: Modify exynos thermal code to use device tree for cpu cooling configuration thermal: exynos: dts: Add default definition of the TMU sensor parameter dts: Documentation: Extending documentation entry for exynos-thermal thermal: dts: Default trip points definition for Exynos5420 SoCs thermal: exynos: dts: Define default thermal-zones for Exynos4 thermal: dts: exynos: Trip points and sensor configuration data for Exynos5440 dts: Documentation: Update exynos-thermal.txt example for Exynos5440 thermal: exynos: dts: Provide device tree bindings identical to the one in exynos_tmu_data.c thermal: samsung: core: Exynos TMU rework to use device tree for configuration thermal: exynos: Remove exynos_thermal_common.[c|h] files thermal: exynos: Remove exynos_tmu_data.c file .../devicetree/bindings/thermal/exynos-thermal.txt | 17 + arch/arm/boot/dts/exynos3250.dtsi | 2 + arch/arm/boot/dts/exynos4-cpu-thermal.dtsi | 52 +++ arch/arm/boot/dts/exynos4.dtsi | 4 + arch/arm/boot/dts/exynos4210-trats.dts | 19 + arch/arm/boot/dts/exynos4210.dtsi | 30 +- arch/arm/boot/dts/exynos4212.dtsi | 5 +- arch/arm/boot/dts/exynos4412-odroid-common.dtsi| 27 ++ arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi | 24 ++ arch/arm/boot/dts/exynos4412-trats2.dts| 15 + arch/arm/boot/dts/exynos4412.dtsi | 5 +- arch/arm/boot/dts/exynos4x12.dtsi | 1 + arch/arm/boot/dts/exynos5250.dtsi | 29 +- arch/arm/boot/dts/exynos5420-trip-points.dtsi | 35 ++ arch/arm/boot/dts/exynos5420.dtsi | 28 ++ arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi | 24 ++ arch/arm/boot/dts/exynos5440-trip-points.dtsi | 25 ++ arch/arm/boot/dts/exynos5440.dtsi | 18 + drivers/cpufreq/exynos-cpufreq.c | 30 +- drivers/thermal/samsung/Makefile | 2 - drivers/thermal/samsung/exynos_thermal_common.c| 427 - drivers/thermal/samsung/exynos_thermal_common.h
Re: [alsa-devel] [PATCH v4 2/3] ASoC: samsung: Document Trats2 audio subsystem bindings
On 23/01/15 06:03, Inha Song wrote: This patch add Trats2 audio subsystem bindings document. Signed-off-by: Inha Song ideal.s...@samsung.com Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: exynos_defconfig: Enable PMIC and MUIC drivers for Gears and Trats2
Enable drivers for PMICs and MUICs present on Exynos-based devices: - max14577: charger, extcon, fuel gauge (max17040), regulator, used on: Gear 1, Gear 2, - max77693: charger, extcon, fuel gauge (max17042), used on: Trats2, This allows full usage of charging stack on these devices along with extcon connector. Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com --- arch/arm/configs/exynos_defconfig | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 3d0c5d65c741..01758378a1b1 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -83,6 +83,10 @@ CONFIG_I2C_S3C2410=y CONFIG_DEBUG_GPIO=y CONFIG_POWER_SUPPLY=y CONFIG_BATTERY_SBS=y +CONFIG_BATTERY_MAX17040=y +CONFIG_BATTERY_MAX17042=y +CONFIG_CHARGER_MAX14577=y +CONFIG_CHARGER_MAX77693=y CONFIG_CHARGER_TPS65090=y CONFIG_HWMON=y CONFIG_SENSORS_LM90=y @@ -94,6 +98,7 @@ CONFIG_S3C2410_WATCHDOG=y CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_I2C=y CONFIG_MFD_CROS_EC_SPI=y +CONFIG_MFD_MAX14577=y CONFIG_MFD_MAX77686=y CONFIG_MFD_MAX77693=y CONFIG_MFD_MAX8997=y @@ -102,6 +107,7 @@ CONFIG_MFD_TPS65090=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MAX14577=y CONFIG_REGULATOR_MAX8997=y CONFIG_REGULATOR_MAX77686=y CONFIG_REGULATOR_MAX77802=y @@ -168,6 +174,9 @@ CONFIG_COMMON_CLK_MAX77686=y CONFIG_COMMON_CLK_MAX77802=y CONFIG_COMMON_CLK_S2MPS11=y CONFIG_EXYNOS_IOMMU=y +CONFIG_EXTCON=y +CONFIG_EXTCON_MAX14577=y +CONFIG_EXTCON_MAX77693=y CONFIG_IIO=y CONFIG_EXYNOS_ADC=y CONFIG_PWM=y -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: multi_v7_defconfig: Enable PMIC and MUIC drivers for Exynos boards
Enable drivers for PMICs and MUICs present on Exynos-based devices: - max14577: charger, extcon, fuel gauge (max17040), regulator, used on: Gear 1, Gear 2, - max77693: charger, extcon, fuel gauge (max17042), used on: Trats2, - s5m8767 and s2mps11: RTC, clock, used on: Arndale, Arndale Octa, Gear 1, Gear 2 This allows full usage of charging stack on these devices along with extcon connector, RTC and 32 kHz clocks. The I2C_GPIO is necessary for max77693 on Trats2 because the device is wired to Exynos System-on-Chip over GPIO. Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com --- arch/arm/configs/multi_v7_defconfig | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index adb362bdedd6..5eb69aa59165 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -233,6 +233,7 @@ CONFIG_I2C_MUX_PINCTRL=y CONFIG_I2C_CADENCE=y CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_I2C_EXYNOS5=y +CONFIG_I2C_GPIO=y CONFIG_I2C_MV64XXX=y CONFIG_I2C_S3C2410=y CONFIG_I2C_SIRF=y @@ -270,7 +271,11 @@ CONFIG_GPIO_SYSCON=y CONFIG_GPIO_TPS6586X=y CONFIG_GPIO_TPS65910=y CONFIG_BATTERY_SBS=y +CONFIG_BATTERY_MAX17040=y +CONFIG_BATTERY_MAX17042=y +CONFIG_CHARGER_MAX14577=y CONFIG_CHARGER_TPS65090=y +CONFIG_CHARGER_MAX77693=y CONFIG_POWER_RESET_AS3722=y CONFIG_POWER_RESET_GPIO=y CONFIG_POWER_RESET_KEYSTONE=y @@ -294,8 +299,10 @@ CONFIG_MFD_BCM590XX=y CONFIG_MFD_AXP20X=y CONFIG_MFD_CROS_EC=y CONFIG_MFD_CROS_EC_SPI=y +CONFIG_MFD_MAX14577=y CONFIG_MFD_MAX77686=y CONFIG_MFD_MAX8907=y +CONFIG_MFD_MAX77693=y CONFIG_MFD_SEC_CORE=y CONFIG_MFD_STMPE=y CONFIG_MFD_PALMAS=y @@ -309,8 +316,10 @@ CONFIG_REGULATOR_BCM590XX=y CONFIG_REGULATOR_GPIO=y CONFIG_MFD_SYSCON=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_REGULATOR_MAX14577=y CONFIG_REGULATOR_MAX8907=y CONFIG_REGULATOR_MAX77686=y +CONFIG_REGULATOR_MAX77693=y CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S5M8767=y @@ -431,6 +440,7 @@ CONFIG_RTC_DRV_SUN6I=y CONFIG_RTC_DRV_SUNXI=y CONFIG_RTC_DRV_MV=y CONFIG_RTC_DRV_TEGRA=y +CONFIG_RTC_DRV_S5M=y CONFIG_DMADEVICES=y CONFIG_DW_DMAC=y CONFIG_MV_XOR=y @@ -455,12 +465,16 @@ CONFIG_NVEC_PAZ00=y CONFIG_QCOM_GSBI=y CONFIG_COMMON_CLK_QCOM=y CONFIG_COMMON_CLK_MAX77686=y +CONFIG_COMMON_CLK_S2MPS11=y CONFIG_APQ_MMCC_8084=y CONFIG_MSM_GCC_8660=y CONFIG_MSM_MMCC_8960=y CONFIG_MSM_MMCC_8974=y CONFIG_TEGRA_IOMMU_GART=y CONFIG_TEGRA_IOMMU_SMMU=y +CONFIG_EXTCON=y +CONFIG_EXTCON_MAX14577=y +CONFIG_EXTCON_MAX77693=y CONFIG_MEMORY=y CONFIG_TI_AEMIF=y CONFIG_IIO=y -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH RESEND] ARM: dts: exynos3250: add JPEG codec device node
Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Tested-by: Pankaj Dubey pankaj.du...@samsung.com
Cc: Kukjin Kim kg...@kernel.org
---
arch/arm/boot/dts/exynos3250.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index 2246549..3c043d9 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -228,6 +228,19 @@
interrupts = 0 240 0;
};
+ jpeg: codec@1183 {
+ compatible = samsung,exynos3250-jpeg;
+ reg = 0x1183 0x1000;
+ interrupts = 0 171 0;
+ clocks = cmu CLK_JPEG, cmu CLK_SCLK_JPEG;
+ clock-names = jpeg, sclk;
+ samsung,power-domain = pd_cam;
+ assigned-clocks = cmu CLK_MOUT_CAM_BLK, cmu
CLK_SCLK_JPEG;
+ assigned-clock-rates = 0, 15000;
+ assigned-clock-parents = cmu CLK_DIV_MPLL_PRE;
+ status = disabled;
+ };
+
fimd: fimd@11c0 {
compatible = samsung,exynos3250-fimd;
reg = 0x11c0 0x3;
--
1.7.9.5
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[PATCH] ARM: dts: exynos3250-rinato: add support for JPEG codec
Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Kukjin Kim kg...@kernel.org
---
arch/arm/boot/dts/exynos3250-rinato.dts |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 80aa8b4..9cfc9ec 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -480,6 +480,10 @@
status = okay;
};
+jpeg {
+ status = okay;
+};
+
mshc_0 {
#address-cells = 1;
#size-cells = 0;
--
1.7.9.5
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[PATCH v5 07/18] iommu: exynos: remove unused functions
This patch removes two unneeded functions, which are not a part of
generic IOMMU API and were never used by any other driver.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 31 ---
1 file changed, 31 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index b6c8612..3c82411 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -490,13 +490,6 @@ static int __exynos_sysmmu_enable(struct device *dev,
phys_addr_t pgtable,
return ret;
}
-int exynos_sysmmu_enable(struct device *dev, phys_addr_t pgtable)
-{
- BUG_ON(!memblock_is_memory(pgtable));
-
- return __exynos_sysmmu_enable(dev, pgtable, NULL);
-}
-
static bool exynos_sysmmu_disable(struct device *dev)
{
unsigned long flags;
@@ -588,30 +581,6 @@ static void sysmmu_tlb_invalidate_entry(struct device
*dev, sysmmu_iova_t iova,
spin_unlock_irqrestore(data-lock, flags);
}
-void exynos_sysmmu_tlb_invalidate(struct device *dev)
-{
- struct exynos_iommu_owner *owner = dev-archdata.iommu;
- unsigned long flags;
- struct sysmmu_drvdata *data;
-
- data = dev_get_drvdata(owner-sysmmu);
-
- spin_lock_irqsave(data-lock, flags);
- if (is_sysmmu_active(data)) {
- if (!IS_ERR(data-clk_master))
- clk_enable(data-clk_master);
- if (sysmmu_block(data-sfrbase)) {
- __sysmmu_tlb_invalidate(data-sfrbase);
- sysmmu_unblock(data-sfrbase);
- }
- if (!IS_ERR(data-clk_master))
- clk_disable(data-clk_master);
- } else {
- dev_dbg(dev, disabled. Skipping TLB invalidation\n);
- }
- spin_unlock_irqrestore(data-lock, flags);
-}
-
static int __init exynos_sysmmu_probe(struct platform_device *pdev)
{
int irq, ret;
--
1.9.2
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[PATCH v5 08/18] iommu: exynos: remove useless spinlock
This patch removes useless spinlocks and other unused members from
struct exynos_iommu_owner. There is no point is protecting this
structure by spinlock because content of this structure doesn't change
and other structures have their own spinlocks.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 3c82411..aa8c4b0 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -189,9 +189,6 @@ struct exynos_iommu_owner {
struct list_head client; /* entry of exynos_iommu_domain.clients */
struct device *dev;
struct device *sysmmu;
- struct iommu_domain *domain;
- void *vmm_data; /* IO virtual memory manager's data */
- spinlock_t lock;/* Lock to preserve consistency of System MMU */
};
struct exynos_iommu_domain {
@@ -477,16 +474,12 @@ static int __exynos_sysmmu_enable(struct device *dev,
phys_addr_t pgtable,
BUG_ON(!has_sysmmu(dev));
- spin_lock_irqsave(owner-lock, flags);
-
data = dev_get_drvdata(owner-sysmmu);
ret = __sysmmu_enable(data, pgtable, domain);
if (ret = 0)
data-master = dev;
- spin_unlock_irqrestore(owner-lock, flags);
-
return ret;
}
@@ -499,16 +492,12 @@ static bool exynos_sysmmu_disable(struct device *dev)
BUG_ON(!has_sysmmu(dev));
- spin_lock_irqsave(owner-lock, flags);
-
data = dev_get_drvdata(owner-sysmmu);
disabled = __sysmmu_disable(data);
if (disabled)
data-master = NULL;
- spin_unlock_irqrestore(owner-lock, flags);
-
return disabled;
}
--
1.9.2
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[PATCH v5 06/18] iommu: exynos: don't read version register on every tlb operation
This patch removes reading of REG_MMU_VERSION register on every tlb
operation and caches SYSMMU version in driver's internal data.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 7ce5273..b6c8612 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -212,6 +212,7 @@ struct sysmmu_drvdata {
spinlock_t lock;
struct iommu_domain *domain;
phys_addr_t pgtable;
+ int version;
};
static bool set_sysmmu_active(struct sysmmu_drvdata *data)
@@ -238,11 +239,6 @@ static void sysmmu_unblock(void __iomem *sfrbase)
__raw_writel(CTRL_ENABLE, sfrbase + REG_MMU_CTRL);
}
-static unsigned int __raw_sysmmu_version(struct sysmmu_drvdata *data)
-{
- return MMU_RAW_VER(__raw_readl(data-sfrbase + REG_MMU_VERSION));
-}
-
static bool sysmmu_block(void __iomem *sfrbase)
{
int i = 120;
@@ -402,7 +398,7 @@ static void __sysmmu_init_config(struct sysmmu_drvdata
*data)
unsigned int cfg = CFG_LRU | CFG_QOS(15);
unsigned int ver;
- ver = __raw_sysmmu_version(data);
+ ver = MMU_RAW_VER(__raw_readl(data-sfrbase + REG_MMU_VERSION));
if (MMU_MAJ_VER(ver) == 3) {
if (MMU_MIN_VER(ver) = 2) {
cfg |= CFG_FLPDCACHE;
@@ -416,6 +412,7 @@ static void __sysmmu_init_config(struct sysmmu_drvdata
*data)
}
__raw_writel(cfg, data-sfrbase + REG_MMU_CFG);
+ data-version = ver;
}
static void __sysmmu_enable_nocount(struct sysmmu_drvdata *data)
@@ -525,7 +522,7 @@ static bool exynos_sysmmu_disable(struct device *dev)
static void __sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
sysmmu_iova_t iova)
{
- if (__raw_sysmmu_version(data) == MAKE_MMU_VER(3, 3))
+ if (data-version == MAKE_MMU_VER(3, 3))
__raw_writel(iova | 0x1, data-sfrbase + REG_MMU_FLUSH_ENTRY);
}
@@ -574,7 +571,7 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev,
sysmmu_iova_t iova,
* 1MB page can be cached in one of all sets.
* 64KB page can be one of 16 consecutive sets.
*/
- if (MMU_MAJ_VER(__raw_sysmmu_version(data)) == 2)
+ if (MMU_MAJ_VER(data-version) == 2)
num_inv = min_t(unsigned int, size / PAGE_SIZE, 64);
if (sysmmu_block(data-sfrbase)) {
--
1.9.2
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[PATCH v5 04/18] ARM: dts: exynos5250: add sysmmu nodes
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi | 250 ++
1 file changed, 250 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index ae22bd9..8583b9e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -224,6 +224,7 @@
interrupts = 0 91 0;
clocks = clock CLK_G2D;
clock-names = fimg2d;
+ iommus = sysmmu_g2d;
};
mfc: codec@1100 {
@@ -233,6 +234,8 @@
power-domains = pd_mfc;
clocks = clock CLK_MFC;
clock-names = mfc;
+ iommus = sysmmu_mfc_l, sysmmu_mfc_r;
+ iommu-names = left, right;
};
rtc: rtc@101E {
@@ -693,6 +696,7 @@
power-domains = pd_gsc;
clocks = clock CLK_GSCL0;
clock-names = gscl;
+ iommu = sysmmu_gsc1;
};
gsc_1: gsc@13e1 {
@@ -702,6 +706,7 @@
power-domains = pd_gsc;
clocks = clock CLK_GSCL1;
clock-names = gscl;
+ iommu = sysmmu_gsc1;
};
gsc_2: gsc@13e2 {
@@ -711,6 +716,7 @@
power-domains = pd_gsc;
clocks = clock CLK_GSCL2;
clock-names = gscl;
+ iommu = sysmmu_gsc2;
};
gsc_3: gsc@13e3 {
@@ -720,6 +726,7 @@
power-domains = pd_gsc;
clocks = clock CLK_GSCL3;
clock-names = gscl;
+ iommu = sysmmu_gsc3;
};
hdmi: hdmi {
@@ -743,6 +750,7 @@
clocks = clock CLK_MIXER, clock CLK_HDMI,
clock CLK_SCLK_HDMI;
clock-names = mixer, hdmi, sclk_hdmi;
+ iommus = sysmmu_tv;
};
dp_phy: video-phy@10040720 {
@@ -763,6 +771,7 @@
power-domains = pd_disp1;
clocks = clock CLK_SCLK_FIMD1, clock CLK_FIMD1;
clock-names = sclk_fimd, fimd;
+ iommus = sysmmu_fimd1;
};
adc: adc@12D1 {
@@ -784,4 +793,245 @@
clocks = clock CLK_SSS;
clock-names = secss;
};
+
+ sysmmu_gsc0: sysmmu@13E8 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x13E8 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 2 0;
+ power-domains = pd_gsc;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_GSCL0, clock CLK_GSCL0;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_gsc1: sysmmu@13E9 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x13E9 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 2 2;
+ power-domains = pd_gsc;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_GSCL1, clock CLK_GSCL1;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_gsc2: sysmmu@13EA {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x13EA 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 2 4;
+ power-domains = pd_gsc;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_GSCL2, clock CLK_GSCL2;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_gsc3: sysmmu@13EB {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x13EB 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 2 6;
+ power-domains = pd_gsc;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_GSCL3, clock CLK_GSCL3;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_mfc_r: sysmmu@1120 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x1120 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 6 2;
+ power-domains = pd_mfc;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_MFCR, clock CLK_MFC;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_mfc_l: sysmmu@1121 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x1121 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 8 5;
+ power-domains = pd_mfc;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_MFCL, clock CLK_MFC;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_tv: sysmmu@1465 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x1465 0x1000;
+ interrupt-parent = combiner;
+ interrupts
[PATCH v5 01/18] drm: exynos: detach from default dma-mapping domain on init
This patch adds code, which detach sub-device nodes from default iommu
domain if such has been configured.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_iommu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_iommu.c
b/drivers/gpu/drm/exynos/exynos_drm_iommu.c
index b32b291..323601a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_iommu.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_iommu.c
@@ -100,6 +100,9 @@ int drm_iommu_attach_device(struct drm_device *drm_dev,
dma_set_max_seg_size(subdrv_dev, 0xu);
+ if (subdrv_dev-archdata.mapping)
+ arm_iommu_detach_device(subdrv_dev);
+
ret = arm_iommu_attach_device(subdrv_dev, dev-archdata.mapping);
if (ret 0) {
DRM_DEBUG_KMS(failed iommu attach.\n);
--
1.9.2
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[PATCH v5 05/18] ARM: dts: exynos5420: add sysmmu nodes
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 181 ++
1 file changed, 181 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index 1b62410..b8f1c9f 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -179,6 +179,8 @@
clocks = clock CLK_MFC;
clock-names = mfc;
power-domains = mfc_pd;
+ iommus = sysmmu_mfc_l, sysmmu_mfc_r;
+ iommu-names = left, right;
};
mmc_0: mmc@1220 {
@@ -556,6 +558,8 @@
clocks = clock CLK_SCLK_FIMD1, clock CLK_FIMD1;
clock-names = sclk_fimd, fimd;
power-domains = disp_pd;
+ iommus = sysmmu_fimd1_0, sysmmu_fimd1_1;
+ iommu-names = m0, m1;
};
adc: adc@12D1 {
@@ -743,6 +747,7 @@
clocks = clock CLK_MIXER, clock CLK_HDMI,
clock CLK_SCLK_HDMI;
clock-names = mixer, hdmi, sclk_hdmi;
+ iommus = sysmmu_tv;
power-domains = disp_pd;
};
@@ -753,6 +758,7 @@
clocks = clock CLK_GSCL0;
clock-names = gscl;
power-domains = gsc_pd;
+ iommus = sysmmu_gscl0;
};
gsc_1: video-scaler@13e1 {
@@ -762,6 +768,7 @@
clocks = clock CLK_GSCL1;
clock-names = gscl;
power-domains = gsc_pd;
+ iommus = sysmmu_gscl1;
};
pmu_system_controller: system-controller@1004 {
@@ -925,4 +932,178 @@
samsung,sysreg-phandle = sysreg_system_controller;
samsung,pmureg-phandle = pmu_system_controller;
};
+
+ sysmmu_g2dr: sysmmu@0x10A6 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x10A6 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 24 5;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_G2D, clock CLK_G2D;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_g2dw: sysmmu@0x10A7 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x10A7 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 22 2;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_G2D, clock CLK_G2D;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_tv: sysmmu@0x1465 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x1465 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 7 4;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_MIXER, clock CLK_MIXER;
+ samsung,power-domain = disp_pd;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_gscl0: sysmmu@0x13E8 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x13E8 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 2 0;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_GSCL0, clock CLK_GSCL0;
+ power-domains = gsc_pd;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_gscl1: sysmmu@0x13E9 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x13E9 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 2 2;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_GSCL1, clock CLK_GSCL1;
+ power-domains = gsc_pd;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_scaler0r: sysmmu@0x1288 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x1288 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 22 4;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_MSCL0, clock CLK_MSCL0;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_scaler1r: sysmmu@0x1289 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x1289 0x1000;
+ interrupts = 0 186 0;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_MSCL1, clock CLK_MSCL1;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_scaler2r: sysmmu@0x128A {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x128A 0x1000;
+ interrupts = 0 188 0;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_MSCL2, clock CLK_MSCL2;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_scaler0w: sysmmu@0x128C {
+ compatible = samsung,exynos-sysmmu;
+ reg =
[PATCH v5 10/18] iommu: exynos: remove unused functions, part 2
After refactoring functions to use pointer to struct sysmmu_drvdata
directly, some functions became useless and thus never used, so remove
them completely.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 43 ---
1 file changed, 43 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 862261f..e62cb96 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -457,49 +457,6 @@ static int __sysmmu_enable(struct sysmmu_drvdata *data,
return ret;
}
-/* __exynos_sysmmu_enable: Enables System MMU
- *
- * returns -error if an error occurred and System MMU is not enabled,
- * 0 if the System MMU has been just enabled and 1 if System MMU was already
- * enabled before.
- */
-static int __exynos_sysmmu_enable(struct device *dev, phys_addr_t pgtable,
- struct iommu_domain *domain)
-{
- int ret = 0;
- unsigned long flags;
- struct exynos_iommu_owner *owner = dev-archdata.iommu;
- struct sysmmu_drvdata *data;
-
- BUG_ON(!has_sysmmu(dev));
-
- data = dev_get_drvdata(owner-sysmmu);
-
- ret = __sysmmu_enable(data, pgtable, domain);
- if (ret = 0)
- data-master = dev;
-
- return ret;
-}
-
-static bool exynos_sysmmu_disable(struct device *dev)
-{
- unsigned long flags;
- bool disabled = true;
- struct exynos_iommu_owner *owner = dev-archdata.iommu;
- struct sysmmu_drvdata *data;
-
- BUG_ON(!has_sysmmu(dev));
-
- data = dev_get_drvdata(owner-sysmmu);
-
- disabled = __sysmmu_disable(data);
- if (disabled)
- data-master = NULL;
-
- return disabled;
-}
-
static void __sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
sysmmu_iova_t iova)
{
--
1.9.2
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[PATCH v5 02/18] arm: exynos: pm_domains: add support for devices registered before arch_initcall
SYSMMU devices will be registered early before any other devices and
before calling arch_initcall. To add them to respective power domains,
additional scan of all platform devices is needed.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
arch/arm/mach-exynos/pm_domains.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/pm_domains.c
b/arch/arm/mach-exynos/pm_domains.c
index 37266a8..0e2bc36 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -105,6 +105,12 @@ static int exynos_pd_power_off(struct generic_pm_domain
*domain)
return exynos_pd_power(domain, false);
}
+static __init int exynos_pd_init_platform_dev(struct device *dev, void *data)
+{
+ dev_pm_domain_attach(dev, true);
+ return 0;
+}
+
static __init int exynos4_pm_init_power_domain(void)
{
struct platform_device *pdev;
@@ -189,6 +195,7 @@ no_clk:
of_node_put(np);
}
- return 0;
+ return bus_for_each_dev(platform_bus_type, NULL, NULL,
+ exynos_pd_init_platform_dev);
}
arch_initcall(exynos4_pm_init_power_domain);
--
1.9.2
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[PATCH v5 09/18] iommu: exynos: refactor function parameters to simplify code
This patch simplifies the code by:
- refactoring function parameters from struct device pointer to direct pointer
to struct sysmmu drvdata
- moving list_head enteries from struct exynos_iommu_owner directly to struct
sysmmu_drvdata
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 93 ++--
1 file changed, 46 insertions(+), 47 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index aa8c4b0..862261f 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -186,8 +186,6 @@ static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
/* attached to dev.archdata.iommu of the master device */
struct exynos_iommu_owner {
- struct list_head client; /* entry of exynos_iommu_domain.clients */
- struct device *dev;
struct device *sysmmu;
};
@@ -208,6 +206,7 @@ struct sysmmu_drvdata {
int activations;
spinlock_t lock;
struct iommu_domain *domain;
+ struct list_head domain_node;
phys_addr_t pgtable;
int version;
};
@@ -508,12 +507,10 @@ static void __sysmmu_tlb_invalidate_flpdcache(struct
sysmmu_drvdata *data,
__raw_writel(iova | 0x1, data-sfrbase + REG_MMU_FLUSH_ENTRY);
}
-static void sysmmu_tlb_invalidate_flpdcache(struct device *dev,
+static void sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
sysmmu_iova_t iova)
{
unsigned long flags;
- struct exynos_iommu_owner *owner = dev-archdata.iommu;
- struct sysmmu_drvdata *data = dev_get_drvdata(owner-sysmmu);
if (!IS_ERR(data-clk_master))
clk_enable(data-clk_master);
@@ -527,14 +524,10 @@ static void sysmmu_tlb_invalidate_flpdcache(struct device
*dev,
clk_disable(data-clk_master);
}
-static void sysmmu_tlb_invalidate_entry(struct device *dev, sysmmu_iova_t iova,
- size_t size)
+static void sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
+ sysmmu_iova_t iova, size_t size)
{
- struct exynos_iommu_owner *owner = dev-archdata.iommu;
unsigned long flags;
- struct sysmmu_drvdata *data;
-
- data = dev_get_drvdata(owner-sysmmu);
spin_lock_irqsave(data-lock, flags);
if (is_sysmmu_active(data)) {
@@ -564,8 +557,8 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev,
sysmmu_iova_t iova,
if (!IS_ERR(data-clk_master))
clk_disable(data-clk_master);
} else {
- dev_dbg(dev, disabled. Skipping TLB invalidation @ %#x\n,
- iova);
+ dev_dbg(data-master,
+ disabled. Skipping TLB invalidation @ %#x\n, iova);
}
spin_unlock_irqrestore(data-lock, flags);
}
@@ -703,7 +696,7 @@ err_pgtable:
static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
{
struct exynos_iommu_domain *priv = domain-priv;
- struct exynos_iommu_owner *owner;
+ struct sysmmu_drvdata *data;
unsigned long flags;
int i;
@@ -711,14 +704,12 @@ static void exynos_iommu_domain_destroy(struct
iommu_domain *domain)
spin_lock_irqsave(priv-lock, flags);
- list_for_each_entry(owner, priv-clients, client) {
- while (!exynos_sysmmu_disable(owner-dev))
- ; /* until System MMU is actually disabled */
+ list_for_each_entry(data, priv-clients, domain_node) {
+ if (__sysmmu_disable(data))
+ data-master = NULL;
+ list_del_init(data-domain_node);
}
- while (!list_empty(priv-clients))
- list_del_init(priv-clients.next);
-
spin_unlock_irqrestore(priv-lock, flags);
for (i = 0; i NUM_LV1ENTRIES; i++)
@@ -737,20 +728,26 @@ static int exynos_iommu_attach_device(struct iommu_domain
*domain,
{
struct exynos_iommu_owner *owner = dev-archdata.iommu;
struct exynos_iommu_domain *priv = domain-priv;
+ struct sysmmu_drvdata *data;
phys_addr_t pagetable = virt_to_phys(priv-pgtable);
unsigned long flags;
- int ret;
+ int ret = -ENODEV;
- spin_lock_irqsave(priv-lock, flags);
+ if (!has_sysmmu(dev))
+ return -ENODEV;
- ret = __exynos_sysmmu_enable(dev, pagetable, domain);
- if (ret == 0) {
- list_add_tail(owner-client, priv-clients);
- owner-domain = domain;
+ data = dev_get_drvdata(owner-sysmmu);
+ if (data) {
+ ret = __sysmmu_enable(data, pagetable, domain);
+ if (ret = 0) {
+ data-master = dev;
+
+ spin_lock_irqsave(priv-lock, flags);
+ list_add_tail(data-domain_node, priv-clients);
+
[PATCH v5 03/18] ARM: dts: exynos4: add sysmmu nodes
This patch adds System MMU nodes that are specific to Exynos4210/4x12 series.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi| 118 ++
arch/arm/boot/dts/exynos4210.dtsi | 23
arch/arm/boot/dts/exynos4x12.dtsi | 82 ++
3 files changed, 223 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index a59b3fae..ca219ed 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -183,6 +183,7 @@
clock-names = fimc, sclk_fimc;
power-domains = pd_cam;
samsung,sysreg = sys_reg;
+ iommus = sysmmu_fimc0;
status = disabled;
};
@@ -194,6 +195,7 @@
clock-names = fimc, sclk_fimc;
power-domains = pd_cam;
samsung,sysreg = sys_reg;
+ iommus = sysmmu_fimc1;
status = disabled;
};
@@ -205,6 +207,7 @@
clock-names = fimc, sclk_fimc;
power-domains = pd_cam;
samsung,sysreg = sys_reg;
+ iommus = sysmmu_fimc2;
status = disabled;
};
@@ -216,6 +219,7 @@
clock-names = fimc, sclk_fimc;
power-domains = pd_cam;
samsung,sysreg = sys_reg;
+ iommus = sysmmu_fimc3;
status = disabled;
};
@@ -404,6 +408,8 @@
clocks = clock CLK_MFC, clock CLK_SCLK_MFC;
clock-names = mfc, sclk_mfc;
status = disabled;
+ iommus = sysmmu_mfc_l, sysmmu_mfc_r;
+ iommu-names = left, right;
};
serial_0: serial@1380 {
@@ -669,6 +675,7 @@
power-domains = pd_lcd0;
samsung,sysreg = sys_reg;
status = disabled;
+ iommus = sysmmu_fimd0;
};
hdmi: hdmi@12D0 {
@@ -691,6 +698,117 @@
interrupts = 0 91 0;
reg = 0x12C1 0x2100, 0x12c0 0x300;
power-domains = pd_tv;
+ iommus = sysmmu_tv;
status = disabled;
};
+
+ sysmmu_mfc_l: sysmmu@1362 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x1362 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 5 5;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_MFCL, clock CLK_MFC;
+ power-domains = pd_mfc;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_mfc_r: sysmmu@1363 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x1363 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 5 6;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_MFCR, clock CLK_MFC;
+ power-domains = pd_mfc;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_tv: sysmmu@12E2 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x12E2 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 5 4;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_TV, clock CLK_MIXER;
+ power-domains = pd_tv;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_fimc0: sysmmu@11A2 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x11A2 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 4 2;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_FIMC0, clock CLK_FIMC0;
+ power-domains = pd_cam;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_fimc1: sysmmu@11A3 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x11A3 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 4 3;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_FIMC1, clock CLK_FIMC1;
+ power-domains = pd_cam;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_fimc2: sysmmu@11A4 {
+ compatible = samsung,exynos-sysmmu;
+ reg = 0x11A4 0x1000;
+ interrupt-parent = combiner;
+ interrupts = 4 4;
+ clock-names = sysmmu, master;
+ clocks = clock CLK_SMMU_FIMC2, clock CLK_FIMC2;
+ power-domains = pd_cam;
+ #iommu-cells = 0;
+ };
+
+ sysmmu_fimc3: sysmmu@11A5 {
+ compatible = samsung,exynos-sysmmu;
+
[PATCH v5 00/18] Exynos SYSMMU (IOMMU) integration with DT and DMA-mapping subsystem
Hello Everyone, This is yet another attempt to get Exynos SYSMMU driver with integrated with IOMMU DMA-mapping subsystems. The main change from previous version is a rebase onto some more pending Exynos DTS patches and minor fixes of the reported issues. Merge plan for this patchset: 1. All iommu related patches (with 'iommu: exynos') can be merged to iommu tree. They don't have any direct dependencies on the DTS, DRM and power domain initialization change - without them the driver will simply not initialize, when no exynos,sysmmu nodes are provided in device tree. Joerg, could you merge those patches? 2. DTS and power domain patches should go to Samsung Exynos tree. Those patches depends on earlier DTS patches for Exynos SoCs, which make this patchset really complete: - 'ARM: DTS: Exynos: convert to generic power domain bindings' (http://www.spinics.net/lists/linux-samsung-soc/msg40584.html) - '[PATCH v4 0/7] Enable HDMI support on Exynos platforms' (http://www.spinics.net/lists/arm-kernel/msg391148.html) - '[PATCH 0/2] Add HDMI support for Exynos5420 platform' (http://www.spinics.net/lists/linux-samsung-soc/msg41364.html) Kukjin, could you merge those patches? 3. Exynos DRM fix. This patch in my opinion should go Exynos DRM tree. Inki, could you merge it? Best regards Marek Szyprowski Samsung RD Institute Poland Changelog: v5: - rebased onto 'Add HDMI support for Exynos5420 platform' patchset - fixed 'const' issue in 'iommu: exynos: init from dt-specific callback instead of initcall' patch, thanks to Tobias Jakobi for reporting it - fixed copy-paste typo in exynos5250 dts patch v4: http://www.spinics.net/lists/linux-samsung-soc/msg41177.html - rebased onto v3.19-rc4 and other Exynos DTS queued patches - added DTS patch for Exynos 5250 5420/5422/5800 v3: http://www.spinics.net/lists/linux-samsung-soc/msg39168.html - rebased onto [RFC PATCH v4 0/8] Introduce automatic DMA configuration for IOMMU masters - added some minor fixes for iommu and dma-mapping frameworks v2: http://thread.gmane.org/gmane.linux.kernel.iommu/6472/ - rebased onto [RFC PATCH v3 0/7] Introduce automatic DMA configuration for IOMMU masters patches: http://www.spinics.net/lists/arm-kernel/msg362076.html - changed initialization from bus notifiers to DT related callbacks - removed support for separate IO address spaces - this will be discussed separately after the basic support gets merged - removed support for power domain notifier-based runtime power management - this also will be discussed separately later v1: https://lkml.org/lkml/2014/8/5/183 - initial version, feature complete, completely rewrote integration approach Patch summary: Marek Szyprowski (18): drm: exynos: detach from default dma-mapping domain on init arm: exynos: pm_domains: add support for devices registered before arch_initcall ARM: dts: exynos4: add sysmmu nodes ARM: dts: exynos5250: add sysmmu nodes ARM: dts: exynos5420: add sysmmu nodes iommu: exynos: don't read version register on every tlb operation iommu: exynos: remove unused functions iommu: exynos: remove useless spinlock iommu: exynos: refactor function parameters to simplify code iommu: exynos: remove unused functions, part 2 iommu: exynos: remove useless device_add/remove callbacks iommu: exynos: add support for binding more than one sysmmu to master device iommu: exynos: add support for runtime_pm iommu: exynos: rename variables to reflect their purpose iommu: exynos: document internal structures iommu: exynos: remove excessive includes and sort others alphabetically iommu: exynos: init from dt-specific callback instead of initcall iommu: exynos: add callback for initializing devices from device tree arch/arm/boot/dts/exynos4.dtsi| 118 +++ arch/arm/boot/dts/exynos4210.dtsi | 23 ++ arch/arm/boot/dts/exynos4x12.dtsi | 82 + arch/arm/boot/dts/exynos5250.dtsi | 250 +++ arch/arm/boot/dts/exynos5420.dtsi | 181 +++ arch/arm/mach-exynos/pm_domains.c | 9 +- drivers/gpu/drm/exynos/exynos_drm_iommu.c | 3 + drivers/iommu/exynos-iommu.c | 492 ++ 8 files changed, 888 insertions(+), 270 deletions(-) -- 1.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v5 14/18] iommu: exynos: rename variables to reflect their purpose
This patch renames some variables to make the code easier to understand.
'domain' is replaced by 'iommu_domain' (more generic entity) and really
meaning less 'priv' by 'domain' to reflect its purpose.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 191 ++-
1 file changed, 97 insertions(+), 94 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index f8609f4..78a12ea 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -430,8 +430,8 @@ static void __sysmmu_enable_nocount(struct sysmmu_drvdata
*data)
clk_disable(data-clk_master);
}
-static int __sysmmu_enable(struct sysmmu_drvdata *data,
- phys_addr_t pgtable, struct iommu_domain *domain)
+static int __sysmmu_enable(struct sysmmu_drvdata *data, phys_addr_t pgtable,
+ struct iommu_domain *iommu_domain)
{
int ret = 0;
unsigned long flags;
@@ -439,7 +439,7 @@ static int __sysmmu_enable(struct sysmmu_drvdata *data,
spin_lock_irqsave(data-lock, flags);
if (set_sysmmu_active(data)) {
data-pgtable = pgtable;
- data-domain = domain;
+ data-domain = iommu_domain;
__sysmmu_enable_nocount(data);
@@ -602,92 +602,93 @@ static inline void pgtable_flush(void *vastart, void
*vaend)
virt_to_phys(vaend));
}
-static int exynos_iommu_domain_init(struct iommu_domain *domain)
+static int exynos_iommu_domain_init(struct iommu_domain *iommu_domain)
{
- struct exynos_iommu_domain *priv;
+ struct exynos_iommu_domain *domain;
int i;
- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
- if (!priv)
+ domain = kzalloc(sizeof(*domain), GFP_KERNEL);
+ if (!domain)
return -ENOMEM;
- priv-pgtable = (sysmmu_pte_t *)__get_free_pages(GFP_KERNEL, 2);
- if (!priv-pgtable)
+ domain-pgtable = (sysmmu_pte_t *)__get_free_pages(GFP_KERNEL, 2);
+ if (!domain-pgtable)
goto err_pgtable;
- priv-lv2entcnt = (short *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 1);
- if (!priv-lv2entcnt)
+ domain-lv2entcnt = (short *)
+ __get_free_pages(GFP_KERNEL | __GFP_ZERO, 1);
+ if (!domain-lv2entcnt)
goto err_counter;
/* Workaround for System MMU v3.3 to prevent caching 1MiB mapping */
for (i = 0; i NUM_LV1ENTRIES; i += 8) {
- priv-pgtable[i + 0] = ZERO_LV2LINK;
- priv-pgtable[i + 1] = ZERO_LV2LINK;
- priv-pgtable[i + 2] = ZERO_LV2LINK;
- priv-pgtable[i + 3] = ZERO_LV2LINK;
- priv-pgtable[i + 4] = ZERO_LV2LINK;
- priv-pgtable[i + 5] = ZERO_LV2LINK;
- priv-pgtable[i + 6] = ZERO_LV2LINK;
- priv-pgtable[i + 7] = ZERO_LV2LINK;
+ domain-pgtable[i + 0] = ZERO_LV2LINK;
+ domain-pgtable[i + 1] = ZERO_LV2LINK;
+ domain-pgtable[i + 2] = ZERO_LV2LINK;
+ domain-pgtable[i + 3] = ZERO_LV2LINK;
+ domain-pgtable[i + 4] = ZERO_LV2LINK;
+ domain-pgtable[i + 5] = ZERO_LV2LINK;
+ domain-pgtable[i + 6] = ZERO_LV2LINK;
+ domain-pgtable[i + 7] = ZERO_LV2LINK;
}
- pgtable_flush(priv-pgtable, priv-pgtable + NUM_LV1ENTRIES);
+ pgtable_flush(domain-pgtable, domain-pgtable + NUM_LV1ENTRIES);
- spin_lock_init(priv-lock);
- spin_lock_init(priv-pgtablelock);
- INIT_LIST_HEAD(priv-clients);
+ spin_lock_init(domain-lock);
+ spin_lock_init(domain-pgtablelock);
+ INIT_LIST_HEAD(domain-clients);
- domain-geometry.aperture_start = 0;
- domain-geometry.aperture_end = ~0UL;
- domain-geometry.force_aperture = true;
+ iommu_domain-geometry.aperture_start = 0;
+ iommu_domain-geometry.aperture_end = ~0UL;
+ iommu_domain-geometry.force_aperture = true;
- domain-priv = priv;
+ iommu_domain-priv = domain;
return 0;
err_counter:
- free_pages((unsigned long)priv-pgtable, 2);
+ free_pages((unsigned long)domain-pgtable, 2);
err_pgtable:
- kfree(priv);
+ kfree(domain);
return -ENOMEM;
}
-static void exynos_iommu_domain_destroy(struct iommu_domain *domain)
+static void exynos_iommu_domain_destroy(struct iommu_domain *iommu_domain)
{
- struct exynos_iommu_domain *priv = domain-priv;
+ struct exynos_iommu_domain *domain = iommu_domain-priv;
struct sysmmu_drvdata *data;
unsigned long flags;
int i;
- WARN_ON(!list_empty(priv-clients));
+ WARN_ON(!list_empty(domain-clients));
- spin_lock_irqsave(priv-lock, flags);
+ spin_lock_irqsave(domain-lock, flags);
- list_for_each_entry(data, priv-clients,
[PATCH v5 17/18] iommu: exynos: init from dt-specific callback instead of initcall
This patch introduces IOMMU_OF_DECLARE-based initialization to the
driver, which replaces subsys_initcall-based procedure.
exynos_iommu_of_setup ensures that each sysmmu controller is probed
before its master device.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 30 --
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index c53cc8f..ff169ce 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -13,16 +13,21 @@
#endif
#include linux/clk.h
+#include linux/dma-mapping.h
#include linux/err.h
#include linux/io.h
#include linux/iommu.h
#include linux/interrupt.h
#include linux/list.h
+#include linux/of.h
+#include linux/of_iommu.h
+#include linux/of_platform.h
#include linux/platform_device.h
#include linux/pm_runtime.h
#include linux/slab.h
#include asm/cacheflush.h
+#include asm/dma-iommu.h
#include asm/pgtable.h
typedef u32 sysmmu_iova_t;
@@ -1072,7 +1077,7 @@ static phys_addr_t exynos_iommu_iova_to_phys(struct
iommu_domain *iommu_domain,
return phys;
}
-static const struct iommu_ops exynos_iommu_ops = {
+static struct iommu_ops exynos_iommu_ops = {
.domain_init = exynos_iommu_domain_init,
.domain_destroy = exynos_iommu_domain_destroy,
.attach_dev = exynos_iommu_attach_device,
@@ -1084,6 +1089,8 @@ static const struct iommu_ops exynos_iommu_ops = {
.pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE,
};
+static int init_done;
+
static int __init exynos_iommu_init(void)
{
int ret;
@@ -1116,6 +1123,8 @@ static int __init exynos_iommu_init(void)
goto err_set_iommu;
}
+ init_done = true;
+
return 0;
err_set_iommu:
kmem_cache_free(lv2table_kmem_cache, zero_lv2_table);
@@ -1125,4 +1134,21 @@ err_reg_driver:
kmem_cache_destroy(lv2table_kmem_cache);
return ret;
}
-subsys_initcall(exynos_iommu_init);
+
+static int __init exynos_iommu_of_setup(struct device_node *np)
+{
+ struct platform_device *pdev;
+
+ if (!init_done)
+ exynos_iommu_init();
+
+ pdev = of_platform_device_create(np, NULL, platform_bus_type.dev_root);
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ of_iommu_set_ops(np, exynos_iommu_ops);
+ return 0;
+}
+
+IOMMU_OF_DECLARE(exynos_iommu_of, samsung,exynos-sysmmu,
+exynos_iommu_of_setup);
--
1.9.2
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[PATCH v5 13/18] iommu: exynos: add support for runtime_pm
This patch fixes support for runtime power management for SYSMMU
controllers, so they are enabled when master device is attached.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index c6cca44..f8609f4 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -695,6 +695,7 @@ static int exynos_iommu_attach_device(struct iommu_domain
*domain,
return -ENODEV;
list_for_each_entry(data, owner-clients, owner_node) {
+ pm_runtime_get_sync(data-sysmmu);
ret = __sysmmu_enable(data, pagetable, domain);
if (ret = 0) {
data-master = dev;
@@ -736,6 +737,7 @@ static void exynos_iommu_detach_device(struct iommu_domain
*domain,
data-master = NULL;
list_del_init(data-domain_node);
}
+ pm_runtime_put(data-sysmmu);
found = true;
}
}
--
1.9.2
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[PATCH v5 16/18] iommu: exynos: remove excessive includes and sort others alphabetically
Removed following unused includes: linux/mm.h, linux/errno.h, linux/memblock.h and linux/export.h. Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com --- drivers/iommu/exynos-iommu.c | 14 +- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c index ef71725..c53cc8f 100644 --- a/drivers/iommu/exynos-iommu.c +++ b/drivers/iommu/exynos-iommu.c @@ -12,19 +12,15 @@ #define DEBUG #endif -#include linux/io.h -#include linux/interrupt.h -#include linux/platform_device.h -#include linux/slab.h -#include linux/pm_runtime.h #include linux/clk.h #include linux/err.h -#include linux/mm.h +#include linux/io.h #include linux/iommu.h -#include linux/errno.h +#include linux/interrupt.h #include linux/list.h -#include linux/memblock.h -#include linux/export.h +#include linux/platform_device.h +#include linux/pm_runtime.h +#include linux/slab.h #include asm/cacheflush.h #include asm/pgtable.h -- 1.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v5 18/18] iommu: exynos: add callback for initializing devices from device tree
This patch adds implementation of of_xlate callback, which prepares
masters device for attaching to IOMMU. This callback is called during
creating devices from device tree.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index ff169ce..99217f7 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -1077,6 +1077,33 @@ static phys_addr_t exynos_iommu_iova_to_phys(struct
iommu_domain *iommu_domain,
return phys;
}
+static int exynos_iommu_of_xlate(struct device *dev,
+struct of_phandle_args *spec)
+{
+ struct exynos_iommu_owner *owner = dev-archdata.iommu;
+ struct platform_device *sysmmu = of_find_device_by_node(spec-np);
+ struct sysmmu_drvdata *data;
+
+ if (!sysmmu)
+ return -ENODEV;
+
+ data = platform_get_drvdata(sysmmu);
+ if (!data)
+ return -ENODEV;
+
+ if (!owner) {
+ owner = kzalloc(sizeof(*owner), GFP_KERNEL);
+ if (!owner)
+ return -ENOMEM;
+
+ INIT_LIST_HEAD(owner-clients);
+ dev-archdata.iommu = owner;
+ }
+
+ list_add_tail(data-owner_node, owner-clients);
+ return 0;
+}
+
static struct iommu_ops exynos_iommu_ops = {
.domain_init = exynos_iommu_domain_init,
.domain_destroy = exynos_iommu_domain_destroy,
@@ -1087,6 +1114,7 @@ static struct iommu_ops exynos_iommu_ops = {
.map_sg = default_iommu_map_sg,
.iova_to_phys = exynos_iommu_iova_to_phys,
.pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE,
+ .of_xlate = exynos_iommu_of_xlate,
};
static int init_done;
--
1.9.2
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[PATCH v5 12/18] iommu: exynos: add support for binding more than one sysmmu to master device
This patch adds support for assigning more than one SYSMMU controller to
the master device. This has been achieved simply by chaning the struct
device pointer in struct exynos_iommu_owner into the list of struct
sysmmu_drvdata of all controllers assigned to the given master device.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index e40e699..c6cca44 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -186,7 +186,7 @@ static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
/* attached to dev.archdata.iommu of the master device */
struct exynos_iommu_owner {
- struct device *sysmmu;
+ struct list_head clients;
};
struct exynos_iommu_domain {
@@ -207,6 +207,7 @@ struct sysmmu_drvdata {
spinlock_t lock;
struct iommu_domain *domain;
struct list_head domain_node;
+ struct list_head owner_node;
phys_addr_t pgtable;
int version;
};
@@ -693,8 +694,7 @@ static int exynos_iommu_attach_device(struct iommu_domain
*domain,
if (!has_sysmmu(dev))
return -ENODEV;
- data = dev_get_drvdata(owner-sysmmu);
- if (data) {
+ list_for_each_entry(data, owner-clients, owner_node) {
ret = __sysmmu_enable(data, pagetable, domain);
if (ret = 0) {
data-master = dev;
@@ -722,7 +722,7 @@ static void exynos_iommu_detach_device(struct iommu_domain
*domain,
{
struct exynos_iommu_domain *priv = domain-priv;
phys_addr_t pagetable = virt_to_phys(priv-pgtable);
- struct sysmmu_drvdata *data;
+ struct sysmmu_drvdata *data, *next;
unsigned long flags;
int found = 0;
@@ -730,14 +730,13 @@ static void exynos_iommu_detach_device(struct
iommu_domain *domain,
return;
spin_lock_irqsave(priv-lock, flags);
- list_for_each_entry(data, priv-clients, domain_node) {
+ list_for_each_entry_safe(data, next, priv-clients, domain_node) {
if (data-master == dev) {
if (__sysmmu_disable(data)) {
data-master = NULL;
list_del_init(data-domain_node);
}
found = true;
- break;
}
}
spin_unlock_irqrestore(priv-lock, flags);
--
1.9.2
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[PATCH v5 11/18] iommu: exynos: remove useless device_add/remove callbacks
The driver doesn't need to do anything important in device add/remove
callbacks, because initialization will be done from device-tree specific
callbacks added later. IOMMU groups created by current code were never
used.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 28
1 file changed, 28 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index e62cb96..e40e699 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -1055,32 +1055,6 @@ static phys_addr_t exynos_iommu_iova_to_phys(struct
iommu_domain *domain,
return phys;
}
-static int exynos_iommu_add_device(struct device *dev)
-{
- struct iommu_group *group;
- int ret;
-
- group = iommu_group_get(dev);
-
- if (!group) {
- group = iommu_group_alloc();
- if (IS_ERR(group)) {
- dev_err(dev, Failed to allocate IOMMU group\n);
- return PTR_ERR(group);
- }
- }
-
- ret = iommu_group_add_device(group, dev);
- iommu_group_put(group);
-
- return ret;
-}
-
-static void exynos_iommu_remove_device(struct device *dev)
-{
- iommu_group_remove_device(dev);
-}
-
static const struct iommu_ops exynos_iommu_ops = {
.domain_init = exynos_iommu_domain_init,
.domain_destroy = exynos_iommu_domain_destroy,
@@ -1090,8 +1064,6 @@ static const struct iommu_ops exynos_iommu_ops = {
.unmap = exynos_iommu_unmap,
.map_sg = default_iommu_map_sg,
.iova_to_phys = exynos_iommu_iova_to_phys,
- .add_device = exynos_iommu_add_device,
- .remove_device = exynos_iommu_remove_device,
.pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE,
};
--
1.9.2
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[PATCH v5 15/18] iommu: exynos: document internal structures
Add a few words of comment to all internal structures used by the driver.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
drivers/iommu/exynos-iommu.c | 49 +---
1 file changed, 33 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 78a12ea..ef71725 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -184,32 +184,49 @@ static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
UNKNOWN FAULT
};
-/* attached to dev.archdata.iommu of the master device */
+/*
+ * This structure is attached to dev.archdata.iommu of the master device
+ * on device add, contains a list of SYSMMU controllers defined by device tree,
+ * which are bound to given master device. It is usually referenced by 'owner'
+ * pointer.
+ */
struct exynos_iommu_owner {
- struct list_head clients;
+ struct list_head clients; /* list of sysmmu_drvdata.owner_node */
};
+/*
+ * This structure is stored in -priv field of generic struct iommu_domain,
+ * contains list of SYSMMU controllers from all master devices, which has been
+ * attached to this domain and page tables of IO address space defined by this
+ * domain. It is usually referenced by 'domain' pointer.
+ */
struct exynos_iommu_domain {
- struct list_head clients; /* list of sysmmu_drvdata.node */
+ struct list_head clients; /* list of sysmmu_drvdata.domain_node */
sysmmu_pte_t *pgtable; /* lv1 page table, 16KB */
short *lv2entcnt; /* free lv2 entry counter for each section */
- spinlock_t lock; /* lock for this structure */
+ spinlock_t lock; /* lock for modyfying list of clients */
spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */
};
+/*
+ * This structure hold all data of a single SYSMMU controller, this includes
+ * hw resources like registers and clocks, pointers and list nodes to connect
+ * it to all other structures, internal state and parameters read from device
+ * tree. It is usually referenced by 'data' pointer.
+ */
struct sysmmu_drvdata {
- struct device *sysmmu; /* System MMU's device descriptor */
- struct device *master; /* Owner of system MMU */
- void __iomem *sfrbase;
- struct clk *clk;
- struct clk *clk_master;
- int activations;
- spinlock_t lock;
- struct iommu_domain *domain;
- struct list_head domain_node;
- struct list_head owner_node;
- phys_addr_t pgtable;
- int version;
+ struct device *sysmmu; /* SYSMMU controller device */
+ struct device *master; /* master device (owner of given SYSMMU) */
+ void __iomem *sfrbase; /* our registers */
+ struct clk *clk; /* SYSMMU's clock */
+ struct clk *clk_master; /* master's device clock */
+ int activations; /* number of calls to sysmmu_enable */
+ spinlock_t lock; /* lock for modyfying enable/disable state */
+ struct iommu_domain *domain; /* domain we belong to */
+ struct list_head domain_node; /* node for domain clients list */
+ struct list_head owner_node; /* node for owner clients list */
+ phys_addr_t pgtable; /* assigned page table structure */
+ int version; /* our version */
};
static bool set_sysmmu_active(struct sysmmu_drvdata *data)
--
1.9.2
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Re: [PATCH] ARM: dts: Add sd0_rst pinctrl node to exynos5420
On Fri, 2015-01-23 at 15:36 +0100, Javier Martinez Canillas wrote: Hello Jaehoon, On Fri, Jan 23, 2015 at 3:23 PM, Jaehoon Chung jh80.ch...@samsung.com wrote: Add sd0_rst node to exynos5420-pinctrl.dtsi. (It's used on odroid-xu3 board) It would be good to mention which device needs this pinctrl line. Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com --- arch/arm/boot/dts/exynos5420-pinctrl.dtsi |5 + If this pin is used by the Odroid XU3 board, shouldn't be defined in the exynos5422-odroidxu3.dts instead? It's not just used by the XU3 though, it's also hooked up on the peach pi chromebook for example and i would expect it to be hooked up on most board with an eMMC This change is consistent with most of the special purpose GPIO pins defined in that file, so i don't see the problem with including it in that pinctrl file -- Sjoerd Simons sjoerd.sim...@collabora.co.uk Collabora Ltd. smime.p7s Description: S/MIME cryptographic signature
Re: [PATCH] ARM: dts: Add sd0_rst pinctrl node to exynos5420
On Fri, 2015-01-23 at 23:23 +0900, Jaehoon Chung wrote:
Add sd0_rst node to exynos5420-pinctrl.dtsi.
(It's used on odroid-xu3 board)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index ba686e4..315cad7 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -194,6 +194,11 @@
samsung,pin-drv = 3;
};
+ sd0_rst: sd0-rst {
+ samsung,pins = gpd1-0;
+ samsung,pin-function = 1;
I think this should be samsung,pin-function = 2; for that
functionality.
--
Sjoerd Simons sjoerd.sim...@collabora.co.uk
Collabora Ltd.
smime.p7s
Description: S/MIME cryptographic signature
Re: [PATCH v4 18/18] iommu: exynos: add callback for initializing devices from device tree
Hello Javier,
On 2015-01-23 14:48, Javier Martinez Canillas wrote:
On Fri, Jan 23, 2015 at 1:40 PM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
+
+ list_add_tail(data-owner_node, owner-clients);
This is the line that causes the kernel to hang, if I comment the
list_add_tail() call then the kernel boots.
I checked that neither data nor owner are NULL and that the
owner-clients list_head is initialized. Do you have any ideas what
could be happening?
This is really strange. However the hang is definitely not caused by
adding the controller to the list, but rather the fact that it is later
being initialized, probably in exynos_iommu_attach_device().
Yes, I knew adding to the list was not the issue but a side effect of
being in the list. I'm not familiar with Exynos sysmmu/iommu to figure
out though.
Just a quick question - does bootloader on Exynos5420 Peach Pit sets
any image on the display?
Yes u-boot does initialize the display, I see the boot messages and
have an u-boot prompt.
If so then we will get IOMMU page fault on init (DMA engine of FIMD is
left enabled from bootloader) and such case is not yet handled.
Besides that I have no idea for any other reason for such failure.
I see, that's a reasonable explanation and in fact your patch makes at
least the kernel to start booting.
To check if this is caused by io page fault, please temporarily add the
following hack:
---8---
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 7864797609b3..5e70cf7eb31b 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -2011,6 +2011,9 @@ static bool arm_setup_iommu_dma_ops(struct device
*dev, u64 dma_base, u64 size,
return false;
}
+iommu_map(mapping-domain, 0x4000, 0x4000, 0x8000,
+ IOMMU_READ | IOMMU_WRITE);
+
if (arm_iommu_attach_device(dev, mapping)) {
The kernel still hangs but the boot does indeed go further. Here is my
boot log [0] although I couldn't find an evident cause.
Frankly, this freeze looks really strange, because there is no error message
or any other failure indicator.
Thanks for testing the above hack. It confirmed that the previous boot
failure
was caused by display left enabled in bootloader. Such configuration is
not yet
supported, although I will do my best so find how to add support for it.
For the
time being - please don't enable IOMMU support on Exynos5420 Peach Pit. It
shouldn't be a big issue, because IOMMU support was already non-functional
all the time on Exynos platform.
Best regards
--
Marek Szyprowski, PhD
Samsung RD Institute Poland
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[PATCH v3 2/2] cpuidle: exynos: add coupled cpuidle support for Exynos4210
The following patch adds coupled cpuidle support for Exynos4210 to
an existing cpuidle-exynos driver. As a result it enables AFTR mode
to be used by default on Exynos4210 without the need to hot unplug
CPU1 first.
The patch is heavily based on earlier cpuidle-exynos4210 driver from
Daniel Lezcano:
http://www.spinics.net/lists/linux-samsung-soc/msg28134.html
Changes from Daniel's code include:
- porting code to current kernels
- fixing it to work on my setup (by using S5P_INFORM register
instead of S5P_VA_SYSRAM one on Revison 1.1 and retrying poking
CPU1 out of the BOOT ROM if necessary)
- fixing rare lockup caused by waiting for CPU1 to get stuck in
the BOOT ROM (CPU hotplug code in arch/arm/mach-exynos/platsmp.c
doesn't require this and works fine)
- moving Exynos specific code to arch/arm/mach-exynos/pm.c
- using cpu_boot_reg_base() helper instead of BOOT_VECTOR macro
- using exynos_cpu_*() helpers instead of accessing registers
directly
- using arch_send_wakeup_ipi_mask() instead of dsb_sev()
(this matches CPU hotplug code in arch/arm/mach-exynos/platsmp.c)
- integrating separate exynos4210-cpuidle driver into existing
exynos-cpuidle one
Cc: Colin Cross ccr...@google.com
Cc: Kukjin Kim kgene@samsung.com
Cc: Krzysztof Kozlowski k.kozlow...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Daniel Lezcano daniel.lezc...@linaro.org
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/common.h| 4 +
arch/arm/mach-exynos/exynos.c| 4 +
arch/arm/mach-exynos/platsmp.c | 2 +-
arch/arm/mach-exynos/pm.c| 122 +++
drivers/cpuidle/Kconfig.arm | 1 +
drivers/cpuidle/cpuidle-exynos.c | 76 +++--
include/linux/platform_data/cpuidle-exynos.h | 20 +
7 files changed, 223 insertions(+), 6 deletions(-)
create mode 100644 include/linux/platform_data/cpuidle-exynos.h
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 865f878..f70eca7 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -13,6 +13,7 @@
#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
#include linux/of.h
+#include linux/platform_data/cpuidle-exynos.h
#define EXYNOS3250_SOC_ID 0xE3472000
#define EXYNOS3_SOC_MASK 0xF000
@@ -150,8 +151,11 @@ extern void exynos_pm_central_suspend(void);
extern int exynos_pm_central_resume(void);
extern void exynos_enter_aftr(void);
+extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
+
extern void s5p_init_cpu(void __iomem *cpuid_addr);
extern unsigned int samsung_rev(void);
+extern void __iomem *cpu_boot_reg_base(void);
static inline void pmu_raw_writel(u32 val, u32 offset)
{
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 78eca99b..2013f73 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -211,6 +211,10 @@ static void __init exynos_dt_machine_init(void)
if (!IS_ENABLED(CONFIG_SMP))
exynos_sysram_init();
+#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
+ if (of_machine_is_compatible(samsung,exynos4210))
+ exynos_cpuidle.dev.platform_data = cpuidle_coupled_exynos_data;
+#endif
if (of_machine_is_compatible(samsung,exynos4210) ||
of_machine_is_compatible(samsung,exynos4212) ||
(of_machine_is_compatible(samsung,exynos4412)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 7a1ebfe..3f32c47 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -194,7 +194,7 @@ int exynos_cluster_power_state(int cluster)
S5P_CORE_LOCAL_PWR_EN);
}
-static inline void __iomem *cpu_boot_reg_base(void)
+void __iomem *cpu_boot_reg_base(void)
{
if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
return pmu_base_addr + S5P_INFORM5;
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 1a7454d..e6209da 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -180,3 +180,125 @@ void exynos_enter_aftr(void)
cpu_pm_exit();
}
+
+static atomic_t cpu1_wakeup = ATOMIC_INIT(0);
+
+static int exynos_cpu0_enter_aftr(void)
+{
+ int ret = -1;
+
+ /*
+* If the other cpu is powered on, we have to power it off, because
+* the AFTR state won't work otherwise
+*/
+ if (cpu_online(1)) {
+ /*
+* We reach a sync point with the coupled idle state, we know
+* the other cpu will power down itself or will abort the
+* sequence, let's wait for one of these to happen
+*/
+ while (exynos_cpu_power_state(1)) {
+ /*
+* The other cpu may skip idle and boot back
+
[PATCH v3 0/2] cpuidle: exynos: add coupled cpuidle support for Exynos4210
Hi, The following patchset adds coupled cpuidle support for Exynos4210 to an existing cpuidle-exynos driver. As a result it enables AFTR mode to be used by default on Exynos4210 without the need to hot unplug CPU1 first. This work is heavily based on earlier cpuidle-exynos4210 driver from Daniel Lezcano: http://www.spinics.net/lists/linux-samsung-soc/msg28134.html Changes from Daniel's code include: - porting code to current kernels - fixing it to work on my setup (by using S5P_INFORM register instead of S5P_VA_SYSRAM one on Revison 1.1 and retrying poking CPU1 out of the BOOT ROM if necessary) - fixing rare lockup caused by waiting for CPU1 to get stuck in the BOOT ROM (CPU hotplug code in arch/arm/mach-exynos/platsmp.c doesn't require this and works fine) - moving Exynos specific code to arch/arm/mach-exynos/pm.c - using cpu_boot_reg_base() helper instead of BOOT_VECTOR macro - using exynos_cpu_*() helpers instead of accessing registers directly - using arch_send_wakeup_ipi_mask() instead of dsb_sev() (this matches CPU hotplug code in arch/arm/mach-exynos/platsmp.c) - integrating separate exynos4210-cpuidle driver into existing exynos-cpuidle one patch #1 is a fix for Exynos platform PM code preparing it for coupled cpuidle support patch #2 adds coupled cpuidle AFTR mode for Exynos4210 The patchset depends on: - for-next branch (commit: 9663ad71912b) of linux-samsung.git kernel tree Changes since v2: - rebased on top of for-next branch (commit: 9663ad71912b) of linux-samsung.git kernel tree Changes since v1: - rebased on top of for-next branch (commit: 760a7d4763c8) of linux-samsung.git kernel tree (the patchset also applies fine to next-20141126 branch of linux-next kernel tree but needs CPUIDLE_FLAG_TIME_VALID flag usage removed to fix build) - added Signed-off-by from Daniel Lezcano to patch #2 - added separate struct cpuidle_driver exynos_coupled_idle_driver Best regards, -- Bartlomiej Zolnierkiewicz Samsung RD Institute Poland Samsung Electronics Bartlomiej Zolnierkiewicz (2): ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary cpuidle: exynos: add coupled cpuidle support for Exynos4210 arch/arm/mach-exynos/common.h| 4 + arch/arm/mach-exynos/exynos.c| 4 + arch/arm/mach-exynos/platsmp.c | 2 +- arch/arm/mach-exynos/pm.c| 133 ++- arch/arm/mach-exynos/suspend.c | 4 + drivers/cpuidle/Kconfig.arm | 1 + drivers/cpuidle/cpuidle-exynos.c | 76 ++- include/linux/platform_data/cpuidle-exynos.h | 20 8 files changed, 234 insertions(+), 10 deletions(-) create mode 100644 include/linux/platform_data/cpuidle-exynos.h -- 1.8.2.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] i2c: s3c2410: fix ABBA deadlock by keeping clock prepared
On Mon, Jan 19, 2015 at 05:03:33PM +0100, Paul Osmialowski wrote: This patch solves deadlock between clock prepare mutex and regmap mutex reported by Tomasz Figa in [1] by implementing solution from [2]: always leave the clock of the i2c controller in a prepared state. [1] https://lkml.org/lkml/2014/7/2/171 [2] https://lkml.org/lkml/2014/7/2/207 On each i2c transfer handled by s3c24xx_i2c_xfer(), clk_prepare_enable() was called, which calls clk_prepare() then clk_enable(). clk_prepare() takes prepare_lock mutex before proceeding. Note that i2c transfer functions are invoked from many places in kernel, typically with some other additional lock held. It may happen that function on CPU1 (e.g. regmap_update_bits()) has taken a mutex (i.e. regmap lock mutex) then it attempts i2c communication in order to proceed (so it needs to obtain clock related prepare_lock mutex during transfer preparation stage due to clk_prepare() call). At the same time other task on CPU0 wants to operate on clock (e.g. to (un)prepare clock for some other reason) so it has taken prepare_lock mutex. CPU0:CPU1: clk_disable_unused() regulator_disable() clk_prepare_lock() map-lock(map-lock_arg) regmap_read()s3c24xx_i2c_xfer() map-lock(map-lock_arg) clk_prepare_lock() Implemented solution from [2] leaves i2c clock prepared. Preparation is done in s3c24xx_i2c_probe() function. Without this patch, it is immediately unprepared by clk_disable_unprepare() call. I've replaced this call with clk_disable() and I've added clk_unprepare() call in s3c24xx_i2c_remove(). The s3c24xx_i2c_xfer() function now uses clk_enable() instead of clk_prepare_enable() (and clk_disable() instead of clk_unprepare_disable()). Signed-off-by: Paul Osmialowski p.osmialo...@samsung.com Applied to for-current, thanks! signature.asc Description: Digital signature
Re: [PATCH v6 08/18] cpufreq: exynos: Use device tree to determine if cpufreq cooling should be registered
On 23 January 2015 at 17:44, Lukasz Majewski l.majew...@samsung.com wrote:
+ cpus = of_find_node_by_path(/cpus);
+ if (!cpus) {
+ pr_err(failed to find cpus node\n);
+ return 0;
+ }
+
+ np = of_get_next_child(cpus, NULL);
+ if (!np) {
+ pr_err(failed to find cpus child node\n);
+ of_node_put(cpus);
return 0;
+ }
Why making it complex? Just get device node for cpu 0 and
do cpu_dev-np.
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[PATCH 5/6] drm/exynos: remove struct *_win_data abstraction on planes
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane
directly.
It changes how planes are created and remove .win_mode_set() callback
that was only filling all *_win_data structs.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 9 +-
drivers/gpu/drm/exynos/exynos_drm_crtc.h | 1 +
drivers/gpu/drm/exynos/exynos_drm_drv.c | 14 --
drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 +-
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 181 ++---
drivers/gpu/drm/exynos/exynos_drm_plane.c | 20 +--
drivers/gpu/drm/exynos/exynos_drm_plane.h | 6 +-
drivers/gpu/drm/exynos/exynos_drm_vidi.c | 123 -
drivers/gpu/drm/exynos/exynos_mixer.c | 212 +++---
9 files changed, 182 insertions(+), 389 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index d0f4e1b..5cd6c1a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -287,13 +287,13 @@ static void exynos_drm_crtc_attach_mode_property(struct
drm_crtc *crtc)
}
struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev,
+ struct drm_plane *plane,
int pipe,
enum exynos_drm_output_type type,
struct exynos_drm_crtc_ops *ops,
void *ctx)
{
struct exynos_drm_crtc *exynos_crtc;
- struct drm_plane *plane;
struct exynos_drm_private *private = drm_dev-dev_private;
struct drm_crtc *crtc;
int ret;
@@ -309,12 +309,6 @@ struct exynos_drm_crtc *exynos_drm_crtc_create(struct
drm_device *drm_dev,
exynos_crtc-type = type;
exynos_crtc-ops = ops;
exynos_crtc-ctx = ctx;
- plane = exynos_plane_init(drm_dev, 1 pipe,
- DRM_PLANE_TYPE_PRIMARY);
- if (IS_ERR(plane)) {
- ret = PTR_ERR(plane);
- goto err_plane;
- }
crtc = exynos_crtc-base;
@@ -333,7 +327,6 @@ struct exynos_drm_crtc *exynos_drm_crtc_create(struct
drm_device *drm_dev,
err_crtc:
plane-funcs-destroy(plane);
-err_plane:
kfree(exynos_crtc);
return ERR_PTR(ret);
}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.h
b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
index 628b787..0ecd8fc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
@@ -18,6 +18,7 @@
#include exynos_drm_drv.h
struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev,
+ struct drm_plane *plane,
int pipe,
enum exynos_drm_output_type type,
struct exynos_drm_crtc_ops *ops,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 731cdbc..1fa2a7f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -55,7 +55,6 @@ static int exynos_drm_load(struct drm_device *dev, unsigned
long flags)
{
struct exynos_drm_private *private;
int ret;
- int nr;
private = kzalloc(sizeof(struct exynos_drm_private), GFP_KERNEL);
if (!private)
@@ -80,19 +79,6 @@ static int exynos_drm_load(struct drm_device *dev, unsigned
long flags)
exynos_drm_mode_config_init(dev);
- for (nr = 0; nr MAX_PLANE; nr++) {
- struct drm_plane *plane;
- unsigned long possible_crtcs = (1 MAX_CRTC) - 1;
-
- plane = exynos_plane_init(dev, possible_crtcs,
- DRM_PLANE_TYPE_OVERLAY);
- if (!IS_ERR(plane))
- continue;
-
- ret = PTR_ERR(plane);
- goto err_mode_config_cleanup;
- }
-
/* setup possible_clones. */
exynos_drm_encoder_setup(dev);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 7411af2..cad54e7 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -78,6 +78,7 @@ enum exynos_drm_output_type {
* @transparency: transparency on or off.
* @activated: activated or not.
* @enabled: enabled or not.
+ * @resume: to resume or not.
*
* this structure is common to exynos SoC and its contents would be copied
* to hardware specific overlay info.
@@ -112,6 +113,7 @@ struct exynos_drm_plane {
bool transparency:1;
bool activated:1;
[PATCH 2/6] drm/exynos: track vblank events on a per crtc basis
From: Mandeep Singh Baines m...@chromium.org
The goal of the change is to make sure we send the vblank event on the
current vblank. My hope is to fix any races that might be causing flicker.
After this change I only see a flicker in the transition plymouth and
X11.
Simplified the code by tracking vblank events on a per-crtc basis. This
allowed me to remove all error paths from the callback. It also allowed
me to remove the vblank wait from the callback.
Signed-off-by: Mandeep Singh Baines m...@chromium.org
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 39
drivers/gpu/drm/exynos/exynos_drm_drv.c | 19
drivers/gpu/drm/exynos/exynos_drm_drv.h | 6 ++---
3 files changed, 12 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index a85c451..b1f1b25 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -34,9 +34,8 @@ static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int
mode)
if (mode DRM_MODE_DPMS_ON) {
/* wait for the completion of page flip. */
if (!wait_event_timeout(exynos_crtc-pending_flip_queue,
- !atomic_read(exynos_crtc-pending_flip),
- HZ/20))
- atomic_set(exynos_crtc-pending_flip, 0);
+ (exynos_crtc-event == NULL), HZ/20))
+ exynos_crtc-event = NULL;
drm_crtc_vblank_off(crtc);
}
@@ -166,7 +165,6 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
uint32_t page_flip_flags)
{
struct drm_device *dev = crtc-dev;
- struct exynos_drm_private *dev_priv = dev-dev_private;
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
struct drm_framebuffer *old_fb = crtc-primary-fb;
unsigned int crtc_w, crtc_h;
@@ -194,12 +192,6 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
goto out;
}
- spin_lock_irq(dev-event_lock);
- list_add_tail(event-base.link,
- dev_priv-pageflip_event_list);
- atomic_set(exynos_crtc-pending_flip, 1);
- spin_unlock_irq(dev-event_lock);
-
crtc-primary-fb = fb;
crtc_w = fb-width - crtc-x;
crtc_h = fb-height - crtc-y;
@@ -209,14 +201,12 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc
*crtc,
if (ret) {
crtc-primary-fb = old_fb;
- spin_lock_irq(dev-event_lock);
drm_vblank_put(dev, exynos_crtc-pipe);
- list_del(event-base.link);
- atomic_set(exynos_crtc-pending_flip, 0);
- spin_unlock_irq(dev-event_lock);
goto out;
}
+
+ exynos_crtc-event = event;
}
out:
mutex_unlock(dev-struct_mutex);
@@ -315,7 +305,6 @@ struct exynos_drm_crtc *exynos_drm_crtc_create(struct
drm_device *drm_dev,
return ERR_PTR(-ENOMEM);
init_waitqueue_head(exynos_crtc-pending_flip_queue);
- atomic_set(exynos_crtc-pending_flip, 0);
exynos_crtc-dpms = DRM_MODE_DPMS_OFF;
exynos_crtc-pipe = pipe;
@@ -382,27 +371,19 @@ void exynos_drm_crtc_disable_vblank(struct drm_device
*dev, int pipe)
void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int pipe)
{
struct exynos_drm_private *dev_priv = dev-dev_private;
- struct drm_pending_vblank_event *e, *t;
struct drm_crtc *drm_crtc = dev_priv-crtc[pipe];
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(drm_crtc);
- unsigned long flags;
- spin_lock_irqsave(dev-event_lock, flags);
+ if (exynos_crtc-event) {
- list_for_each_entry_safe(e, t, dev_priv-pageflip_event_list,
- base.link) {
- /* if event's pipe isn't same as crtc then ignore it. */
- if (pipe != e-pipe)
- continue;
-
- list_del(e-base.link);
- drm_send_vblank_event(dev, -1, e);
+ spin_lock_irq(dev-event_lock);
+ drm_send_vblank_event(dev, -1, exynos_crtc-event);
drm_vblank_put(dev, pipe);
- atomic_set(exynos_crtc-pending_flip, 0);
wake_up(exynos_crtc-pending_flip_queue);
- }
+ spin_unlock_irq(dev-event_lock);
- spin_unlock_irqrestore(dev-event_lock, flags);
+ exynos_crtc-event = NULL;
+ }
}
void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c
[PATCH 4/6] drm/exynos: remove leftover functions declarations
From: Gustavo Padovan gustavo.pado...@collabora.co.uk These functions were already removed by previous cleanup work, but these ones were left behind. Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk --- drivers/gpu/drm/exynos/exynos_drm_crtc.h | 6 -- 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.h b/drivers/gpu/drm/exynos/exynos_drm_crtc.h index 6258b80..628b787 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.h +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.h @@ -27,12 +27,6 @@ void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int pipe); void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int pipe); void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb); -void exynos_drm_crtc_plane_mode_set(struct drm_crtc *crtc, - struct exynos_drm_plane *plane); -void exynos_drm_crtc_plane_commit(struct drm_crtc *crtc, int zpos); -void exynos_drm_crtc_plane_enable(struct drm_crtc *crtc, int zpos); -void exynos_drm_crtc_plane_disable(struct drm_crtc *crtc, int zpos); - /* This function gets pipe value to crtc device matched with out_type. */ int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev, unsigned int out_type); -- 1.9.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: Add sd0_rst pinctrl node to exynos5420
Hello Sjoerd, On Fri, Jan 23, 2015 at 4:47 PM, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: If this pin is used by the Odroid XU3 board, shouldn't be defined in the exynos5422-odroidxu3.dts instead? It's not just used by the XU3 though, it's also hooked up on the peach pi chromebook for example and i would expect it to be hooked up on most board with an eMMC This change is consistent with most of the special purpose GPIO pins defined in that file, so i don't see the problem with including it in that pinctrl file In that case I completely agree that it should be defined in the .dtsi but that is not what the commit message said though :-) Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
