RE: [PATCH] ARM: dts: Use define for s3c-rtc clock id
Javier Martinez Canillas wrote:
>
> On Tue, Mar 31, 2015 at 6:05 AM, Chanwoo Choi wrote:
> > Hi,
> >
> > On 03/31/2015 12:21 AM, Krzysztof Kozlowski wrote:
> >> Use a define instead of raw number as a ID for "rtc_src" clock.
> >>
> >> Signed-off-by: Krzysztof Kozlowski
> >>
> >> ---
> >>
> >> Patch depends on new file "dt-bindings/clock/samsung,s2mps11.h" from:
> >> http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg43136.html
> >> ---
> >> arch/arm/boot/dts/exynos3250-rinato.dts | 3 ++-
> >> 1 file changed, 2 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
> >> b/arch/arm/boot/dts/exynos3250-rinato.dts
> >> index 3905824cac58..d2cbc95364de 100644
> >> --- a/arch/arm/boot/dts/exynos3250-rinato.dts
> >> +++ b/arch/arm/boot/dts/exynos3250-rinato.dts
> >> @@ -16,6 +16,7 @@
> >> #include "exynos3250.dtsi"
> >> #include
> >> #include
> >> +#include
> >>
> >> / {
> >> model = "Samsung Rinato board";
> >> @@ -605,7 +606,7 @@
> >> };
> >>
> >> &rtc {
> >> - clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
> >> + clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
> >> clock-names = "rtc", "rtc_src";
> >> status = "okay";
> >> };
> >>
> >
> > Looks good to me.
> >
> > Reviewed-by: Chanwoo Choi
> >
>
> Reviewed-by: Javier Martinez Canillas
>
Thanks for you guys' review. Applied.
- Kukjin
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RE: [PATCH 2/2] ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc
Javier Martinez Canillas wrote:
>
> On Tue, Mar 31, 2015 at 1:38 AM, Chanwoo Choi wrote:
> > On 03/31/2015 12:19 AM, Krzysztof Kozlowski wrote:
> >> Mark "samsung,exynos3250-rtc" compatible as deprecated because it
> >> duplicates the "samsung,s3c6410-rtc". Use "samsung,s3c6410-rtc" on
> >> Exynos3250 and Exynos4415 boards.
> >>
> >> Signed-off-by: Krzysztof Kozlowski
> >> ---
> >> Documentation/devicetree/bindings/rtc/s3c-rtc.txt | 3 ++-
> >> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
> >> arch/arm/boot/dts/exynos4415.dtsi | 2 +-
> >> 3 files changed, 4 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> >> index ab757b84daa7..ac2fcd6ff4b8 100644
> >> --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> >> +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> >> @@ -6,7 +6,8 @@ Required properties:
> >> * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
> >> * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
> >> * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
> >> -* "samsung,exynos3250-rtc" - for controllers compatible with
> >> exynos3250 rtc.
> >> +* "samsung,exynos3250-rtc" - (deprecated) for controllers compatible
> >> with
> >> + exynos3250 rtc (use
> >> "samsung,s3c6410-rtc").
> >> - reg: physical base address of the controller and length of memory mapped
> >>region.
> >> - interrupts: Two interrupt numbers to the cpu should be specified. First
> >> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
> >> b/arch/arm/boot/dts/exynos3250.dtsi
> >> index e3bfb11c6ef8..8d58b550e925 100644
> >> --- a/arch/arm/boot/dts/exynos3250.dtsi
> >> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> >> @@ -189,7 +189,7 @@
> >> };
> >>
> >> rtc: rtc@1007 {
> >> - compatible = "samsung,exynos3250-rtc";
> >> + compatible = "samsung,s3c6410-rtc";
> >> reg = <0x1007 0x100>;
> >> interrupts = <0 73 0>, <0 74 0>;
> >> interrupt-parent = <&pmu_system_controller>;
> >> diff --git a/arch/arm/boot/dts/exynos4415.dtsi
> >> b/arch/arm/boot/dts/exynos4415.dtsi
> >> index 5caea996e090..186cb8465683 100644
> >> --- a/arch/arm/boot/dts/exynos4415.dtsi
> >> +++ b/arch/arm/boot/dts/exynos4415.dtsi
> >> @@ -177,7 +177,7 @@
> >> };
> >>
> >> rtc: rtc@1007 {
> >> - compatible = "samsung,exynos3250-rtc";
> >> + compatible = "samsung,s3c6410-rtc";
> >> reg = <0x1007 0x100>;
> >> interrupts = <0 73 0>, <0 74 0>;
> >> status = "disabled";
> >>
> >
> > Looks good to me.
> >
> > Reviewed-by: Chanwoo Choi
> >
> > Thanks,
> > Chanwoo Choi
> > --
>
> Looks good to me also.
>
> Reviewed-by: Javier Martinez Canillas
>
Thanks, applied.
- Kukjin
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Re: [PATCH 1/2] drivers/rtc/rtc-s3c.c: Integrate Exynos3250 into S3C6410
Hello Alexandre, On Tue, Mar 31, 2015 at 2:27 AM, Alexandre Belloni wrote: > nitpick: I would prefer rtc: rtc-s3c instead of drivers/rtc/rtc-s3c.c > Yes but Krzysztof is following the convention used in drivers/rtc/ which I think is the correct thing to do even when it's different from what is used all over the kernel. > On 30/03/2015 at 17:19:32 +0200, Krzysztof Kozlowski wrote : >> There are now no differences between RTC on Exynos3250 and S3C6410. >> Merge everything into one so duplicated code could be removed. >> >> Signed-off-by: Krzysztof Kozlowski > > Acked-by: Alexandre Belloni > Reviewed-by: Javier Martinez Canillas Best regards, Javier -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc
On Tue, Mar 31, 2015 at 1:38 AM, Chanwoo Choi wrote:
> On 03/31/2015 12:19 AM, Krzysztof Kozlowski wrote:
>> Mark "samsung,exynos3250-rtc" compatible as deprecated because it
>> duplicates the "samsung,s3c6410-rtc". Use "samsung,s3c6410-rtc" on
>> Exynos3250 and Exynos4415 boards.
>>
>> Signed-off-by: Krzysztof Kozlowski
>> ---
>> Documentation/devicetree/bindings/rtc/s3c-rtc.txt | 3 ++-
>> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
>> arch/arm/boot/dts/exynos4415.dtsi | 2 +-
>> 3 files changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
>> b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
>> index ab757b84daa7..ac2fcd6ff4b8 100644
>> --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
>> +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
>> @@ -6,7 +6,8 @@ Required properties:
>> * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
>> * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
>> * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
>> -* "samsung,exynos3250-rtc" - for controllers compatible with exynos3250
>> rtc.
>> +* "samsung,exynos3250-rtc" - (deprecated) for controllers compatible
>> with
>> + exynos3250 rtc (use "samsung,s3c6410-rtc").
>> - reg: physical base address of the controller and length of memory mapped
>>region.
>> - interrupts: Two interrupt numbers to the cpu should be specified. First
>> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
>> b/arch/arm/boot/dts/exynos3250.dtsi
>> index e3bfb11c6ef8..8d58b550e925 100644
>> --- a/arch/arm/boot/dts/exynos3250.dtsi
>> +++ b/arch/arm/boot/dts/exynos3250.dtsi
>> @@ -189,7 +189,7 @@
>> };
>>
>> rtc: rtc@1007 {
>> - compatible = "samsung,exynos3250-rtc";
>> + compatible = "samsung,s3c6410-rtc";
>> reg = <0x1007 0x100>;
>> interrupts = <0 73 0>, <0 74 0>;
>> interrupt-parent = <&pmu_system_controller>;
>> diff --git a/arch/arm/boot/dts/exynos4415.dtsi
>> b/arch/arm/boot/dts/exynos4415.dtsi
>> index 5caea996e090..186cb8465683 100644
>> --- a/arch/arm/boot/dts/exynos4415.dtsi
>> +++ b/arch/arm/boot/dts/exynos4415.dtsi
>> @@ -177,7 +177,7 @@
>> };
>>
>> rtc: rtc@1007 {
>> - compatible = "samsung,exynos3250-rtc";
>> + compatible = "samsung,s3c6410-rtc";
>> reg = <0x1007 0x100>;
>> interrupts = <0 73 0>, <0 74 0>;
>> status = "disabled";
>>
>
> Looks good to me.
>
> Reviewed-by: Chanwoo Choi
>
> Thanks,
> Chanwoo Choi
> --
Looks good to me also.
Reviewed-by: Javier Martinez Canillas
Best regards,
Javier
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Re: [PATCH V3 2/2] ARM: dts: exynos5422-odroidxu3: add 'rtc_src' clock to rtc node
On Tue, Mar 31, 2015 at 6:05 AM, Chanwoo Choi wrote:
> Hi,
>
> On 03/31/2015 12:38 AM, Markus Reichl wrote:
>> The Exynos5422 SoC has a s3c6410 RTC where the source clock
>> is now a mandatory property.
>>
>> This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards.
>> It is based in v4.0-rc2.
>>
>> Signed-off-by: Markus Reichl
>> ---
>> Changes since v2:
>> 1. Dropped unused phandle.
>> Changes since v1:
>> 1. Dropped Documentation.
>> 2. Split into 2 parts.
>> ---
>> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 10 ++
>> 1 file changed, 6 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> index 0408ec0..4a7ca15 100644
>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
>> @@ -274,10 +274,6 @@
>> reg = <0x50>;
>> };
>> };
>> -
>> - rtc@101E {
>> - status = "okay";
>> - };
>> };
>>
>> &hdmi {
>> @@ -374,3 +370,9 @@
>> shunt-resistor = <1>;
>> };
>> };
>> +
>> +&rtc {
>> + status = "okay";
>> + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
>> + clock-names = "rtc", "rtc_src";
>> +};
>>
>
> Exynos's RTC must need the XrtcXTI source clock (32.768kHz). Looks good to me.
>
> Reviewed-by: Chanwoo Choi
>
> Thanks,
> Chanwoo Choi
>
Reviewed-by: Javier Martinez Canillas
Best regards,
Javier
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Re: [PATCH] ARM: dts: Use define for s3c-rtc clock id
On Tue, Mar 31, 2015 at 6:05 AM, Chanwoo Choi wrote:
> Hi,
>
> On 03/31/2015 12:21 AM, Krzysztof Kozlowski wrote:
>> Use a define instead of raw number as a ID for "rtc_src" clock.
>>
>> Signed-off-by: Krzysztof Kozlowski
>>
>> ---
>>
>> Patch depends on new file "dt-bindings/clock/samsung,s2mps11.h" from:
>> http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg43136.html
>> ---
>> arch/arm/boot/dts/exynos3250-rinato.dts | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
>> b/arch/arm/boot/dts/exynos3250-rinato.dts
>> index 3905824cac58..d2cbc95364de 100644
>> --- a/arch/arm/boot/dts/exynos3250-rinato.dts
>> +++ b/arch/arm/boot/dts/exynos3250-rinato.dts
>> @@ -16,6 +16,7 @@
>> #include "exynos3250.dtsi"
>> #include
>> #include
>> +#include
>>
>> / {
>> model = "Samsung Rinato board";
>> @@ -605,7 +606,7 @@
>> };
>>
>> &rtc {
>> - clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
>> + clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
>> clock-names = "rtc", "rtc_src";
>> status = "okay";
>> };
>>
>
> Looks good to me.
>
> Reviewed-by: Chanwoo Choi
>
Reviewed-by: Javier Martinez Canillas
Best regards,
Javier
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Re: [PATCH RESEND] phy: exynos5-usbdrd: Add to support for Exynos5433 SoC
On Tuesday 31 March 2015 10:36 AM, Jaewon Kim wrote:
Hi Kishon.
Could you check my patch??
sure.. patch looks fine. will queue it.
-Kishon
On 26/03/2015 14:16, Vivek Gautam wrote:
On Thu, Mar 26, 2015 at 7:48 AM, Jaewon Kim wrote:
This patch adds driver data to support for Exynos5433 SoC.
The Exynos5433 has one USB3.0 Host and USB3.0 DRD(Dual Role Device).
Exynos5433 is simplar to Eyxnos7 but Exynos5433 have
one more USB3.0 Host controller.
Signed-off-by: Jaewon Kim
Tested-by: Chanwoo Choi
---
Patch looks good to me.
Reviewed-by: Vivek Gautam
.../devicetree/bindings/phy/samsung-phy.txt|3 ++-
drivers/phy/phy-exynos5-usbdrd.c | 10 ++
include/linux/mfd/syscon/exynos5-pmu.h |3 +++
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index 91e38cf..60c6f2a 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -128,6 +128,7 @@ Required properties:
- compatible : Should be set to one of the following supported values:
- "samsung,exynos5250-usbdrd-phy" - for exynos5250 SoC,
- "samsung,exynos5420-usbdrd-phy" - for exynos5420 SoC.
+ - "samsung,exynos5433-usbdrd-phy" - for exynos5433 SoC.
- "samsung,exynos7-usbdrd-phy" - for exynos7 SoC.
- reg : Register offset and length of USB DRD PHY register set;
- clocks: Clock IDs array as required by the controller
@@ -139,7 +140,7 @@ Required properties:
PHY operations, associated by phy name. It is used to
determine bit values for clock settings register.
For Exynos5420 this is given as 'sclk_usbphy30' in CMU.
- - optional clocks: Exynos7 SoC has now following additional
+ - optional clocks: Exynos5433 & Exynos7 SoC has now following
additional
gate clocks available:
- phy_pipe: for PIPE3 phy
- phy_utmi: for UTMI+ phy
diff --git a/drivers/phy/phy-exynos5-usbdrd.c
b/drivers/phy/phy-exynos5-usbdrd.c
index e2a0be7..d72ef15 100644
--- a/drivers/phy/phy-exynos5-usbdrd.c
+++ b/drivers/phy/phy-exynos5-usbdrd.c
@@ -624,6 +624,13 @@ static const struct exynos5_usbdrd_phy_drvdata
exynos5250_usbdrd_phy = {
.has_common_clk_gate= true,
};
+static const struct exynos5_usbdrd_phy_drvdata exynos5433_usbdrd_phy = {
+ .phy_cfg= phy_cfg_exynos5,
+ .pmu_offset_usbdrd0_phy = EXYNOS5_USBDRD_PHY_CONTROL,
+ .pmu_offset_usbdrd1_phy = EXYNOS5433_USBHOST30_PHY_CONTROL,
+ .has_common_clk_gate= false,
+};
+
static const struct exynos5_usbdrd_phy_drvdata exynos7_usbdrd_phy = {
.phy_cfg= phy_cfg_exynos5,
.pmu_offset_usbdrd0_phy = EXYNOS5_USBDRD_PHY_CONTROL,
@@ -638,6 +645,9 @@ static const struct of_device_id
exynos5_usbdrd_phy_of_match[] = {
.compatible = "samsung,exynos5420-usbdrd-phy",
.data = &exynos5420_usbdrd_phy
}, {
+ .compatible = "samsung,exynos5433-usbdrd-phy",
+ .data = &exynos5433_usbdrd_phy
+ }, {
.compatible = "samsung,exynos7-usbdrd-phy",
.data = &exynos7_usbdrd_phy
},
diff --git a/include/linux/mfd/syscon/exynos5-pmu.h
b/include/linux/mfd/syscon/exynos5-pmu.h
index 00ef24b..9352adc 100644
--- a/include/linux/mfd/syscon/exynos5-pmu.h
+++ b/include/linux/mfd/syscon/exynos5-pmu.h
@@ -36,6 +36,9 @@
#define EXYNOS5420_MTCADC_PHY_CONTROL (0x724)
#define EXYNOS5420_DPTX_PHY_CONTROL(0x728)
+/* Exynos5433 specific register definitions */
+#define EXYNOS5433_USBHOST30_PHY_CONTROL (0x728)
+
#define EXYNOS5_PHY_ENABLE BIT(0)
#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1)
--
1.7.9.5
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Thanks,
Jaewon Kim.
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Re: [PATCH RESEND] phy: exynos5-usbdrd: Add to support for Exynos5433 SoC
Hi Kishon.
Could you check my patch??
On 26/03/2015 14:16, Vivek Gautam wrote:
On Thu, Mar 26, 2015 at 7:48 AM, Jaewon Kim wrote:
This patch adds driver data to support for Exynos5433 SoC.
The Exynos5433 has one USB3.0 Host and USB3.0 DRD(Dual Role Device).
Exynos5433 is simplar to Eyxnos7 but Exynos5433 have
one more USB3.0 Host controller.
Signed-off-by: Jaewon Kim
Tested-by: Chanwoo Choi
---
Patch looks good to me.
Reviewed-by: Vivek Gautam
.../devicetree/bindings/phy/samsung-phy.txt|3 ++-
drivers/phy/phy-exynos5-usbdrd.c | 10 ++
include/linux/mfd/syscon/exynos5-pmu.h |3 +++
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index 91e38cf..60c6f2a 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -128,6 +128,7 @@ Required properties:
- compatible : Should be set to one of the following supported values:
- "samsung,exynos5250-usbdrd-phy" - for exynos5250 SoC,
- "samsung,exynos5420-usbdrd-phy" - for exynos5420 SoC.
+ - "samsung,exynos5433-usbdrd-phy" - for exynos5433 SoC.
- "samsung,exynos7-usbdrd-phy" - for exynos7 SoC.
- reg : Register offset and length of USB DRD PHY register set;
- clocks: Clock IDs array as required by the controller
@@ -139,7 +140,7 @@ Required properties:
PHY operations, associated by phy name. It is used to
determine bit values for clock settings register.
For Exynos5420 this is given as 'sclk_usbphy30' in CMU.
- - optional clocks: Exynos7 SoC has now following additional
+ - optional clocks: Exynos5433 & Exynos7 SoC has now following additional
gate clocks available:
- phy_pipe: for PIPE3 phy
- phy_utmi: for UTMI+ phy
diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c
index e2a0be7..d72ef15 100644
--- a/drivers/phy/phy-exynos5-usbdrd.c
+++ b/drivers/phy/phy-exynos5-usbdrd.c
@@ -624,6 +624,13 @@ static const struct exynos5_usbdrd_phy_drvdata
exynos5250_usbdrd_phy = {
.has_common_clk_gate= true,
};
+static const struct exynos5_usbdrd_phy_drvdata exynos5433_usbdrd_phy = {
+ .phy_cfg= phy_cfg_exynos5,
+ .pmu_offset_usbdrd0_phy = EXYNOS5_USBDRD_PHY_CONTROL,
+ .pmu_offset_usbdrd1_phy = EXYNOS5433_USBHOST30_PHY_CONTROL,
+ .has_common_clk_gate= false,
+};
+
static const struct exynos5_usbdrd_phy_drvdata exynos7_usbdrd_phy = {
.phy_cfg= phy_cfg_exynos5,
.pmu_offset_usbdrd0_phy = EXYNOS5_USBDRD_PHY_CONTROL,
@@ -638,6 +645,9 @@ static const struct of_device_id
exynos5_usbdrd_phy_of_match[] = {
.compatible = "samsung,exynos5420-usbdrd-phy",
.data = &exynos5420_usbdrd_phy
}, {
+ .compatible = "samsung,exynos5433-usbdrd-phy",
+ .data = &exynos5433_usbdrd_phy
+ }, {
.compatible = "samsung,exynos7-usbdrd-phy",
.data = &exynos7_usbdrd_phy
},
diff --git a/include/linux/mfd/syscon/exynos5-pmu.h
b/include/linux/mfd/syscon/exynos5-pmu.h
index 00ef24b..9352adc 100644
--- a/include/linux/mfd/syscon/exynos5-pmu.h
+++ b/include/linux/mfd/syscon/exynos5-pmu.h
@@ -36,6 +36,9 @@
#define EXYNOS5420_MTCADC_PHY_CONTROL (0x724)
#define EXYNOS5420_DPTX_PHY_CONTROL(0x728)
+/* Exynos5433 specific register definitions */
+#define EXYNOS5433_USBHOST30_PHY_CONTROL (0x728)
+
#define EXYNOS5_PHY_ENABLE BIT(0)
#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1)
--
1.7.9.5
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Thanks,
Jaewon Kim.
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Re: [PATCH] ARM: dts: Use define for s3c-rtc clock id
Hi,
On 03/31/2015 12:21 AM, Krzysztof Kozlowski wrote:
> Use a define instead of raw number as a ID for "rtc_src" clock.
>
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> Patch depends on new file "dt-bindings/clock/samsung,s2mps11.h" from:
> http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg43136.html
> ---
> arch/arm/boot/dts/exynos3250-rinato.dts | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
> b/arch/arm/boot/dts/exynos3250-rinato.dts
> index 3905824cac58..d2cbc95364de 100644
> --- a/arch/arm/boot/dts/exynos3250-rinato.dts
> +++ b/arch/arm/boot/dts/exynos3250-rinato.dts
> @@ -16,6 +16,7 @@
> #include "exynos3250.dtsi"
> #include
> #include
> +#include
>
> / {
> model = "Samsung Rinato board";
> @@ -605,7 +606,7 @@
> };
>
> &rtc {
> - clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
> + clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
> clock-names = "rtc", "rtc_src";
> status = "okay";
> };
>
Looks good to me.
Reviewed-by: Chanwoo Choi
Thanks,
Chanwoo Choi
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Re: [PATCH V3 2/2] ARM: dts: exynos5422-odroidxu3: add 'rtc_src' clock to rtc node
Hi,
On 03/31/2015 12:38 AM, Markus Reichl wrote:
> The Exynos5422 SoC has a s3c6410 RTC where the source clock
> is now a mandatory property.
>
> This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards.
> It is based in v4.0-rc2.
>
> Signed-off-by: Markus Reichl
> ---
> Changes since v2:
> 1. Dropped unused phandle.
> Changes since v1:
> 1. Dropped Documentation.
> 2. Split into 2 parts.
> ---
> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> index 0408ec0..4a7ca15 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> @@ -274,10 +274,6 @@
> reg = <0x50>;
> };
> };
> -
> - rtc@101E {
> - status = "okay";
> - };
> };
>
> &hdmi {
> @@ -374,3 +370,9 @@
> shunt-resistor = <1>;
> };
> };
> +
> +&rtc {
> + status = "okay";
> + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
> + clock-names = "rtc", "rtc_src";
> +};
>
Exynos's RTC must need the XrtcXTI source clock (32.768kHz). Looks good to me.
Reviewed-by: Chanwoo Choi
Thanks,
Chanwoo Choi
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Re: [RFC PATCH v3 1/2] clk: samsung: Add a clock lookup function
Quoting Javier Martinez Canillas (2015-03-30 09:08:40) > Hello Tomasz, > > On 03/30/2015 06:02 PM, Tomasz Figa wrote: > > Hi Javier, > > > > 2015-03-31 0:53 GMT+09:00 Javier Martinez Canillas > > : > >> The Samsung helpers functions to register clocks, add the clock instance > >> returned by the common clock framework to a lookup table that is used by > >> OF to lookup the clocks. > >> > >> But this table could also be useful to clock drivers if they need to get > >> a clock instance since the helper functions don't return them. > >> > >> The common clock framework __clk_lookup() function from the clk provider > >> API could be used by drivers as well. But it's more efficient to use the > >> Samsung specific lookup table that returns the clock instance in constant > >> time, than using the __clk_lookup() function that uses the clock name as > >> an index so it has a linear search time. > > > > Is this really something we should be concerned about? If so, maybe > > the generic look-up function should be rewritten to use something > > faster, such as tree or hash table? > > > > I don't performance is a big issue here. I just thought that since the > lookup table is already filled by the driver and the lookup function > is one line, we could use that instead to get the performance benefit. > > But I don't mind to drop this patch and use the generic lookup function > from the CCF API if that is preferred. Hello, I am not a fan of __clk_lookup and I don't like to see it used more and more outside of drivers/clk/clk.c. You mentioned that performance wasn't really the problem here. The real method for a driver to get a clock is with clk_get(). Any reason to not use that? Regards, Mike > > > Best regards, > > Tomasz > > > > Best regards, > Javier -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc
Hi,
On 03/31/2015 09:31 AM, Alexandre Belloni wrote:
> Hi,
>
> On 31/03/2015 at 08:38:30 +0900, Chanwoo Choi wrote :
>>> diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
>>> b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
>>> index ab757b84daa7..ac2fcd6ff4b8 100644
>>> --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
>>> +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
>>> @@ -6,7 +6,8 @@ Required properties:
>>> * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
>>> * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
>>> * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
>>> -* "samsung,exynos3250-rtc" - for controllers compatible with
>>> exynos3250 rtc.
>>> +* "samsung,exynos3250-rtc" - (deprecated) for controllers compatible
>>> with
>>> + exynos3250 rtc (use
>>> "samsung,s3c6410-rtc").
>>> - reg: physical base address of the controller and length of memory mapped
>>>region.
>>> - interrupts: Two interrupt numbers to the cpu should be specified. First
>>> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
>>> b/arch/arm/boot/dts/exynos3250.dtsi
>>> index e3bfb11c6ef8..8d58b550e925 100644
>>> --- a/arch/arm/boot/dts/exynos3250.dtsi
>>> +++ b/arch/arm/boot/dts/exynos3250.dtsi
>>> @@ -189,7 +189,7 @@
>>> };
>>>
>>> rtc: rtc@1007 {
>>> - compatible = "samsung,exynos3250-rtc";
>>> + compatible = "samsung,s3c6410-rtc";
>>> reg = <0x1007 0x100>;
>>> interrupts = <0 73 0>, <0 74 0>;
>>> interrupt-parent = <&pmu_system_controller>;
>>> diff --git a/arch/arm/boot/dts/exynos4415.dtsi
>>> b/arch/arm/boot/dts/exynos4415.dtsi
>>> index 5caea996e090..186cb8465683 100644
>>> --- a/arch/arm/boot/dts/exynos4415.dtsi
>>> +++ b/arch/arm/boot/dts/exynos4415.dtsi
>>> @@ -177,7 +177,7 @@
>>> };
>>>
>>> rtc: rtc@1007 {
>>> - compatible = "samsung,exynos3250-rtc";
>>> + compatible = "samsung,s3c6410-rtc";
>>> reg = <0x1007 0x100>;
>>> interrupts = <0 73 0>, <0 74 0>;
>>> status = "disabled";
>>>
>>
>> Looks good to me.
>>
>> Reviewed-by: Chanwoo Choi
>>
>
> Are you absolutely sure that the exynos3250 IP is the same as the
> s3c6410 (I don't know much about the exynos family). The concern being
> that if at one point you have an errata on one or ther other, you will
> have to break the DT ABI by undoing this change.
>
> Note that I'm fine with it, I'm just asking.
I'm sure about exynos3250 RTC is same with S3C6410 RTC.
There was little different about that pevious S3C6410 RTC
don't consider to control the 'rtc_src' clk.
But, Javier's patch[1] add the '.needs_src_clk' to control the
'rtc_src' clk. After merged this patch, there is no different part between
Exynos3250 RTC and S3C6410 RTC.
[1] 8792f7772f4f (drivers/rtc/rtc-s3c.c: add .needs_src_clk to s3c6410 RTC data)
Thanks,
Chanwoo Choi
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Re: [PATCH 2/2] ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc
Hi,
On 31/03/2015 at 08:38:30 +0900, Chanwoo Choi wrote :
> > diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> > b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> > index ab757b84daa7..ac2fcd6ff4b8 100644
> > --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> > +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> > @@ -6,7 +6,8 @@ Required properties:
> > * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
> > * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
> > * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
> > -* "samsung,exynos3250-rtc" - for controllers compatible with
> > exynos3250 rtc.
> > +* "samsung,exynos3250-rtc" - (deprecated) for controllers compatible
> > with
> > + exynos3250 rtc (use
> > "samsung,s3c6410-rtc").
> > - reg: physical base address of the controller and length of memory mapped
> >region.
> > - interrupts: Two interrupt numbers to the cpu should be specified. First
> > diff --git a/arch/arm/boot/dts/exynos3250.dtsi
> > b/arch/arm/boot/dts/exynos3250.dtsi
> > index e3bfb11c6ef8..8d58b550e925 100644
> > --- a/arch/arm/boot/dts/exynos3250.dtsi
> > +++ b/arch/arm/boot/dts/exynos3250.dtsi
> > @@ -189,7 +189,7 @@
> > };
> >
> > rtc: rtc@1007 {
> > - compatible = "samsung,exynos3250-rtc";
> > + compatible = "samsung,s3c6410-rtc";
> > reg = <0x1007 0x100>;
> > interrupts = <0 73 0>, <0 74 0>;
> > interrupt-parent = <&pmu_system_controller>;
> > diff --git a/arch/arm/boot/dts/exynos4415.dtsi
> > b/arch/arm/boot/dts/exynos4415.dtsi
> > index 5caea996e090..186cb8465683 100644
> > --- a/arch/arm/boot/dts/exynos4415.dtsi
> > +++ b/arch/arm/boot/dts/exynos4415.dtsi
> > @@ -177,7 +177,7 @@
> > };
> >
> > rtc: rtc@1007 {
> > - compatible = "samsung,exynos3250-rtc";
> > + compatible = "samsung,s3c6410-rtc";
> > reg = <0x1007 0x100>;
> > interrupts = <0 73 0>, <0 74 0>;
> > status = "disabled";
> >
>
> Looks good to me.
>
> Reviewed-by: Chanwoo Choi
>
Are you absolutely sure that the exynos3250 IP is the same as the
s3c6410 (I don't know much about the exynos family). The concern being
that if at one point you have an errata on one or ther other, you will
have to break the DT ABI by undoing this change.
Note that I'm fine with it, I'm just asking.
Regards,
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Re: [PATCH 1/2] drivers/rtc/rtc-s3c.c: Integrate Exynos3250 into S3C6410
nitpick: I would prefer rtc: rtc-s3c instead of drivers/rtc/rtc-s3c.c
On 30/03/2015 at 17:19:32 +0200, Krzysztof Kozlowski wrote :
> There are now no differences between RTC on Exynos3250 and S3C6410.
> Merge everything into one so duplicated code could be removed.
>
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Alexandre Belloni
> ---
> drivers/rtc/rtc-s3c.c | 14 +-
> 1 file changed, 1 insertion(+), 13 deletions(-)
>
> diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
> index fb0c569765c6..5e162eaad277 100644
> --- a/drivers/rtc/rtc-s3c.c
> +++ b/drivers/rtc/rtc-s3c.c
> @@ -774,18 +774,6 @@ static struct s3c_rtc_data const s3c6410_rtc_data = {
> .disable= s3c6410_rtc_disable,
> };
>
> -static struct s3c_rtc_data const exynos3250_rtc_data = {
> - .max_user_freq = 32768,
> - .needs_src_clk = true,
> - .irq_handler= s3c6410_rtc_irq,
> - .set_freq = s3c6410_rtc_setfreq,
> - .enable_tick= s3c6410_rtc_enable_tick,
> - .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
> - .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
> - .enable = s3c24xx_rtc_enable,
> - .disable= s3c6410_rtc_disable,
> -};
> -
> static const struct of_device_id s3c_rtc_dt_match[] = {
> {
> .compatible = "samsung,s3c2410-rtc",
> @@ -801,7 +789,7 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
> .data = (void *)&s3c6410_rtc_data,
> }, {
> .compatible = "samsung,exynos3250-rtc",
> - .data = (void *)&exynos3250_rtc_data,
> + .data = (void *)&s3c6410_rtc_data,
> },
> { /* sentinel */ },
> };
> --
> 1.9.1
>
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Re: [PATCH v7 1/9] arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC
Hi Mark, On 03/31/2015 01:09 AM, Mark Rutland wrote: > Hi, > > On Wed, Mar 18, 2015 at 12:17:28AM +, Chanwoo Choi wrote: >> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on >> Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 >> supports >> PSCI (Power State Coordination Interface) v0.1. >> >> This patch includes following dt node to support Exynos5433 SoC: >> 1. Octa core for big.LITTLE architecture >> - Cortex-A53 LITTLE Quad-core >> - Cortex-A57 big Quad-core >> - Support PSCI v0.1 > > Is CPU0 hotplug still broken, or has the FW been fixed? CPU0 hotplug is still not working. > > I'm very worried about adding a DT that's known broken, especially when > we have no idea as to if/when the FW will be fixed judging from prior > replies. As I replied, I can not fix the FW because I don't have any code of FW. I don't have any solution to fix it on Linux kernel level. So, If you agree, I can add the comment of CPU0 hotplug issue on DT file. Thanks, Chanwoo Choi -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] drivers/rtc/rtc-s3c.c: Integrate Exynos3250 into S3C6410
On 03/31/2015 12:19 AM, Krzysztof Kozlowski wrote:
> There are now no differences between RTC on Exynos3250 and S3C6410.
> Merge everything into one so duplicated code could be removed.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> drivers/rtc/rtc-s3c.c | 14 +-
> 1 file changed, 1 insertion(+), 13 deletions(-)
>
> diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
> index fb0c569765c6..5e162eaad277 100644
> --- a/drivers/rtc/rtc-s3c.c
> +++ b/drivers/rtc/rtc-s3c.c
> @@ -774,18 +774,6 @@ static struct s3c_rtc_data const s3c6410_rtc_data = {
> .disable= s3c6410_rtc_disable,
> };
>
> -static struct s3c_rtc_data const exynos3250_rtc_data = {
> - .max_user_freq = 32768,
> - .needs_src_clk = true,
> - .irq_handler= s3c6410_rtc_irq,
> - .set_freq = s3c6410_rtc_setfreq,
> - .enable_tick= s3c6410_rtc_enable_tick,
> - .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
> - .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
> - .enable = s3c24xx_rtc_enable,
> - .disable= s3c6410_rtc_disable,
> -};
> -
> static const struct of_device_id s3c_rtc_dt_match[] = {
> {
> .compatible = "samsung,s3c2410-rtc",
> @@ -801,7 +789,7 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
> .data = (void *)&s3c6410_rtc_data,
> }, {
> .compatible = "samsung,exynos3250-rtc",
> - .data = (void *)&exynos3250_rtc_data,
> + .data = (void *)&s3c6410_rtc_data,
> },
> { /* sentinel */ },
> };
>
Looks good to me.
Reviewd-by: Chanwoo Choi
Thanks,
Chanwoo Choi
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Re: [PATCH 2/2] ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc
On 03/31/2015 12:19 AM, Krzysztof Kozlowski wrote:
> Mark "samsung,exynos3250-rtc" compatible as deprecated because it
> duplicates the "samsung,s3c6410-rtc". Use "samsung,s3c6410-rtc" on
> Exynos3250 and Exynos4415 boards.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> Documentation/devicetree/bindings/rtc/s3c-rtc.txt | 3 ++-
> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
> arch/arm/boot/dts/exynos4415.dtsi | 2 +-
> 3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> index ab757b84daa7..ac2fcd6ff4b8 100644
> --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
> @@ -6,7 +6,8 @@ Required properties:
> * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
> * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
> * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
> -* "samsung,exynos3250-rtc" - for controllers compatible with exynos3250
> rtc.
> +* "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with
> + exynos3250 rtc (use "samsung,s3c6410-rtc").
> - reg: physical base address of the controller and length of memory mapped
>region.
> - interrupts: Two interrupt numbers to the cpu should be specified. First
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
> b/arch/arm/boot/dts/exynos3250.dtsi
> index e3bfb11c6ef8..8d58b550e925 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -189,7 +189,7 @@
> };
>
> rtc: rtc@1007 {
> - compatible = "samsung,exynos3250-rtc";
> + compatible = "samsung,s3c6410-rtc";
> reg = <0x1007 0x100>;
> interrupts = <0 73 0>, <0 74 0>;
> interrupt-parent = <&pmu_system_controller>;
> diff --git a/arch/arm/boot/dts/exynos4415.dtsi
> b/arch/arm/boot/dts/exynos4415.dtsi
> index 5caea996e090..186cb8465683 100644
> --- a/arch/arm/boot/dts/exynos4415.dtsi
> +++ b/arch/arm/boot/dts/exynos4415.dtsi
> @@ -177,7 +177,7 @@
> };
>
> rtc: rtc@1007 {
> - compatible = "samsung,exynos3250-rtc";
> + compatible = "samsung,s3c6410-rtc";
> reg = <0x1007 0x100>;
> interrupts = <0 73 0>, <0 74 0>;
> status = "disabled";
>
Looks good to me.
Reviewed-by: Chanwoo Choi
Thanks,
Chanwoo Choi
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Re: [PATCH] ARM: fix exynos randconfig build error
On Tue, Mar 03, 2015 at 01:44:34PM +0100, Bartlomiej Zolnierkiewicz wrote: > > Hi, > > On Tuesday, March 03, 2015 04:40:02 AM Kukjin Kim wrote: > > On 02/27/15 06:30, Kukjin Kim wrote: > > > On 02/25/15 20:46, Krzysztof Kozlowski wrote: > > >> 2015-02-25 12:26 GMT+01:00 Russell King : > > >>> The following error was observed with SMP=n in v4.0-rc1: > > >>> > > >>> arch/arm/mach-exynos/pm.c: In function 'exynos_cpu0_enter_aftr': > > >>> arch/arm/mach-exynos/pm.c:246:4: error: implicit declaration of > > >>> function 'arch_send_wakeup_ipi_mask' > > >>> [-Werror=implicit-function-declaration] > > >>> > > >>> As the code unconditionally calls a function only available with SMP=y, > > >>> make the Exynos PM support depend on SMP. > > >>> > > >>> Signed-off-by: Russell King > > >> > > >> Hi, > > >> > > >> Thanks for the patch but this already waits for Kukjin top be picked > > >> up. The first patch was similar to yours (adds dependency on SMP), > > >> sent on 4th of February: > > >> https://patchwork.ozlabs.org/patch/436231/ > > >> > > >> But later Bartlomiej fixed this in other way (allowing to use cpuidle > > >> on non-SMP): > > >> https://patchwork.ozlabs.org/patch/436445/ > > >> > > >> Unfortunately none of them were picked up. > > >> > > > I've missed the fix, sorry. > > > > > > BTW, as you know, all of exynos SoCs are based on SMP so generally (in > > > normal case) there is no reason to use non-SMP on exynos > > > platforms...even though I understand the build error should be fixed... > > > > > > Anyway, I'll have a look Bart's patch and Russell's fix in this weekend. > > > > > > > Firstly, let me take rmk's patch for the randconfig build error...BTW > > What is wrong with picking my patch instead? It is non-invasive and fixes > cpuidle support on UP (which is a regression from previous kernels)? > > https://lkml.org/lkml/2015/2/4/521 > > > I'm still wondering exynos stuff needs to support non-SMP and need to > > think more about its usefulness?... > > Currently UP is supported and at least I find it useful for testing/debug > purposes. If you want to to make Exynos SMP only thats OK but it should > be done globally for Exynos arch support not just for cpuidle support. Has either of these happened yet? I don't see either in arm-soc. (lkml.org seems to be - as seems typical - having problems. The above URL now returns a blank message.) -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 10/10] drm/exynos: atomic dpms support
From: Gustavo Padovan
Run dpms operations through the atomic intefaces. This basically removes
the .dpms() callback from econders and crtcs and use .disable() and
.enable() to turn the crtc on and off.
Signed-off-by: Gustavo Padovan
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 2 +-
drivers/gpu/drm/exynos/exynos_drm_crtc.c| 99 -
drivers/gpu/drm/exynos/exynos_drm_dpi.c | 2 +-
drivers/gpu/drm/exynos/exynos_drm_drv.h | 4 +-
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 2 +-
drivers/gpu/drm/exynos/exynos_drm_encoder.c | 27 ++--
drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 3 -
drivers/gpu/drm/exynos/exynos_drm_plane.c | 1 -
drivers/gpu/drm/exynos/exynos_drm_vidi.c| 2 +-
drivers/gpu/drm/exynos/exynos_hdmi.c| 2 +-
10 files changed, 67 insertions(+), 77 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index 6704d5c..e030d16 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -949,7 +949,7 @@ static void exynos_dp_connector_destroy(struct
drm_connector *connector)
}
static struct drm_connector_funcs exynos_dp_connector_funcs = {
- .dpms = drm_helper_connector_dpms,
+ .dpms = drm_atomic_helper_connector_dpms,
.fill_modes = drm_helper_probe_single_connector_modes,
.detect = exynos_dp_detect,
.destroy = exynos_dp_connector_destroy,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 0db7b91..b493993 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -22,51 +22,57 @@
#include "exynos_drm_encoder.h"
#include "exynos_drm_plane.h"
-static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
+static void exynos_drm_crtc_enable(struct drm_crtc *crtc)
{
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+ struct exynos_drm_plane *exynos_plane = to_exynos_plane(crtc->primary);
- DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
-
- if (exynos_crtc->dpms == mode) {
- DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
+ if (WARN_ON(exynos_crtc->enabled))
return;
- }
-
- if (mode > DRM_MODE_DPMS_ON) {
- /* wait for the completion of page flip. */
- if (!wait_event_timeout(exynos_crtc->pending_flip_queue,
- (exynos_crtc->event == NULL), HZ/20))
- exynos_crtc->event = NULL;
- drm_crtc_vblank_off(crtc);
- }
if (exynos_crtc->ops->dpms)
- exynos_crtc->ops->dpms(exynos_crtc, mode);
+ exynos_crtc->ops->dpms(exynos_crtc, DRM_MODE_DPMS_ON);
- exynos_crtc->dpms = mode;
+ exynos_crtc->enabled = true;
- if (mode == DRM_MODE_DPMS_ON)
- drm_crtc_vblank_on(crtc);
-}
+ drm_crtc_vblank_on(crtc);
-static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
-{
- /* drm framework doesn't check NULL. */
+ if (exynos_crtc->ops->win_commit)
+ exynos_crtc->ops->win_commit(exynos_crtc, exynos_plane->zpos);
+
+ if (exynos_crtc->ops->commit)
+ exynos_crtc->ops->commit(exynos_crtc);
}
-static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
+static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
{
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
- struct exynos_drm_plane *exynos_plane = to_exynos_plane(crtc->primary);
+ struct drm_plane *plane;
+ int ret;
+
+ if (WARN_ON(!exynos_crtc->enabled))
+ return;
- exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
+ /* wait for the completion of page flip. */
+ if (!wait_event_timeout(exynos_crtc->pending_flip_queue,
+ (exynos_crtc->event == NULL), HZ/20))
+ exynos_crtc->event = NULL;
- if (exynos_crtc->ops->win_commit)
- exynos_crtc->ops->win_commit(exynos_crtc, exynos_plane->zpos);
+ drm_crtc_vblank_off(crtc);
- if (exynos_crtc->ops->commit)
- exynos_crtc->ops->commit(exynos_crtc);
+ if (exynos_crtc->ops->dpms)
+ exynos_crtc->ops->dpms(exynos_crtc, DRM_MODE_DPMS_OFF);
+
+ exynos_crtc->enabled = false;
+
+ drm_for_each_legacy_plane(plane, &crtc->dev->mode_config.plane_list) {
+ if (plane->crtc != crtc)
+ continue;
+
+ ret = plane->funcs->disable_plane(plane);
+ if (ret)
+ DRM_ERROR("Failed to disable plane %d\n", ret);
+ }
}
static bool
@@ -95,32 +101,36 @@ exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
exynos_crtc->ops->commit(exynos_crtc);
}
-static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
+static int ex
[PATCH] ARM: dts: exynos4412: Enable AX88760 USB hub on Origen board
Enable the Origen's usb phy and ohci devices in the device tree. Also
add the "samsung,vbus-gpio" property to enable the GPX3(5) gpio pin so
the AX88760 hub is powered.
Signed-off-by: Matthew Leach
---
arch/arm/boot/dts/exynos4412-origen.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index bd8b730..c810ca3 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -531,4 +531,19 @@
clock-frequency = <2400>;
};
};
+
+ exynos-usbphy@125B {
+ status = "okay";
+ };
+
+ ehci@1258 {
+ samsung,vbus-gpio = <&gpx3 5 1>;
+ status = "okay";
+ port@1{
+ status = "okay";
+ };
+ port@2 {
+ status = "okay";
+ };
+ };
};
--
2.3.4
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Re: [PATCH 00/16 v2] iommu: Move domain allocation into drivers
Hi Joerg, On Thu, Mar 26, 2015 at 12:43:03PM +, Joerg Roedel wrote: > Changes v1-v2: > > * Rebased to v4.0-rc5 > * Converted domain-types to a bit-field > > Hi, > > here is patch-set to replace the existing domain_init and > domain_destroy iommu-ops with the new domain_alloc and > domain_free callbacks Whilst I'm still a bit worried about the ability of the IOMMU driver to do very much in the ->domain_alloc callback (since we don't know which IOMMU instance the domain is for), it doesn't leave us any worse off than we currently are. So, for the arm-smmu patch and the core IOMMU changes: Acked-by: Will Deacon Hopefully this doesn't conflict too badly with my outstanding arm-smmu pull requests to you, but do shout if you have any trouble. Will -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH v3 2/2] clk: exynos5420: Make sure MDMA0 clock is enabled during suspend
Hello Tomasz,
Thanks a lot for your feedback.
On 03/30/2015 06:07 PM, Tomasz Figa wrote:
> Hi Javier,
>
> Please see my comments inline.
>
> 2015-03-31 0:53 GMT+09:00 Javier Martinez Canillas
> :
> [snip]
>> diff --git a/drivers/clk/samsung/clk-exynos5420.c
>> b/drivers/clk/samsung/clk-exynos5420.c
>> index 07d666cc6a29..2d39b629144a 100644
>> --- a/drivers/clk/samsung/clk-exynos5420.c
>> +++ b/drivers/clk/samsung/clk-exynos5420.c
>> @@ -151,6 +151,7 @@ enum exynos5x_plls {
>>
>> static void __iomem *reg_base;
>> static enum exynos5x_soc exynos5x_soc;
>> +struct samsung_clk_provider *ctx;
>
> static
>
Ok.
>>
>> #ifdef CONFIG_PM_SLEEP
>> static struct samsung_clk_reg_dump *exynos5x_save;
>> @@ -275,8 +276,18 @@ static const struct samsung_clk_reg_dump
>> exynos5420_set_clksrc[] = {
>> { .offset = GATE_IP_PERIC, .value = 0x, },
>> };
>>
>> +/*
>> + * list of clocks that have to be kept enabled during suspend/resume cycle.
>> + */
>> +static unsigned int exynos5x_clk_suspend[] = {
>
> static const
>
Ok.
>> + CLK_MDMA0,
>> +};
>> +
>> static int exynos5420_clk_suspend(void)
>> {
>> + int i;
>> + struct clk *clk;
>> +
>> samsung_clk_save(reg_base, exynos5x_save,
>> ARRAY_SIZE(exynos5x_clk_regs));
>>
>> @@ -287,11 +298,24 @@ static int exynos5420_clk_suspend(void)
>> samsung_clk_restore(reg_base, exynos5420_set_clksrc,
>> ARRAY_SIZE(exynos5420_set_clksrc));
>>
>> + for (i = 0; i < ARRAY_SIZE(exynos5x_clk_suspend); i++) {
>> + clk = samsung_clk_lookup(ctx, exynos5x_clk_suspend[i]);
>
> If look-up speed is important here, maybe all the relevant clocks
> could be looked up once at initialization time and just prepared and
> enabled here?
>
Yes, I'll do that indeed.
In fact, I was wondering if we should let this clock be disabled at
all. I noticed that the rockchip clk drivers do something similar
and prepare / enable a list of clocks at init time [0,1].
Unfortunately I don't fully understand why this clock needs to be
enabled. It would be good if someone at Samsung can explain in
more detail what the real problem really is.
> Best regards,
> Tomasz
>
Best regards,
Javier
[0]: http://lxr.free-electrons.com/source/drivers/clk/rockchip/clk.c#L320
[1]: http://lxr.free-electrons.com/source/drivers/clk/rockchip/clk-rk3288.c#L874
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Re: [PATCH v7 1/9] arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC
Hi, On Wed, Mar 18, 2015 at 12:17:28AM +, Chanwoo Choi wrote: > This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on > Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports > PSCI (Power State Coordination Interface) v0.1. > > This patch includes following dt node to support Exynos5433 SoC: > 1. Octa core for big.LITTLE architecture > - Cortex-A53 LITTLE Quad-core > - Cortex-A57 big Quad-core > - Support PSCI v0.1 Is CPU0 hotplug still broken, or has the FW been fixed? I'm very worried about adding a DT that's known broken, especially when we have no idea as to if/when the FW will be fixed judging from prior replies. Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH v3 1/2] clk: samsung: Add a clock lookup function
Hello Tomasz, On 03/30/2015 06:02 PM, Tomasz Figa wrote: > Hi Javier, > > 2015-03-31 0:53 GMT+09:00 Javier Martinez Canillas > : >> The Samsung helpers functions to register clocks, add the clock instance >> returned by the common clock framework to a lookup table that is used by >> OF to lookup the clocks. >> >> But this table could also be useful to clock drivers if they need to get >> a clock instance since the helper functions don't return them. >> >> The common clock framework __clk_lookup() function from the clk provider >> API could be used by drivers as well. But it's more efficient to use the >> Samsung specific lookup table that returns the clock instance in constant >> time, than using the __clk_lookup() function that uses the clock name as >> an index so it has a linear search time. > > Is this really something we should be concerned about? If so, maybe > the generic look-up function should be rewritten to use something > faster, such as tree or hash table? > I don't performance is a big issue here. I just thought that since the lookup table is already filled by the driver and the lookup function is one line, we could use that instead to get the performance benefit. But I don't mind to drop this patch and use the generic lookup function from the CCF API if that is preferred. > Best regards, > Tomasz > Best regards, Javier -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH v3 2/2] clk: exynos5420: Make sure MDMA0 clock is enabled during suspend
Hi Javier,
Please see my comments inline.
2015-03-31 0:53 GMT+09:00 Javier Martinez Canillas
:
[snip]
> diff --git a/drivers/clk/samsung/clk-exynos5420.c
> b/drivers/clk/samsung/clk-exynos5420.c
> index 07d666cc6a29..2d39b629144a 100644
> --- a/drivers/clk/samsung/clk-exynos5420.c
> +++ b/drivers/clk/samsung/clk-exynos5420.c
> @@ -151,6 +151,7 @@ enum exynos5x_plls {
>
> static void __iomem *reg_base;
> static enum exynos5x_soc exynos5x_soc;
> +struct samsung_clk_provider *ctx;
static
>
> #ifdef CONFIG_PM_SLEEP
> static struct samsung_clk_reg_dump *exynos5x_save;
> @@ -275,8 +276,18 @@ static const struct samsung_clk_reg_dump
> exynos5420_set_clksrc[] = {
> { .offset = GATE_IP_PERIC, .value = 0x, },
> };
>
> +/*
> + * list of clocks that have to be kept enabled during suspend/resume cycle.
> + */
> +static unsigned int exynos5x_clk_suspend[] = {
static const
> + CLK_MDMA0,
> +};
> +
> static int exynos5420_clk_suspend(void)
> {
> + int i;
> + struct clk *clk;
> +
> samsung_clk_save(reg_base, exynos5x_save,
> ARRAY_SIZE(exynos5x_clk_regs));
>
> @@ -287,11 +298,24 @@ static int exynos5420_clk_suspend(void)
> samsung_clk_restore(reg_base, exynos5420_set_clksrc,
> ARRAY_SIZE(exynos5420_set_clksrc));
>
> + for (i = 0; i < ARRAY_SIZE(exynos5x_clk_suspend); i++) {
> + clk = samsung_clk_lookup(ctx, exynos5x_clk_suspend[i]);
If look-up speed is important here, maybe all the relevant clocks
could be looked up once at initialization time and just prepared and
enabled here?
Best regards,
Tomasz
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Re: [RFC PATCH v3 1/2] clk: samsung: Add a clock lookup function
Hi Javier, 2015-03-31 0:53 GMT+09:00 Javier Martinez Canillas : > The Samsung helpers functions to register clocks, add the clock instance > returned by the common clock framework to a lookup table that is used by > OF to lookup the clocks. > > But this table could also be useful to clock drivers if they need to get > a clock instance since the helper functions don't return them. > > The common clock framework __clk_lookup() function from the clk provider > API could be used by drivers as well. But it's more efficient to use the > Samsung specific lookup table that returns the clock instance in constant > time, than using the __clk_lookup() function that uses the clock name as > an index so it has a linear search time. Is this really something we should be concerned about? If so, maybe the generic look-up function should be rewritten to use something faster, such as tree or hash table? Best regards, Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 2/2] ARM: EXYNOS: Make sure that the Exynos5420 MDMA0 clock is enabled during suspend
Hello Chanwoo, Thanks a lot for your feedback. On 03/30/2015 04:04 AM, Chanwoo Choi wrote: > > I faced on the similiar issue. If some clock was disabled, > Exynos SoC could not enter the suspend mode > > But, I think it is not prpper method to resolve this issue. > about that that specific clock (e.g., mdma0) is handled in this dirver. > Also, ARM-64bit don't include any '../mach-exynos' directory. > > IMHO, some clock issue have to be handled in SoC clk driver or others. > Ok, Abhilash also said that before so I just posted another RFC: "[RFC PATCH v3 0/2] ARM: EXYNOS: Fix Suspend-to-RAM on Exynos5420" Please let me know if that is more aligned to what you were thinking as the proper solution. > > Best Regards, > Chanwoo Choi > Best regards, Javier -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH v3 2/2] clk: exynos5420: Make sure MDMA0 clock is enabled during suspend
Commit ae43b3289186 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power
Management support v12") added pm support for the pl330 dma driver but
it makes the clock for the Exynos5420 MDMA0 DMA controller to be gated
during suspend and this clock needs to remain enabled in order to make
the system resume from a system suspend state.
To make sure that the clock is enabled during suspend, enable it prior
to entering a suspend state and disable it once the system has resumed.
Thanks to Abhilash Kesavan for figuring out that this was the issue.
Fixes: ae43b32 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power Management
support v12")
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/samsung/clk-exynos5420.c | 26 --
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c
b/drivers/clk/samsung/clk-exynos5420.c
index 07d666cc6a29..2d39b629144a 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -151,6 +151,7 @@ enum exynos5x_plls {
static void __iomem *reg_base;
static enum exynos5x_soc exynos5x_soc;
+struct samsung_clk_provider *ctx;
#ifdef CONFIG_PM_SLEEP
static struct samsung_clk_reg_dump *exynos5x_save;
@@ -275,8 +276,18 @@ static const struct samsung_clk_reg_dump
exynos5420_set_clksrc[] = {
{ .offset = GATE_IP_PERIC, .value = 0x, },
};
+/*
+ * list of clocks that have to be kept enabled during suspend/resume cycle.
+ */
+static unsigned int exynos5x_clk_suspend[] = {
+ CLK_MDMA0,
+};
+
static int exynos5420_clk_suspend(void)
{
+ int i;
+ struct clk *clk;
+
samsung_clk_save(reg_base, exynos5x_save,
ARRAY_SIZE(exynos5x_clk_regs));
@@ -287,11 +298,24 @@ static int exynos5420_clk_suspend(void)
samsung_clk_restore(reg_base, exynos5420_set_clksrc,
ARRAY_SIZE(exynos5420_set_clksrc));
+ for (i = 0; i < ARRAY_SIZE(exynos5x_clk_suspend); i++) {
+ clk = samsung_clk_lookup(ctx, exynos5x_clk_suspend[i]);
+ clk_prepare_enable(clk);
+ }
+
return 0;
}
static void exynos5420_clk_resume(void)
{
+ int i;
+ struct clk *clk;
+
+ for (i = 0; i < ARRAY_SIZE(exynos5x_clk_suspend); i++) {
+ clk = samsung_clk_lookup(ctx, exynos5x_clk_suspend[i]);
+ clk_disable_unprepare(clk);
+ }
+
samsung_clk_restore(reg_base, exynos5x_save,
ARRAY_SIZE(exynos5x_clk_regs));
@@ -1255,8 +1279,6 @@ static const struct of_device_id ext_clk_match[]
__initconst = {
static void __init exynos5x_clk_init(struct device_node *np,
enum exynos5x_soc soc)
{
- struct samsung_clk_provider *ctx;
-
if (np) {
reg_base = of_iomap(np, 0);
if (!reg_base)
--
2.1.4
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[RFC PATCH v3 1/2] clk: samsung: Add a clock lookup function
The Samsung helpers functions to register clocks, add the clock instance
returned by the common clock framework to a lookup table that is used by
OF to lookup the clocks.
But this table could also be useful to clock drivers if they need to get
a clock instance since the helper functions don't return them.
The common clock framework __clk_lookup() function from the clk provider
API could be used by drivers as well. But it's more efficient to use the
Samsung specific lookup table that returns the clock instance in constant
time, than using the __clk_lookup() function that uses the clock name as
an index so it has a linear search time.
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/samsung/clk.c | 6 ++
drivers/clk/samsung/clk.h | 3 +++
2 files changed, 9 insertions(+)
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 9e1f88c04fd4..3b2868a70774 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -96,6 +96,12 @@ void samsung_clk_add_lookup(struct samsung_clk_provider
*ctx, struct clk *clk,
ctx->clk_data.clks[id] = clk;
}
+struct clk *samsung_clk_lookup(struct samsung_clk_provider *ctx,
+ unsigned int id)
+{
+ return ctx->clk_data.clks ? ctx->clk_data.clks[id] : NULL;
+}
+
/* register a list of aliases */
void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index e4c75383cea7..ad04220bd733 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -368,6 +368,9 @@ extern void __init samsung_clk_of_register_fixed_ext(
extern void samsung_clk_add_lookup(struct samsung_clk_provider *ctx,
struct clk *clk, unsigned int id);
+extern struct clk *samsung_clk_lookup(struct samsung_clk_provider *ctx,
+ unsigned int id);
+
extern void samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
unsigned int nr_clk);
--
2.1.4
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[RFC PATCH v3 0/2] ARM: EXYNOS: Fix Suspend-to-RAM on Exynos5420
Hello, This series is a 3rd version of a RFC to fix Suspend-to-RAM on Exynos5420. Abhilash Kesavan traced down to the MDMA0 DMA controller clock needed to be enabled during suspend in order to make the system resume correctly. I posted a RFC that grabbed the clock in the Exynos5420 specific suspend and resume callbacks [0] and a re-spin [1] but was asked by Abhilash and Chanwoo to do it in the clock driver instead. So this series is an attempt to fix the issue and is composed of patches: Javier Martinez Canillas (2): clk: samsung: Add a clock lookup function clk: exynos5420: Make sure MDMA0 clock is enabled during suspend drivers/clk/samsung/clk-exynos5420.c | 26 -- drivers/clk/samsung/clk.c| 6 ++ drivers/clk/samsung/clk.h| 3 +++ 3 files changed, 33 insertions(+), 2 deletions(-) Patch #1 just adds a function to lookup the provider clock instances. Patch #2 enables the MDMA0 clock before entering into a suspend state and disables it again once the system has been resumed. The patches are again an RFC because I'm not sure if this is the best approach to solve the issue. So feedback will be highly appreciated. Best regards, Javier [0]: https://lkml.org/lkml/2015/3/27/397 [1]: https://lkml.org/lkml/2015/3/27/770 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] ARM: dts: Add HS400 support for exynos5422-odroidxu3
HS400 timing values are added for exynos5422-odroidxu3 board.
---
This patch is analog to [0].
This patch needs [0] for the pin-ctrl definition of sd0_rclk.
[0]:
https://www.mail-archive.com/linux-samsung-soc%40vger.kernel.org/msg42902.html
Signed-off-by: Markus Reichl
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index a519c86..0408ec0 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -298,15 +298,20 @@
&mmc_0 {
status = "okay";
+ num-slots = <1>;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-hs400-timing = <0 2>;
+ samsung,read-strobe-delay = <90>;
pinctrl-names = "default";
- pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_rclk>;
bus-width = <8>;
cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
};
&mmc_2 {
--
1.9.1
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Re: [PATCH V3 2/2] ARM: dts: exynos5422-odroidxu3: add 'rtc_src' clock to rtc node
2015-03-30 17:38 GMT+02:00 Markus Reichl : > The Exynos5422 SoC has a s3c6410 RTC where the source clock > is now a mandatory property. > > This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards. > It is based in v4.0-rc2. > > Signed-off-by: Markus Reichl > --- > Changes since v2: > 1. Dropped unused phandle. > Changes since v1: > 1. Dropped Documentation. > 2. Split into 2 parts. > --- > arch/arm/boot/dts/exynos5422-odroidxu3.dts | 10 ++ > 1 file changed, 6 insertions(+), 4 deletions(-) Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 2/2] ARM: dts: exynos5422-odroidxu3: add 'rtc_src' clock to rtc node
The Exynos5422 SoC has a s3c6410 RTC where the source clock
is now a mandatory property.
This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards.
It is based in v4.0-rc2.
Signed-off-by: Markus Reichl
---
Changes since v2:
1. Dropped unused phandle.
Changes since v1:
1. Dropped Documentation.
2. Split into 2 parts.
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index 0408ec0..4a7ca15 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -274,10 +274,6 @@
reg = <0x50>;
};
};
-
- rtc@101E {
- status = "okay";
- };
};
&hdmi {
@@ -374,3 +370,9 @@
shunt-resistor = <1>;
};
};
+
+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
+ clock-names = "rtc", "rtc_src";
+};
--
1.9.1
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[PATCH V3 1/2] ARM: dts: Add bindings for 32kHz clocks from s2mps11
This creates include/dt-bindings/clock/samsung,s2mps11.h with the three 32kHz clock outputs from the s2mps11 mfd. Signed-off-by: Markus Reichl Reviewed-by: Krzysztof Kozlowski --- Changes since v2: None Changes since v1: 1. Dropped Documentation. 2. Split into 2 parts. --- include/dt-bindings/clock/samsung,s2mps11.h | 23 +++ 1 file changed, 23 insertions(+) create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h diff --git a/include/dt-bindings/clock/samsung,s2mps11.h b/include/dt-bindings/clock/samsung,s2mps11.h new file mode 100644 index 000..b903d7d --- /dev/null +++ b/include/dt-bindings/clock/samsung,s2mps11.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2015 Markus Reichl + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants clocks for the Samsung S2MPS11 PMIC. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H + +/* Fixed rate clocks. */ + +#define S2MPS11_CLK_AP 0 +#define S2MPS11_CLK_CP 1 +#define S2MPS11_CLK_BT 2 + +/* Total number of clocks. */ +#define S2MPS11_CLKS_NUM (S2MPS11_CLK_BT + 1) + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H */ -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: dts: Use define for s3c-rtc clock id
Use a define instead of raw number as a ID for "rtc_src" clock.
Signed-off-by: Krzysztof Kozlowski
---
Patch depends on new file "dt-bindings/clock/samsung,s2mps11.h" from:
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg43136.html
---
arch/arm/boot/dts/exynos3250-rinato.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 3905824cac58..d2cbc95364de 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -16,6 +16,7 @@
#include "exynos3250.dtsi"
#include
#include
+#include
/ {
model = "Samsung Rinato board";
@@ -605,7 +606,7 @@
};
&rtc {
- clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
+ clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
clock-names = "rtc", "rtc_src";
status = "okay";
};
--
1.9.1
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[PATCH 2/2] ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc
Mark "samsung,exynos3250-rtc" compatible as deprecated because it
duplicates the "samsung,s3c6410-rtc". Use "samsung,s3c6410-rtc" on
Exynos3250 and Exynos4415 boards.
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/rtc/s3c-rtc.txt | 3 ++-
arch/arm/boot/dts/exynos3250.dtsi | 2 +-
arch/arm/boot/dts/exynos4415.dtsi | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
index ab757b84daa7..ac2fcd6ff4b8 100644
--- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
@@ -6,7 +6,8 @@ Required properties:
* "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
* "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
* "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
-* "samsung,exynos3250-rtc" - for controllers compatible with exynos3250
rtc.
+* "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with
+ exynos3250 rtc (use "samsung,s3c6410-rtc").
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: Two interrupt numbers to the cpu should be specified. First
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index e3bfb11c6ef8..8d58b550e925 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -189,7 +189,7 @@
};
rtc: rtc@1007 {
- compatible = "samsung,exynos3250-rtc";
+ compatible = "samsung,s3c6410-rtc";
reg = <0x1007 0x100>;
interrupts = <0 73 0>, <0 74 0>;
interrupt-parent = <&pmu_system_controller>;
diff --git a/arch/arm/boot/dts/exynos4415.dtsi
b/arch/arm/boot/dts/exynos4415.dtsi
index 5caea996e090..186cb8465683 100644
--- a/arch/arm/boot/dts/exynos4415.dtsi
+++ b/arch/arm/boot/dts/exynos4415.dtsi
@@ -177,7 +177,7 @@
};
rtc: rtc@1007 {
- compatible = "samsung,exynos3250-rtc";
+ compatible = "samsung,s3c6410-rtc";
reg = <0x1007 0x100>;
interrupts = <0 73 0>, <0 74 0>;
status = "disabled";
--
1.9.1
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[PATCH 1/2] drivers/rtc/rtc-s3c.c: Integrate Exynos3250 into S3C6410
There are now no differences between RTC on Exynos3250 and S3C6410.
Merge everything into one so duplicated code could be removed.
Signed-off-by: Krzysztof Kozlowski
---
drivers/rtc/rtc-s3c.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index fb0c569765c6..5e162eaad277 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -774,18 +774,6 @@ static struct s3c_rtc_data const s3c6410_rtc_data = {
.disable= s3c6410_rtc_disable,
};
-static struct s3c_rtc_data const exynos3250_rtc_data = {
- .max_user_freq = 32768,
- .needs_src_clk = true,
- .irq_handler= s3c6410_rtc_irq,
- .set_freq = s3c6410_rtc_setfreq,
- .enable_tick= s3c6410_rtc_enable_tick,
- .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
- .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
- .enable = s3c24xx_rtc_enable,
- .disable= s3c6410_rtc_disable,
-};
-
static const struct of_device_id s3c_rtc_dt_match[] = {
{
.compatible = "samsung,s3c2410-rtc",
@@ -801,7 +789,7 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
.data = (void *)&s3c6410_rtc_data,
}, {
.compatible = "samsung,exynos3250-rtc",
- .data = (void *)&exynos3250_rtc_data,
+ .data = (void *)&s3c6410_rtc_data,
},
{ /* sentinel */ },
};
--
1.9.1
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[PATCH 0/2] ARM: EXYNOS: Minor S3C RTC cleanups
Hi, Now the s3c6410-rtc is exactly the same as exynos3250-rtc. Mark the second one as deprecated and switch to one binding. Patches are independent. Best regards, Krzysztof Krzysztof Kozlowski (3): drivers/rtc/rtc-s3c.c: Integrate Exynos3250 into S3C6410 ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc ARM: dts: Use define for s3c-rtc clock id Documentation/devicetree/bindings/rtc/s3c-rtc.txt | 3 ++- arch/arm/boot/dts/exynos3250-rinato.dts | 3 ++- arch/arm/boot/dts/exynos3250.dtsi | 2 +- arch/arm/boot/dts/exynos4415.dtsi | 2 +- drivers/rtc/rtc-s3c.c | 14 +- 5 files changed, 7 insertions(+), 17 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 2/2] ARM: dts: exynos5422-odroidxu3: add 'rtc_src' clock to rtc node
2015-03-30 16:16 GMT+02:00 Markus Reichl :
> The Exynos5422 SoC has a s3c6410 RTC where the source clock
> is now a mandatory property.
>
> This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards.
> It is based in v4.0-rc2.
>
> Tested-by: Anand Moon
> Signed-off-by: Markus Reichl
> ---
> Changes since v1:
> 1. Dropped Documentation.
> 2. Split into 2 parts.
> ---
>
> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 13 -
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> index a519c86..ac663ec 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> @@ -11,6 +11,7 @@
> */
>
> /dts-v1/;
> +#include
> #include "exynos5800.dtsi"
>
> / {
> @@ -44,7 +45,7 @@
> hsi2c_4: i2c@12CA {
> status = "okay";
>
> - s2mps11_pmic@66 {
> + s2mps11: s2mps11_pmic@66 {
Why this is needed? This phandle is not used later.
Rest looks fine.
Best regards,
Krzysztof
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Re: [PATCH V2 1/2] ARM: dts: Add bindings for 32kHz clocks from s2mps11
2015-03-30 16:15 GMT+02:00 Markus Reichl : > This creates include/dt-bindings/clock/samsung,s2mps11.h with the three > 32kHz clock outputs from the s2mps11 mfd. > > Signed-off-by: Markus Reichl > --- > Changes since v1: > 1. Dropped Documentation. > 2. Split into 2 parts. > --- > include/dt-bindings/clock/samsung,s2mps11.h | 23 +++ > 1 file changed, 23 insertions(+) > create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 1/2] ARM: dts: Add bindings for 32kHz clocks from s2mps11
This creates include/dt-bindings/clock/samsung,s2mps11.h with the three 32kHz clock outputs from the s2mps11 mfd. Signed-off-by: Markus Reichl --- Changes since v1: 1. Dropped Documentation. 2. Split into 2 parts. --- include/dt-bindings/clock/samsung,s2mps11.h | 23 +++ 1 file changed, 23 insertions(+) create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h diff --git a/include/dt-bindings/clock/samsung,s2mps11.h b/include/dt-bindings/clock/samsung,s2mps11.h new file mode 100644 index 000..b903d7d --- /dev/null +++ b/include/dt-bindings/clock/samsung,s2mps11.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2015 Markus Reichl + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants clocks for the Samsung S2MPS11 PMIC. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H + +/* Fixed rate clocks. */ + +#define S2MPS11_CLK_AP 0 +#define S2MPS11_CLK_CP 1 +#define S2MPS11_CLK_BT 2 + +/* Total number of clocks. */ +#define S2MPS11_CLKS_NUM (S2MPS11_CLK_BT + 1) + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H */ -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 2/2] ARM: dts: exynos5422-odroidxu3: add 'rtc_src' clock to rtc node
The Exynos5422 SoC has a s3c6410 RTC where the source clock
is now a mandatory property.
This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards.
It is based in v4.0-rc2.
Tested-by: Anand Moon
Signed-off-by: Markus Reichl
---
Changes since v1:
1. Dropped Documentation.
2. Split into 2 parts.
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index a519c86..ac663ec 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -11,6 +11,7 @@
*/
/dts-v1/;
+#include
#include "exynos5800.dtsi"
/ {
@@ -44,7 +45,7 @@
hsi2c_4: i2c@12CA {
status = "okay";
- s2mps11_pmic@66 {
+ s2mps11: s2mps11_pmic@66 {
compatible = "samsung,s2mps11-pmic";
reg = <0x66>;
s2mps11,buck2-ramp-delay = <12>;
@@ -274,10 +275,6 @@
reg = <0x50>;
};
};
-
- rtc@101E {
- status = "okay";
- };
};
&hdmi {
@@ -369,3 +366,9 @@
shunt-resistor = <1>;
};
};
+
+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
+ clock-names = "rtc", "rtc_src";
+};
--
1.9.1
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Re: [PATCH 2/5] exynos: add EXYNOS_G2D_EVENT to drmHandleEvent
Hello, On 2015-03-30 02:02, Rob Clark wrote: so, iirc, vmwgfx also has some custom events.. not really sure if they have their own hand-rolled drmHandleEvent() or if they have another way of catching those. Maybe we need some more flexible way to register handlers for driver custom events? But everyone adding their own thing to drmHandleEvent() doesn't really seem so nice.. that said, I'm not sure how much to care. If it is just exynos and vmwgfx, then telling them to use there own version of of drmHandleEvent() might be ok. But if driver custom events somehow become more popular, maybe we want a better solution.. would something like this work for you guys: https://www.math.uni-bielefeld.de/~tjakobi/archive/0001-custom-events.patch (this is not compile tested or anything, just a draft) Basically this introduces drmHandleEvent2, which is drmHandleEvent with two additional arguments. The first one being a function pointer through which the 'remaining' events (which are not handled by the common code) are handled, and some (opaque) pointer to data that the handler might need. In the vendor specific code I then introcuded exynos_handle_event which calls dramHandleEvent2 with a properly setup handler. vmwgfx could do the same here I guess. With best wishes, Tobias -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] ARM: dts: exynos5422-odroidxu3: add 'rtc_src' clock to rtc node
2015-03-30 12:49 GMT+02:00 Markus Reichl :
>
> The Exynos5422 SoC has a s3c6410 RTC where the source clock
> is now a mandatory property.
>
> This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards.
> It is based in v4.0-rc2.
Could you split this into separate patches:
1. Add S2MPS related changes clocks (this is a separate feature),
changes in documentation (if such are needed but I doubt it).
2. Fix S3C RTC.
>
> Signed-off-by: Markus Reichl
> Tested-by: Anand Moon
> ---
> .../devicetree/bindings/clock/samsung,s2mps11.txt | 67
> ++
> arch/arm/boot/dts/exynos5422-odroidxu3.dts | 12 ++--
> include/dt-bindings/clock/samsung,s2mps11.h| 23
> 3 files changed, 98 insertions(+), 4 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
> create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h
>
> diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
> b/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
> new file mode 100644
> index 000..46c61ce
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
> @@ -0,0 +1,67 @@
> +Binding for Samsung S2MPS11 32k clock generator block
> +
> +This is a part of device tree bindings of S2MPS11 multi-function device.
> +More information can be found in bindings/mfd/s2mps11.txt file.
This whole information is already present in bindings/mfd/s2mps11.txt
file. I don't think it is good to duplicate documentation. It will
double the effort of maintaining it and this way we can even introduce
incompatible differences in docs.
> +
> +The S2MPS11 contains three 32.768khz clock outputs that can be controlled
> +(gated/ungated) over I2C.
> +
> +Following properties should be present in main device node of the MFD chip.
> +
> +Required properties:
> +- #clock-cells: From common clock binding; shall be set to 1.
> +
> +Optional properties:
> +- clock-output-names: From common clock binding.
> +
> +Each clock is assigned an identifier and client nodes can use this identifier
> +to specify the clock which they consume. Following indices are allowed:
> + - 0: 32khz_ap clock,
> + - 1: 32khz_cp clock.
> + - 2: 32khz_bt clock
> +
> +Clocks are defined as preprocessor macros in
> dt-bindings/clock/samsung,s2mps11.h
> +header and can be used in device tree sources.
> +
> +Example: Node of the MFD chip
> +
> + s2mps11: s2mps11@66 {
> + compatible = "samsung,s2mps11";
> + interrupt-parent = <&wakeup_eint>;
> + interrupts = <26 0>;
> + reg = <0x66>;
> + #clock-cells = <1>;
> +
> + /* ... */
> + };
> +
> +Example: Clock consumer node
> +
> + foo@0 {
> + compatible = "bar,foo";
> + /* ... */
> + clock-names = "my-clock";
> + clocks = <&s2mps11 S2MPS11_CLK_32K_AP>;
> + };
> +
> +Presently (19.3.2015) the above said is not correct yet.
I don't get it... You are describing some kind of future here?
Best regards,
Krzysztof
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Re: [PATCH 2/5] exynos: add EXYNOS_G2D_EVENT to drmHandleEvent
Hello,
On 2015-03-30 02:02, Rob Clark wrote:
Maybe we need some more flexible way to register handlers for driver
custom events? But everyone adding their own thing to
drmHandleEvent() doesn't really seem so nice.. that said, I'm not
sure how much to care. If it is just exynos and vmwgfx, then telling
them to use there own version of of drmHandleEvent() might be ok. But
if driver custom events somehow become more popular, maybe we want a
better solution..
I don't like the idea of just copying the current drmHandleEvent() code
and putting it into the exynos code together with the additional switch
cases. It just screams "HACK!" to me.
I'm going to try to come up with a solution where we can at least share
some of the code.
With best wishes,
Tobias
BR,
-R
On Fri, Mar 20, 2015 at 6:25 PM, Tobias Jakobi
wrote:
This event is specific to Exynos G2D DRM driver. Only
process it when Exynos support is enabled.
Signed-off-by: Tobias Jakobi
---
exynos/exynos_drm.h | 12
xf86drm.h | 7 ++-
xf86drmMode.c | 18 ++
3 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/exynos/exynos_drm.h b/exynos/exynos_drm.h
index 256c02f..c3af0ac 100644
--- a/exynos/exynos_drm.h
+++ b/exynos/exynos_drm.h
@@ -157,4 +157,16 @@ struct drm_exynos_g2d_exec {
#define DRM_IOCTL_EXYNOS_G2D_EXEC
DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
+/* EXYNOS specific events */
+#define DRM_EXYNOS_G2D_EVENT 0x8000
+
+struct drm_exynos_g2d_event {
+ struct drm_eventbase;
+ __u64 user_data;
+ __u32 tv_sec;
+ __u32 tv_usec;
+ __u32 cmdlist_no;
+ __u32 reserved;
+};
+
#endif
diff --git a/xf86drm.h b/xf86drm.h
index 40c55c9..6b1c9b4 100644
--- a/xf86drm.h
+++ b/xf86drm.h
@@ -719,7 +719,7 @@ extern void drmMsg(const char *format, ...)
DRM_PRINTFLIKE(1, 2);
extern int drmSetMaster(int fd);
extern int drmDropMaster(int fd);
-#define DRM_EVENT_CONTEXT_VERSION 2
+#define DRM_EVENT_CONTEXT_VERSION 3
typedef struct _drmEventContext {
@@ -739,6 +739,11 @@ typedef struct _drmEventContext {
unsigned int tv_usec,
void *user_data);
+ void (*g2d_event_handler)(int fd,
+ unsigned int cmdlist_no,
+ unsigned int tv_sec,
+ unsigned int tv_usec,
+ void *user_data);
} drmEventContext, *drmEventContextPtr;
extern int drmHandleEvent(int fd, drmEventContextPtr evctx);
diff --git a/xf86drmMode.c b/xf86drmMode.c
index 61d5e01..d9f2898 100644
--- a/xf86drmMode.c
+++ b/xf86drmMode.c
@@ -53,6 +53,10 @@
#include
#include
+#ifdef HAVE_EXYNOS
+#include
+#endif
+
#ifdef HAVE_VALGRIND
#include
#include
@@ -846,6 +850,7 @@ int drmHandleEvent(int fd, drmEventContextPtr
evctx)
int len, i;
struct drm_event *e;
struct drm_event_vblank *vblank;
+ struct drm_exynos_g2d_event *g2d;
/* The DRM read semantics guarantees that we always get only
* complete events. */
@@ -882,6 +887,19 @@ int drmHandleEvent(int fd, drmEventContextPtr
evctx)
vblank->tv_usec,
U642VOID
(vblank->user_data));
break;
+#ifdef HAVE_EXYNOS
+ case DRM_EXYNOS_G2D_EVENT:
+ if (evctx->version < 3 ||
+ evctx->g2d_event_handler == NULL)
+ break;
+ g2d = (struct drm_exynos_g2d_event *) e;
+ evctx->g2d_event_handler(fd,
+g2d->cmdlist_no,
+g2d->tv_sec,
+g2d->tv_usec,
+U642VOID
(g2d->user_data));
+ break;
+#endif
default:
break;
}
--
2.0.5
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[PATCH 1/1] ARM: dts: exynos5422-odroidxu3: add 'rtc_src' clock to rtc node
The Exynos5422 SoC has a s3c6410 RTC where the source clock
is now a mandatory property.
This patch fixes probe failure of s3c-rtc on Odroid-XU3 boards.
It is based in v4.0-rc2.
Signed-off-by: Markus Reichl
Tested-by: Anand Moon
---
.../devicetree/bindings/clock/samsung,s2mps11.txt | 67 ++
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 12 ++--
include/dt-bindings/clock/samsung,s2mps11.h| 23
3 files changed, 98 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h
diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
b/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
new file mode 100644
index 000..46c61ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
@@ -0,0 +1,67 @@
+Binding for Samsung S2MPS11 32k clock generator block
+
+This is a part of device tree bindings of S2MPS11 multi-function device.
+More information can be found in bindings/mfd/s2mps11.txt file.
+
+The S2MPS11 contains three 32.768khz clock outputs that can be controlled
+(gated/ungated) over I2C.
+
+Following properties should be present in main device node of the MFD chip.
+
+Required properties:
+- #clock-cells: From common clock binding; shall be set to 1.
+
+Optional properties:
+- clock-output-names: From common clock binding.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. Following indices are allowed:
+ - 0: 32khz_ap clock,
+ - 1: 32khz_cp clock.
+ - 2: 32khz_bt clock
+
+Clocks are defined as preprocessor macros in
dt-bindings/clock/samsung,s2mps11.h
+header and can be used in device tree sources.
+
+Example: Node of the MFD chip
+
+ s2mps11: s2mps11@66 {
+ compatible = "samsung,s2mps11";
+ interrupt-parent = <&wakeup_eint>;
+ interrupts = <26 0>;
+ reg = <0x66>;
+ #clock-cells = <1>;
+
+ /* ... */
+ };
+
+Example: Clock consumer node
+
+ foo@0 {
+ compatible = "bar,foo";
+ /* ... */
+ clock-names = "my-clock";
+ clocks = <&s2mps11 S2MPS11_CLK_32K_AP>;
+ };
+
+Presently (19.3.2015) the above said is not correct yet.
+Until s2mps11 mfd driver is updated you still need to specify like that:
+
+ s2mps11: s2mps11@66 {
+ compatible = "samsung,s2mps11-pmic";
+ reg = <0x66>;
+ s2mps11_osc: clocks {
+ #clock-cells = <1>;
+ clock-output-names = "s2mps11_ap",
+ "s2mps11_cp", "s2mps11_bt";
+};
+ /* ... */
+ }
+
+ foo@0 {
+ compatible = "bar,foo";
+ /* ... */
+ clock-names = "my-clock";
+ clocks = <&s2mps11_osc S2MPS11_CLK_AP>;
+
+};
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index a519c86..7f1bb31 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -11,6 +11,7 @@
*/
/dts-v1/;
+#include
#include "exynos5800.dtsi"
/ {
@@ -44,7 +45,7 @@
hsi2c_4: i2c@12CA {
status = "okay";
- s2mps11_pmic@66 {
+ s2mps11: s2mps11_pmic@66 {
compatible = "samsung,s2mps11-pmic";
reg = <0x66>;
s2mps11,buck2-ramp-delay = <12>;
@@ -275,9 +276,6 @@
};
};
- rtc@101E {
- status = "okay";
- };
};
&hdmi {
@@ -369,3 +367,9 @@
shunt-resistor = <1>;
};
};
+
+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
+ clock-names = "rtc", "rtc_src";
+};
diff --git a/include/dt-bindings/clock/samsung,s2mps11.h
b/include/dt-bindings/clock/samsung,s2mps11.h
new file mode 100644
index 000..b903d7d
--- /dev/null
+++ b/include/dt-bindings/clock/samsung,s2mps11.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2015 Markus Reichl
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clocks for the Samsung S2MPS11 PMIC.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H
+
+/* Fixed rate clocks. */
+
+#define S2MPS11_CLK_AP 0
+#define S2MPS11_CLK_CP 1
+#define S2MPS11_CLK_BT 2
+
+/* Total number of clocks. */
+#define S2MPS11_CLKS_NUM (S2MPS11_CLK_BT + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H */
--
1.9.1
--
To un
